1 /* 2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef __MLX5_EN_TC_H__ 34 #define __MLX5_EN_TC_H__ 35 36 #include <net/pkt_cls.h> 37 #include "en.h" 38 #include "eswitch.h" 39 #include "en/tc_ct.h" 40 #include "en/tc_tun.h" 41 #include "en/tc/int_port.h" 42 #include "en_rep.h" 43 44 #define MLX5E_TC_FLOW_ID_MASK 0x0000ffff 45 46 #ifdef CONFIG_MLX5_ESWITCH 47 48 #define NIC_FLOW_ATTR_SZ (sizeof(struct mlx5_flow_attr) +\ 49 sizeof(struct mlx5_nic_flow_attr)) 50 #define ESW_FLOW_ATTR_SZ (sizeof(struct mlx5_flow_attr) +\ 51 sizeof(struct mlx5_esw_flow_attr)) 52 #define ns_to_attr_sz(ns) (((ns) == MLX5_FLOW_NAMESPACE_FDB) ?\ 53 ESW_FLOW_ATTR_SZ :\ 54 NIC_FLOW_ATTR_SZ) 55 56 int mlx5e_tc_num_filters(struct mlx5e_priv *priv, unsigned long flags); 57 58 struct mlx5e_tc_update_priv { 59 struct net_device *fwd_dev; 60 }; 61 62 struct mlx5_nic_flow_attr { 63 u32 flow_tag; 64 u32 hairpin_tirn; 65 struct mlx5_flow_table *hairpin_ft; 66 }; 67 68 struct mlx5_flow_attr { 69 u32 action; 70 struct mlx5_fc *counter; 71 struct mlx5_modify_hdr *modify_hdr; 72 struct mlx5_ct_attr ct_attr; 73 struct mlx5e_sample_attr sample_attr; 74 struct mlx5e_tc_flow_parse_attr *parse_attr; 75 u32 chain; 76 u16 prio; 77 u32 dest_chain; 78 struct mlx5_flow_table *ft; 79 struct mlx5_flow_table *dest_ft; 80 u8 inner_match_level; 81 u8 outer_match_level; 82 u8 ip_version; 83 u8 tun_ip_version; 84 int tunnel_id; /* mapped tunnel id */ 85 u32 flags; 86 struct list_head list; 87 struct mlx5e_post_act_handle *post_act_handle; 88 union { 89 struct mlx5_esw_flow_attr esw_attr[0]; 90 struct mlx5_nic_flow_attr nic_attr[0]; 91 }; 92 }; 93 94 enum { 95 MLX5_ATTR_FLAG_VLAN_HANDLED = BIT(0), 96 MLX5_ATTR_FLAG_SLOW_PATH = BIT(1), 97 MLX5_ATTR_FLAG_NO_IN_PORT = BIT(2), 98 MLX5_ATTR_FLAG_SRC_REWRITE = BIT(3), 99 MLX5_ATTR_FLAG_SAMPLE = BIT(4), 100 MLX5_ATTR_FLAG_ACCEPT = BIT(5), 101 MLX5_ATTR_FLAG_CT = BIT(6), 102 }; 103 104 /* Returns true if any of the flags that require skipping further TC/NF processing are set. */ 105 static inline bool 106 mlx5e_tc_attr_flags_skip(u32 attr_flags) 107 { 108 return attr_flags & (MLX5_ATTR_FLAG_SLOW_PATH | MLX5_ATTR_FLAG_ACCEPT); 109 } 110 111 struct mlx5_rx_tun_attr { 112 u16 decap_vport; 113 union { 114 __be32 v4; 115 struct in6_addr v6; 116 } src_ip; /* Valid if decap_vport is not zero */ 117 union { 118 __be32 v4; 119 struct in6_addr v6; 120 } dst_ip; /* Valid if decap_vport is not zero */ 121 u32 vni; 122 }; 123 124 #define MLX5E_TC_TABLE_CHAIN_TAG_BITS 16 125 #define MLX5E_TC_TABLE_CHAIN_TAG_MASK GENMASK(MLX5E_TC_TABLE_CHAIN_TAG_BITS - 1, 0) 126 127 #define MLX5E_TC_MAX_INT_PORT_NUM (8) 128 129 #if IS_ENABLED(CONFIG_MLX5_CLS_ACT) 130 131 struct tunnel_match_key { 132 struct flow_dissector_key_control enc_control; 133 struct flow_dissector_key_keyid enc_key_id; 134 struct flow_dissector_key_ports enc_tp; 135 struct flow_dissector_key_ip enc_ip; 136 union { 137 struct flow_dissector_key_ipv4_addrs enc_ipv4; 138 struct flow_dissector_key_ipv6_addrs enc_ipv6; 139 }; 140 141 int filter_ifindex; 142 }; 143 144 struct tunnel_match_enc_opts { 145 struct flow_dissector_key_enc_opts key; 146 struct flow_dissector_key_enc_opts mask; 147 }; 148 149 /* Tunnel_id mapping is TUNNEL_INFO_BITS + ENC_OPTS_BITS. 150 * Upper TUNNEL_INFO_BITS for general tunnel info. 151 * Lower ENC_OPTS_BITS bits for enc_opts. 152 */ 153 #define TUNNEL_INFO_BITS 12 154 #define TUNNEL_INFO_BITS_MASK GENMASK(TUNNEL_INFO_BITS - 1, 0) 155 #define ENC_OPTS_BITS 11 156 #define ENC_OPTS_BITS_MASK GENMASK(ENC_OPTS_BITS - 1, 0) 157 #define TUNNEL_ID_BITS (TUNNEL_INFO_BITS + ENC_OPTS_BITS) 158 #define TUNNEL_ID_MASK GENMASK(TUNNEL_ID_BITS - 1, 0) 159 160 enum { 161 MLX5E_TC_FLAG_INGRESS_BIT, 162 MLX5E_TC_FLAG_EGRESS_BIT, 163 MLX5E_TC_FLAG_NIC_OFFLOAD_BIT, 164 MLX5E_TC_FLAG_ESW_OFFLOAD_BIT, 165 MLX5E_TC_FLAG_FT_OFFLOAD_BIT, 166 MLX5E_TC_FLAG_LAST_EXPORTED_BIT = MLX5E_TC_FLAG_FT_OFFLOAD_BIT, 167 }; 168 169 #define MLX5_TC_FLAG(flag) BIT(MLX5E_TC_FLAG_##flag##_BIT) 170 171 int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv); 172 void mlx5e_tc_esw_cleanup(struct mlx5_rep_uplink_priv *uplink_priv); 173 174 int mlx5e_tc_ht_init(struct rhashtable *tc_ht); 175 void mlx5e_tc_ht_cleanup(struct rhashtable *tc_ht); 176 177 int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv, 178 struct flow_cls_offload *f, unsigned long flags); 179 int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv, 180 struct flow_cls_offload *f, unsigned long flags); 181 182 int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv, 183 struct flow_cls_offload *f, unsigned long flags); 184 185 int mlx5e_tc_configure_matchall(struct mlx5e_priv *priv, 186 struct tc_cls_matchall_offload *f); 187 int mlx5e_tc_delete_matchall(struct mlx5e_priv *priv, 188 struct tc_cls_matchall_offload *f); 189 void mlx5e_tc_stats_matchall(struct mlx5e_priv *priv, 190 struct tc_cls_matchall_offload *ma); 191 192 struct mlx5e_encap_entry; 193 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv, 194 struct mlx5e_encap_entry *e, 195 struct list_head *flow_list); 196 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv, 197 struct mlx5e_encap_entry *e, 198 struct list_head *flow_list); 199 bool mlx5e_encap_take(struct mlx5e_encap_entry *e); 200 void mlx5e_encap_put(struct mlx5e_priv *priv, struct mlx5e_encap_entry *e); 201 202 void mlx5e_take_all_encap_flows(struct mlx5e_encap_entry *e, struct list_head *flow_list); 203 void mlx5e_put_flow_list(struct mlx5e_priv *priv, struct list_head *flow_list); 204 205 struct mlx5e_neigh_hash_entry; 206 struct mlx5e_encap_entry * 207 mlx5e_get_next_init_encap(struct mlx5e_neigh_hash_entry *nhe, 208 struct mlx5e_encap_entry *e); 209 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe); 210 211 void mlx5e_tc_reoffload_flows_work(struct work_struct *work); 212 213 enum mlx5e_tc_attr_to_reg { 214 CHAIN_TO_REG, 215 VPORT_TO_REG, 216 TUNNEL_TO_REG, 217 CTSTATE_TO_REG, 218 ZONE_TO_REG, 219 ZONE_RESTORE_TO_REG, 220 MARK_TO_REG, 221 LABELS_TO_REG, 222 FTEID_TO_REG, 223 NIC_CHAIN_TO_REG, 224 NIC_ZONE_RESTORE_TO_REG, 225 }; 226 227 struct mlx5e_tc_attr_to_reg_mapping { 228 int mfield; /* rewrite field */ 229 int moffset; /* bit offset of mfield */ 230 int mlen; /* bits to rewrite/match */ 231 232 int soffset; /* byte offset of spec for match */ 233 }; 234 235 extern struct mlx5e_tc_attr_to_reg_mapping mlx5e_tc_attr_to_reg_mappings[]; 236 237 bool mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv *priv, 238 struct net_device *out_dev); 239 240 int mlx5e_tc_match_to_reg_set(struct mlx5_core_dev *mdev, 241 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts, 242 enum mlx5_flow_namespace_type ns, 243 enum mlx5e_tc_attr_to_reg type, 244 u32 data); 245 246 void mlx5e_tc_match_to_reg_mod_hdr_change(struct mlx5_core_dev *mdev, 247 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts, 248 enum mlx5e_tc_attr_to_reg type, 249 int act_id, u32 data); 250 251 void mlx5e_tc_match_to_reg_match(struct mlx5_flow_spec *spec, 252 enum mlx5e_tc_attr_to_reg type, 253 u32 data, 254 u32 mask); 255 256 void mlx5e_tc_match_to_reg_get_match(struct mlx5_flow_spec *spec, 257 enum mlx5e_tc_attr_to_reg type, 258 u32 *data, 259 u32 *mask); 260 261 int mlx5e_tc_match_to_reg_set_and_get_id(struct mlx5_core_dev *mdev, 262 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts, 263 enum mlx5_flow_namespace_type ns, 264 enum mlx5e_tc_attr_to_reg type, 265 u32 data); 266 267 int mlx5e_tc_add_flow_mod_hdr(struct mlx5e_priv *priv, 268 struct mlx5e_tc_flow *flow, 269 struct mlx5_flow_attr *attr); 270 271 void mlx5e_tc_set_ethertype(struct mlx5_core_dev *mdev, 272 struct flow_match_basic *match, bool outer, 273 void *headers_c, void *headers_v); 274 275 int mlx5e_tc_nic_init(struct mlx5e_priv *priv); 276 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv); 277 278 int mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 279 void *cb_priv); 280 281 struct mlx5_flow_handle * 282 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv, 283 struct mlx5_flow_spec *spec, 284 struct mlx5_flow_attr *attr); 285 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv, 286 struct mlx5_flow_handle *rule, 287 struct mlx5_flow_attr *attr); 288 289 struct mlx5_flow_handle * 290 mlx5_tc_rule_insert(struct mlx5e_priv *priv, 291 struct mlx5_flow_spec *spec, 292 struct mlx5_flow_attr *attr); 293 void 294 mlx5_tc_rule_delete(struct mlx5e_priv *priv, 295 struct mlx5_flow_handle *rule, 296 struct mlx5_flow_attr *attr); 297 298 bool mlx5e_tc_is_vf_tunnel(struct net_device *out_dev, struct net_device *route_dev); 299 int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *route_dev, 300 u16 *vport); 301 302 int mlx5e_set_fwd_to_int_port_actions(struct mlx5e_priv *priv, 303 struct mlx5_flow_attr *attr, 304 int ifindex, 305 enum mlx5e_tc_int_port_type type, 306 u32 *action, 307 int out_index); 308 #else /* CONFIG_MLX5_CLS_ACT */ 309 static inline int mlx5e_tc_nic_init(struct mlx5e_priv *priv) { return 0; } 310 static inline void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) {} 311 static inline int mlx5e_tc_ht_init(struct rhashtable *tc_ht) { return 0; } 312 static inline void mlx5e_tc_ht_cleanup(struct rhashtable *tc_ht) {} 313 static inline int 314 mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv) 315 { return -EOPNOTSUPP; } 316 317 #endif /* CONFIG_MLX5_CLS_ACT */ 318 319 struct mlx5_flow_attr *mlx5_alloc_flow_attr(enum mlx5_flow_namespace_type type); 320 321 struct mlx5_flow_handle * 322 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv, 323 struct mlx5_flow_spec *spec, 324 struct mlx5_flow_attr *attr); 325 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv, 326 struct mlx5_flow_handle *rule, 327 struct mlx5_flow_attr *attr); 328 329 #else /* CONFIG_MLX5_ESWITCH */ 330 static inline int mlx5e_tc_nic_init(struct mlx5e_priv *priv) { return 0; } 331 static inline void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) {} 332 static inline int mlx5e_tc_num_filters(struct mlx5e_priv *priv, 333 unsigned long flags) 334 { 335 return 0; 336 } 337 338 static inline int 339 mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv) 340 { return -EOPNOTSUPP; } 341 #endif 342 343 #if IS_ENABLED(CONFIG_MLX5_CLS_ACT) 344 static inline bool mlx5e_cqe_regb_chain(struct mlx5_cqe64 *cqe) 345 { 346 #if IS_ENABLED(CONFIG_NET_TC_SKB_EXT) 347 u32 chain, reg_b; 348 349 reg_b = be32_to_cpu(cqe->ft_metadata); 350 351 if (reg_b >> (MLX5E_TC_TABLE_CHAIN_TAG_BITS + ESW_ZONE_ID_BITS)) 352 return false; 353 354 chain = reg_b & MLX5E_TC_TABLE_CHAIN_TAG_MASK; 355 if (chain) 356 return true; 357 #endif 358 359 return false; 360 } 361 362 bool mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb); 363 #else /* CONFIG_MLX5_CLS_ACT */ 364 static inline bool mlx5e_cqe_regb_chain(struct mlx5_cqe64 *cqe) 365 { return false; } 366 static inline bool 367 mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb) 368 { return true; } 369 #endif 370 371 #endif /* __MLX5_EN_TC_H__ */ 372