1 /* 2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef __MLX5_EN_TC_H__ 34 #define __MLX5_EN_TC_H__ 35 36 #include <net/pkt_cls.h> 37 #include "en.h" 38 #include "eswitch.h" 39 #include "en/tc_ct.h" 40 #include "en/tc_tun.h" 41 #include "en_rep.h" 42 43 #define MLX5E_TC_FLOW_ID_MASK 0x0000ffff 44 45 #ifdef CONFIG_MLX5_ESWITCH 46 47 #define NIC_FLOW_ATTR_SZ (sizeof(struct mlx5_flow_attr) +\ 48 sizeof(struct mlx5_nic_flow_attr)) 49 #define ESW_FLOW_ATTR_SZ (sizeof(struct mlx5_flow_attr) +\ 50 sizeof(struct mlx5_esw_flow_attr)) 51 #define ns_to_attr_sz(ns) (((ns) == MLX5_FLOW_NAMESPACE_FDB) ?\ 52 ESW_FLOW_ATTR_SZ :\ 53 NIC_FLOW_ATTR_SZ) 54 55 56 int mlx5e_tc_num_filters(struct mlx5e_priv *priv, unsigned long flags); 57 58 struct mlx5e_tc_update_priv { 59 struct net_device *tun_dev; 60 }; 61 62 struct mlx5_nic_flow_attr { 63 u32 flow_tag; 64 u32 hairpin_tirn; 65 struct mlx5_flow_table *hairpin_ft; 66 }; 67 68 struct mlx5_flow_attr { 69 u32 action; 70 struct mlx5_fc *counter; 71 struct mlx5_modify_hdr *modify_hdr; 72 struct mlx5_ct_attr ct_attr; 73 struct mlx5e_tc_flow_parse_attr *parse_attr; 74 u32 chain; 75 u16 prio; 76 u32 dest_chain; 77 struct mlx5_flow_table *ft; 78 struct mlx5_flow_table *dest_ft; 79 u8 inner_match_level; 80 u8 outer_match_level; 81 u8 ip_version; 82 u32 flags; 83 union { 84 struct mlx5_esw_flow_attr esw_attr[0]; 85 struct mlx5_nic_flow_attr nic_attr[0]; 86 }; 87 }; 88 89 struct mlx5_rx_tun_attr { 90 u16 decap_vport; 91 union { 92 __be32 v4; 93 struct in6_addr v6; 94 } src_ip; /* Valid if decap_vport is not zero */ 95 union { 96 __be32 v4; 97 struct in6_addr v6; 98 } dst_ip; /* Valid if decap_vport is not zero */ 99 u32 vni; 100 }; 101 102 #define MLX5E_TC_TABLE_CHAIN_TAG_BITS 16 103 #define MLX5E_TC_TABLE_CHAIN_TAG_MASK GENMASK(MLX5E_TC_TABLE_CHAIN_TAG_BITS - 1, 0) 104 105 #if IS_ENABLED(CONFIG_MLX5_CLS_ACT) 106 107 struct tunnel_match_key { 108 struct flow_dissector_key_control enc_control; 109 struct flow_dissector_key_keyid enc_key_id; 110 struct flow_dissector_key_ports enc_tp; 111 struct flow_dissector_key_ip enc_ip; 112 union { 113 struct flow_dissector_key_ipv4_addrs enc_ipv4; 114 struct flow_dissector_key_ipv6_addrs enc_ipv6; 115 }; 116 117 int filter_ifindex; 118 }; 119 120 struct tunnel_match_enc_opts { 121 struct flow_dissector_key_enc_opts key; 122 struct flow_dissector_key_enc_opts mask; 123 }; 124 125 /* Tunnel_id mapping is TUNNEL_INFO_BITS + ENC_OPTS_BITS. 126 * Upper TUNNEL_INFO_BITS for general tunnel info. 127 * Lower ENC_OPTS_BITS bits for enc_opts. 128 */ 129 #define TUNNEL_INFO_BITS 12 130 #define TUNNEL_INFO_BITS_MASK GENMASK(TUNNEL_INFO_BITS - 1, 0) 131 #define ENC_OPTS_BITS 12 132 #define ENC_OPTS_BITS_MASK GENMASK(ENC_OPTS_BITS - 1, 0) 133 #define TUNNEL_ID_BITS (TUNNEL_INFO_BITS + ENC_OPTS_BITS) 134 #define TUNNEL_ID_MASK GENMASK(TUNNEL_ID_BITS - 1, 0) 135 136 enum { 137 MLX5E_TC_FLAG_INGRESS_BIT, 138 MLX5E_TC_FLAG_EGRESS_BIT, 139 MLX5E_TC_FLAG_NIC_OFFLOAD_BIT, 140 MLX5E_TC_FLAG_ESW_OFFLOAD_BIT, 141 MLX5E_TC_FLAG_FT_OFFLOAD_BIT, 142 MLX5E_TC_FLAG_LAST_EXPORTED_BIT = MLX5E_TC_FLAG_FT_OFFLOAD_BIT, 143 }; 144 145 #define MLX5_TC_FLAG(flag) BIT(MLX5E_TC_FLAG_##flag##_BIT) 146 147 int mlx5e_tc_esw_init(struct rhashtable *tc_ht); 148 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht); 149 bool mlx5e_is_eswitch_flow(struct mlx5e_tc_flow *flow); 150 151 int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv, 152 struct flow_cls_offload *f, unsigned long flags); 153 int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv, 154 struct flow_cls_offload *f, unsigned long flags); 155 156 int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv, 157 struct flow_cls_offload *f, unsigned long flags); 158 159 int mlx5e_tc_configure_matchall(struct mlx5e_priv *priv, 160 struct tc_cls_matchall_offload *f); 161 int mlx5e_tc_delete_matchall(struct mlx5e_priv *priv, 162 struct tc_cls_matchall_offload *f); 163 void mlx5e_tc_stats_matchall(struct mlx5e_priv *priv, 164 struct tc_cls_matchall_offload *ma); 165 166 struct mlx5e_encap_entry; 167 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv, 168 struct mlx5e_encap_entry *e, 169 struct list_head *flow_list); 170 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv, 171 struct mlx5e_encap_entry *e, 172 struct list_head *flow_list); 173 bool mlx5e_encap_take(struct mlx5e_encap_entry *e); 174 void mlx5e_encap_put(struct mlx5e_priv *priv, struct mlx5e_encap_entry *e); 175 176 void mlx5e_take_all_encap_flows(struct mlx5e_encap_entry *e, struct list_head *flow_list); 177 void mlx5e_put_flow_list(struct mlx5e_priv *priv, struct list_head *flow_list); 178 179 struct mlx5e_neigh_hash_entry; 180 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe); 181 182 void mlx5e_tc_reoffload_flows_work(struct work_struct *work); 183 184 enum mlx5e_tc_attr_to_reg { 185 CHAIN_TO_REG, 186 VPORT_TO_REG, 187 TUNNEL_TO_REG, 188 CTSTATE_TO_REG, 189 ZONE_TO_REG, 190 ZONE_RESTORE_TO_REG, 191 MARK_TO_REG, 192 LABELS_TO_REG, 193 FTEID_TO_REG, 194 NIC_CHAIN_TO_REG, 195 NIC_ZONE_RESTORE_TO_REG, 196 }; 197 198 struct mlx5e_tc_attr_to_reg_mapping { 199 int mfield; /* rewrite field */ 200 int moffset; /* offset of mfield */ 201 int mlen; /* bytes to rewrite/match */ 202 203 int soffset; /* offset of spec for match */ 204 }; 205 206 extern struct mlx5e_tc_attr_to_reg_mapping mlx5e_tc_attr_to_reg_mappings[]; 207 208 bool mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv *priv, 209 struct net_device *out_dev); 210 211 int mlx5e_tc_match_to_reg_set(struct mlx5_core_dev *mdev, 212 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts, 213 enum mlx5_flow_namespace_type ns, 214 enum mlx5e_tc_attr_to_reg type, 215 u32 data); 216 217 void mlx5e_tc_match_to_reg_mod_hdr_change(struct mlx5_core_dev *mdev, 218 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts, 219 enum mlx5e_tc_attr_to_reg type, 220 int act_id, u32 data); 221 222 void mlx5e_tc_match_to_reg_match(struct mlx5_flow_spec *spec, 223 enum mlx5e_tc_attr_to_reg type, 224 u32 data, 225 u32 mask); 226 227 void mlx5e_tc_match_to_reg_get_match(struct mlx5_flow_spec *spec, 228 enum mlx5e_tc_attr_to_reg type, 229 u32 *data, 230 u32 *mask); 231 232 int mlx5e_tc_match_to_reg_set_and_get_id(struct mlx5_core_dev *mdev, 233 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts, 234 enum mlx5_flow_namespace_type ns, 235 enum mlx5e_tc_attr_to_reg type, 236 u32 data); 237 238 int mlx5e_tc_add_flow_mod_hdr(struct mlx5e_priv *priv, 239 struct mlx5e_tc_flow_parse_attr *parse_attr, 240 struct mlx5e_tc_flow *flow); 241 242 int alloc_mod_hdr_actions(struct mlx5_core_dev *mdev, 243 int namespace, 244 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts); 245 void dealloc_mod_hdr_actions(struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts); 246 247 struct mlx5e_tc_flow; 248 u32 mlx5e_tc_get_flow_tun_id(struct mlx5e_tc_flow *flow); 249 250 void mlx5e_tc_set_ethertype(struct mlx5_core_dev *mdev, 251 struct flow_match_basic *match, bool outer, 252 void *headers_c, void *headers_v); 253 254 int mlx5e_tc_nic_init(struct mlx5e_priv *priv); 255 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv); 256 257 int mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 258 void *cb_priv); 259 260 struct mlx5_flow_handle * 261 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv, 262 struct mlx5_flow_spec *spec, 263 struct mlx5_flow_attr *attr); 264 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv, 265 struct mlx5_flow_handle *rule, 266 struct mlx5_flow_attr *attr); 267 268 struct mlx5_flow_handle * 269 mlx5_tc_rule_insert(struct mlx5e_priv *priv, 270 struct mlx5_flow_spec *spec, 271 struct mlx5_flow_attr *attr); 272 void 273 mlx5_tc_rule_delete(struct mlx5e_priv *priv, 274 struct mlx5_flow_handle *rule, 275 struct mlx5_flow_attr *attr); 276 277 bool mlx5e_tc_is_vf_tunnel(struct net_device *out_dev, struct net_device *route_dev); 278 int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *route_dev, 279 u16 *vport); 280 281 #else /* CONFIG_MLX5_CLS_ACT */ 282 static inline int mlx5e_tc_nic_init(struct mlx5e_priv *priv) { return 0; } 283 static inline void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) {} 284 static inline int 285 mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv) 286 { return -EOPNOTSUPP; } 287 288 #endif /* CONFIG_MLX5_CLS_ACT */ 289 290 struct mlx5_flow_attr *mlx5_alloc_flow_attr(enum mlx5_flow_namespace_type type); 291 292 struct mlx5_flow_handle * 293 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv, 294 struct mlx5_flow_spec *spec, 295 struct mlx5_flow_attr *attr); 296 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv, 297 struct mlx5_flow_handle *rule, 298 struct mlx5_flow_attr *attr); 299 300 #else /* CONFIG_MLX5_ESWITCH */ 301 static inline int mlx5e_tc_nic_init(struct mlx5e_priv *priv) { return 0; } 302 static inline void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) {} 303 static inline int mlx5e_tc_num_filters(struct mlx5e_priv *priv, 304 unsigned long flags) 305 { 306 return 0; 307 } 308 309 static inline int 310 mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv) 311 { return -EOPNOTSUPP; } 312 #endif 313 314 #if IS_ENABLED(CONFIG_MLX5_CLS_ACT) 315 static inline bool mlx5e_cqe_regb_chain(struct mlx5_cqe64 *cqe) 316 { 317 #if IS_ENABLED(CONFIG_NET_TC_SKB_EXT) 318 u32 chain, reg_b; 319 320 reg_b = be32_to_cpu(cqe->ft_metadata); 321 322 if (reg_b >> (MLX5E_TC_TABLE_CHAIN_TAG_BITS + ESW_ZONE_ID_BITS)) 323 return false; 324 325 chain = reg_b & MLX5E_TC_TABLE_CHAIN_TAG_MASK; 326 if (chain) 327 return true; 328 #endif 329 330 return false; 331 } 332 333 bool mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb); 334 #else /* CONFIG_MLX5_CLS_ACT */ 335 static inline bool mlx5e_cqe_regb_chain(struct mlx5_cqe64 *cqe) 336 { return false; } 337 static inline bool 338 mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb) 339 { return true; } 340 #endif 341 342 #endif /* __MLX5_EN_TC_H__ */ 343