1c0752f2bSKamal Heib /*
2c0752f2bSKamal Heib  * Copyright (c) 2017, Mellanox Technologies, Ltd.  All rights reserved.
3c0752f2bSKamal Heib  *
4c0752f2bSKamal Heib  * This software is available to you under a choice of one of two
5c0752f2bSKamal Heib  * licenses.  You may choose to be licensed under the terms of the GNU
6c0752f2bSKamal Heib  * General Public License (GPL) Version 2, available from the file
7c0752f2bSKamal Heib  * COPYING in the main directory of this source tree, or the
8c0752f2bSKamal Heib  * OpenIB.org BSD license below:
9c0752f2bSKamal Heib  *
10c0752f2bSKamal Heib  *     Redistribution and use in source and binary forms, with or
11c0752f2bSKamal Heib  *     without modification, are permitted provided that the following
12c0752f2bSKamal Heib  *     conditions are met:
13c0752f2bSKamal Heib  *
14c0752f2bSKamal Heib  *      - Redistributions of source code must retain the above
15c0752f2bSKamal Heib  *        copyright notice, this list of conditions and the following
16c0752f2bSKamal Heib  *        disclaimer.
17c0752f2bSKamal Heib  *
18c0752f2bSKamal Heib  *      - Redistributions in binary form must reproduce the above
19c0752f2bSKamal Heib  *        copyright notice, this list of conditions and the following
20c0752f2bSKamal Heib  *        disclaimer in the documentation and/or other materials
21c0752f2bSKamal Heib  *        provided with the distribution.
22c0752f2bSKamal Heib  *
23c0752f2bSKamal Heib  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24c0752f2bSKamal Heib  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25c0752f2bSKamal Heib  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26c0752f2bSKamal Heib  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27c0752f2bSKamal Heib  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28c0752f2bSKamal Heib  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29c0752f2bSKamal Heib  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30c0752f2bSKamal Heib  * SOFTWARE.
31c0752f2bSKamal Heib  */
32c0752f2bSKamal Heib 
33c0752f2bSKamal Heib #include "en.h"
34e185d43fSKamal Heib #include "en_accel/ipsec.h"
3543585a41SIlya Lesokhin #include "en_accel/tls.h"
36c0752f2bSKamal Heib 
37c0752f2bSKamal Heib static const struct counter_desc sw_stats_desc[] = {
38c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) },
39c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) },
40c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) },
41c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) },
42c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_packets) },
43c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_bytes) },
44c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_packets) },
45c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_bytes) },
46f24686e8SGal Pressman 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_added_vlan_packets) },
47bf239741SIlya Lesokhin 
48bf239741SIlya Lesokhin #ifdef CONFIG_MLX5_EN_TLS
49bf239741SIlya Lesokhin 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_ooo) },
50bf239741SIlya Lesokhin 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_resync_bytes) },
51bf239741SIlya Lesokhin #endif
52bf239741SIlya Lesokhin 
53c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_packets) },
54c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_bytes) },
55f24686e8SGal Pressman 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_removed_vlan_packets) },
56c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary) },
57c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_none) },
58c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete) },
59c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary_inner) },
60c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_drop) },
61c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx) },
62c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_full) },
63c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_none) },
64c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial) },
65c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial_inner) },
66c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_stopped) },
67c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_dropped) },
68c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xmit_more) },
69db75373cSEran Ben Elisha 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_recover) },
70f65a59ffSTariq Toukan 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_wake) },
71bc5a7ccdSBoris Pismenny 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_udp_seg_rem) },
72f65a59ffSTariq Toukan 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_cqe_err) },
73c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_wqe_err) },
74c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler) },
75c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_buff_alloc_err) },
76c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_blks) },
77c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_pkts) },
78c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_page_reuse) },
79c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_reuse) },
80c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_full) },
81c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_empty) },
82c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_busy) },
83c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_waive) },
8457d689a8SEran Ben Elisha 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_eq_rearm) },
85c0752f2bSKamal Heib };
86c0752f2bSKamal Heib 
87c0752f2bSKamal Heib #define NUM_SW_COUNTERS			ARRAY_SIZE(sw_stats_desc)
88c0752f2bSKamal Heib 
89c0752f2bSKamal Heib static int mlx5e_grp_sw_get_num_stats(struct mlx5e_priv *priv)
90c0752f2bSKamal Heib {
91c0752f2bSKamal Heib 	return NUM_SW_COUNTERS;
92c0752f2bSKamal Heib }
93c0752f2bSKamal Heib 
94c0752f2bSKamal Heib static int mlx5e_grp_sw_fill_strings(struct mlx5e_priv *priv, u8 *data, int idx)
95c0752f2bSKamal Heib {
96c0752f2bSKamal Heib 	int i;
97c0752f2bSKamal Heib 
98c0752f2bSKamal Heib 	for (i = 0; i < NUM_SW_COUNTERS; i++)
99c0752f2bSKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format);
100c0752f2bSKamal Heib 	return idx;
101c0752f2bSKamal Heib }
102c0752f2bSKamal Heib 
103c0752f2bSKamal Heib static int mlx5e_grp_sw_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx)
104c0752f2bSKamal Heib {
105c0752f2bSKamal Heib 	int i;
106c0752f2bSKamal Heib 
107c0752f2bSKamal Heib 	for (i = 0; i < NUM_SW_COUNTERS; i++)
108c0752f2bSKamal Heib 		data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw, sw_stats_desc, i);
109c0752f2bSKamal Heib 	return idx;
110c0752f2bSKamal Heib }
111c0752f2bSKamal Heib 
112868a01a2SShalom Lagziel void mlx5e_grp_sw_update_stats(struct mlx5e_priv *priv)
11319386177SKamal Heib {
11419386177SKamal Heib 	struct mlx5e_sw_stats temp, *s = &temp;
11505909babSEran Ben Elisha 	int i;
11619386177SKamal Heib 
11719386177SKamal Heib 	memset(s, 0, sizeof(*s));
11819386177SKamal Heib 
11905909babSEran Ben Elisha 	for (i = 0; i < priv->profile->max_nch(priv->mdev); i++) {
12005909babSEran Ben Elisha 		struct mlx5e_channel_stats *channel_stats =
12105909babSEran Ben Elisha 			&priv->channel_stats[i];
12205909babSEran Ben Elisha 		struct mlx5e_rq_stats *rq_stats = &channel_stats->rq;
12305909babSEran Ben Elisha 		struct mlx5e_ch_stats *ch_stats = &channel_stats->ch;
12405909babSEran Ben Elisha 		int j;
12519386177SKamal Heib 
12619386177SKamal Heib 		s->rx_packets	+= rq_stats->packets;
12719386177SKamal Heib 		s->rx_bytes	+= rq_stats->bytes;
12819386177SKamal Heib 		s->rx_lro_packets += rq_stats->lro_packets;
12919386177SKamal Heib 		s->rx_lro_bytes	+= rq_stats->lro_bytes;
13019386177SKamal Heib 		s->rx_removed_vlan_packets += rq_stats->removed_vlan_packets;
13119386177SKamal Heib 		s->rx_csum_none	+= rq_stats->csum_none;
13219386177SKamal Heib 		s->rx_csum_complete += rq_stats->csum_complete;
13319386177SKamal Heib 		s->rx_csum_unnecessary += rq_stats->csum_unnecessary;
13419386177SKamal Heib 		s->rx_csum_unnecessary_inner += rq_stats->csum_unnecessary_inner;
13519386177SKamal Heib 		s->rx_xdp_drop += rq_stats->xdp_drop;
13619386177SKamal Heib 		s->rx_xdp_tx += rq_stats->xdp_tx;
13719386177SKamal Heib 		s->rx_xdp_tx_full += rq_stats->xdp_tx_full;
13819386177SKamal Heib 		s->rx_wqe_err   += rq_stats->wqe_err;
13919386177SKamal Heib 		s->rx_mpwqe_filler += rq_stats->mpwqe_filler;
14019386177SKamal Heib 		s->rx_buff_alloc_err += rq_stats->buff_alloc_err;
14119386177SKamal Heib 		s->rx_cqe_compress_blks += rq_stats->cqe_compress_blks;
14219386177SKamal Heib 		s->rx_cqe_compress_pkts += rq_stats->cqe_compress_pkts;
14319386177SKamal Heib 		s->rx_page_reuse  += rq_stats->page_reuse;
14419386177SKamal Heib 		s->rx_cache_reuse += rq_stats->cache_reuse;
14519386177SKamal Heib 		s->rx_cache_full  += rq_stats->cache_full;
14619386177SKamal Heib 		s->rx_cache_empty += rq_stats->cache_empty;
14719386177SKamal Heib 		s->rx_cache_busy  += rq_stats->cache_busy;
14819386177SKamal Heib 		s->rx_cache_waive += rq_stats->cache_waive;
14919386177SKamal Heib 		s->ch_eq_rearm += ch_stats->eq_rearm;
15019386177SKamal Heib 
15105909babSEran Ben Elisha 		for (j = 0; j < priv->max_opened_tc; j++) {
15205909babSEran Ben Elisha 			struct mlx5e_sq_stats *sq_stats = &channel_stats->sq[j];
15319386177SKamal Heib 
15419386177SKamal Heib 			s->tx_packets		+= sq_stats->packets;
15519386177SKamal Heib 			s->tx_bytes		+= sq_stats->bytes;
15619386177SKamal Heib 			s->tx_tso_packets	+= sq_stats->tso_packets;
15719386177SKamal Heib 			s->tx_tso_bytes		+= sq_stats->tso_bytes;
15819386177SKamal Heib 			s->tx_tso_inner_packets	+= sq_stats->tso_inner_packets;
15919386177SKamal Heib 			s->tx_tso_inner_bytes	+= sq_stats->tso_inner_bytes;
16019386177SKamal Heib 			s->tx_added_vlan_packets += sq_stats->added_vlan_packets;
16119386177SKamal Heib 			s->tx_queue_stopped	+= sq_stats->stopped;
16219386177SKamal Heib 			s->tx_queue_wake	+= sq_stats->wake;
163bc5a7ccdSBoris Pismenny 			s->tx_udp_seg_rem	+= sq_stats->udp_seg_rem;
16419386177SKamal Heib 			s->tx_queue_dropped	+= sq_stats->dropped;
16516cc14d8SEran Ben Elisha 			s->tx_cqe_err		+= sq_stats->cqe_err;
166db75373cSEran Ben Elisha 			s->tx_recover		+= sq_stats->recover;
16719386177SKamal Heib 			s->tx_xmit_more		+= sq_stats->xmit_more;
16819386177SKamal Heib 			s->tx_csum_partial_inner += sq_stats->csum_partial_inner;
16919386177SKamal Heib 			s->tx_csum_none		+= sq_stats->csum_none;
17019386177SKamal Heib 			s->tx_csum_partial	+= sq_stats->csum_partial;
171bf239741SIlya Lesokhin #ifdef CONFIG_MLX5_EN_TLS
172bf239741SIlya Lesokhin 			s->tx_tls_ooo		+= sq_stats->tls_ooo;
173bf239741SIlya Lesokhin 			s->tx_tls_resync_bytes	+= sq_stats->tls_resync_bytes;
174bf239741SIlya Lesokhin #endif
17519386177SKamal Heib 		}
17619386177SKamal Heib 	}
17719386177SKamal Heib 
17819386177SKamal Heib 	memcpy(&priv->stats.sw, s, sizeof(*s));
17919386177SKamal Heib }
18019386177SKamal Heib 
181fd8dcdb8SKamal Heib static const struct counter_desc q_stats_desc[] = {
182fd8dcdb8SKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_out_of_buffer) },
183fd8dcdb8SKamal Heib };
184fd8dcdb8SKamal Heib 
1857cbaf9a3SMoshe Shemesh static const struct counter_desc drop_rq_stats_desc[] = {
1867cbaf9a3SMoshe Shemesh 	{ MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_if_down_packets) },
1877cbaf9a3SMoshe Shemesh };
1887cbaf9a3SMoshe Shemesh 
189fd8dcdb8SKamal Heib #define NUM_Q_COUNTERS			ARRAY_SIZE(q_stats_desc)
1907cbaf9a3SMoshe Shemesh #define NUM_DROP_RQ_COUNTERS		ARRAY_SIZE(drop_rq_stats_desc)
191fd8dcdb8SKamal Heib 
192fd8dcdb8SKamal Heib static int mlx5e_grp_q_get_num_stats(struct mlx5e_priv *priv)
193fd8dcdb8SKamal Heib {
1947cbaf9a3SMoshe Shemesh 	int num_stats = 0;
1957cbaf9a3SMoshe Shemesh 
1967cbaf9a3SMoshe Shemesh 	if (priv->q_counter)
1977cbaf9a3SMoshe Shemesh 		num_stats += NUM_Q_COUNTERS;
1987cbaf9a3SMoshe Shemesh 
1997cbaf9a3SMoshe Shemesh 	if (priv->drop_rq_q_counter)
2007cbaf9a3SMoshe Shemesh 		num_stats += NUM_DROP_RQ_COUNTERS;
2017cbaf9a3SMoshe Shemesh 
2027cbaf9a3SMoshe Shemesh 	return num_stats;
203fd8dcdb8SKamal Heib }
204fd8dcdb8SKamal Heib 
205fd8dcdb8SKamal Heib static int mlx5e_grp_q_fill_strings(struct mlx5e_priv *priv, u8 *data, int idx)
206fd8dcdb8SKamal Heib {
207fd8dcdb8SKamal Heib 	int i;
208fd8dcdb8SKamal Heib 
209fd8dcdb8SKamal Heib 	for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++)
2107cbaf9a3SMoshe Shemesh 		strcpy(data + (idx++) * ETH_GSTRING_LEN,
2117cbaf9a3SMoshe Shemesh 		       q_stats_desc[i].format);
2127cbaf9a3SMoshe Shemesh 
2137cbaf9a3SMoshe Shemesh 	for (i = 0; i < NUM_DROP_RQ_COUNTERS && priv->drop_rq_q_counter; i++)
2147cbaf9a3SMoshe Shemesh 		strcpy(data + (idx++) * ETH_GSTRING_LEN,
2157cbaf9a3SMoshe Shemesh 		       drop_rq_stats_desc[i].format);
2167cbaf9a3SMoshe Shemesh 
217fd8dcdb8SKamal Heib 	return idx;
218fd8dcdb8SKamal Heib }
219fd8dcdb8SKamal Heib 
220fd8dcdb8SKamal Heib static int mlx5e_grp_q_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx)
221fd8dcdb8SKamal Heib {
222fd8dcdb8SKamal Heib 	int i;
223fd8dcdb8SKamal Heib 
224fd8dcdb8SKamal Heib 	for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++)
2257cbaf9a3SMoshe Shemesh 		data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
2267cbaf9a3SMoshe Shemesh 						   q_stats_desc, i);
2277cbaf9a3SMoshe Shemesh 	for (i = 0; i < NUM_DROP_RQ_COUNTERS && priv->drop_rq_q_counter; i++)
2287cbaf9a3SMoshe Shemesh 		data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
2297cbaf9a3SMoshe Shemesh 						   drop_rq_stats_desc, i);
230fd8dcdb8SKamal Heib 	return idx;
231fd8dcdb8SKamal Heib }
232fd8dcdb8SKamal Heib 
23319386177SKamal Heib static void mlx5e_grp_q_update_stats(struct mlx5e_priv *priv)
23419386177SKamal Heib {
23519386177SKamal Heib 	struct mlx5e_qcounter_stats *qcnt = &priv->stats.qcnt;
23619386177SKamal Heib 	u32 out[MLX5_ST_SZ_DW(query_q_counter_out)];
23719386177SKamal Heib 
2387cbaf9a3SMoshe Shemesh 	if (priv->q_counter &&
2397cbaf9a3SMoshe Shemesh 	    !mlx5_core_query_q_counter(priv->mdev, priv->q_counter, 0, out,
2407cbaf9a3SMoshe Shemesh 				       sizeof(out)))
2417cbaf9a3SMoshe Shemesh 		qcnt->rx_out_of_buffer = MLX5_GET(query_q_counter_out,
2427cbaf9a3SMoshe Shemesh 						  out, out_of_buffer);
2437cbaf9a3SMoshe Shemesh 	if (priv->drop_rq_q_counter &&
2447cbaf9a3SMoshe Shemesh 	    !mlx5_core_query_q_counter(priv->mdev, priv->drop_rq_q_counter, 0,
2457cbaf9a3SMoshe Shemesh 				       out, sizeof(out)))
2467cbaf9a3SMoshe Shemesh 		qcnt->rx_if_down_packets = MLX5_GET(query_q_counter_out, out,
2477cbaf9a3SMoshe Shemesh 						    out_of_buffer);
24819386177SKamal Heib }
24919386177SKamal Heib 
2505c298143SMoshe Shemesh #define VNIC_ENV_OFF(c) MLX5_BYTE_OFF(query_vnic_env_out, c)
2515c298143SMoshe Shemesh static const struct counter_desc vnic_env_stats_desc[] = {
2525c298143SMoshe Shemesh 	{ "rx_steer_missed_packets",
2535c298143SMoshe Shemesh 		VNIC_ENV_OFF(vport_env.nic_receive_steering_discard) },
2545c298143SMoshe Shemesh };
2555c298143SMoshe Shemesh 
2565c298143SMoshe Shemesh #define NUM_VNIC_ENV_COUNTERS		ARRAY_SIZE(vnic_env_stats_desc)
2575c298143SMoshe Shemesh 
2585c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_get_num_stats(struct mlx5e_priv *priv)
2595c298143SMoshe Shemesh {
2605c298143SMoshe Shemesh 	return MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard) ?
2615c298143SMoshe Shemesh 		NUM_VNIC_ENV_COUNTERS : 0;
2625c298143SMoshe Shemesh }
2635c298143SMoshe Shemesh 
2645c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_fill_strings(struct mlx5e_priv *priv, u8 *data,
2655c298143SMoshe Shemesh 					   int idx)
2665c298143SMoshe Shemesh {
2675c298143SMoshe Shemesh 	int i;
2685c298143SMoshe Shemesh 
2695c298143SMoshe Shemesh 	if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard))
2705c298143SMoshe Shemesh 		return idx;
2715c298143SMoshe Shemesh 
2725c298143SMoshe Shemesh 	for (i = 0; i < NUM_VNIC_ENV_COUNTERS; i++)
2735c298143SMoshe Shemesh 		strcpy(data + (idx++) * ETH_GSTRING_LEN,
2745c298143SMoshe Shemesh 		       vnic_env_stats_desc[i].format);
2755c298143SMoshe Shemesh 	return idx;
2765c298143SMoshe Shemesh }
2775c298143SMoshe Shemesh 
2785c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_fill_stats(struct mlx5e_priv *priv, u64 *data,
2795c298143SMoshe Shemesh 					 int idx)
2805c298143SMoshe Shemesh {
2815c298143SMoshe Shemesh 	int i;
2825c298143SMoshe Shemesh 
2835c298143SMoshe Shemesh 	if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard))
2845c298143SMoshe Shemesh 		return idx;
2855c298143SMoshe Shemesh 
2865c298143SMoshe Shemesh 	for (i = 0; i < NUM_VNIC_ENV_COUNTERS; i++)
2875c298143SMoshe Shemesh 		data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vnic.query_vnic_env_out,
2885c298143SMoshe Shemesh 						  vnic_env_stats_desc, i);
2895c298143SMoshe Shemesh 	return idx;
2905c298143SMoshe Shemesh }
2915c298143SMoshe Shemesh 
2925c298143SMoshe Shemesh static void mlx5e_grp_vnic_env_update_stats(struct mlx5e_priv *priv)
2935c298143SMoshe Shemesh {
2945c298143SMoshe Shemesh 	u32 *out = (u32 *)priv->stats.vnic.query_vnic_env_out;
2955c298143SMoshe Shemesh 	int outlen = MLX5_ST_SZ_BYTES(query_vnic_env_out);
2965c298143SMoshe Shemesh 	u32 in[MLX5_ST_SZ_DW(query_vnic_env_in)] = {0};
2975c298143SMoshe Shemesh 	struct mlx5_core_dev *mdev = priv->mdev;
2985c298143SMoshe Shemesh 
2995c298143SMoshe Shemesh 	if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard))
3005c298143SMoshe Shemesh 		return;
3015c298143SMoshe Shemesh 
3025c298143SMoshe Shemesh 	MLX5_SET(query_vnic_env_in, in, opcode,
3035c298143SMoshe Shemesh 		 MLX5_CMD_OP_QUERY_VNIC_ENV);
3045c298143SMoshe Shemesh 	MLX5_SET(query_vnic_env_in, in, op_mod, 0);
3055c298143SMoshe Shemesh 	MLX5_SET(query_vnic_env_in, in, other_vport, 0);
3065c298143SMoshe Shemesh 	mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
3075c298143SMoshe Shemesh }
3085c298143SMoshe Shemesh 
30940cab9f1SKamal Heib #define VPORT_COUNTER_OFF(c) MLX5_BYTE_OFF(query_vport_counter_out, c)
31040cab9f1SKamal Heib static const struct counter_desc vport_stats_desc[] = {
31140cab9f1SKamal Heib 	{ "rx_vport_unicast_packets",
31240cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_unicast.packets) },
31340cab9f1SKamal Heib 	{ "rx_vport_unicast_bytes",
31440cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_unicast.octets) },
31540cab9f1SKamal Heib 	{ "tx_vport_unicast_packets",
31640cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_unicast.packets) },
31740cab9f1SKamal Heib 	{ "tx_vport_unicast_bytes",
31840cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_unicast.octets) },
31940cab9f1SKamal Heib 	{ "rx_vport_multicast_packets",
32040cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_multicast.packets) },
32140cab9f1SKamal Heib 	{ "rx_vport_multicast_bytes",
32240cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_multicast.octets) },
32340cab9f1SKamal Heib 	{ "tx_vport_multicast_packets",
32440cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_multicast.packets) },
32540cab9f1SKamal Heib 	{ "tx_vport_multicast_bytes",
32640cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_multicast.octets) },
32740cab9f1SKamal Heib 	{ "rx_vport_broadcast_packets",
32840cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_broadcast.packets) },
32940cab9f1SKamal Heib 	{ "rx_vport_broadcast_bytes",
33040cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_broadcast.octets) },
33140cab9f1SKamal Heib 	{ "tx_vport_broadcast_packets",
33240cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_broadcast.packets) },
33340cab9f1SKamal Heib 	{ "tx_vport_broadcast_bytes",
33440cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_broadcast.octets) },
33540cab9f1SKamal Heib 	{ "rx_vport_rdma_unicast_packets",
33640cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_ib_unicast.packets) },
33740cab9f1SKamal Heib 	{ "rx_vport_rdma_unicast_bytes",
33840cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_ib_unicast.octets) },
33940cab9f1SKamal Heib 	{ "tx_vport_rdma_unicast_packets",
34040cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_ib_unicast.packets) },
34140cab9f1SKamal Heib 	{ "tx_vport_rdma_unicast_bytes",
34240cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_ib_unicast.octets) },
34340cab9f1SKamal Heib 	{ "rx_vport_rdma_multicast_packets",
34440cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_ib_multicast.packets) },
34540cab9f1SKamal Heib 	{ "rx_vport_rdma_multicast_bytes",
34640cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_ib_multicast.octets) },
34740cab9f1SKamal Heib 	{ "tx_vport_rdma_multicast_packets",
34840cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_ib_multicast.packets) },
34940cab9f1SKamal Heib 	{ "tx_vport_rdma_multicast_bytes",
35040cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_ib_multicast.octets) },
35140cab9f1SKamal Heib };
35240cab9f1SKamal Heib 
35340cab9f1SKamal Heib #define NUM_VPORT_COUNTERS		ARRAY_SIZE(vport_stats_desc)
35440cab9f1SKamal Heib 
35540cab9f1SKamal Heib static int mlx5e_grp_vport_get_num_stats(struct mlx5e_priv *priv)
35640cab9f1SKamal Heib {
35740cab9f1SKamal Heib 	return NUM_VPORT_COUNTERS;
35840cab9f1SKamal Heib }
35940cab9f1SKamal Heib 
36040cab9f1SKamal Heib static int mlx5e_grp_vport_fill_strings(struct mlx5e_priv *priv, u8 *data,
36140cab9f1SKamal Heib 					int idx)
36240cab9f1SKamal Heib {
36340cab9f1SKamal Heib 	int i;
36440cab9f1SKamal Heib 
36540cab9f1SKamal Heib 	for (i = 0; i < NUM_VPORT_COUNTERS; i++)
36640cab9f1SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, vport_stats_desc[i].format);
36740cab9f1SKamal Heib 	return idx;
36840cab9f1SKamal Heib }
36940cab9f1SKamal Heib 
37040cab9f1SKamal Heib static int mlx5e_grp_vport_fill_stats(struct mlx5e_priv *priv, u64 *data,
37140cab9f1SKamal Heib 				      int idx)
37240cab9f1SKamal Heib {
37340cab9f1SKamal Heib 	int i;
37440cab9f1SKamal Heib 
37540cab9f1SKamal Heib 	for (i = 0; i < NUM_VPORT_COUNTERS; i++)
37640cab9f1SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
37740cab9f1SKamal Heib 						  vport_stats_desc, i);
37840cab9f1SKamal Heib 	return idx;
37940cab9f1SKamal Heib }
38040cab9f1SKamal Heib 
38119386177SKamal Heib static void mlx5e_grp_vport_update_stats(struct mlx5e_priv *priv)
38219386177SKamal Heib {
38319386177SKamal Heib 	int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
38419386177SKamal Heib 	u32 *out = (u32 *)priv->stats.vport.query_vport_out;
38519386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {0};
38619386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
38719386177SKamal Heib 
38819386177SKamal Heib 	MLX5_SET(query_vport_counter_in, in, opcode, MLX5_CMD_OP_QUERY_VPORT_COUNTER);
38919386177SKamal Heib 	MLX5_SET(query_vport_counter_in, in, op_mod, 0);
39019386177SKamal Heib 	MLX5_SET(query_vport_counter_in, in, other_vport, 0);
39119386177SKamal Heib 	mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
39219386177SKamal Heib }
39319386177SKamal Heib 
3946e6ef814SKamal Heib #define PPORT_802_3_OFF(c) \
3956e6ef814SKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
3966e6ef814SKamal Heib 		      counter_set.eth_802_3_cntrs_grp_data_layout.c##_high)
3976e6ef814SKamal Heib static const struct counter_desc pport_802_3_stats_desc[] = {
3986e6ef814SKamal Heib 	{ "tx_packets_phy", PPORT_802_3_OFF(a_frames_transmitted_ok) },
3996e6ef814SKamal Heib 	{ "rx_packets_phy", PPORT_802_3_OFF(a_frames_received_ok) },
4006e6ef814SKamal Heib 	{ "rx_crc_errors_phy", PPORT_802_3_OFF(a_frame_check_sequence_errors) },
4016e6ef814SKamal Heib 	{ "tx_bytes_phy", PPORT_802_3_OFF(a_octets_transmitted_ok) },
4026e6ef814SKamal Heib 	{ "rx_bytes_phy", PPORT_802_3_OFF(a_octets_received_ok) },
4036e6ef814SKamal Heib 	{ "tx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_xmitted_ok) },
4046e6ef814SKamal Heib 	{ "tx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_xmitted_ok) },
4056e6ef814SKamal Heib 	{ "rx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_received_ok) },
4066e6ef814SKamal Heib 	{ "rx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_received_ok) },
4076e6ef814SKamal Heib 	{ "rx_in_range_len_errors_phy", PPORT_802_3_OFF(a_in_range_length_errors) },
4086e6ef814SKamal Heib 	{ "rx_out_of_range_len_phy", PPORT_802_3_OFF(a_out_of_range_length_field) },
4096e6ef814SKamal Heib 	{ "rx_oversize_pkts_phy", PPORT_802_3_OFF(a_frame_too_long_errors) },
4106e6ef814SKamal Heib 	{ "rx_symbol_err_phy", PPORT_802_3_OFF(a_symbol_error_during_carrier) },
4116e6ef814SKamal Heib 	{ "tx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_transmitted) },
4126e6ef814SKamal Heib 	{ "rx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_received) },
4136e6ef814SKamal Heib 	{ "rx_unsupported_op_phy", PPORT_802_3_OFF(a_unsupported_opcodes_received) },
4146e6ef814SKamal Heib 	{ "rx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_received) },
4156e6ef814SKamal Heib 	{ "tx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_transmitted) },
4166e6ef814SKamal Heib };
4176e6ef814SKamal Heib 
4186e6ef814SKamal Heib #define NUM_PPORT_802_3_COUNTERS	ARRAY_SIZE(pport_802_3_stats_desc)
4196e6ef814SKamal Heib 
4206e6ef814SKamal Heib static int mlx5e_grp_802_3_get_num_stats(struct mlx5e_priv *priv)
4216e6ef814SKamal Heib {
4226e6ef814SKamal Heib 	return NUM_PPORT_802_3_COUNTERS;
4236e6ef814SKamal Heib }
4246e6ef814SKamal Heib 
4256e6ef814SKamal Heib static int mlx5e_grp_802_3_fill_strings(struct mlx5e_priv *priv, u8 *data,
4266e6ef814SKamal Heib 					int idx)
4276e6ef814SKamal Heib {
4286e6ef814SKamal Heib 	int i;
4296e6ef814SKamal Heib 
4306e6ef814SKamal Heib 	for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
4316e6ef814SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_802_3_stats_desc[i].format);
4326e6ef814SKamal Heib 	return idx;
4336e6ef814SKamal Heib }
4346e6ef814SKamal Heib 
4356e6ef814SKamal Heib static int mlx5e_grp_802_3_fill_stats(struct mlx5e_priv *priv, u64 *data,
4366e6ef814SKamal Heib 				      int idx)
4376e6ef814SKamal Heib {
4386e6ef814SKamal Heib 	int i;
4396e6ef814SKamal Heib 
4406e6ef814SKamal Heib 	for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
4416e6ef814SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
4426e6ef814SKamal Heib 						  pport_802_3_stats_desc, i);
4436e6ef814SKamal Heib 	return idx;
4446e6ef814SKamal Heib }
4456e6ef814SKamal Heib 
44619386177SKamal Heib static void mlx5e_grp_802_3_update_stats(struct mlx5e_priv *priv)
44719386177SKamal Heib {
44819386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
44919386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
45019386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
45119386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
45219386177SKamal Heib 	void *out;
45319386177SKamal Heib 
45419386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
45519386177SKamal Heib 	out = pstats->IEEE_802_3_counters;
45619386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_IEEE_802_3_COUNTERS_GROUP);
45719386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
45819386177SKamal Heib }
45919386177SKamal Heib 
460fc8e64a3SKamal Heib #define PPORT_2863_OFF(c) \
461fc8e64a3SKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
462fc8e64a3SKamal Heib 		      counter_set.eth_2863_cntrs_grp_data_layout.c##_high)
463fc8e64a3SKamal Heib static const struct counter_desc pport_2863_stats_desc[] = {
464fc8e64a3SKamal Heib 	{ "rx_discards_phy", PPORT_2863_OFF(if_in_discards) },
465fc8e64a3SKamal Heib 	{ "tx_discards_phy", PPORT_2863_OFF(if_out_discards) },
466fc8e64a3SKamal Heib 	{ "tx_errors_phy", PPORT_2863_OFF(if_out_errors) },
467fc8e64a3SKamal Heib };
468fc8e64a3SKamal Heib 
469fc8e64a3SKamal Heib #define NUM_PPORT_2863_COUNTERS		ARRAY_SIZE(pport_2863_stats_desc)
470fc8e64a3SKamal Heib 
471fc8e64a3SKamal Heib static int mlx5e_grp_2863_get_num_stats(struct mlx5e_priv *priv)
472fc8e64a3SKamal Heib {
473fc8e64a3SKamal Heib 	return NUM_PPORT_2863_COUNTERS;
474fc8e64a3SKamal Heib }
475fc8e64a3SKamal Heib 
476fc8e64a3SKamal Heib static int mlx5e_grp_2863_fill_strings(struct mlx5e_priv *priv, u8 *data,
477fc8e64a3SKamal Heib 				       int idx)
478fc8e64a3SKamal Heib {
479fc8e64a3SKamal Heib 	int i;
480fc8e64a3SKamal Heib 
481fc8e64a3SKamal Heib 	for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
482fc8e64a3SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2863_stats_desc[i].format);
483fc8e64a3SKamal Heib 	return idx;
484fc8e64a3SKamal Heib }
485fc8e64a3SKamal Heib 
486fc8e64a3SKamal Heib static int mlx5e_grp_2863_fill_stats(struct mlx5e_priv *priv, u64 *data,
487fc8e64a3SKamal Heib 				     int idx)
488fc8e64a3SKamal Heib {
489fc8e64a3SKamal Heib 	int i;
490fc8e64a3SKamal Heib 
491fc8e64a3SKamal Heib 	for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
492fc8e64a3SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
493fc8e64a3SKamal Heib 						  pport_2863_stats_desc, i);
494fc8e64a3SKamal Heib 	return idx;
495fc8e64a3SKamal Heib }
496fc8e64a3SKamal Heib 
49719386177SKamal Heib static void mlx5e_grp_2863_update_stats(struct mlx5e_priv *priv)
49819386177SKamal Heib {
49919386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
50019386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
50119386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
50219386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
50319386177SKamal Heib 	void *out;
50419386177SKamal Heib 
50519386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
50619386177SKamal Heib 	out = pstats->RFC_2863_counters;
50719386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2863_COUNTERS_GROUP);
50819386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
50919386177SKamal Heib }
51019386177SKamal Heib 
511e0e0def9SKamal Heib #define PPORT_2819_OFF(c) \
512e0e0def9SKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
513e0e0def9SKamal Heib 		      counter_set.eth_2819_cntrs_grp_data_layout.c##_high)
514e0e0def9SKamal Heib static const struct counter_desc pport_2819_stats_desc[] = {
515e0e0def9SKamal Heib 	{ "rx_undersize_pkts_phy", PPORT_2819_OFF(ether_stats_undersize_pkts) },
516e0e0def9SKamal Heib 	{ "rx_fragments_phy", PPORT_2819_OFF(ether_stats_fragments) },
517e0e0def9SKamal Heib 	{ "rx_jabbers_phy", PPORT_2819_OFF(ether_stats_jabbers) },
518e0e0def9SKamal Heib 	{ "rx_64_bytes_phy", PPORT_2819_OFF(ether_stats_pkts64octets) },
519e0e0def9SKamal Heib 	{ "rx_65_to_127_bytes_phy", PPORT_2819_OFF(ether_stats_pkts65to127octets) },
520e0e0def9SKamal Heib 	{ "rx_128_to_255_bytes_phy", PPORT_2819_OFF(ether_stats_pkts128to255octets) },
521e0e0def9SKamal Heib 	{ "rx_256_to_511_bytes_phy", PPORT_2819_OFF(ether_stats_pkts256to511octets) },
522e0e0def9SKamal Heib 	{ "rx_512_to_1023_bytes_phy", PPORT_2819_OFF(ether_stats_pkts512to1023octets) },
523e0e0def9SKamal Heib 	{ "rx_1024_to_1518_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1024to1518octets) },
524e0e0def9SKamal Heib 	{ "rx_1519_to_2047_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1519to2047octets) },
525e0e0def9SKamal Heib 	{ "rx_2048_to_4095_bytes_phy", PPORT_2819_OFF(ether_stats_pkts2048to4095octets) },
526e0e0def9SKamal Heib 	{ "rx_4096_to_8191_bytes_phy", PPORT_2819_OFF(ether_stats_pkts4096to8191octets) },
527e0e0def9SKamal Heib 	{ "rx_8192_to_10239_bytes_phy", PPORT_2819_OFF(ether_stats_pkts8192to10239octets) },
528e0e0def9SKamal Heib };
529e0e0def9SKamal Heib 
530e0e0def9SKamal Heib #define NUM_PPORT_2819_COUNTERS		ARRAY_SIZE(pport_2819_stats_desc)
531e0e0def9SKamal Heib 
532e0e0def9SKamal Heib static int mlx5e_grp_2819_get_num_stats(struct mlx5e_priv *priv)
533e0e0def9SKamal Heib {
534e0e0def9SKamal Heib 	return NUM_PPORT_2819_COUNTERS;
535e0e0def9SKamal Heib }
536e0e0def9SKamal Heib 
537e0e0def9SKamal Heib static int mlx5e_grp_2819_fill_strings(struct mlx5e_priv *priv, u8 *data,
538e0e0def9SKamal Heib 				       int idx)
539e0e0def9SKamal Heib {
540e0e0def9SKamal Heib 	int i;
541e0e0def9SKamal Heib 
542e0e0def9SKamal Heib 	for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
543e0e0def9SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2819_stats_desc[i].format);
544e0e0def9SKamal Heib 	return idx;
545e0e0def9SKamal Heib }
546e0e0def9SKamal Heib 
547e0e0def9SKamal Heib static int mlx5e_grp_2819_fill_stats(struct mlx5e_priv *priv, u64 *data,
548e0e0def9SKamal Heib 				     int idx)
549e0e0def9SKamal Heib {
550e0e0def9SKamal Heib 	int i;
551e0e0def9SKamal Heib 
552e0e0def9SKamal Heib 	for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
553e0e0def9SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
554e0e0def9SKamal Heib 						  pport_2819_stats_desc, i);
555e0e0def9SKamal Heib 	return idx;
556e0e0def9SKamal Heib }
557e0e0def9SKamal Heib 
55819386177SKamal Heib static void mlx5e_grp_2819_update_stats(struct mlx5e_priv *priv)
55919386177SKamal Heib {
56019386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
56119386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
56219386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
56319386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
56419386177SKamal Heib 	void *out;
56519386177SKamal Heib 
56619386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
56719386177SKamal Heib 	out = pstats->RFC_2819_counters;
56819386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2819_COUNTERS_GROUP);
56919386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
57019386177SKamal Heib }
57119386177SKamal Heib 
5722e4df0b2SKamal Heib #define PPORT_PHY_STATISTICAL_OFF(c) \
5732e4df0b2SKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
5742e4df0b2SKamal Heib 		      counter_set.phys_layer_statistical_cntrs.c##_high)
5752e4df0b2SKamal Heib static const struct counter_desc pport_phy_statistical_stats_desc[] = {
5762e4df0b2SKamal Heib 	{ "rx_pcs_symbol_err_phy", PPORT_PHY_STATISTICAL_OFF(phy_symbol_errors) },
5772e4df0b2SKamal Heib 	{ "rx_corrected_bits_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits) },
5782e4df0b2SKamal Heib };
5792e4df0b2SKamal Heib 
5806ab75516SSaeed Mahameed #define NUM_PPORT_PHY_STATISTICAL_COUNTERS ARRAY_SIZE(pport_phy_statistical_stats_desc)
5812e4df0b2SKamal Heib 
5822e4df0b2SKamal Heib static int mlx5e_grp_phy_get_num_stats(struct mlx5e_priv *priv)
5832e4df0b2SKamal Heib {
5846ab75516SSaeed Mahameed 	/* "1" for link_down_events special counter */
5852e4df0b2SKamal Heib 	return MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group) ?
5866ab75516SSaeed Mahameed 		NUM_PPORT_PHY_STATISTICAL_COUNTERS + 1 : 1;
5872e4df0b2SKamal Heib }
5882e4df0b2SKamal Heib 
5892e4df0b2SKamal Heib static int mlx5e_grp_phy_fill_strings(struct mlx5e_priv *priv, u8 *data,
5902e4df0b2SKamal Heib 				      int idx)
5912e4df0b2SKamal Heib {
5922e4df0b2SKamal Heib 	int i;
5932e4df0b2SKamal Heib 
5946ab75516SSaeed Mahameed 	strcpy(data + (idx++) * ETH_GSTRING_LEN, "link_down_events_phy");
5956ab75516SSaeed Mahameed 
5966ab75516SSaeed Mahameed 	if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group))
5976ab75516SSaeed Mahameed 		return idx;
5986ab75516SSaeed Mahameed 
5996ab75516SSaeed Mahameed 	for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++)
6002e4df0b2SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN,
6012e4df0b2SKamal Heib 		       pport_phy_statistical_stats_desc[i].format);
6022e4df0b2SKamal Heib 	return idx;
6032e4df0b2SKamal Heib }
6042e4df0b2SKamal Heib 
6052e4df0b2SKamal Heib static int mlx5e_grp_phy_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx)
6062e4df0b2SKamal Heib {
6072e4df0b2SKamal Heib 	int i;
6082e4df0b2SKamal Heib 
6096ab75516SSaeed Mahameed 	/* link_down_events_phy has special handling since it is not stored in __be64 format */
6106ab75516SSaeed Mahameed 	data[idx++] = MLX5_GET(ppcnt_reg, priv->stats.pport.phy_counters,
6116ab75516SSaeed Mahameed 			       counter_set.phys_layer_cntrs.link_down_events);
6126ab75516SSaeed Mahameed 
6136ab75516SSaeed Mahameed 	if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group))
6146ab75516SSaeed Mahameed 		return idx;
6156ab75516SSaeed Mahameed 
6166ab75516SSaeed Mahameed 	for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++)
6172e4df0b2SKamal Heib 		data[idx++] =
6182e4df0b2SKamal Heib 			MLX5E_READ_CTR64_BE(&priv->stats.pport.phy_statistical_counters,
6192e4df0b2SKamal Heib 					    pport_phy_statistical_stats_desc, i);
6202e4df0b2SKamal Heib 	return idx;
6212e4df0b2SKamal Heib }
6222e4df0b2SKamal Heib 
62319386177SKamal Heib static void mlx5e_grp_phy_update_stats(struct mlx5e_priv *priv)
62419386177SKamal Heib {
62519386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
62619386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
62719386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
62819386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
62919386177SKamal Heib 	void *out;
63019386177SKamal Heib 
63119386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
63219386177SKamal Heib 	out = pstats->phy_counters;
63319386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_COUNTERS_GROUP);
63419386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
63519386177SKamal Heib 
63619386177SKamal Heib 	if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group))
63719386177SKamal Heib 		return;
63819386177SKamal Heib 
63919386177SKamal Heib 	out = pstats->phy_statistical_counters;
64019386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_STATISTICAL_GROUP);
64119386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
64219386177SKamal Heib }
64319386177SKamal Heib 
6443488bd4cSKamal Heib #define PPORT_ETH_EXT_OFF(c) \
6453488bd4cSKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
6463488bd4cSKamal Heib 		      counter_set.eth_extended_cntrs_grp_data_layout.c##_high)
6473488bd4cSKamal Heib static const struct counter_desc pport_eth_ext_stats_desc[] = {
6483488bd4cSKamal Heib 	{ "rx_buffer_passed_thres_phy", PPORT_ETH_EXT_OFF(rx_buffer_almost_full) },
6493488bd4cSKamal Heib };
6503488bd4cSKamal Heib 
6513488bd4cSKamal Heib #define NUM_PPORT_ETH_EXT_COUNTERS	ARRAY_SIZE(pport_eth_ext_stats_desc)
6523488bd4cSKamal Heib 
6533488bd4cSKamal Heib static int mlx5e_grp_eth_ext_get_num_stats(struct mlx5e_priv *priv)
6543488bd4cSKamal Heib {
6553488bd4cSKamal Heib 	if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
6563488bd4cSKamal Heib 		return NUM_PPORT_ETH_EXT_COUNTERS;
6573488bd4cSKamal Heib 
6583488bd4cSKamal Heib 	return 0;
6593488bd4cSKamal Heib }
6603488bd4cSKamal Heib 
6613488bd4cSKamal Heib static int mlx5e_grp_eth_ext_fill_strings(struct mlx5e_priv *priv, u8 *data,
6623488bd4cSKamal Heib 					  int idx)
6633488bd4cSKamal Heib {
6643488bd4cSKamal Heib 	int i;
6653488bd4cSKamal Heib 
6663488bd4cSKamal Heib 	if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
6673488bd4cSKamal Heib 		for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++)
6683488bd4cSKamal Heib 			strcpy(data + (idx++) * ETH_GSTRING_LEN,
6693488bd4cSKamal Heib 			       pport_eth_ext_stats_desc[i].format);
6703488bd4cSKamal Heib 	return idx;
6713488bd4cSKamal Heib }
6723488bd4cSKamal Heib 
6733488bd4cSKamal Heib static int mlx5e_grp_eth_ext_fill_stats(struct mlx5e_priv *priv, u64 *data,
6743488bd4cSKamal Heib 					int idx)
6753488bd4cSKamal Heib {
6763488bd4cSKamal Heib 	int i;
6773488bd4cSKamal Heib 
6783488bd4cSKamal Heib 	if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
6793488bd4cSKamal Heib 		for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++)
6803488bd4cSKamal Heib 			data[idx++] =
6813488bd4cSKamal Heib 				MLX5E_READ_CTR64_BE(&priv->stats.pport.eth_ext_counters,
6823488bd4cSKamal Heib 						    pport_eth_ext_stats_desc, i);
6833488bd4cSKamal Heib 	return idx;
6843488bd4cSKamal Heib }
6853488bd4cSKamal Heib 
68619386177SKamal Heib static void mlx5e_grp_eth_ext_update_stats(struct mlx5e_priv *priv)
68719386177SKamal Heib {
68819386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
68919386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
69019386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
69119386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
69219386177SKamal Heib 	void *out;
69319386177SKamal Heib 
69419386177SKamal Heib 	if (!MLX5_CAP_PCAM_FEATURE(mdev, rx_buffer_fullness_counters))
69519386177SKamal Heib 		return;
69619386177SKamal Heib 
69719386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
69819386177SKamal Heib 	out = pstats->eth_ext_counters;
69919386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP);
70019386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
70119386177SKamal Heib }
70219386177SKamal Heib 
7039fd2b5f1SKamal Heib #define PCIE_PERF_OFF(c) \
7049fd2b5f1SKamal Heib 	MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c)
7059fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc[] = {
7069fd2b5f1SKamal Heib 	{ "rx_pci_signal_integrity", PCIE_PERF_OFF(rx_errors) },
7079fd2b5f1SKamal Heib 	{ "tx_pci_signal_integrity", PCIE_PERF_OFF(tx_errors) },
7089fd2b5f1SKamal Heib };
7099fd2b5f1SKamal Heib 
7109fd2b5f1SKamal Heib #define PCIE_PERF_OFF64(c) \
7119fd2b5f1SKamal Heib 	MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c##_high)
7129fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc64[] = {
7139fd2b5f1SKamal Heib 	{ "outbound_pci_buffer_overflow", PCIE_PERF_OFF64(tx_overflow_buffer_pkt) },
7149fd2b5f1SKamal Heib };
7159fd2b5f1SKamal Heib 
7169fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stall_stats_desc[] = {
7179fd2b5f1SKamal Heib 	{ "outbound_pci_stalled_rd", PCIE_PERF_OFF(outbound_stalled_reads) },
7189fd2b5f1SKamal Heib 	{ "outbound_pci_stalled_wr", PCIE_PERF_OFF(outbound_stalled_writes) },
7199fd2b5f1SKamal Heib 	{ "outbound_pci_stalled_rd_events", PCIE_PERF_OFF(outbound_stalled_reads_events) },
7209fd2b5f1SKamal Heib 	{ "outbound_pci_stalled_wr_events", PCIE_PERF_OFF(outbound_stalled_writes_events) },
7219fd2b5f1SKamal Heib };
7229fd2b5f1SKamal Heib 
7239fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS		ARRAY_SIZE(pcie_perf_stats_desc)
7249fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS64	ARRAY_SIZE(pcie_perf_stats_desc64)
7259fd2b5f1SKamal Heib #define NUM_PCIE_PERF_STALL_COUNTERS	ARRAY_SIZE(pcie_perf_stall_stats_desc)
7269fd2b5f1SKamal Heib 
7279fd2b5f1SKamal Heib static int mlx5e_grp_pcie_get_num_stats(struct mlx5e_priv *priv)
7289fd2b5f1SKamal Heib {
7299fd2b5f1SKamal Heib 	int num_stats = 0;
7309fd2b5f1SKamal Heib 
7319fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group))
7329fd2b5f1SKamal Heib 		num_stats += NUM_PCIE_PERF_COUNTERS;
7339fd2b5f1SKamal Heib 
7349fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt))
7359fd2b5f1SKamal Heib 		num_stats += NUM_PCIE_PERF_COUNTERS64;
7369fd2b5f1SKamal Heib 
7379fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled))
7389fd2b5f1SKamal Heib 		num_stats += NUM_PCIE_PERF_STALL_COUNTERS;
7399fd2b5f1SKamal Heib 
7409fd2b5f1SKamal Heib 	return num_stats;
7419fd2b5f1SKamal Heib }
7429fd2b5f1SKamal Heib 
7439fd2b5f1SKamal Heib static int mlx5e_grp_pcie_fill_strings(struct mlx5e_priv *priv, u8 *data,
7449fd2b5f1SKamal Heib 				       int idx)
7459fd2b5f1SKamal Heib {
7469fd2b5f1SKamal Heib 	int i;
7479fd2b5f1SKamal Heib 
7489fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group))
7499fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++)
7509fd2b5f1SKamal Heib 			strcpy(data + (idx++) * ETH_GSTRING_LEN,
7519fd2b5f1SKamal Heib 			       pcie_perf_stats_desc[i].format);
7529fd2b5f1SKamal Heib 
7539fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt))
7549fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++)
7559fd2b5f1SKamal Heib 			strcpy(data + (idx++) * ETH_GSTRING_LEN,
7569fd2b5f1SKamal Heib 			       pcie_perf_stats_desc64[i].format);
7579fd2b5f1SKamal Heib 
7589fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled))
7599fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++)
7609fd2b5f1SKamal Heib 			strcpy(data + (idx++) * ETH_GSTRING_LEN,
7619fd2b5f1SKamal Heib 			       pcie_perf_stall_stats_desc[i].format);
7629fd2b5f1SKamal Heib 	return idx;
7639fd2b5f1SKamal Heib }
7649fd2b5f1SKamal Heib 
7659fd2b5f1SKamal Heib static int mlx5e_grp_pcie_fill_stats(struct mlx5e_priv *priv, u64 *data,
7669fd2b5f1SKamal Heib 				     int idx)
7679fd2b5f1SKamal Heib {
7689fd2b5f1SKamal Heib 	int i;
7699fd2b5f1SKamal Heib 
7709fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group))
7719fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++)
7729fd2b5f1SKamal Heib 			data[idx++] =
7739fd2b5f1SKamal Heib 				MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters,
7749fd2b5f1SKamal Heib 						    pcie_perf_stats_desc, i);
7759fd2b5f1SKamal Heib 
7769fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt))
7779fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++)
7789fd2b5f1SKamal Heib 			data[idx++] =
7799fd2b5f1SKamal Heib 				MLX5E_READ_CTR64_BE(&priv->stats.pcie.pcie_perf_counters,
7809fd2b5f1SKamal Heib 						    pcie_perf_stats_desc64, i);
7819fd2b5f1SKamal Heib 
7829fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled))
7839fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++)
7849fd2b5f1SKamal Heib 			data[idx++] =
7859fd2b5f1SKamal Heib 				MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters,
7869fd2b5f1SKamal Heib 						    pcie_perf_stall_stats_desc, i);
7879fd2b5f1SKamal Heib 	return idx;
7889fd2b5f1SKamal Heib }
7899fd2b5f1SKamal Heib 
79019386177SKamal Heib static void mlx5e_grp_pcie_update_stats(struct mlx5e_priv *priv)
79119386177SKamal Heib {
79219386177SKamal Heib 	struct mlx5e_pcie_stats *pcie_stats = &priv->stats.pcie;
79319386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
79419386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(mpcnt_reg)] = {0};
79519386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(mpcnt_reg);
79619386177SKamal Heib 	void *out;
79719386177SKamal Heib 
79819386177SKamal Heib 	if (!MLX5_CAP_MCAM_FEATURE(mdev, pcie_performance_group))
79919386177SKamal Heib 		return;
80019386177SKamal Heib 
80119386177SKamal Heib 	out = pcie_stats->pcie_perf_counters;
80219386177SKamal Heib 	MLX5_SET(mpcnt_reg, in, grp, MLX5_PCIE_PERFORMANCE_COUNTERS_GROUP);
80319386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_MPCNT, 0, 0);
80419386177SKamal Heib }
80519386177SKamal Heib 
8064377bea2SKamal Heib #define PPORT_PER_PRIO_OFF(c) \
8074377bea2SKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
8084377bea2SKamal Heib 		      counter_set.eth_per_prio_grp_data_layout.c##_high)
809e6000651SKamal Heib static const struct counter_desc pport_per_prio_traffic_stats_desc[] = {
810e6000651SKamal Heib 	{ "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets) },
811e6000651SKamal Heib 	{ "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames) },
812e6000651SKamal Heib 	{ "tx_prio%d_bytes", PPORT_PER_PRIO_OFF(tx_octets) },
813e6000651SKamal Heib 	{ "tx_prio%d_packets", PPORT_PER_PRIO_OFF(tx_frames) },
814e6000651SKamal Heib };
815e6000651SKamal Heib 
816e6000651SKamal Heib #define NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS	ARRAY_SIZE(pport_per_prio_traffic_stats_desc)
817e6000651SKamal Heib 
818e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_get_num_stats(struct mlx5e_priv *priv)
819e6000651SKamal Heib {
820e6000651SKamal Heib 	return NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS * NUM_PPORT_PRIO;
821e6000651SKamal Heib }
822e6000651SKamal Heib 
823e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_strings(struct mlx5e_priv *priv,
824e6000651SKamal Heib 						   u8 *data,
825e6000651SKamal Heib 						   int idx)
826e6000651SKamal Heib {
827e6000651SKamal Heib 	int i, prio;
828e6000651SKamal Heib 
829e6000651SKamal Heib 	for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
830e6000651SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
831e6000651SKamal Heib 			sprintf(data + (idx++) * ETH_GSTRING_LEN,
832e6000651SKamal Heib 				pport_per_prio_traffic_stats_desc[i].format, prio);
833e6000651SKamal Heib 	}
834e6000651SKamal Heib 
835e6000651SKamal Heib 	return idx;
836e6000651SKamal Heib }
837e6000651SKamal Heib 
838e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_stats(struct mlx5e_priv *priv,
839e6000651SKamal Heib 						 u64 *data,
840e6000651SKamal Heib 						 int idx)
841e6000651SKamal Heib {
842e6000651SKamal Heib 	int i, prio;
843e6000651SKamal Heib 
844e6000651SKamal Heib 	for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
845e6000651SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
846e6000651SKamal Heib 			data[idx++] =
847e6000651SKamal Heib 				MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
848e6000651SKamal Heib 						    pport_per_prio_traffic_stats_desc, i);
849e6000651SKamal Heib 	}
850e6000651SKamal Heib 
851e6000651SKamal Heib 	return idx;
852e6000651SKamal Heib }
853e6000651SKamal Heib 
8544377bea2SKamal Heib static const struct counter_desc pport_per_prio_pfc_stats_desc[] = {
8554377bea2SKamal Heib 	/* %s is "global" or "prio{i}" */
8564377bea2SKamal Heib 	{ "rx_%s_pause", PPORT_PER_PRIO_OFF(rx_pause) },
8574377bea2SKamal Heib 	{ "rx_%s_pause_duration", PPORT_PER_PRIO_OFF(rx_pause_duration) },
8584377bea2SKamal Heib 	{ "tx_%s_pause", PPORT_PER_PRIO_OFF(tx_pause) },
8594377bea2SKamal Heib 	{ "tx_%s_pause_duration", PPORT_PER_PRIO_OFF(tx_pause_duration) },
8604377bea2SKamal Heib 	{ "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) },
8614377bea2SKamal Heib };
8624377bea2SKamal Heib 
8632fcb12dfSInbar Karmy static const struct counter_desc pport_pfc_stall_stats_desc[] = {
8642fcb12dfSInbar Karmy 	{ "tx_pause_storm_warning_events ", PPORT_PER_PRIO_OFF(device_stall_minor_watermark_cnt) },
8652fcb12dfSInbar Karmy 	{ "tx_pause_storm_error_events", PPORT_PER_PRIO_OFF(device_stall_critical_watermark_cnt) },
8662fcb12dfSInbar Karmy };
8672fcb12dfSInbar Karmy 
8684377bea2SKamal Heib #define NUM_PPORT_PER_PRIO_PFC_COUNTERS		ARRAY_SIZE(pport_per_prio_pfc_stats_desc)
8692fcb12dfSInbar Karmy #define NUM_PPORT_PFC_STALL_COUNTERS(priv)	(ARRAY_SIZE(pport_pfc_stall_stats_desc) * \
8702fcb12dfSInbar Karmy 						 MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) * \
8712fcb12dfSInbar Karmy 						 MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
8724377bea2SKamal Heib 
8734377bea2SKamal Heib static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
8744377bea2SKamal Heib {
8754377bea2SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
8764377bea2SKamal Heib 	u8 pfc_en_tx;
8774377bea2SKamal Heib 	u8 pfc_en_rx;
8784377bea2SKamal Heib 	int err;
8794377bea2SKamal Heib 
8804377bea2SKamal Heib 	if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
8814377bea2SKamal Heib 		return 0;
8824377bea2SKamal Heib 
8834377bea2SKamal Heib 	err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
8844377bea2SKamal Heib 
8854377bea2SKamal Heib 	return err ? 0 : pfc_en_tx | pfc_en_rx;
8864377bea2SKamal Heib }
8874377bea2SKamal Heib 
8884377bea2SKamal Heib static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
8894377bea2SKamal Heib {
8904377bea2SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
8914377bea2SKamal Heib 	u32 rx_pause;
8924377bea2SKamal Heib 	u32 tx_pause;
8934377bea2SKamal Heib 	int err;
8944377bea2SKamal Heib 
8954377bea2SKamal Heib 	if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
8964377bea2SKamal Heib 		return false;
8974377bea2SKamal Heib 
8984377bea2SKamal Heib 	err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
8994377bea2SKamal Heib 
9004377bea2SKamal Heib 	return err ? false : rx_pause | tx_pause;
9014377bea2SKamal Heib }
9024377bea2SKamal Heib 
9034377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_get_num_stats(struct mlx5e_priv *priv)
9044377bea2SKamal Heib {
9054377bea2SKamal Heib 	return (mlx5e_query_global_pause_combined(priv) +
9064377bea2SKamal Heib 		hweight8(mlx5e_query_pfc_combined(priv))) *
9072fcb12dfSInbar Karmy 		NUM_PPORT_PER_PRIO_PFC_COUNTERS +
9082fcb12dfSInbar Karmy 		NUM_PPORT_PFC_STALL_COUNTERS(priv);
9094377bea2SKamal Heib }
9104377bea2SKamal Heib 
9114377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_strings(struct mlx5e_priv *priv,
9124377bea2SKamal Heib 					       u8 *data,
9134377bea2SKamal Heib 					       int idx)
9144377bea2SKamal Heib {
9154377bea2SKamal Heib 	unsigned long pfc_combined;
9164377bea2SKamal Heib 	int i, prio;
9174377bea2SKamal Heib 
9184377bea2SKamal Heib 	pfc_combined = mlx5e_query_pfc_combined(priv);
9194377bea2SKamal Heib 	for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
9204377bea2SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
9214377bea2SKamal Heib 			char pfc_string[ETH_GSTRING_LEN];
9224377bea2SKamal Heib 
9234377bea2SKamal Heib 			snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio);
9244377bea2SKamal Heib 			sprintf(data + (idx++) * ETH_GSTRING_LEN,
9254377bea2SKamal Heib 				pport_per_prio_pfc_stats_desc[i].format, pfc_string);
9264377bea2SKamal Heib 		}
9274377bea2SKamal Heib 	}
9284377bea2SKamal Heib 
9294377bea2SKamal Heib 	if (mlx5e_query_global_pause_combined(priv)) {
9304377bea2SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
9314377bea2SKamal Heib 			sprintf(data + (idx++) * ETH_GSTRING_LEN,
9324377bea2SKamal Heib 				pport_per_prio_pfc_stats_desc[i].format, "global");
9334377bea2SKamal Heib 		}
9344377bea2SKamal Heib 	}
9354377bea2SKamal Heib 
9362fcb12dfSInbar Karmy 	for (i = 0; i < NUM_PPORT_PFC_STALL_COUNTERS(priv); i++)
9372fcb12dfSInbar Karmy 		strcpy(data + (idx++) * ETH_GSTRING_LEN,
9382fcb12dfSInbar Karmy 		       pport_pfc_stall_stats_desc[i].format);
9392fcb12dfSInbar Karmy 
9404377bea2SKamal Heib 	return idx;
9414377bea2SKamal Heib }
9424377bea2SKamal Heib 
9434377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_stats(struct mlx5e_priv *priv,
9444377bea2SKamal Heib 					     u64 *data,
9454377bea2SKamal Heib 					     int idx)
9464377bea2SKamal Heib {
9474377bea2SKamal Heib 	unsigned long pfc_combined;
9484377bea2SKamal Heib 	int i, prio;
9494377bea2SKamal Heib 
9504377bea2SKamal Heib 	pfc_combined = mlx5e_query_pfc_combined(priv);
9514377bea2SKamal Heib 	for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
9524377bea2SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
9534377bea2SKamal Heib 			data[idx++] =
9544377bea2SKamal Heib 				MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
9554377bea2SKamal Heib 						    pport_per_prio_pfc_stats_desc, i);
9564377bea2SKamal Heib 		}
9574377bea2SKamal Heib 	}
9584377bea2SKamal Heib 
9594377bea2SKamal Heib 	if (mlx5e_query_global_pause_combined(priv)) {
9604377bea2SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
9614377bea2SKamal Heib 			data[idx++] =
9624377bea2SKamal Heib 				MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
9634377bea2SKamal Heib 						    pport_per_prio_pfc_stats_desc, i);
9644377bea2SKamal Heib 		}
9654377bea2SKamal Heib 	}
9664377bea2SKamal Heib 
9672fcb12dfSInbar Karmy 	for (i = 0; i < NUM_PPORT_PFC_STALL_COUNTERS(priv); i++)
9682fcb12dfSInbar Karmy 		data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
9692fcb12dfSInbar Karmy 						  pport_pfc_stall_stats_desc, i);
9702fcb12dfSInbar Karmy 
9714377bea2SKamal Heib 	return idx;
9724377bea2SKamal Heib }
9734377bea2SKamal Heib 
974a8984281SKamal Heib static int mlx5e_grp_per_prio_get_num_stats(struct mlx5e_priv *priv)
975a8984281SKamal Heib {
976a8984281SKamal Heib 	return mlx5e_grp_per_prio_traffic_get_num_stats(priv) +
977a8984281SKamal Heib 		mlx5e_grp_per_prio_pfc_get_num_stats(priv);
978a8984281SKamal Heib }
979a8984281SKamal Heib 
980a8984281SKamal Heib static int mlx5e_grp_per_prio_fill_strings(struct mlx5e_priv *priv, u8 *data,
981a8984281SKamal Heib 					   int idx)
982a8984281SKamal Heib {
983a8984281SKamal Heib 	idx = mlx5e_grp_per_prio_traffic_fill_strings(priv, data, idx);
984a8984281SKamal Heib 	idx = mlx5e_grp_per_prio_pfc_fill_strings(priv, data, idx);
985a8984281SKamal Heib 	return idx;
986a8984281SKamal Heib }
987a8984281SKamal Heib 
988a8984281SKamal Heib static int mlx5e_grp_per_prio_fill_stats(struct mlx5e_priv *priv, u64 *data,
989a8984281SKamal Heib 					 int idx)
990a8984281SKamal Heib {
991a8984281SKamal Heib 	idx = mlx5e_grp_per_prio_traffic_fill_stats(priv, data, idx);
992a8984281SKamal Heib 	idx = mlx5e_grp_per_prio_pfc_fill_stats(priv, data, idx);
993a8984281SKamal Heib 	return idx;
994a8984281SKamal Heib }
995a8984281SKamal Heib 
99619386177SKamal Heib static void mlx5e_grp_per_prio_update_stats(struct mlx5e_priv *priv)
99719386177SKamal Heib {
99819386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
99919386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
100019386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
100119386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
100219386177SKamal Heib 	int prio;
100319386177SKamal Heib 	void *out;
100419386177SKamal Heib 
100519386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
100619386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_PER_PRIORITY_COUNTERS_GROUP);
100719386177SKamal Heib 	for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
100819386177SKamal Heib 		out = pstats->per_prio_counters[prio];
100919386177SKamal Heib 		MLX5_SET(ppcnt_reg, in, prio_tc, prio);
101019386177SKamal Heib 		mlx5_core_access_reg(mdev, in, sz, out, sz,
101119386177SKamal Heib 				     MLX5_REG_PPCNT, 0, 0);
101219386177SKamal Heib 	}
101319386177SKamal Heib }
101419386177SKamal Heib 
10150e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_status_desc[] = {
10160e6f01a4SKamal Heib 	{ "module_unplug", 8 },
10170e6f01a4SKamal Heib };
10180e6f01a4SKamal Heib 
10190e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_error_desc[] = {
10200e6f01a4SKamal Heib 	{ "module_bus_stuck", 16 },       /* bus stuck (I2C or data shorted) */
10210e6f01a4SKamal Heib 	{ "module_high_temp", 48 },       /* high temperature */
10220e6f01a4SKamal Heib 	{ "module_bad_shorted", 56 },    /* bad or shorted cable/module */
10230e6f01a4SKamal Heib };
10240e6f01a4SKamal Heib 
10250e6f01a4SKamal Heib #define NUM_PME_STATUS_STATS		ARRAY_SIZE(mlx5e_pme_status_desc)
10260e6f01a4SKamal Heib #define NUM_PME_ERR_STATS		ARRAY_SIZE(mlx5e_pme_error_desc)
10270e6f01a4SKamal Heib 
10280e6f01a4SKamal Heib static int mlx5e_grp_pme_get_num_stats(struct mlx5e_priv *priv)
10290e6f01a4SKamal Heib {
10300e6f01a4SKamal Heib 	return NUM_PME_STATUS_STATS + NUM_PME_ERR_STATS;
10310e6f01a4SKamal Heib }
10320e6f01a4SKamal Heib 
10330e6f01a4SKamal Heib static int mlx5e_grp_pme_fill_strings(struct mlx5e_priv *priv, u8 *data,
10340e6f01a4SKamal Heib 				      int idx)
10350e6f01a4SKamal Heib {
10360e6f01a4SKamal Heib 	int i;
10370e6f01a4SKamal Heib 
10380e6f01a4SKamal Heib 	for (i = 0; i < NUM_PME_STATUS_STATS; i++)
10390e6f01a4SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_status_desc[i].format);
10400e6f01a4SKamal Heib 
10410e6f01a4SKamal Heib 	for (i = 0; i < NUM_PME_ERR_STATS; i++)
10420e6f01a4SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_error_desc[i].format);
10430e6f01a4SKamal Heib 
10440e6f01a4SKamal Heib 	return idx;
10450e6f01a4SKamal Heib }
10460e6f01a4SKamal Heib 
10470e6f01a4SKamal Heib static int mlx5e_grp_pme_fill_stats(struct mlx5e_priv *priv, u64 *data,
10480e6f01a4SKamal Heib 				    int idx)
10490e6f01a4SKamal Heib {
10500e6f01a4SKamal Heib 	struct mlx5_priv *mlx5_priv = &priv->mdev->priv;
10510e6f01a4SKamal Heib 	int i;
10520e6f01a4SKamal Heib 
10530e6f01a4SKamal Heib 	for (i = 0; i < NUM_PME_STATUS_STATS; i++)
10540e6f01a4SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.status_counters,
10550e6f01a4SKamal Heib 						   mlx5e_pme_status_desc, i);
10560e6f01a4SKamal Heib 
10570e6f01a4SKamal Heib 	for (i = 0; i < NUM_PME_ERR_STATS; i++)
10580e6f01a4SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.error_counters,
10590e6f01a4SKamal Heib 						   mlx5e_pme_error_desc, i);
10600e6f01a4SKamal Heib 
10610e6f01a4SKamal Heib 	return idx;
10620e6f01a4SKamal Heib }
10630e6f01a4SKamal Heib 
1064e185d43fSKamal Heib static int mlx5e_grp_ipsec_get_num_stats(struct mlx5e_priv *priv)
1065e185d43fSKamal Heib {
1066e185d43fSKamal Heib 	return mlx5e_ipsec_get_count(priv);
1067e185d43fSKamal Heib }
1068e185d43fSKamal Heib 
1069e185d43fSKamal Heib static int mlx5e_grp_ipsec_fill_strings(struct mlx5e_priv *priv, u8 *data,
1070e185d43fSKamal Heib 					int idx)
1071e185d43fSKamal Heib {
1072e185d43fSKamal Heib 	return idx + mlx5e_ipsec_get_strings(priv,
1073e185d43fSKamal Heib 					     data + idx * ETH_GSTRING_LEN);
1074e185d43fSKamal Heib }
1075e185d43fSKamal Heib 
1076e185d43fSKamal Heib static int mlx5e_grp_ipsec_fill_stats(struct mlx5e_priv *priv, u64 *data,
1077e185d43fSKamal Heib 				      int idx)
1078e185d43fSKamal Heib {
1079e185d43fSKamal Heib 	return idx + mlx5e_ipsec_get_stats(priv, data + idx);
1080e185d43fSKamal Heib }
1081e185d43fSKamal Heib 
108219386177SKamal Heib static void mlx5e_grp_ipsec_update_stats(struct mlx5e_priv *priv)
108319386177SKamal Heib {
108419386177SKamal Heib 	mlx5e_ipsec_update_stats(priv);
108519386177SKamal Heib }
108619386177SKamal Heib 
108743585a41SIlya Lesokhin static int mlx5e_grp_tls_get_num_stats(struct mlx5e_priv *priv)
108843585a41SIlya Lesokhin {
108943585a41SIlya Lesokhin 	return mlx5e_tls_get_count(priv);
109043585a41SIlya Lesokhin }
109143585a41SIlya Lesokhin 
109243585a41SIlya Lesokhin static int mlx5e_grp_tls_fill_strings(struct mlx5e_priv *priv, u8 *data,
109343585a41SIlya Lesokhin 				      int idx)
109443585a41SIlya Lesokhin {
109543585a41SIlya Lesokhin 	return idx + mlx5e_tls_get_strings(priv, data + idx * ETH_GSTRING_LEN);
109643585a41SIlya Lesokhin }
109743585a41SIlya Lesokhin 
109843585a41SIlya Lesokhin static int mlx5e_grp_tls_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx)
109943585a41SIlya Lesokhin {
110043585a41SIlya Lesokhin 	return idx + mlx5e_tls_get_stats(priv, data + idx);
110143585a41SIlya Lesokhin }
110243585a41SIlya Lesokhin 
11031fe85006SKamal Heib static const struct counter_desc rq_stats_desc[] = {
11041fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, packets) },
11051fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, bytes) },
11061fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete) },
11071fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary) },
11081fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary_inner) },
11091fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_none) },
11101fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_drop) },
11111fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_tx) },
11121fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_tx_full) },
11131fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_packets) },
11141fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_bytes) },
1115f24686e8SGal Pressman 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, removed_vlan_packets) },
11161fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, wqe_err) },
11171fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler) },
11181fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, buff_alloc_err) },
11191fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_blks) },
11201fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_pkts) },
11211fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, page_reuse) },
11221fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_reuse) },
11231fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_full) },
11241fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_empty) },
11251fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_busy) },
11261fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_waive) },
11271fe85006SKamal Heib };
11281fe85006SKamal Heib 
11291fe85006SKamal Heib static const struct counter_desc sq_stats_desc[] = {
11301fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, packets) },
11311fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, bytes) },
11321fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_packets) },
11331fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_bytes) },
11341fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_packets) },
11351fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_bytes) },
11361fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial) },
11371fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial_inner) },
1138f24686e8SGal Pressman 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, added_vlan_packets) },
11391fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, nop) },
11401fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_none) },
11411fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, stopped) },
11421fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, dropped) },
11431fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, xmit_more) },
1144db75373cSEran Ben Elisha 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, recover) },
1145f65a59ffSTariq Toukan 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, wake) },
1146f65a59ffSTariq Toukan 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, cqe_err) },
11471fe85006SKamal Heib };
11481fe85006SKamal Heib 
114957d689a8SEran Ben Elisha static const struct counter_desc ch_stats_desc[] = {
115057d689a8SEran Ben Elisha 	{ MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, eq_rearm) },
115157d689a8SEran Ben Elisha };
115257d689a8SEran Ben Elisha 
11531fe85006SKamal Heib #define NUM_RQ_STATS			ARRAY_SIZE(rq_stats_desc)
11541fe85006SKamal Heib #define NUM_SQ_STATS			ARRAY_SIZE(sq_stats_desc)
115557d689a8SEran Ben Elisha #define NUM_CH_STATS			ARRAY_SIZE(ch_stats_desc)
11561fe85006SKamal Heib 
11571fe85006SKamal Heib static int mlx5e_grp_channels_get_num_stats(struct mlx5e_priv *priv)
11581fe85006SKamal Heib {
115905909babSEran Ben Elisha 	int max_nch = priv->profile->max_nch(priv->mdev);
116005909babSEran Ben Elisha 
116105909babSEran Ben Elisha 	return (NUM_RQ_STATS * max_nch) +
116205909babSEran Ben Elisha 	       (NUM_CH_STATS * max_nch) +
116305909babSEran Ben Elisha 	       (NUM_SQ_STATS * max_nch * priv->max_opened_tc);
11641fe85006SKamal Heib }
11651fe85006SKamal Heib 
11661fe85006SKamal Heib static int mlx5e_grp_channels_fill_strings(struct mlx5e_priv *priv, u8 *data,
11671fe85006SKamal Heib 					   int idx)
11681fe85006SKamal Heib {
116905909babSEran Ben Elisha 	int max_nch = priv->profile->max_nch(priv->mdev);
11701fe85006SKamal Heib 	int i, j, tc;
11711fe85006SKamal Heib 
117205909babSEran Ben Elisha 	for (i = 0; i < max_nch; i++)
117357d689a8SEran Ben Elisha 		for (j = 0; j < NUM_CH_STATS; j++)
117457d689a8SEran Ben Elisha 			sprintf(data + (idx++) * ETH_GSTRING_LEN,
117557d689a8SEran Ben Elisha 				ch_stats_desc[j].format, i);
117657d689a8SEran Ben Elisha 
117705909babSEran Ben Elisha 	for (i = 0; i < max_nch; i++)
11781fe85006SKamal Heib 		for (j = 0; j < NUM_RQ_STATS; j++)
11791fe85006SKamal Heib 			sprintf(data + (idx++) * ETH_GSTRING_LEN, rq_stats_desc[j].format, i);
11801fe85006SKamal Heib 
118105909babSEran Ben Elisha 	for (tc = 0; tc < priv->max_opened_tc; tc++)
118205909babSEran Ben Elisha 		for (i = 0; i < max_nch; i++)
11831fe85006SKamal Heib 			for (j = 0; j < NUM_SQ_STATS; j++)
11841fe85006SKamal Heib 				sprintf(data + (idx++) * ETH_GSTRING_LEN,
11851fe85006SKamal Heib 					sq_stats_desc[j].format,
11861fe85006SKamal Heib 					priv->channel_tc2txq[i][tc]);
11871fe85006SKamal Heib 
11881fe85006SKamal Heib 	return idx;
11891fe85006SKamal Heib }
11901fe85006SKamal Heib 
11911fe85006SKamal Heib static int mlx5e_grp_channels_fill_stats(struct mlx5e_priv *priv, u64 *data,
11921fe85006SKamal Heib 					 int idx)
11931fe85006SKamal Heib {
119405909babSEran Ben Elisha 	int max_nch = priv->profile->max_nch(priv->mdev);
11951fe85006SKamal Heib 	int i, j, tc;
11961fe85006SKamal Heib 
119705909babSEran Ben Elisha 	for (i = 0; i < max_nch; i++)
119857d689a8SEran Ben Elisha 		for (j = 0; j < NUM_CH_STATS; j++)
119957d689a8SEran Ben Elisha 			data[idx++] =
120005909babSEran Ben Elisha 				MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].ch,
120157d689a8SEran Ben Elisha 						     ch_stats_desc, j);
120257d689a8SEran Ben Elisha 
120305909babSEran Ben Elisha 	for (i = 0; i < max_nch; i++)
12041fe85006SKamal Heib 		for (j = 0; j < NUM_RQ_STATS; j++)
12051fe85006SKamal Heib 			data[idx++] =
120605909babSEran Ben Elisha 				MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].rq,
12071fe85006SKamal Heib 						     rq_stats_desc, j);
12081fe85006SKamal Heib 
120905909babSEran Ben Elisha 	for (tc = 0; tc < priv->max_opened_tc; tc++)
121005909babSEran Ben Elisha 		for (i = 0; i < max_nch; i++)
12111fe85006SKamal Heib 			for (j = 0; j < NUM_SQ_STATS; j++)
12121fe85006SKamal Heib 				data[idx++] =
121305909babSEran Ben Elisha 					MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].sq[tc],
12141fe85006SKamal Heib 							     sq_stats_desc, j);
12151fe85006SKamal Heib 
12161fe85006SKamal Heib 	return idx;
12171fe85006SKamal Heib }
12181fe85006SKamal Heib 
121919386177SKamal Heib /* The stats groups order is opposite to the update_stats() order calls */
1220c0752f2bSKamal Heib const struct mlx5e_stats_grp mlx5e_stats_grps[] = {
1221c0752f2bSKamal Heib 	{
1222c0752f2bSKamal Heib 		.get_num_stats = mlx5e_grp_sw_get_num_stats,
1223c0752f2bSKamal Heib 		.fill_strings = mlx5e_grp_sw_fill_strings,
1224c0752f2bSKamal Heib 		.fill_stats = mlx5e_grp_sw_fill_stats,
122519386177SKamal Heib 		.update_stats = mlx5e_grp_sw_update_stats,
1226fd8dcdb8SKamal Heib 	},
1227fd8dcdb8SKamal Heib 	{
1228fd8dcdb8SKamal Heib 		.get_num_stats = mlx5e_grp_q_get_num_stats,
1229fd8dcdb8SKamal Heib 		.fill_strings = mlx5e_grp_q_fill_strings,
1230fd8dcdb8SKamal Heib 		.fill_stats = mlx5e_grp_q_fill_stats,
123119386177SKamal Heib 		.update_stats_mask = MLX5E_NDO_UPDATE_STATS,
123219386177SKamal Heib 		.update_stats = mlx5e_grp_q_update_stats,
1233fd8dcdb8SKamal Heib 	},
123440cab9f1SKamal Heib 	{
12355c298143SMoshe Shemesh 		.get_num_stats = mlx5e_grp_vnic_env_get_num_stats,
12365c298143SMoshe Shemesh 		.fill_strings = mlx5e_grp_vnic_env_fill_strings,
12375c298143SMoshe Shemesh 		.fill_stats = mlx5e_grp_vnic_env_fill_stats,
12385c298143SMoshe Shemesh 		.update_stats = mlx5e_grp_vnic_env_update_stats,
12395c298143SMoshe Shemesh 	},
12405c298143SMoshe Shemesh 	{
124140cab9f1SKamal Heib 		.get_num_stats = mlx5e_grp_vport_get_num_stats,
124240cab9f1SKamal Heib 		.fill_strings = mlx5e_grp_vport_fill_strings,
124340cab9f1SKamal Heib 		.fill_stats = mlx5e_grp_vport_fill_stats,
124419386177SKamal Heib 		.update_stats_mask = MLX5E_NDO_UPDATE_STATS,
124519386177SKamal Heib 		.update_stats = mlx5e_grp_vport_update_stats,
124640cab9f1SKamal Heib 	},
12476e6ef814SKamal Heib 	{
12486e6ef814SKamal Heib 		.get_num_stats = mlx5e_grp_802_3_get_num_stats,
12496e6ef814SKamal Heib 		.fill_strings = mlx5e_grp_802_3_fill_strings,
12506e6ef814SKamal Heib 		.fill_stats = mlx5e_grp_802_3_fill_stats,
125119386177SKamal Heib 		.update_stats_mask = MLX5E_NDO_UPDATE_STATS,
125219386177SKamal Heib 		.update_stats = mlx5e_grp_802_3_update_stats,
12536e6ef814SKamal Heib 	},
1254fc8e64a3SKamal Heib 	{
1255fc8e64a3SKamal Heib 		.get_num_stats = mlx5e_grp_2863_get_num_stats,
1256fc8e64a3SKamal Heib 		.fill_strings = mlx5e_grp_2863_fill_strings,
1257fc8e64a3SKamal Heib 		.fill_stats = mlx5e_grp_2863_fill_stats,
125819386177SKamal Heib 		.update_stats = mlx5e_grp_2863_update_stats,
1259fc8e64a3SKamal Heib 	},
1260e0e0def9SKamal Heib 	{
1261e0e0def9SKamal Heib 		.get_num_stats = mlx5e_grp_2819_get_num_stats,
1262e0e0def9SKamal Heib 		.fill_strings = mlx5e_grp_2819_fill_strings,
1263e0e0def9SKamal Heib 		.fill_stats = mlx5e_grp_2819_fill_stats,
126419386177SKamal Heib 		.update_stats = mlx5e_grp_2819_update_stats,
1265e0e0def9SKamal Heib 	},
12662e4df0b2SKamal Heib 	{
12672e4df0b2SKamal Heib 		.get_num_stats = mlx5e_grp_phy_get_num_stats,
12682e4df0b2SKamal Heib 		.fill_strings = mlx5e_grp_phy_fill_strings,
12692e4df0b2SKamal Heib 		.fill_stats = mlx5e_grp_phy_fill_stats,
127019386177SKamal Heib 		.update_stats = mlx5e_grp_phy_update_stats,
12712e4df0b2SKamal Heib 	},
12723488bd4cSKamal Heib 	{
12733488bd4cSKamal Heib 		.get_num_stats = mlx5e_grp_eth_ext_get_num_stats,
12743488bd4cSKamal Heib 		.fill_strings = mlx5e_grp_eth_ext_fill_strings,
12753488bd4cSKamal Heib 		.fill_stats = mlx5e_grp_eth_ext_fill_stats,
127619386177SKamal Heib 		.update_stats = mlx5e_grp_eth_ext_update_stats,
12779fd2b5f1SKamal Heib 	},
12789fd2b5f1SKamal Heib 	{
12799fd2b5f1SKamal Heib 		.get_num_stats = mlx5e_grp_pcie_get_num_stats,
12809fd2b5f1SKamal Heib 		.fill_strings = mlx5e_grp_pcie_fill_strings,
12819fd2b5f1SKamal Heib 		.fill_stats = mlx5e_grp_pcie_fill_stats,
128219386177SKamal Heib 		.update_stats = mlx5e_grp_pcie_update_stats,
12839fd2b5f1SKamal Heib 	},
1284e6000651SKamal Heib 	{
1285a8984281SKamal Heib 		.get_num_stats = mlx5e_grp_per_prio_get_num_stats,
1286a8984281SKamal Heib 		.fill_strings = mlx5e_grp_per_prio_fill_strings,
1287a8984281SKamal Heib 		.fill_stats = mlx5e_grp_per_prio_fill_stats,
128819386177SKamal Heib 		.update_stats = mlx5e_grp_per_prio_update_stats,
12894377bea2SKamal Heib 	},
12900e6f01a4SKamal Heib 	{
12910e6f01a4SKamal Heib 		.get_num_stats = mlx5e_grp_pme_get_num_stats,
12920e6f01a4SKamal Heib 		.fill_strings = mlx5e_grp_pme_fill_strings,
12930e6f01a4SKamal Heib 		.fill_stats = mlx5e_grp_pme_fill_stats,
12940e6f01a4SKamal Heib 	},
1295e185d43fSKamal Heib 	{
1296e185d43fSKamal Heib 		.get_num_stats = mlx5e_grp_ipsec_get_num_stats,
1297e185d43fSKamal Heib 		.fill_strings = mlx5e_grp_ipsec_fill_strings,
1298e185d43fSKamal Heib 		.fill_stats = mlx5e_grp_ipsec_fill_stats,
129919386177SKamal Heib 		.update_stats = mlx5e_grp_ipsec_update_stats,
1300e185d43fSKamal Heib 	},
13011fe85006SKamal Heib 	{
130243585a41SIlya Lesokhin 		.get_num_stats = mlx5e_grp_tls_get_num_stats,
130343585a41SIlya Lesokhin 		.fill_strings = mlx5e_grp_tls_fill_strings,
130443585a41SIlya Lesokhin 		.fill_stats = mlx5e_grp_tls_fill_stats,
130543585a41SIlya Lesokhin 	},
130643585a41SIlya Lesokhin 	{
13071fe85006SKamal Heib 		.get_num_stats = mlx5e_grp_channels_get_num_stats,
13081fe85006SKamal Heib 		.fill_strings = mlx5e_grp_channels_fill_strings,
13091fe85006SKamal Heib 		.fill_stats = mlx5e_grp_channels_fill_stats,
13101fe85006SKamal Heib 	}
1311c0752f2bSKamal Heib };
1312c0752f2bSKamal Heib 
1313c0752f2bSKamal Heib const int mlx5e_num_stats_grps = ARRAY_SIZE(mlx5e_stats_grps);
1314