1c0752f2bSKamal Heib /* 2c0752f2bSKamal Heib * Copyright (c) 2017, Mellanox Technologies, Ltd. All rights reserved. 3c0752f2bSKamal Heib * 4c0752f2bSKamal Heib * This software is available to you under a choice of one of two 5c0752f2bSKamal Heib * licenses. You may choose to be licensed under the terms of the GNU 6c0752f2bSKamal Heib * General Public License (GPL) Version 2, available from the file 7c0752f2bSKamal Heib * COPYING in the main directory of this source tree, or the 8c0752f2bSKamal Heib * OpenIB.org BSD license below: 9c0752f2bSKamal Heib * 10c0752f2bSKamal Heib * Redistribution and use in source and binary forms, with or 11c0752f2bSKamal Heib * without modification, are permitted provided that the following 12c0752f2bSKamal Heib * conditions are met: 13c0752f2bSKamal Heib * 14c0752f2bSKamal Heib * - Redistributions of source code must retain the above 15c0752f2bSKamal Heib * copyright notice, this list of conditions and the following 16c0752f2bSKamal Heib * disclaimer. 17c0752f2bSKamal Heib * 18c0752f2bSKamal Heib * - Redistributions in binary form must reproduce the above 19c0752f2bSKamal Heib * copyright notice, this list of conditions and the following 20c0752f2bSKamal Heib * disclaimer in the documentation and/or other materials 21c0752f2bSKamal Heib * provided with the distribution. 22c0752f2bSKamal Heib * 23c0752f2bSKamal Heib * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24c0752f2bSKamal Heib * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25c0752f2bSKamal Heib * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26c0752f2bSKamal Heib * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27c0752f2bSKamal Heib * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28c0752f2bSKamal Heib * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29c0752f2bSKamal Heib * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30c0752f2bSKamal Heib * SOFTWARE. 31c0752f2bSKamal Heib */ 32c0752f2bSKamal Heib 3369c1280bSSaeed Mahameed #include "lib/mlx5.h" 34c0752f2bSKamal Heib #include "en.h" 3543585a41SIlya Lesokhin #include "en_accel/tls.h" 360aab3e1bSRaed Salem #include "en_accel/en_accel.h" 37c0752f2bSKamal Heib 383460c184SSaeed Mahameed static unsigned int stats_grps_num(struct mlx5e_priv *priv) 393460c184SSaeed Mahameed { 403460c184SSaeed Mahameed return !priv->profile->stats_grps_num ? 0 : 413460c184SSaeed Mahameed priv->profile->stats_grps_num(priv); 423460c184SSaeed Mahameed } 433460c184SSaeed Mahameed 443460c184SSaeed Mahameed unsigned int mlx5e_stats_total_num(struct mlx5e_priv *priv) 453460c184SSaeed Mahameed { 46f0ff8e8cSSaeed Mahameed mlx5e_stats_grp_t *stats_grps = priv->profile->stats_grps; 473460c184SSaeed Mahameed const unsigned int num_stats_grps = stats_grps_num(priv); 483460c184SSaeed Mahameed unsigned int total = 0; 493460c184SSaeed Mahameed int i; 503460c184SSaeed Mahameed 513460c184SSaeed Mahameed for (i = 0; i < num_stats_grps; i++) 52f0ff8e8cSSaeed Mahameed total += stats_grps[i]->get_num_stats(priv); 533460c184SSaeed Mahameed 543460c184SSaeed Mahameed return total; 553460c184SSaeed Mahameed } 563460c184SSaeed Mahameed 57b521105bSAlaa Hleihel void mlx5e_stats_update_ndo_stats(struct mlx5e_priv *priv) 58b521105bSAlaa Hleihel { 59b521105bSAlaa Hleihel mlx5e_stats_grp_t *stats_grps = priv->profile->stats_grps; 60b521105bSAlaa Hleihel const unsigned int num_stats_grps = stats_grps_num(priv); 61b521105bSAlaa Hleihel int i; 62b521105bSAlaa Hleihel 63b521105bSAlaa Hleihel for (i = num_stats_grps - 1; i >= 0; i--) 64b521105bSAlaa Hleihel if (stats_grps[i]->update_stats && 65b521105bSAlaa Hleihel stats_grps[i]->update_stats_mask & MLX5E_NDO_UPDATE_STATS) 66b521105bSAlaa Hleihel stats_grps[i]->update_stats(priv); 67b521105bSAlaa Hleihel } 68b521105bSAlaa Hleihel 693460c184SSaeed Mahameed void mlx5e_stats_update(struct mlx5e_priv *priv) 703460c184SSaeed Mahameed { 71f0ff8e8cSSaeed Mahameed mlx5e_stats_grp_t *stats_grps = priv->profile->stats_grps; 723460c184SSaeed Mahameed const unsigned int num_stats_grps = stats_grps_num(priv); 733460c184SSaeed Mahameed int i; 743460c184SSaeed Mahameed 753460c184SSaeed Mahameed for (i = num_stats_grps - 1; i >= 0; i--) 76f0ff8e8cSSaeed Mahameed if (stats_grps[i]->update_stats) 77f0ff8e8cSSaeed Mahameed stats_grps[i]->update_stats(priv); 783460c184SSaeed Mahameed } 793460c184SSaeed Mahameed 803460c184SSaeed Mahameed void mlx5e_stats_fill(struct mlx5e_priv *priv, u64 *data, int idx) 813460c184SSaeed Mahameed { 82f0ff8e8cSSaeed Mahameed mlx5e_stats_grp_t *stats_grps = priv->profile->stats_grps; 833460c184SSaeed Mahameed const unsigned int num_stats_grps = stats_grps_num(priv); 843460c184SSaeed Mahameed int i; 853460c184SSaeed Mahameed 863460c184SSaeed Mahameed for (i = 0; i < num_stats_grps; i++) 87f0ff8e8cSSaeed Mahameed idx = stats_grps[i]->fill_stats(priv, data, idx); 883460c184SSaeed Mahameed } 893460c184SSaeed Mahameed 903460c184SSaeed Mahameed void mlx5e_stats_fill_strings(struct mlx5e_priv *priv, u8 *data) 913460c184SSaeed Mahameed { 92f0ff8e8cSSaeed Mahameed mlx5e_stats_grp_t *stats_grps = priv->profile->stats_grps; 933460c184SSaeed Mahameed const unsigned int num_stats_grps = stats_grps_num(priv); 943460c184SSaeed Mahameed int i, idx = 0; 953460c184SSaeed Mahameed 963460c184SSaeed Mahameed for (i = 0; i < num_stats_grps; i++) 97f0ff8e8cSSaeed Mahameed idx = stats_grps[i]->fill_strings(priv, data, idx); 983460c184SSaeed Mahameed } 993460c184SSaeed Mahameed 1003460c184SSaeed Mahameed /* Concrete NIC Stats */ 1013460c184SSaeed Mahameed 102c0752f2bSKamal Heib static const struct counter_desc sw_stats_desc[] = { 103c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) }, 104c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) }, 105c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) }, 106c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) }, 107c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_packets) }, 108c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_bytes) }, 109c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_packets) }, 110c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_bytes) }, 111f24686e8SGal Pressman { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_added_vlan_packets) }, 1122ad9ecdbSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_nop) }, 113bf239741SIlya Lesokhin 114bf239741SIlya Lesokhin #ifdef CONFIG_MLX5_EN_TLS 115d2ead1f3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_encrypted_packets) }, 116d2ead1f3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_encrypted_bytes) }, 117d2ead1f3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_ctx) }, 118bf239741SIlya Lesokhin { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_ooo) }, 119d2ead1f3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_dump_packets) }, 120d2ead1f3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_dump_bytes) }, 12146a3ea98STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_resync_bytes) }, 12246a3ea98STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_skip_no_sync_data) }, 12346a3ea98STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_drop_no_sync_data) }, 12446a3ea98STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_drop_bypass_req) }, 125bf239741SIlya Lesokhin #endif 126bf239741SIlya Lesokhin 127c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_packets) }, 128c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_bytes) }, 129f007c13dSNatali Shechtman { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_ecn_mark) }, 130f24686e8SGal Pressman { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_removed_vlan_packets) }, 131c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary) }, 132c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_none) }, 133c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete) }, 1340aa1d186SSaeed Mahameed { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete_tail) }, 1350aa1d186SSaeed Mahameed { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete_tail_slow) }, 136c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary_inner) }, 137c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_drop) }, 13886690b4bSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_redirect) }, 139890388adSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_xmit) }, 14073cab880SShay Agroskin { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_mpwqe) }, 141c2273219SShay Agroskin { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_inlnw) }, 1426c085a8aSShay Agroskin { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_nops) }, 143c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_full) }, 144890388adSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_err) }, 145890388adSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_cqe) }, 146c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_none) }, 147c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial) }, 148c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial_inner) }, 149c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_stopped) }, 150c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_dropped) }, 151c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xmit_more) }, 152db75373cSEran Ben Elisha { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_recover) }, 15386155656STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_cqes) }, 154f65a59ffSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_wake) }, 155f65a59ffSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_cqe_err) }, 15658b99ee3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_xmit) }, 15773cab880SShay Agroskin { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_mpwqe) }, 158c2273219SShay Agroskin { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_inlnw) }, 1596c085a8aSShay Agroskin { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_nops) }, 16058b99ee3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_full) }, 16158b99ee3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_err) }, 16258b99ee3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_cqes) }, 163c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_wqe_err) }, 164b71ba6b4STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler_cqes) }, 165b71ba6b4STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler_strides) }, 1660073c8f7SMoshe Shemesh { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_oversize_pkts_sw_drop) }, 167c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_buff_alloc_err) }, 168c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_blks) }, 169c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_pkts) }, 170c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_reuse) }, 171c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_full) }, 172c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_empty) }, 173c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_busy) }, 174c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_waive) }, 175dc983f0eSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_congst_umr) }, 17694563847SEran Ben Elisha { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_arfs_err) }, 177be5323c8SAya Levin { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_recover) }, 17876c1e1acSTariq Toukan #ifdef CONFIG_MLX5_EN_TLS 17976c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_decrypted_packets) }, 18076c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_decrypted_bytes) }, 18176c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_ctx) }, 18276c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_del) }, 18376c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_resync_req_pkt) }, 18476c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_resync_req_start) }, 18576c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_resync_req_end) }, 18676c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_resync_req_skip) }, 18776c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_resync_res_ok) }, 18876c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_resync_res_skip) }, 18976c1e1acSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_err) }, 19076c1e1acSTariq Toukan #endif 191a1bf74dcSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_events) }, 1922d7103c8STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_poll) }, 1932d7103c8STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_arm) }, 1942d7103c8STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_aff_change) }, 195db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_force_irq) }, 19657d689a8SEran Ben Elisha { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_eq_rearm) }, 197db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_packets) }, 198db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_bytes) }, 199db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_csum_complete) }, 200db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_csum_unnecessary) }, 201db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_csum_unnecessary_inner) }, 202db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_csum_none) }, 203db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_ecn_mark) }, 204db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_removed_vlan_packets) }, 205db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_xdp_drop) }, 206db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_xdp_redirect) }, 207db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_wqe_err) }, 208db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_mpwqe_filler_cqes) }, 209db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_mpwqe_filler_strides) }, 210db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_oversize_pkts_sw_drop) }, 211db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_buff_alloc_err) }, 212db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_cqe_compress_blks) }, 213db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_cqe_compress_pkts) }, 214db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_congst_umr) }, 215db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xsk_arfs_err) }, 216db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xsk_xmit) }, 217db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xsk_mpwqe) }, 218db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xsk_inlnw) }, 219db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xsk_full) }, 220db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xsk_err) }, 221db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xsk_cqes) }, 222c0752f2bSKamal Heib }; 223c0752f2bSKamal Heib 224c0752f2bSKamal Heib #define NUM_SW_COUNTERS ARRAY_SIZE(sw_stats_desc) 225c0752f2bSKamal Heib 22696b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(sw) 227c0752f2bSKamal Heib { 228c0752f2bSKamal Heib return NUM_SW_COUNTERS; 229c0752f2bSKamal Heib } 230c0752f2bSKamal Heib 23196b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(sw) 232c0752f2bSKamal Heib { 233c0752f2bSKamal Heib int i; 234c0752f2bSKamal Heib 235c0752f2bSKamal Heib for (i = 0; i < NUM_SW_COUNTERS; i++) 236c0752f2bSKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format); 237c0752f2bSKamal Heib return idx; 238c0752f2bSKamal Heib } 239c0752f2bSKamal Heib 24096b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(sw) 241c0752f2bSKamal Heib { 242c0752f2bSKamal Heib int i; 243c0752f2bSKamal Heib 244c0752f2bSKamal Heib for (i = 0; i < NUM_SW_COUNTERS; i++) 245c0752f2bSKamal Heib data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw, sw_stats_desc, i); 246c0752f2bSKamal Heib return idx; 247c0752f2bSKamal Heib } 248c0752f2bSKamal Heib 24996b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(sw) 25019386177SKamal Heib { 2519659e49aSSaeed Mahameed struct mlx5e_sw_stats *s = &priv->stats.sw; 25205909babSEran Ben Elisha int i; 25319386177SKamal Heib 25419386177SKamal Heib memset(s, 0, sizeof(*s)); 25519386177SKamal Heib 256694826e3STariq Toukan for (i = 0; i < priv->max_nch; i++) { 25705909babSEran Ben Elisha struct mlx5e_channel_stats *channel_stats = 25805909babSEran Ben Elisha &priv->channel_stats[i]; 25958b99ee3STariq Toukan struct mlx5e_xdpsq_stats *xdpsq_red_stats = &channel_stats->xdpsq; 260890388adSTariq Toukan struct mlx5e_xdpsq_stats *xdpsq_stats = &channel_stats->rq_xdpsq; 261db05815bSMaxim Mikityanskiy struct mlx5e_xdpsq_stats *xsksq_stats = &channel_stats->xsksq; 262db05815bSMaxim Mikityanskiy struct mlx5e_rq_stats *xskrq_stats = &channel_stats->xskrq; 26305909babSEran Ben Elisha struct mlx5e_rq_stats *rq_stats = &channel_stats->rq; 26405909babSEran Ben Elisha struct mlx5e_ch_stats *ch_stats = &channel_stats->ch; 26505909babSEran Ben Elisha int j; 26619386177SKamal Heib 26719386177SKamal Heib s->rx_packets += rq_stats->packets; 26819386177SKamal Heib s->rx_bytes += rq_stats->bytes; 26919386177SKamal Heib s->rx_lro_packets += rq_stats->lro_packets; 27019386177SKamal Heib s->rx_lro_bytes += rq_stats->lro_bytes; 271f007c13dSNatali Shechtman s->rx_ecn_mark += rq_stats->ecn_mark; 27219386177SKamal Heib s->rx_removed_vlan_packets += rq_stats->removed_vlan_packets; 27319386177SKamal Heib s->rx_csum_none += rq_stats->csum_none; 27419386177SKamal Heib s->rx_csum_complete += rq_stats->csum_complete; 2750aa1d186SSaeed Mahameed s->rx_csum_complete_tail += rq_stats->csum_complete_tail; 2760aa1d186SSaeed Mahameed s->rx_csum_complete_tail_slow += rq_stats->csum_complete_tail_slow; 27719386177SKamal Heib s->rx_csum_unnecessary += rq_stats->csum_unnecessary; 27819386177SKamal Heib s->rx_csum_unnecessary_inner += rq_stats->csum_unnecessary_inner; 27919386177SKamal Heib s->rx_xdp_drop += rq_stats->xdp_drop; 28086690b4bSTariq Toukan s->rx_xdp_redirect += rq_stats->xdp_redirect; 281890388adSTariq Toukan s->rx_xdp_tx_xmit += xdpsq_stats->xmit; 28273cab880SShay Agroskin s->rx_xdp_tx_mpwqe += xdpsq_stats->mpwqe; 283c2273219SShay Agroskin s->rx_xdp_tx_inlnw += xdpsq_stats->inlnw; 2846c085a8aSShay Agroskin s->rx_xdp_tx_nops += xdpsq_stats->nops; 285890388adSTariq Toukan s->rx_xdp_tx_full += xdpsq_stats->full; 286890388adSTariq Toukan s->rx_xdp_tx_err += xdpsq_stats->err; 287890388adSTariq Toukan s->rx_xdp_tx_cqe += xdpsq_stats->cqes; 28819386177SKamal Heib s->rx_wqe_err += rq_stats->wqe_err; 289b71ba6b4STariq Toukan s->rx_mpwqe_filler_cqes += rq_stats->mpwqe_filler_cqes; 290b71ba6b4STariq Toukan s->rx_mpwqe_filler_strides += rq_stats->mpwqe_filler_strides; 2910073c8f7SMoshe Shemesh s->rx_oversize_pkts_sw_drop += rq_stats->oversize_pkts_sw_drop; 29219386177SKamal Heib s->rx_buff_alloc_err += rq_stats->buff_alloc_err; 29319386177SKamal Heib s->rx_cqe_compress_blks += rq_stats->cqe_compress_blks; 29419386177SKamal Heib s->rx_cqe_compress_pkts += rq_stats->cqe_compress_pkts; 29519386177SKamal Heib s->rx_cache_reuse += rq_stats->cache_reuse; 29619386177SKamal Heib s->rx_cache_full += rq_stats->cache_full; 29719386177SKamal Heib s->rx_cache_empty += rq_stats->cache_empty; 29819386177SKamal Heib s->rx_cache_busy += rq_stats->cache_busy; 29919386177SKamal Heib s->rx_cache_waive += rq_stats->cache_waive; 300dc983f0eSTariq Toukan s->rx_congst_umr += rq_stats->congst_umr; 30194563847SEran Ben Elisha s->rx_arfs_err += rq_stats->arfs_err; 302be5323c8SAya Levin s->rx_recover += rq_stats->recover; 30376c1e1acSTariq Toukan #ifdef CONFIG_MLX5_EN_TLS 30476c1e1acSTariq Toukan s->rx_tls_decrypted_packets += rq_stats->tls_decrypted_packets; 30576c1e1acSTariq Toukan s->rx_tls_decrypted_bytes += rq_stats->tls_decrypted_bytes; 30676c1e1acSTariq Toukan s->rx_tls_ctx += rq_stats->tls_ctx; 30776c1e1acSTariq Toukan s->rx_tls_del += rq_stats->tls_del; 30876c1e1acSTariq Toukan s->rx_tls_resync_req_pkt += rq_stats->tls_resync_req_pkt; 30976c1e1acSTariq Toukan s->rx_tls_resync_req_start += rq_stats->tls_resync_req_start; 31076c1e1acSTariq Toukan s->rx_tls_resync_req_end += rq_stats->tls_resync_req_end; 31176c1e1acSTariq Toukan s->rx_tls_resync_req_skip += rq_stats->tls_resync_req_skip; 31276c1e1acSTariq Toukan s->rx_tls_resync_res_ok += rq_stats->tls_resync_res_ok; 31376c1e1acSTariq Toukan s->rx_tls_resync_res_skip += rq_stats->tls_resync_res_skip; 31476c1e1acSTariq Toukan s->rx_tls_err += rq_stats->tls_err; 31576c1e1acSTariq Toukan #endif 316a1bf74dcSTariq Toukan s->ch_events += ch_stats->events; 3172d7103c8STariq Toukan s->ch_poll += ch_stats->poll; 3182d7103c8STariq Toukan s->ch_arm += ch_stats->arm; 3192d7103c8STariq Toukan s->ch_aff_change += ch_stats->aff_change; 320db05815bSMaxim Mikityanskiy s->ch_force_irq += ch_stats->force_irq; 32119386177SKamal Heib s->ch_eq_rearm += ch_stats->eq_rearm; 32258b99ee3STariq Toukan /* xdp redirect */ 32358b99ee3STariq Toukan s->tx_xdp_xmit += xdpsq_red_stats->xmit; 32473cab880SShay Agroskin s->tx_xdp_mpwqe += xdpsq_red_stats->mpwqe; 325c2273219SShay Agroskin s->tx_xdp_inlnw += xdpsq_red_stats->inlnw; 3266c085a8aSShay Agroskin s->tx_xdp_nops += xdpsq_red_stats->nops; 32758b99ee3STariq Toukan s->tx_xdp_full += xdpsq_red_stats->full; 32858b99ee3STariq Toukan s->tx_xdp_err += xdpsq_red_stats->err; 32958b99ee3STariq Toukan s->tx_xdp_cqes += xdpsq_red_stats->cqes; 330db05815bSMaxim Mikityanskiy /* AF_XDP zero-copy */ 331db05815bSMaxim Mikityanskiy s->rx_xsk_packets += xskrq_stats->packets; 332db05815bSMaxim Mikityanskiy s->rx_xsk_bytes += xskrq_stats->bytes; 333db05815bSMaxim Mikityanskiy s->rx_xsk_csum_complete += xskrq_stats->csum_complete; 334db05815bSMaxim Mikityanskiy s->rx_xsk_csum_unnecessary += xskrq_stats->csum_unnecessary; 335db05815bSMaxim Mikityanskiy s->rx_xsk_csum_unnecessary_inner += xskrq_stats->csum_unnecessary_inner; 336db05815bSMaxim Mikityanskiy s->rx_xsk_csum_none += xskrq_stats->csum_none; 337db05815bSMaxim Mikityanskiy s->rx_xsk_ecn_mark += xskrq_stats->ecn_mark; 338db05815bSMaxim Mikityanskiy s->rx_xsk_removed_vlan_packets += xskrq_stats->removed_vlan_packets; 339db05815bSMaxim Mikityanskiy s->rx_xsk_xdp_drop += xskrq_stats->xdp_drop; 340db05815bSMaxim Mikityanskiy s->rx_xsk_xdp_redirect += xskrq_stats->xdp_redirect; 341db05815bSMaxim Mikityanskiy s->rx_xsk_wqe_err += xskrq_stats->wqe_err; 342db05815bSMaxim Mikityanskiy s->rx_xsk_mpwqe_filler_cqes += xskrq_stats->mpwqe_filler_cqes; 343db05815bSMaxim Mikityanskiy s->rx_xsk_mpwqe_filler_strides += xskrq_stats->mpwqe_filler_strides; 344db05815bSMaxim Mikityanskiy s->rx_xsk_oversize_pkts_sw_drop += xskrq_stats->oversize_pkts_sw_drop; 345db05815bSMaxim Mikityanskiy s->rx_xsk_buff_alloc_err += xskrq_stats->buff_alloc_err; 346db05815bSMaxim Mikityanskiy s->rx_xsk_cqe_compress_blks += xskrq_stats->cqe_compress_blks; 347db05815bSMaxim Mikityanskiy s->rx_xsk_cqe_compress_pkts += xskrq_stats->cqe_compress_pkts; 348db05815bSMaxim Mikityanskiy s->rx_xsk_congst_umr += xskrq_stats->congst_umr; 349db05815bSMaxim Mikityanskiy s->rx_xsk_arfs_err += xskrq_stats->arfs_err; 350db05815bSMaxim Mikityanskiy s->tx_xsk_xmit += xsksq_stats->xmit; 351db05815bSMaxim Mikityanskiy s->tx_xsk_mpwqe += xsksq_stats->mpwqe; 352db05815bSMaxim Mikityanskiy s->tx_xsk_inlnw += xsksq_stats->inlnw; 353db05815bSMaxim Mikityanskiy s->tx_xsk_full += xsksq_stats->full; 354db05815bSMaxim Mikityanskiy s->tx_xsk_err += xsksq_stats->err; 355db05815bSMaxim Mikityanskiy s->tx_xsk_cqes += xsksq_stats->cqes; 35619386177SKamal Heib 35705909babSEran Ben Elisha for (j = 0; j < priv->max_opened_tc; j++) { 35805909babSEran Ben Elisha struct mlx5e_sq_stats *sq_stats = &channel_stats->sq[j]; 35919386177SKamal Heib 36019386177SKamal Heib s->tx_packets += sq_stats->packets; 36119386177SKamal Heib s->tx_bytes += sq_stats->bytes; 36219386177SKamal Heib s->tx_tso_packets += sq_stats->tso_packets; 36319386177SKamal Heib s->tx_tso_bytes += sq_stats->tso_bytes; 36419386177SKamal Heib s->tx_tso_inner_packets += sq_stats->tso_inner_packets; 36519386177SKamal Heib s->tx_tso_inner_bytes += sq_stats->tso_inner_bytes; 36619386177SKamal Heib s->tx_added_vlan_packets += sq_stats->added_vlan_packets; 3672ad9ecdbSTariq Toukan s->tx_nop += sq_stats->nop; 36819386177SKamal Heib s->tx_queue_stopped += sq_stats->stopped; 36919386177SKamal Heib s->tx_queue_wake += sq_stats->wake; 37019386177SKamal Heib s->tx_queue_dropped += sq_stats->dropped; 37116cc14d8SEran Ben Elisha s->tx_cqe_err += sq_stats->cqe_err; 372db75373cSEran Ben Elisha s->tx_recover += sq_stats->recover; 37319386177SKamal Heib s->tx_xmit_more += sq_stats->xmit_more; 37419386177SKamal Heib s->tx_csum_partial_inner += sq_stats->csum_partial_inner; 37519386177SKamal Heib s->tx_csum_none += sq_stats->csum_none; 37619386177SKamal Heib s->tx_csum_partial += sq_stats->csum_partial; 377bf239741SIlya Lesokhin #ifdef CONFIG_MLX5_EN_TLS 378d2ead1f3STariq Toukan s->tx_tls_encrypted_packets += sq_stats->tls_encrypted_packets; 379d2ead1f3STariq Toukan s->tx_tls_encrypted_bytes += sq_stats->tls_encrypted_bytes; 380d2ead1f3STariq Toukan s->tx_tls_ctx += sq_stats->tls_ctx; 381bf239741SIlya Lesokhin s->tx_tls_ooo += sq_stats->tls_ooo; 382d2ead1f3STariq Toukan s->tx_tls_dump_bytes += sq_stats->tls_dump_bytes; 383d2ead1f3STariq Toukan s->tx_tls_dump_packets += sq_stats->tls_dump_packets; 38446a3ea98STariq Toukan s->tx_tls_resync_bytes += sq_stats->tls_resync_bytes; 38546a3ea98STariq Toukan s->tx_tls_skip_no_sync_data += sq_stats->tls_skip_no_sync_data; 38646a3ea98STariq Toukan s->tx_tls_drop_no_sync_data += sq_stats->tls_drop_no_sync_data; 38746a3ea98STariq Toukan s->tx_tls_drop_bypass_req += sq_stats->tls_drop_bypass_req; 388bf239741SIlya Lesokhin #endif 38986155656STariq Toukan s->tx_cqes += sq_stats->cqes; 39042ae1a5cSArnd Bergmann 39142ae1a5cSArnd Bergmann /* https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92657 */ 39242ae1a5cSArnd Bergmann barrier(); 39319386177SKamal Heib } 39419386177SKamal Heib } 39519386177SKamal Heib } 39619386177SKamal Heib 397fd8dcdb8SKamal Heib static const struct counter_desc q_stats_desc[] = { 398fd8dcdb8SKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_out_of_buffer) }, 399fd8dcdb8SKamal Heib }; 400fd8dcdb8SKamal Heib 4017cbaf9a3SMoshe Shemesh static const struct counter_desc drop_rq_stats_desc[] = { 4027cbaf9a3SMoshe Shemesh { MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_if_down_packets) }, 4037cbaf9a3SMoshe Shemesh }; 4047cbaf9a3SMoshe Shemesh 405fd8dcdb8SKamal Heib #define NUM_Q_COUNTERS ARRAY_SIZE(q_stats_desc) 4067cbaf9a3SMoshe Shemesh #define NUM_DROP_RQ_COUNTERS ARRAY_SIZE(drop_rq_stats_desc) 407fd8dcdb8SKamal Heib 40896b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(qcnt) 409fd8dcdb8SKamal Heib { 4107cbaf9a3SMoshe Shemesh int num_stats = 0; 4117cbaf9a3SMoshe Shemesh 4127cbaf9a3SMoshe Shemesh if (priv->q_counter) 4137cbaf9a3SMoshe Shemesh num_stats += NUM_Q_COUNTERS; 4147cbaf9a3SMoshe Shemesh 4157cbaf9a3SMoshe Shemesh if (priv->drop_rq_q_counter) 4167cbaf9a3SMoshe Shemesh num_stats += NUM_DROP_RQ_COUNTERS; 4177cbaf9a3SMoshe Shemesh 4187cbaf9a3SMoshe Shemesh return num_stats; 419fd8dcdb8SKamal Heib } 420fd8dcdb8SKamal Heib 42196b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(qcnt) 422fd8dcdb8SKamal Heib { 423fd8dcdb8SKamal Heib int i; 424fd8dcdb8SKamal Heib 425fd8dcdb8SKamal Heib for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++) 4267cbaf9a3SMoshe Shemesh strcpy(data + (idx++) * ETH_GSTRING_LEN, 4277cbaf9a3SMoshe Shemesh q_stats_desc[i].format); 4287cbaf9a3SMoshe Shemesh 4297cbaf9a3SMoshe Shemesh for (i = 0; i < NUM_DROP_RQ_COUNTERS && priv->drop_rq_q_counter; i++) 4307cbaf9a3SMoshe Shemesh strcpy(data + (idx++) * ETH_GSTRING_LEN, 4317cbaf9a3SMoshe Shemesh drop_rq_stats_desc[i].format); 4327cbaf9a3SMoshe Shemesh 433fd8dcdb8SKamal Heib return idx; 434fd8dcdb8SKamal Heib } 435fd8dcdb8SKamal Heib 43696b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(qcnt) 437fd8dcdb8SKamal Heib { 438fd8dcdb8SKamal Heib int i; 439fd8dcdb8SKamal Heib 440fd8dcdb8SKamal Heib for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++) 4417cbaf9a3SMoshe Shemesh data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt, 4427cbaf9a3SMoshe Shemesh q_stats_desc, i); 4437cbaf9a3SMoshe Shemesh for (i = 0; i < NUM_DROP_RQ_COUNTERS && priv->drop_rq_q_counter; i++) 4447cbaf9a3SMoshe Shemesh data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt, 4457cbaf9a3SMoshe Shemesh drop_rq_stats_desc, i); 446fd8dcdb8SKamal Heib return idx; 447fd8dcdb8SKamal Heib } 448fd8dcdb8SKamal Heib 44996b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(qcnt) 45019386177SKamal Heib { 45119386177SKamal Heib struct mlx5e_qcounter_stats *qcnt = &priv->stats.qcnt; 45266247fbbSLeon Romanovsky u32 out[MLX5_ST_SZ_DW(query_q_counter_out)] = {}; 45366247fbbSLeon Romanovsky u32 in[MLX5_ST_SZ_DW(query_q_counter_in)] = {}; 45466247fbbSLeon Romanovsky int ret; 45519386177SKamal Heib 45666247fbbSLeon Romanovsky MLX5_SET(query_q_counter_in, in, opcode, MLX5_CMD_OP_QUERY_Q_COUNTER); 45766247fbbSLeon Romanovsky 45866247fbbSLeon Romanovsky if (priv->q_counter) { 45966247fbbSLeon Romanovsky MLX5_SET(query_q_counter_in, in, counter_set_id, 46066247fbbSLeon Romanovsky priv->q_counter); 46166247fbbSLeon Romanovsky ret = mlx5_cmd_exec_inout(priv->mdev, query_q_counter, in, out); 46266247fbbSLeon Romanovsky if (!ret) 4637cbaf9a3SMoshe Shemesh qcnt->rx_out_of_buffer = MLX5_GET(query_q_counter_out, 4647cbaf9a3SMoshe Shemesh out, out_of_buffer); 46566247fbbSLeon Romanovsky } 46666247fbbSLeon Romanovsky 46766247fbbSLeon Romanovsky if (priv->drop_rq_q_counter) { 46866247fbbSLeon Romanovsky MLX5_SET(query_q_counter_in, in, counter_set_id, 46966247fbbSLeon Romanovsky priv->drop_rq_q_counter); 47066247fbbSLeon Romanovsky ret = mlx5_cmd_exec_inout(priv->mdev, query_q_counter, in, out); 47166247fbbSLeon Romanovsky if (!ret) 47266247fbbSLeon Romanovsky qcnt->rx_if_down_packets = MLX5_GET(query_q_counter_out, 47366247fbbSLeon Romanovsky out, out_of_buffer); 47466247fbbSLeon Romanovsky } 47519386177SKamal Heib } 47619386177SKamal Heib 4775c298143SMoshe Shemesh #define VNIC_ENV_OFF(c) MLX5_BYTE_OFF(query_vnic_env_out, c) 4780cfafd4bSMoshe Shemesh static const struct counter_desc vnic_env_stats_steer_desc[] = { 4795c298143SMoshe Shemesh { "rx_steer_missed_packets", 4805c298143SMoshe Shemesh VNIC_ENV_OFF(vport_env.nic_receive_steering_discard) }, 4815c298143SMoshe Shemesh }; 4825c298143SMoshe Shemesh 4830cfafd4bSMoshe Shemesh static const struct counter_desc vnic_env_stats_dev_oob_desc[] = { 4840cfafd4bSMoshe Shemesh { "dev_internal_queue_oob", 4850cfafd4bSMoshe Shemesh VNIC_ENV_OFF(vport_env.internal_rq_out_of_buffer) }, 4860cfafd4bSMoshe Shemesh }; 4870cfafd4bSMoshe Shemesh 4880cfafd4bSMoshe Shemesh #define NUM_VNIC_ENV_STEER_COUNTERS(dev) \ 4890cfafd4bSMoshe Shemesh (MLX5_CAP_GEN(dev, nic_receive_steering_discard) ? \ 4900cfafd4bSMoshe Shemesh ARRAY_SIZE(vnic_env_stats_steer_desc) : 0) 4910cfafd4bSMoshe Shemesh #define NUM_VNIC_ENV_DEV_OOB_COUNTERS(dev) \ 4920cfafd4bSMoshe Shemesh (MLX5_CAP_GEN(dev, vnic_env_int_rq_oob) ? \ 4930cfafd4bSMoshe Shemesh ARRAY_SIZE(vnic_env_stats_dev_oob_desc) : 0) 4945c298143SMoshe Shemesh 49596b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(vnic_env) 4965c298143SMoshe Shemesh { 4970cfafd4bSMoshe Shemesh return NUM_VNIC_ENV_STEER_COUNTERS(priv->mdev) + 4980cfafd4bSMoshe Shemesh NUM_VNIC_ENV_DEV_OOB_COUNTERS(priv->mdev); 4995c298143SMoshe Shemesh } 5005c298143SMoshe Shemesh 50196b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(vnic_env) 5025c298143SMoshe Shemesh { 5035c298143SMoshe Shemesh int i; 5045c298143SMoshe Shemesh 5050cfafd4bSMoshe Shemesh for (i = 0; i < NUM_VNIC_ENV_STEER_COUNTERS(priv->mdev); i++) 5065c298143SMoshe Shemesh strcpy(data + (idx++) * ETH_GSTRING_LEN, 5070cfafd4bSMoshe Shemesh vnic_env_stats_steer_desc[i].format); 5080cfafd4bSMoshe Shemesh 5090cfafd4bSMoshe Shemesh for (i = 0; i < NUM_VNIC_ENV_DEV_OOB_COUNTERS(priv->mdev); i++) 5100cfafd4bSMoshe Shemesh strcpy(data + (idx++) * ETH_GSTRING_LEN, 5110cfafd4bSMoshe Shemesh vnic_env_stats_dev_oob_desc[i].format); 5125c298143SMoshe Shemesh return idx; 5135c298143SMoshe Shemesh } 5145c298143SMoshe Shemesh 51596b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(vnic_env) 5165c298143SMoshe Shemesh { 5175c298143SMoshe Shemesh int i; 5185c298143SMoshe Shemesh 5190cfafd4bSMoshe Shemesh for (i = 0; i < NUM_VNIC_ENV_STEER_COUNTERS(priv->mdev); i++) 5205c298143SMoshe Shemesh data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vnic.query_vnic_env_out, 5210cfafd4bSMoshe Shemesh vnic_env_stats_steer_desc, i); 5220cfafd4bSMoshe Shemesh 5230cfafd4bSMoshe Shemesh for (i = 0; i < NUM_VNIC_ENV_DEV_OOB_COUNTERS(priv->mdev); i++) 5240cfafd4bSMoshe Shemesh data[idx++] = MLX5E_READ_CTR32_BE(priv->stats.vnic.query_vnic_env_out, 5250cfafd4bSMoshe Shemesh vnic_env_stats_dev_oob_desc, i); 5265c298143SMoshe Shemesh return idx; 5275c298143SMoshe Shemesh } 5285c298143SMoshe Shemesh 52996b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(vnic_env) 5305c298143SMoshe Shemesh { 5315c298143SMoshe Shemesh u32 *out = (u32 *)priv->stats.vnic.query_vnic_env_out; 532a184cda1SLeon Romanovsky u32 in[MLX5_ST_SZ_DW(query_vnic_env_in)] = {}; 5335c298143SMoshe Shemesh struct mlx5_core_dev *mdev = priv->mdev; 5345c298143SMoshe Shemesh 5355c298143SMoshe Shemesh if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) 5365c298143SMoshe Shemesh return; 5375c298143SMoshe Shemesh 538a184cda1SLeon Romanovsky MLX5_SET(query_vnic_env_in, in, opcode, MLX5_CMD_OP_QUERY_VNIC_ENV); 539a184cda1SLeon Romanovsky mlx5_cmd_exec_inout(mdev, query_vnic_env, in, out); 5405c298143SMoshe Shemesh } 5415c298143SMoshe Shemesh 54240cab9f1SKamal Heib #define VPORT_COUNTER_OFF(c) MLX5_BYTE_OFF(query_vport_counter_out, c) 54340cab9f1SKamal Heib static const struct counter_desc vport_stats_desc[] = { 54440cab9f1SKamal Heib { "rx_vport_unicast_packets", 54540cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_unicast.packets) }, 54640cab9f1SKamal Heib { "rx_vport_unicast_bytes", 54740cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_unicast.octets) }, 54840cab9f1SKamal Heib { "tx_vport_unicast_packets", 54940cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_unicast.packets) }, 55040cab9f1SKamal Heib { "tx_vport_unicast_bytes", 55140cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_unicast.octets) }, 55240cab9f1SKamal Heib { "rx_vport_multicast_packets", 55340cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_multicast.packets) }, 55440cab9f1SKamal Heib { "rx_vport_multicast_bytes", 55540cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_multicast.octets) }, 55640cab9f1SKamal Heib { "tx_vport_multicast_packets", 55740cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_multicast.packets) }, 55840cab9f1SKamal Heib { "tx_vport_multicast_bytes", 55940cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_multicast.octets) }, 56040cab9f1SKamal Heib { "rx_vport_broadcast_packets", 56140cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_broadcast.packets) }, 56240cab9f1SKamal Heib { "rx_vport_broadcast_bytes", 56340cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_broadcast.octets) }, 56440cab9f1SKamal Heib { "tx_vport_broadcast_packets", 56540cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_broadcast.packets) }, 56640cab9f1SKamal Heib { "tx_vport_broadcast_bytes", 56740cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_broadcast.octets) }, 56840cab9f1SKamal Heib { "rx_vport_rdma_unicast_packets", 56940cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_unicast.packets) }, 57040cab9f1SKamal Heib { "rx_vport_rdma_unicast_bytes", 57140cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_unicast.octets) }, 57240cab9f1SKamal Heib { "tx_vport_rdma_unicast_packets", 57340cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_unicast.packets) }, 57440cab9f1SKamal Heib { "tx_vport_rdma_unicast_bytes", 57540cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_unicast.octets) }, 57640cab9f1SKamal Heib { "rx_vport_rdma_multicast_packets", 57740cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_multicast.packets) }, 57840cab9f1SKamal Heib { "rx_vport_rdma_multicast_bytes", 57940cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_multicast.octets) }, 58040cab9f1SKamal Heib { "tx_vport_rdma_multicast_packets", 58140cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_multicast.packets) }, 58240cab9f1SKamal Heib { "tx_vport_rdma_multicast_bytes", 58340cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_multicast.octets) }, 58440cab9f1SKamal Heib }; 58540cab9f1SKamal Heib 58640cab9f1SKamal Heib #define NUM_VPORT_COUNTERS ARRAY_SIZE(vport_stats_desc) 58740cab9f1SKamal Heib 58896b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(vport) 58940cab9f1SKamal Heib { 59040cab9f1SKamal Heib return NUM_VPORT_COUNTERS; 59140cab9f1SKamal Heib } 59240cab9f1SKamal Heib 59396b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(vport) 59440cab9f1SKamal Heib { 59540cab9f1SKamal Heib int i; 59640cab9f1SKamal Heib 59740cab9f1SKamal Heib for (i = 0; i < NUM_VPORT_COUNTERS; i++) 59840cab9f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, vport_stats_desc[i].format); 59940cab9f1SKamal Heib return idx; 60040cab9f1SKamal Heib } 60140cab9f1SKamal Heib 60296b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(vport) 60340cab9f1SKamal Heib { 60440cab9f1SKamal Heib int i; 60540cab9f1SKamal Heib 60640cab9f1SKamal Heib for (i = 0; i < NUM_VPORT_COUNTERS; i++) 60740cab9f1SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out, 60840cab9f1SKamal Heib vport_stats_desc, i); 60940cab9f1SKamal Heib return idx; 61040cab9f1SKamal Heib } 61140cab9f1SKamal Heib 61296b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(vport) 61319386177SKamal Heib { 61419386177SKamal Heib u32 *out = (u32 *)priv->stats.vport.query_vport_out; 615a184cda1SLeon Romanovsky u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {}; 61619386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 61719386177SKamal Heib 61819386177SKamal Heib MLX5_SET(query_vport_counter_in, in, opcode, MLX5_CMD_OP_QUERY_VPORT_COUNTER); 619a184cda1SLeon Romanovsky mlx5_cmd_exec_inout(mdev, query_vport_counter, in, out); 62019386177SKamal Heib } 62119386177SKamal Heib 6226e6ef814SKamal Heib #define PPORT_802_3_OFF(c) \ 6236e6ef814SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 6246e6ef814SKamal Heib counter_set.eth_802_3_cntrs_grp_data_layout.c##_high) 6256e6ef814SKamal Heib static const struct counter_desc pport_802_3_stats_desc[] = { 6266e6ef814SKamal Heib { "tx_packets_phy", PPORT_802_3_OFF(a_frames_transmitted_ok) }, 6276e6ef814SKamal Heib { "rx_packets_phy", PPORT_802_3_OFF(a_frames_received_ok) }, 6286e6ef814SKamal Heib { "rx_crc_errors_phy", PPORT_802_3_OFF(a_frame_check_sequence_errors) }, 6296e6ef814SKamal Heib { "tx_bytes_phy", PPORT_802_3_OFF(a_octets_transmitted_ok) }, 6306e6ef814SKamal Heib { "rx_bytes_phy", PPORT_802_3_OFF(a_octets_received_ok) }, 6316e6ef814SKamal Heib { "tx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_xmitted_ok) }, 6326e6ef814SKamal Heib { "tx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_xmitted_ok) }, 6336e6ef814SKamal Heib { "rx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_received_ok) }, 6346e6ef814SKamal Heib { "rx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_received_ok) }, 6356e6ef814SKamal Heib { "rx_in_range_len_errors_phy", PPORT_802_3_OFF(a_in_range_length_errors) }, 6366e6ef814SKamal Heib { "rx_out_of_range_len_phy", PPORT_802_3_OFF(a_out_of_range_length_field) }, 6376e6ef814SKamal Heib { "rx_oversize_pkts_phy", PPORT_802_3_OFF(a_frame_too_long_errors) }, 6386e6ef814SKamal Heib { "rx_symbol_err_phy", PPORT_802_3_OFF(a_symbol_error_during_carrier) }, 6396e6ef814SKamal Heib { "tx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_transmitted) }, 6406e6ef814SKamal Heib { "rx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_received) }, 6416e6ef814SKamal Heib { "rx_unsupported_op_phy", PPORT_802_3_OFF(a_unsupported_opcodes_received) }, 6426e6ef814SKamal Heib { "rx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_received) }, 6436e6ef814SKamal Heib { "tx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_transmitted) }, 6446e6ef814SKamal Heib }; 6456e6ef814SKamal Heib 6466e6ef814SKamal Heib #define NUM_PPORT_802_3_COUNTERS ARRAY_SIZE(pport_802_3_stats_desc) 6476e6ef814SKamal Heib 64896b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(802_3) 6496e6ef814SKamal Heib { 6506e6ef814SKamal Heib return NUM_PPORT_802_3_COUNTERS; 6516e6ef814SKamal Heib } 6526e6ef814SKamal Heib 65396b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(802_3) 6546e6ef814SKamal Heib { 6556e6ef814SKamal Heib int i; 6566e6ef814SKamal Heib 6576e6ef814SKamal Heib for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++) 6586e6ef814SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_802_3_stats_desc[i].format); 6596e6ef814SKamal Heib return idx; 6606e6ef814SKamal Heib } 6616e6ef814SKamal Heib 66296b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(802_3) 6636e6ef814SKamal Heib { 6646e6ef814SKamal Heib int i; 6656e6ef814SKamal Heib 6666e6ef814SKamal Heib for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++) 6676e6ef814SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters, 6686e6ef814SKamal Heib pport_802_3_stats_desc, i); 6696e6ef814SKamal Heib return idx; 6706e6ef814SKamal Heib } 6716e6ef814SKamal Heib 67275370eb0SEyal Davidovich #define MLX5_BASIC_PPCNT_SUPPORTED(mdev) \ 67375370eb0SEyal Davidovich (MLX5_CAP_GEN(mdev, pcam_reg) ? MLX5_CAP_PCAM_REG(mdev, ppcnt) : 1) 67475370eb0SEyal Davidovich 6757c453526SVlad Buslov static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(802_3) 67619386177SKamal Heib { 67719386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 67819386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 67919386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 68019386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 68119386177SKamal Heib void *out; 68219386177SKamal Heib 68375370eb0SEyal Davidovich if (!MLX5_BASIC_PPCNT_SUPPORTED(mdev)) 68475370eb0SEyal Davidovich return; 68575370eb0SEyal Davidovich 68619386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 68719386177SKamal Heib out = pstats->IEEE_802_3_counters; 68819386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_IEEE_802_3_COUNTERS_GROUP); 68919386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 69019386177SKamal Heib } 69119386177SKamal Heib 692fc8e64a3SKamal Heib #define PPORT_2863_OFF(c) \ 693fc8e64a3SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 694fc8e64a3SKamal Heib counter_set.eth_2863_cntrs_grp_data_layout.c##_high) 695fc8e64a3SKamal Heib static const struct counter_desc pport_2863_stats_desc[] = { 696fc8e64a3SKamal Heib { "rx_discards_phy", PPORT_2863_OFF(if_in_discards) }, 697fc8e64a3SKamal Heib { "tx_discards_phy", PPORT_2863_OFF(if_out_discards) }, 698fc8e64a3SKamal Heib { "tx_errors_phy", PPORT_2863_OFF(if_out_errors) }, 699fc8e64a3SKamal Heib }; 700fc8e64a3SKamal Heib 701fc8e64a3SKamal Heib #define NUM_PPORT_2863_COUNTERS ARRAY_SIZE(pport_2863_stats_desc) 702fc8e64a3SKamal Heib 70396b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(2863) 704fc8e64a3SKamal Heib { 705fc8e64a3SKamal Heib return NUM_PPORT_2863_COUNTERS; 706fc8e64a3SKamal Heib } 707fc8e64a3SKamal Heib 70896b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(2863) 709fc8e64a3SKamal Heib { 710fc8e64a3SKamal Heib int i; 711fc8e64a3SKamal Heib 712fc8e64a3SKamal Heib for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++) 713fc8e64a3SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2863_stats_desc[i].format); 714fc8e64a3SKamal Heib return idx; 715fc8e64a3SKamal Heib } 716fc8e64a3SKamal Heib 71796b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(2863) 718fc8e64a3SKamal Heib { 719fc8e64a3SKamal Heib int i; 720fc8e64a3SKamal Heib 721fc8e64a3SKamal Heib for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++) 722fc8e64a3SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters, 723fc8e64a3SKamal Heib pport_2863_stats_desc, i); 724fc8e64a3SKamal Heib return idx; 725fc8e64a3SKamal Heib } 726fc8e64a3SKamal Heib 72796b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(2863) 72819386177SKamal Heib { 72919386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 73019386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 73119386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 73219386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 73319386177SKamal Heib void *out; 73419386177SKamal Heib 73519386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 73619386177SKamal Heib out = pstats->RFC_2863_counters; 73719386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2863_COUNTERS_GROUP); 73819386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 73919386177SKamal Heib } 74019386177SKamal Heib 741e0e0def9SKamal Heib #define PPORT_2819_OFF(c) \ 742e0e0def9SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 743e0e0def9SKamal Heib counter_set.eth_2819_cntrs_grp_data_layout.c##_high) 744e0e0def9SKamal Heib static const struct counter_desc pport_2819_stats_desc[] = { 745e0e0def9SKamal Heib { "rx_undersize_pkts_phy", PPORT_2819_OFF(ether_stats_undersize_pkts) }, 746e0e0def9SKamal Heib { "rx_fragments_phy", PPORT_2819_OFF(ether_stats_fragments) }, 747e0e0def9SKamal Heib { "rx_jabbers_phy", PPORT_2819_OFF(ether_stats_jabbers) }, 748e0e0def9SKamal Heib { "rx_64_bytes_phy", PPORT_2819_OFF(ether_stats_pkts64octets) }, 749e0e0def9SKamal Heib { "rx_65_to_127_bytes_phy", PPORT_2819_OFF(ether_stats_pkts65to127octets) }, 750e0e0def9SKamal Heib { "rx_128_to_255_bytes_phy", PPORT_2819_OFF(ether_stats_pkts128to255octets) }, 751e0e0def9SKamal Heib { "rx_256_to_511_bytes_phy", PPORT_2819_OFF(ether_stats_pkts256to511octets) }, 752e0e0def9SKamal Heib { "rx_512_to_1023_bytes_phy", PPORT_2819_OFF(ether_stats_pkts512to1023octets) }, 753e0e0def9SKamal Heib { "rx_1024_to_1518_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1024to1518octets) }, 754e0e0def9SKamal Heib { "rx_1519_to_2047_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1519to2047octets) }, 755e0e0def9SKamal Heib { "rx_2048_to_4095_bytes_phy", PPORT_2819_OFF(ether_stats_pkts2048to4095octets) }, 756e0e0def9SKamal Heib { "rx_4096_to_8191_bytes_phy", PPORT_2819_OFF(ether_stats_pkts4096to8191octets) }, 757e0e0def9SKamal Heib { "rx_8192_to_10239_bytes_phy", PPORT_2819_OFF(ether_stats_pkts8192to10239octets) }, 758e0e0def9SKamal Heib }; 759e0e0def9SKamal Heib 760e0e0def9SKamal Heib #define NUM_PPORT_2819_COUNTERS ARRAY_SIZE(pport_2819_stats_desc) 761e0e0def9SKamal Heib 76296b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(2819) 763e0e0def9SKamal Heib { 764e0e0def9SKamal Heib return NUM_PPORT_2819_COUNTERS; 765e0e0def9SKamal Heib } 766e0e0def9SKamal Heib 76796b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(2819) 768e0e0def9SKamal Heib { 769e0e0def9SKamal Heib int i; 770e0e0def9SKamal Heib 771e0e0def9SKamal Heib for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++) 772e0e0def9SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2819_stats_desc[i].format); 773e0e0def9SKamal Heib return idx; 774e0e0def9SKamal Heib } 775e0e0def9SKamal Heib 77696b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(2819) 777e0e0def9SKamal Heib { 778e0e0def9SKamal Heib int i; 779e0e0def9SKamal Heib 780e0e0def9SKamal Heib for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++) 781e0e0def9SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters, 782e0e0def9SKamal Heib pport_2819_stats_desc, i); 783e0e0def9SKamal Heib return idx; 784e0e0def9SKamal Heib } 785e0e0def9SKamal Heib 78696b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(2819) 78719386177SKamal Heib { 78819386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 78919386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 79019386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 79119386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 79219386177SKamal Heib void *out; 79319386177SKamal Heib 79475370eb0SEyal Davidovich if (!MLX5_BASIC_PPCNT_SUPPORTED(mdev)) 79575370eb0SEyal Davidovich return; 79675370eb0SEyal Davidovich 79719386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 79819386177SKamal Heib out = pstats->RFC_2819_counters; 79919386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2819_COUNTERS_GROUP); 80019386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 80119386177SKamal Heib } 80219386177SKamal Heib 8032e4df0b2SKamal Heib #define PPORT_PHY_STATISTICAL_OFF(c) \ 8042e4df0b2SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 8052e4df0b2SKamal Heib counter_set.phys_layer_statistical_cntrs.c##_high) 8062e4df0b2SKamal Heib static const struct counter_desc pport_phy_statistical_stats_desc[] = { 8072e4df0b2SKamal Heib { "rx_pcs_symbol_err_phy", PPORT_PHY_STATISTICAL_OFF(phy_symbol_errors) }, 8082e4df0b2SKamal Heib { "rx_corrected_bits_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits) }, 8092e4df0b2SKamal Heib }; 8102e4df0b2SKamal Heib 8114cb4e98eSShay Agroskin static const struct counter_desc 8124cb4e98eSShay Agroskin pport_phy_statistical_err_lanes_stats_desc[] = { 8134cb4e98eSShay Agroskin { "rx_err_lane_0_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits_lane0) }, 8144cb4e98eSShay Agroskin { "rx_err_lane_1_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits_lane1) }, 8154cb4e98eSShay Agroskin { "rx_err_lane_2_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits_lane2) }, 8164cb4e98eSShay Agroskin { "rx_err_lane_3_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits_lane3) }, 8174cb4e98eSShay Agroskin }; 8184cb4e98eSShay Agroskin 8194cb4e98eSShay Agroskin #define NUM_PPORT_PHY_STATISTICAL_COUNTERS \ 8204cb4e98eSShay Agroskin ARRAY_SIZE(pport_phy_statistical_stats_desc) 8214cb4e98eSShay Agroskin #define NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS \ 8224cb4e98eSShay Agroskin ARRAY_SIZE(pport_phy_statistical_err_lanes_stats_desc) 8232e4df0b2SKamal Heib 82496b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(phy) 8252e4df0b2SKamal Heib { 8264cb4e98eSShay Agroskin struct mlx5_core_dev *mdev = priv->mdev; 8274cb4e98eSShay Agroskin int num_stats; 8284cb4e98eSShay Agroskin 8296ab75516SSaeed Mahameed /* "1" for link_down_events special counter */ 8304cb4e98eSShay Agroskin num_stats = 1; 8314cb4e98eSShay Agroskin 8324cb4e98eSShay Agroskin num_stats += MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group) ? 8334cb4e98eSShay Agroskin NUM_PPORT_PHY_STATISTICAL_COUNTERS : 0; 8344cb4e98eSShay Agroskin 8354cb4e98eSShay Agroskin num_stats += MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters) ? 8364cb4e98eSShay Agroskin NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS : 0; 8374cb4e98eSShay Agroskin 8384cb4e98eSShay Agroskin return num_stats; 8392e4df0b2SKamal Heib } 8402e4df0b2SKamal Heib 84196b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(phy) 8422e4df0b2SKamal Heib { 8434cb4e98eSShay Agroskin struct mlx5_core_dev *mdev = priv->mdev; 8442e4df0b2SKamal Heib int i; 8452e4df0b2SKamal Heib 8466ab75516SSaeed Mahameed strcpy(data + (idx++) * ETH_GSTRING_LEN, "link_down_events_phy"); 8476ab75516SSaeed Mahameed 8484cb4e98eSShay Agroskin if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) 8496ab75516SSaeed Mahameed return idx; 8506ab75516SSaeed Mahameed 8516ab75516SSaeed Mahameed for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++) 8522e4df0b2SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 8532e4df0b2SKamal Heib pport_phy_statistical_stats_desc[i].format); 8544cb4e98eSShay Agroskin 8554cb4e98eSShay Agroskin if (MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters)) 8564cb4e98eSShay Agroskin for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS; i++) 8574cb4e98eSShay Agroskin strcpy(data + (idx++) * ETH_GSTRING_LEN, 8584cb4e98eSShay Agroskin pport_phy_statistical_err_lanes_stats_desc[i].format); 8594cb4e98eSShay Agroskin 8602e4df0b2SKamal Heib return idx; 8612e4df0b2SKamal Heib } 8622e4df0b2SKamal Heib 86396b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(phy) 8642e4df0b2SKamal Heib { 8654cb4e98eSShay Agroskin struct mlx5_core_dev *mdev = priv->mdev; 8662e4df0b2SKamal Heib int i; 8672e4df0b2SKamal Heib 8686ab75516SSaeed Mahameed /* link_down_events_phy has special handling since it is not stored in __be64 format */ 8696ab75516SSaeed Mahameed data[idx++] = MLX5_GET(ppcnt_reg, priv->stats.pport.phy_counters, 8706ab75516SSaeed Mahameed counter_set.phys_layer_cntrs.link_down_events); 8716ab75516SSaeed Mahameed 8724cb4e98eSShay Agroskin if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) 8736ab75516SSaeed Mahameed return idx; 8746ab75516SSaeed Mahameed 8756ab75516SSaeed Mahameed for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++) 8762e4df0b2SKamal Heib data[idx++] = 8772e4df0b2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.phy_statistical_counters, 8782e4df0b2SKamal Heib pport_phy_statistical_stats_desc, i); 8794cb4e98eSShay Agroskin 8804cb4e98eSShay Agroskin if (MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters)) 8814cb4e98eSShay Agroskin for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS; i++) 8824cb4e98eSShay Agroskin data[idx++] = 8834cb4e98eSShay Agroskin MLX5E_READ_CTR64_BE(&priv->stats.pport.phy_statistical_counters, 8844cb4e98eSShay Agroskin pport_phy_statistical_err_lanes_stats_desc, 8854cb4e98eSShay Agroskin i); 8862e4df0b2SKamal Heib return idx; 8872e4df0b2SKamal Heib } 8882e4df0b2SKamal Heib 88996b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(phy) 89019386177SKamal Heib { 89119386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 89219386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 89319386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 89419386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 89519386177SKamal Heib void *out; 89619386177SKamal Heib 89719386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 89819386177SKamal Heib out = pstats->phy_counters; 89919386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_COUNTERS_GROUP); 90019386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 90119386177SKamal Heib 90219386177SKamal Heib if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) 90319386177SKamal Heib return; 90419386177SKamal Heib 90519386177SKamal Heib out = pstats->phy_statistical_counters; 90619386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_STATISTICAL_GROUP); 90719386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 90819386177SKamal Heib } 90919386177SKamal Heib 9103488bd4cSKamal Heib #define PPORT_ETH_EXT_OFF(c) \ 9113488bd4cSKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 9123488bd4cSKamal Heib counter_set.eth_extended_cntrs_grp_data_layout.c##_high) 9133488bd4cSKamal Heib static const struct counter_desc pport_eth_ext_stats_desc[] = { 9143488bd4cSKamal Heib { "rx_buffer_passed_thres_phy", PPORT_ETH_EXT_OFF(rx_buffer_almost_full) }, 9153488bd4cSKamal Heib }; 9163488bd4cSKamal Heib 9173488bd4cSKamal Heib #define NUM_PPORT_ETH_EXT_COUNTERS ARRAY_SIZE(pport_eth_ext_stats_desc) 9183488bd4cSKamal Heib 91996b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(eth_ext) 9203488bd4cSKamal Heib { 9213488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 9223488bd4cSKamal Heib return NUM_PPORT_ETH_EXT_COUNTERS; 9233488bd4cSKamal Heib 9243488bd4cSKamal Heib return 0; 9253488bd4cSKamal Heib } 9263488bd4cSKamal Heib 92796b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(eth_ext) 9283488bd4cSKamal Heib { 9293488bd4cSKamal Heib int i; 9303488bd4cSKamal Heib 9313488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 9323488bd4cSKamal Heib for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++) 9333488bd4cSKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 9343488bd4cSKamal Heib pport_eth_ext_stats_desc[i].format); 9353488bd4cSKamal Heib return idx; 9363488bd4cSKamal Heib } 9373488bd4cSKamal Heib 93896b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(eth_ext) 9393488bd4cSKamal Heib { 9403488bd4cSKamal Heib int i; 9413488bd4cSKamal Heib 9423488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 9433488bd4cSKamal Heib for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++) 9443488bd4cSKamal Heib data[idx++] = 9453488bd4cSKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.eth_ext_counters, 9463488bd4cSKamal Heib pport_eth_ext_stats_desc, i); 9473488bd4cSKamal Heib return idx; 9483488bd4cSKamal Heib } 9493488bd4cSKamal Heib 95096b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(eth_ext) 95119386177SKamal Heib { 95219386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 95319386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 95419386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 95519386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 95619386177SKamal Heib void *out; 95719386177SKamal Heib 95819386177SKamal Heib if (!MLX5_CAP_PCAM_FEATURE(mdev, rx_buffer_fullness_counters)) 95919386177SKamal Heib return; 96019386177SKamal Heib 96119386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 96219386177SKamal Heib out = pstats->eth_ext_counters; 96319386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP); 96419386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 96519386177SKamal Heib } 96619386177SKamal Heib 9679fd2b5f1SKamal Heib #define PCIE_PERF_OFF(c) \ 9689fd2b5f1SKamal Heib MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c) 9699fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc[] = { 9709fd2b5f1SKamal Heib { "rx_pci_signal_integrity", PCIE_PERF_OFF(rx_errors) }, 9719fd2b5f1SKamal Heib { "tx_pci_signal_integrity", PCIE_PERF_OFF(tx_errors) }, 9729fd2b5f1SKamal Heib }; 9739fd2b5f1SKamal Heib 9749fd2b5f1SKamal Heib #define PCIE_PERF_OFF64(c) \ 9759fd2b5f1SKamal Heib MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c##_high) 9769fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc64[] = { 9779fd2b5f1SKamal Heib { "outbound_pci_buffer_overflow", PCIE_PERF_OFF64(tx_overflow_buffer_pkt) }, 9789fd2b5f1SKamal Heib }; 9799fd2b5f1SKamal Heib 9809fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stall_stats_desc[] = { 9819fd2b5f1SKamal Heib { "outbound_pci_stalled_rd", PCIE_PERF_OFF(outbound_stalled_reads) }, 9829fd2b5f1SKamal Heib { "outbound_pci_stalled_wr", PCIE_PERF_OFF(outbound_stalled_writes) }, 9839fd2b5f1SKamal Heib { "outbound_pci_stalled_rd_events", PCIE_PERF_OFF(outbound_stalled_reads_events) }, 9849fd2b5f1SKamal Heib { "outbound_pci_stalled_wr_events", PCIE_PERF_OFF(outbound_stalled_writes_events) }, 9859fd2b5f1SKamal Heib }; 9869fd2b5f1SKamal Heib 9879fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS ARRAY_SIZE(pcie_perf_stats_desc) 9889fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS64 ARRAY_SIZE(pcie_perf_stats_desc64) 9899fd2b5f1SKamal Heib #define NUM_PCIE_PERF_STALL_COUNTERS ARRAY_SIZE(pcie_perf_stall_stats_desc) 9909fd2b5f1SKamal Heib 99196b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(pcie) 9929fd2b5f1SKamal Heib { 9939fd2b5f1SKamal Heib int num_stats = 0; 9949fd2b5f1SKamal Heib 9959fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 9969fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_COUNTERS; 9979fd2b5f1SKamal Heib 9989fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 9999fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_COUNTERS64; 10009fd2b5f1SKamal Heib 10019fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 10029fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_STALL_COUNTERS; 10039fd2b5f1SKamal Heib 10049fd2b5f1SKamal Heib return num_stats; 10059fd2b5f1SKamal Heib } 10069fd2b5f1SKamal Heib 100796b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(pcie) 10089fd2b5f1SKamal Heib { 10099fd2b5f1SKamal Heib int i; 10109fd2b5f1SKamal Heib 10119fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 10129fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++) 10139fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 10149fd2b5f1SKamal Heib pcie_perf_stats_desc[i].format); 10159fd2b5f1SKamal Heib 10169fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 10179fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++) 10189fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 10199fd2b5f1SKamal Heib pcie_perf_stats_desc64[i].format); 10209fd2b5f1SKamal Heib 10219fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 10229fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++) 10239fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 10249fd2b5f1SKamal Heib pcie_perf_stall_stats_desc[i].format); 10259fd2b5f1SKamal Heib return idx; 10269fd2b5f1SKamal Heib } 10279fd2b5f1SKamal Heib 102896b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(pcie) 10299fd2b5f1SKamal Heib { 10309fd2b5f1SKamal Heib int i; 10319fd2b5f1SKamal Heib 10329fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 10339fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++) 10349fd2b5f1SKamal Heib data[idx++] = 10359fd2b5f1SKamal Heib MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters, 10369fd2b5f1SKamal Heib pcie_perf_stats_desc, i); 10379fd2b5f1SKamal Heib 10389fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 10399fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++) 10409fd2b5f1SKamal Heib data[idx++] = 10419fd2b5f1SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pcie.pcie_perf_counters, 10429fd2b5f1SKamal Heib pcie_perf_stats_desc64, i); 10439fd2b5f1SKamal Heib 10449fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 10459fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++) 10469fd2b5f1SKamal Heib data[idx++] = 10479fd2b5f1SKamal Heib MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters, 10489fd2b5f1SKamal Heib pcie_perf_stall_stats_desc, i); 10499fd2b5f1SKamal Heib return idx; 10509fd2b5f1SKamal Heib } 10519fd2b5f1SKamal Heib 105296b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(pcie) 105319386177SKamal Heib { 105419386177SKamal Heib struct mlx5e_pcie_stats *pcie_stats = &priv->stats.pcie; 105519386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 105619386177SKamal Heib u32 in[MLX5_ST_SZ_DW(mpcnt_reg)] = {0}; 105719386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(mpcnt_reg); 105819386177SKamal Heib void *out; 105919386177SKamal Heib 106019386177SKamal Heib if (!MLX5_CAP_MCAM_FEATURE(mdev, pcie_performance_group)) 106119386177SKamal Heib return; 106219386177SKamal Heib 106319386177SKamal Heib out = pcie_stats->pcie_perf_counters; 106419386177SKamal Heib MLX5_SET(mpcnt_reg, in, grp, MLX5_PCIE_PERFORMANCE_COUNTERS_GROUP); 106519386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_MPCNT, 0, 0); 106619386177SKamal Heib } 106719386177SKamal Heib 10681297d97fSAya Levin #define PPORT_PER_TC_PRIO_OFF(c) \ 10691297d97fSAya Levin MLX5_BYTE_OFF(ppcnt_reg, \ 10701297d97fSAya Levin counter_set.eth_per_tc_prio_grp_data_layout.c##_high) 10711297d97fSAya Levin 10721297d97fSAya Levin static const struct counter_desc pport_per_tc_prio_stats_desc[] = { 10731297d97fSAya Levin { "rx_prio%d_buf_discard", PPORT_PER_TC_PRIO_OFF(no_buffer_discard_uc) }, 10741297d97fSAya Levin }; 10751297d97fSAya Levin 10761297d97fSAya Levin #define NUM_PPORT_PER_TC_PRIO_COUNTERS ARRAY_SIZE(pport_per_tc_prio_stats_desc) 10771297d97fSAya Levin 10781297d97fSAya Levin #define PPORT_PER_TC_CONGEST_PRIO_OFF(c) \ 10791297d97fSAya Levin MLX5_BYTE_OFF(ppcnt_reg, \ 10801297d97fSAya Levin counter_set.eth_per_tc_congest_prio_grp_data_layout.c##_high) 10811297d97fSAya Levin 10821297d97fSAya Levin static const struct counter_desc pport_per_tc_congest_prio_stats_desc[] = { 10831297d97fSAya Levin { "rx_prio%d_cong_discard", PPORT_PER_TC_CONGEST_PRIO_OFF(wred_discard) }, 10841297d97fSAya Levin { "rx_prio%d_marked", PPORT_PER_TC_CONGEST_PRIO_OFF(ecn_marked_tc) }, 10851297d97fSAya Levin }; 10861297d97fSAya Levin 10871297d97fSAya Levin #define NUM_PPORT_PER_TC_CONGEST_PRIO_COUNTERS \ 10881297d97fSAya Levin ARRAY_SIZE(pport_per_tc_congest_prio_stats_desc) 10891297d97fSAya Levin 10901297d97fSAya Levin static int mlx5e_grp_per_tc_prio_get_num_stats(struct mlx5e_priv *priv) 10911297d97fSAya Levin { 10921297d97fSAya Levin struct mlx5_core_dev *mdev = priv->mdev; 10931297d97fSAya Levin 10941297d97fSAya Levin if (!MLX5_CAP_GEN(mdev, sbcam_reg)) 10951297d97fSAya Levin return 0; 10961297d97fSAya Levin 10971297d97fSAya Levin return NUM_PPORT_PER_TC_PRIO_COUNTERS * NUM_PPORT_PRIO; 10981297d97fSAya Levin } 10991297d97fSAya Levin 110096b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(per_port_buff_congest) 11011297d97fSAya Levin { 11021297d97fSAya Levin struct mlx5_core_dev *mdev = priv->mdev; 11031297d97fSAya Levin int i, prio; 11041297d97fSAya Levin 11051297d97fSAya Levin if (!MLX5_CAP_GEN(mdev, sbcam_reg)) 11061297d97fSAya Levin return idx; 11071297d97fSAya Levin 11081297d97fSAya Levin for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 11091297d97fSAya Levin for (i = 0; i < NUM_PPORT_PER_TC_PRIO_COUNTERS; i++) 11101297d97fSAya Levin sprintf(data + (idx++) * ETH_GSTRING_LEN, 11111297d97fSAya Levin pport_per_tc_prio_stats_desc[i].format, prio); 11121297d97fSAya Levin for (i = 0; i < NUM_PPORT_PER_TC_CONGEST_PRIO_COUNTERS; i++) 11131297d97fSAya Levin sprintf(data + (idx++) * ETH_GSTRING_LEN, 11141297d97fSAya Levin pport_per_tc_congest_prio_stats_desc[i].format, prio); 11151297d97fSAya Levin } 11161297d97fSAya Levin 11171297d97fSAya Levin return idx; 11181297d97fSAya Levin } 11191297d97fSAya Levin 112096b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(per_port_buff_congest) 11211297d97fSAya Levin { 11221297d97fSAya Levin struct mlx5e_pport_stats *pport = &priv->stats.pport; 11231297d97fSAya Levin struct mlx5_core_dev *mdev = priv->mdev; 11241297d97fSAya Levin int i, prio; 11251297d97fSAya Levin 11261297d97fSAya Levin if (!MLX5_CAP_GEN(mdev, sbcam_reg)) 11271297d97fSAya Levin return idx; 11281297d97fSAya Levin 11291297d97fSAya Levin for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 11301297d97fSAya Levin for (i = 0; i < NUM_PPORT_PER_TC_PRIO_COUNTERS; i++) 11311297d97fSAya Levin data[idx++] = 11321297d97fSAya Levin MLX5E_READ_CTR64_BE(&pport->per_tc_prio_counters[prio], 11331297d97fSAya Levin pport_per_tc_prio_stats_desc, i); 11341297d97fSAya Levin for (i = 0; i < NUM_PPORT_PER_TC_CONGEST_PRIO_COUNTERS ; i++) 11351297d97fSAya Levin data[idx++] = 11361297d97fSAya Levin MLX5E_READ_CTR64_BE(&pport->per_tc_congest_prio_counters[prio], 11371297d97fSAya Levin pport_per_tc_congest_prio_stats_desc, i); 11381297d97fSAya Levin } 11391297d97fSAya Levin 11401297d97fSAya Levin return idx; 11411297d97fSAya Levin } 11421297d97fSAya Levin 11431297d97fSAya Levin static void mlx5e_grp_per_tc_prio_update_stats(struct mlx5e_priv *priv) 11441297d97fSAya Levin { 11451297d97fSAya Levin struct mlx5e_pport_stats *pstats = &priv->stats.pport; 11461297d97fSAya Levin struct mlx5_core_dev *mdev = priv->mdev; 11471297d97fSAya Levin u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {}; 11481297d97fSAya Levin int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 11491297d97fSAya Levin void *out; 11501297d97fSAya Levin int prio; 11511297d97fSAya Levin 11521297d97fSAya Levin if (!MLX5_CAP_GEN(mdev, sbcam_reg)) 11531297d97fSAya Levin return; 11541297d97fSAya Levin 11551297d97fSAya Levin MLX5_SET(ppcnt_reg, in, pnat, 2); 11561297d97fSAya Levin MLX5_SET(ppcnt_reg, in, grp, MLX5_PER_TRAFFIC_CLASS_COUNTERS_GROUP); 11571297d97fSAya Levin for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 11581297d97fSAya Levin out = pstats->per_tc_prio_counters[prio]; 11591297d97fSAya Levin MLX5_SET(ppcnt_reg, in, prio_tc, prio); 11601297d97fSAya Levin mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 11611297d97fSAya Levin } 11621297d97fSAya Levin } 11631297d97fSAya Levin 11641297d97fSAya Levin static int mlx5e_grp_per_tc_congest_prio_get_num_stats(struct mlx5e_priv *priv) 11651297d97fSAya Levin { 11661297d97fSAya Levin struct mlx5_core_dev *mdev = priv->mdev; 11671297d97fSAya Levin 11681297d97fSAya Levin if (!MLX5_CAP_GEN(mdev, sbcam_reg)) 11691297d97fSAya Levin return 0; 11701297d97fSAya Levin 11711297d97fSAya Levin return NUM_PPORT_PER_TC_CONGEST_PRIO_COUNTERS * NUM_PPORT_PRIO; 11721297d97fSAya Levin } 11731297d97fSAya Levin 11741297d97fSAya Levin static void mlx5e_grp_per_tc_congest_prio_update_stats(struct mlx5e_priv *priv) 11751297d97fSAya Levin { 11761297d97fSAya Levin struct mlx5e_pport_stats *pstats = &priv->stats.pport; 11771297d97fSAya Levin struct mlx5_core_dev *mdev = priv->mdev; 11781297d97fSAya Levin u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {}; 11791297d97fSAya Levin int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 11801297d97fSAya Levin void *out; 11811297d97fSAya Levin int prio; 11821297d97fSAya Levin 11831297d97fSAya Levin if (!MLX5_CAP_GEN(mdev, sbcam_reg)) 11841297d97fSAya Levin return; 11851297d97fSAya Levin 11861297d97fSAya Levin MLX5_SET(ppcnt_reg, in, pnat, 2); 11871297d97fSAya Levin MLX5_SET(ppcnt_reg, in, grp, MLX5_PER_TRAFFIC_CLASS_CONGESTION_GROUP); 11881297d97fSAya Levin for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 11891297d97fSAya Levin out = pstats->per_tc_congest_prio_counters[prio]; 11901297d97fSAya Levin MLX5_SET(ppcnt_reg, in, prio_tc, prio); 11911297d97fSAya Levin mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 11921297d97fSAya Levin } 11931297d97fSAya Levin } 11941297d97fSAya Levin 119596b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(per_port_buff_congest) 11961297d97fSAya Levin { 11971297d97fSAya Levin return mlx5e_grp_per_tc_prio_get_num_stats(priv) + 11981297d97fSAya Levin mlx5e_grp_per_tc_congest_prio_get_num_stats(priv); 11991297d97fSAya Levin } 12001297d97fSAya Levin 120196b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(per_port_buff_congest) 12021297d97fSAya Levin { 12031297d97fSAya Levin mlx5e_grp_per_tc_prio_update_stats(priv); 12041297d97fSAya Levin mlx5e_grp_per_tc_congest_prio_update_stats(priv); 12051297d97fSAya Levin } 12061297d97fSAya Levin 12074377bea2SKamal Heib #define PPORT_PER_PRIO_OFF(c) \ 12084377bea2SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 12094377bea2SKamal Heib counter_set.eth_per_prio_grp_data_layout.c##_high) 1210e6000651SKamal Heib static const struct counter_desc pport_per_prio_traffic_stats_desc[] = { 1211e6000651SKamal Heib { "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets) }, 1212e6000651SKamal Heib { "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames) }, 1213827a8cb2SAharon Landau { "rx_prio%d_discards", PPORT_PER_PRIO_OFF(rx_discards) }, 1214e6000651SKamal Heib { "tx_prio%d_bytes", PPORT_PER_PRIO_OFF(tx_octets) }, 1215e6000651SKamal Heib { "tx_prio%d_packets", PPORT_PER_PRIO_OFF(tx_frames) }, 1216e6000651SKamal Heib }; 1217e6000651SKamal Heib 1218e6000651SKamal Heib #define NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS ARRAY_SIZE(pport_per_prio_traffic_stats_desc) 1219e6000651SKamal Heib 122054c73f86SYuval Shaia static int mlx5e_grp_per_prio_traffic_get_num_stats(void) 1221e6000651SKamal Heib { 1222e6000651SKamal Heib return NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS * NUM_PPORT_PRIO; 1223e6000651SKamal Heib } 1224e6000651SKamal Heib 1225e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_strings(struct mlx5e_priv *priv, 1226e6000651SKamal Heib u8 *data, 1227e6000651SKamal Heib int idx) 1228e6000651SKamal Heib { 1229e6000651SKamal Heib int i, prio; 1230e6000651SKamal Heib 1231e6000651SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 1232e6000651SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++) 1233e6000651SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 1234e6000651SKamal Heib pport_per_prio_traffic_stats_desc[i].format, prio); 1235e6000651SKamal Heib } 1236e6000651SKamal Heib 1237e6000651SKamal Heib return idx; 1238e6000651SKamal Heib } 1239e6000651SKamal Heib 1240e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_stats(struct mlx5e_priv *priv, 1241e6000651SKamal Heib u64 *data, 1242e6000651SKamal Heib int idx) 1243e6000651SKamal Heib { 1244e6000651SKamal Heib int i, prio; 1245e6000651SKamal Heib 1246e6000651SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 1247e6000651SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++) 1248e6000651SKamal Heib data[idx++] = 1249e6000651SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio], 1250e6000651SKamal Heib pport_per_prio_traffic_stats_desc, i); 1251e6000651SKamal Heib } 1252e6000651SKamal Heib 1253e6000651SKamal Heib return idx; 1254e6000651SKamal Heib } 1255e6000651SKamal Heib 12564377bea2SKamal Heib static const struct counter_desc pport_per_prio_pfc_stats_desc[] = { 12574377bea2SKamal Heib /* %s is "global" or "prio{i}" */ 12584377bea2SKamal Heib { "rx_%s_pause", PPORT_PER_PRIO_OFF(rx_pause) }, 12594377bea2SKamal Heib { "rx_%s_pause_duration", PPORT_PER_PRIO_OFF(rx_pause_duration) }, 12604377bea2SKamal Heib { "tx_%s_pause", PPORT_PER_PRIO_OFF(tx_pause) }, 12614377bea2SKamal Heib { "tx_%s_pause_duration", PPORT_PER_PRIO_OFF(tx_pause_duration) }, 12624377bea2SKamal Heib { "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) }, 12634377bea2SKamal Heib }; 12644377bea2SKamal Heib 12652fcb12dfSInbar Karmy static const struct counter_desc pport_pfc_stall_stats_desc[] = { 12662fcb12dfSInbar Karmy { "tx_pause_storm_warning_events", PPORT_PER_PRIO_OFF(device_stall_minor_watermark_cnt) }, 12672fcb12dfSInbar Karmy { "tx_pause_storm_error_events", PPORT_PER_PRIO_OFF(device_stall_critical_watermark_cnt) }, 12682fcb12dfSInbar Karmy }; 12692fcb12dfSInbar Karmy 12704377bea2SKamal Heib #define NUM_PPORT_PER_PRIO_PFC_COUNTERS ARRAY_SIZE(pport_per_prio_pfc_stats_desc) 12712fcb12dfSInbar Karmy #define NUM_PPORT_PFC_STALL_COUNTERS(priv) (ARRAY_SIZE(pport_pfc_stall_stats_desc) * \ 12722fcb12dfSInbar Karmy MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) * \ 12732fcb12dfSInbar Karmy MLX5_CAP_DEBUG((priv)->mdev, stall_detect)) 12744377bea2SKamal Heib 12754377bea2SKamal Heib static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv) 12764377bea2SKamal Heib { 12774377bea2SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 12784377bea2SKamal Heib u8 pfc_en_tx; 12794377bea2SKamal Heib u8 pfc_en_rx; 12804377bea2SKamal Heib int err; 12814377bea2SKamal Heib 12824377bea2SKamal Heib if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) 12834377bea2SKamal Heib return 0; 12844377bea2SKamal Heib 12854377bea2SKamal Heib err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx); 12864377bea2SKamal Heib 12874377bea2SKamal Heib return err ? 0 : pfc_en_tx | pfc_en_rx; 12884377bea2SKamal Heib } 12894377bea2SKamal Heib 12904377bea2SKamal Heib static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv) 12914377bea2SKamal Heib { 12924377bea2SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 12934377bea2SKamal Heib u32 rx_pause; 12944377bea2SKamal Heib u32 tx_pause; 12954377bea2SKamal Heib int err; 12964377bea2SKamal Heib 12974377bea2SKamal Heib if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) 12984377bea2SKamal Heib return false; 12994377bea2SKamal Heib 13004377bea2SKamal Heib err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause); 13014377bea2SKamal Heib 13024377bea2SKamal Heib return err ? false : rx_pause | tx_pause; 13034377bea2SKamal Heib } 13044377bea2SKamal Heib 13054377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_get_num_stats(struct mlx5e_priv *priv) 13064377bea2SKamal Heib { 13074377bea2SKamal Heib return (mlx5e_query_global_pause_combined(priv) + 13084377bea2SKamal Heib hweight8(mlx5e_query_pfc_combined(priv))) * 13092fcb12dfSInbar Karmy NUM_PPORT_PER_PRIO_PFC_COUNTERS + 13102fcb12dfSInbar Karmy NUM_PPORT_PFC_STALL_COUNTERS(priv); 13114377bea2SKamal Heib } 13124377bea2SKamal Heib 13134377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_strings(struct mlx5e_priv *priv, 13144377bea2SKamal Heib u8 *data, 13154377bea2SKamal Heib int idx) 13164377bea2SKamal Heib { 13174377bea2SKamal Heib unsigned long pfc_combined; 13184377bea2SKamal Heib int i, prio; 13194377bea2SKamal Heib 13204377bea2SKamal Heib pfc_combined = mlx5e_query_pfc_combined(priv); 13214377bea2SKamal Heib for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) { 13224377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 13234377bea2SKamal Heib char pfc_string[ETH_GSTRING_LEN]; 13244377bea2SKamal Heib 13254377bea2SKamal Heib snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio); 13264377bea2SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 13274377bea2SKamal Heib pport_per_prio_pfc_stats_desc[i].format, pfc_string); 13284377bea2SKamal Heib } 13294377bea2SKamal Heib } 13304377bea2SKamal Heib 13314377bea2SKamal Heib if (mlx5e_query_global_pause_combined(priv)) { 13324377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 13334377bea2SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 13344377bea2SKamal Heib pport_per_prio_pfc_stats_desc[i].format, "global"); 13354377bea2SKamal Heib } 13364377bea2SKamal Heib } 13374377bea2SKamal Heib 13382fcb12dfSInbar Karmy for (i = 0; i < NUM_PPORT_PFC_STALL_COUNTERS(priv); i++) 13392fcb12dfSInbar Karmy strcpy(data + (idx++) * ETH_GSTRING_LEN, 13402fcb12dfSInbar Karmy pport_pfc_stall_stats_desc[i].format); 13412fcb12dfSInbar Karmy 13424377bea2SKamal Heib return idx; 13434377bea2SKamal Heib } 13444377bea2SKamal Heib 13454377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_stats(struct mlx5e_priv *priv, 13464377bea2SKamal Heib u64 *data, 13474377bea2SKamal Heib int idx) 13484377bea2SKamal Heib { 13494377bea2SKamal Heib unsigned long pfc_combined; 13504377bea2SKamal Heib int i, prio; 13514377bea2SKamal Heib 13524377bea2SKamal Heib pfc_combined = mlx5e_query_pfc_combined(priv); 13534377bea2SKamal Heib for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) { 13544377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 13554377bea2SKamal Heib data[idx++] = 13564377bea2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio], 13574377bea2SKamal Heib pport_per_prio_pfc_stats_desc, i); 13584377bea2SKamal Heib } 13594377bea2SKamal Heib } 13604377bea2SKamal Heib 13614377bea2SKamal Heib if (mlx5e_query_global_pause_combined(priv)) { 13624377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 13634377bea2SKamal Heib data[idx++] = 13644377bea2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0], 13654377bea2SKamal Heib pport_per_prio_pfc_stats_desc, i); 13664377bea2SKamal Heib } 13674377bea2SKamal Heib } 13684377bea2SKamal Heib 13692fcb12dfSInbar Karmy for (i = 0; i < NUM_PPORT_PFC_STALL_COUNTERS(priv); i++) 13702fcb12dfSInbar Karmy data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0], 13712fcb12dfSInbar Karmy pport_pfc_stall_stats_desc, i); 13722fcb12dfSInbar Karmy 13734377bea2SKamal Heib return idx; 13744377bea2SKamal Heib } 13754377bea2SKamal Heib 137696b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(per_prio) 1377a8984281SKamal Heib { 137854c73f86SYuval Shaia return mlx5e_grp_per_prio_traffic_get_num_stats() + 1379a8984281SKamal Heib mlx5e_grp_per_prio_pfc_get_num_stats(priv); 1380a8984281SKamal Heib } 1381a8984281SKamal Heib 138296b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(per_prio) 1383a8984281SKamal Heib { 1384a8984281SKamal Heib idx = mlx5e_grp_per_prio_traffic_fill_strings(priv, data, idx); 1385a8984281SKamal Heib idx = mlx5e_grp_per_prio_pfc_fill_strings(priv, data, idx); 1386a8984281SKamal Heib return idx; 1387a8984281SKamal Heib } 1388a8984281SKamal Heib 138996b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(per_prio) 1390a8984281SKamal Heib { 1391a8984281SKamal Heib idx = mlx5e_grp_per_prio_traffic_fill_stats(priv, data, idx); 1392a8984281SKamal Heib idx = mlx5e_grp_per_prio_pfc_fill_stats(priv, data, idx); 1393a8984281SKamal Heib return idx; 1394a8984281SKamal Heib } 1395a8984281SKamal Heib 139696b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(per_prio) 139719386177SKamal Heib { 139819386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 139919386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 140019386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 140119386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 140219386177SKamal Heib int prio; 140319386177SKamal Heib void *out; 140419386177SKamal Heib 140575370eb0SEyal Davidovich if (!MLX5_BASIC_PPCNT_SUPPORTED(mdev)) 140675370eb0SEyal Davidovich return; 140775370eb0SEyal Davidovich 140819386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 140919386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_PER_PRIORITY_COUNTERS_GROUP); 141019386177SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 141119386177SKamal Heib out = pstats->per_prio_counters[prio]; 141219386177SKamal Heib MLX5_SET(ppcnt_reg, in, prio_tc, prio); 141319386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, 141419386177SKamal Heib MLX5_REG_PPCNT, 0, 0); 141519386177SKamal Heib } 141619386177SKamal Heib } 141719386177SKamal Heib 14180e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_status_desc[] = { 1419c2fb3db2SMikhael Goikhman { "module_unplug", sizeof(u64) * MLX5_MODULE_STATUS_UNPLUGGED }, 14200e6f01a4SKamal Heib }; 14210e6f01a4SKamal Heib 14220e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_error_desc[] = { 1423c2fb3db2SMikhael Goikhman { "module_bus_stuck", sizeof(u64) * MLX5_MODULE_EVENT_ERROR_BUS_STUCK }, 1424c2fb3db2SMikhael Goikhman { "module_high_temp", sizeof(u64) * MLX5_MODULE_EVENT_ERROR_HIGH_TEMPERATURE }, 1425c2fb3db2SMikhael Goikhman { "module_bad_shorted", sizeof(u64) * MLX5_MODULE_EVENT_ERROR_BAD_CABLE }, 14260e6f01a4SKamal Heib }; 14270e6f01a4SKamal Heib 14280e6f01a4SKamal Heib #define NUM_PME_STATUS_STATS ARRAY_SIZE(mlx5e_pme_status_desc) 14290e6f01a4SKamal Heib #define NUM_PME_ERR_STATS ARRAY_SIZE(mlx5e_pme_error_desc) 14300e6f01a4SKamal Heib 143196b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(pme) 14320e6f01a4SKamal Heib { 14330e6f01a4SKamal Heib return NUM_PME_STATUS_STATS + NUM_PME_ERR_STATS; 14340e6f01a4SKamal Heib } 14350e6f01a4SKamal Heib 143696b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(pme) 14370e6f01a4SKamal Heib { 14380e6f01a4SKamal Heib int i; 14390e6f01a4SKamal Heib 14400e6f01a4SKamal Heib for (i = 0; i < NUM_PME_STATUS_STATS; i++) 14410e6f01a4SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_status_desc[i].format); 14420e6f01a4SKamal Heib 14430e6f01a4SKamal Heib for (i = 0; i < NUM_PME_ERR_STATS; i++) 14440e6f01a4SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_error_desc[i].format); 14450e6f01a4SKamal Heib 14460e6f01a4SKamal Heib return idx; 14470e6f01a4SKamal Heib } 14480e6f01a4SKamal Heib 144996b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(pme) 14500e6f01a4SKamal Heib { 145169c1280bSSaeed Mahameed struct mlx5_pme_stats pme_stats; 14520e6f01a4SKamal Heib int i; 14530e6f01a4SKamal Heib 145469c1280bSSaeed Mahameed mlx5_get_pme_stats(priv->mdev, &pme_stats); 145569c1280bSSaeed Mahameed 14560e6f01a4SKamal Heib for (i = 0; i < NUM_PME_STATUS_STATS; i++) 145769c1280bSSaeed Mahameed data[idx++] = MLX5E_READ_CTR64_CPU(pme_stats.status_counters, 14580e6f01a4SKamal Heib mlx5e_pme_status_desc, i); 14590e6f01a4SKamal Heib 14600e6f01a4SKamal Heib for (i = 0; i < NUM_PME_ERR_STATS; i++) 146169c1280bSSaeed Mahameed data[idx++] = MLX5E_READ_CTR64_CPU(pme_stats.error_counters, 14620e6f01a4SKamal Heib mlx5e_pme_error_desc, i); 14630e6f01a4SKamal Heib 14640e6f01a4SKamal Heib return idx; 14650e6f01a4SKamal Heib } 14660e6f01a4SKamal Heib 146796b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(pme) { return; } 146896b12796SSaeed Mahameed 146996b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(tls) 147043585a41SIlya Lesokhin { 147143585a41SIlya Lesokhin return mlx5e_tls_get_count(priv); 147243585a41SIlya Lesokhin } 147343585a41SIlya Lesokhin 147496b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(tls) 147543585a41SIlya Lesokhin { 147643585a41SIlya Lesokhin return idx + mlx5e_tls_get_strings(priv, data + idx * ETH_GSTRING_LEN); 147743585a41SIlya Lesokhin } 147843585a41SIlya Lesokhin 147996b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(tls) 148043585a41SIlya Lesokhin { 148143585a41SIlya Lesokhin return idx + mlx5e_tls_get_stats(priv, data + idx); 148243585a41SIlya Lesokhin } 148343585a41SIlya Lesokhin 148496b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(tls) { return; } 148596b12796SSaeed Mahameed 14861fe85006SKamal Heib static const struct counter_desc rq_stats_desc[] = { 14871fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, packets) }, 14881fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, bytes) }, 14891fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete) }, 14900aa1d186SSaeed Mahameed { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete_tail) }, 14910aa1d186SSaeed Mahameed { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete_tail_slow) }, 14921fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary) }, 14931fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary_inner) }, 14941fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_none) }, 14951fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_drop) }, 149686690b4bSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_redirect) }, 14971fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_packets) }, 14981fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_bytes) }, 1499f007c13dSNatali Shechtman { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, ecn_mark) }, 1500f24686e8SGal Pressman { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, removed_vlan_packets) }, 15011fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, wqe_err) }, 1502b71ba6b4STariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler_cqes) }, 1503b71ba6b4STariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler_strides) }, 15040073c8f7SMoshe Shemesh { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, oversize_pkts_sw_drop) }, 15051fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, buff_alloc_err) }, 15061fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_blks) }, 15071fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_pkts) }, 15081fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_reuse) }, 15091fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_full) }, 15101fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_empty) }, 15111fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_busy) }, 15121fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_waive) }, 1513dc983f0eSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, congst_umr) }, 151494563847SEran Ben Elisha { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, arfs_err) }, 1515be5323c8SAya Levin { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, recover) }, 151676c1e1acSTariq Toukan #ifdef CONFIG_MLX5_EN_TLS 151776c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_decrypted_packets) }, 151876c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_decrypted_bytes) }, 151976c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_ctx) }, 152076c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_del) }, 152176c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_resync_req_pkt) }, 152276c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_resync_req_start) }, 152376c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_resync_req_end) }, 152476c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_resync_req_skip) }, 152576c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_resync_res_ok) }, 152676c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_resync_res_skip) }, 152776c1e1acSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_err) }, 152876c1e1acSTariq Toukan #endif 15291fe85006SKamal Heib }; 15301fe85006SKamal Heib 15311fe85006SKamal Heib static const struct counter_desc sq_stats_desc[] = { 15321fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, packets) }, 15331fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, bytes) }, 15341fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_packets) }, 15351fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_bytes) }, 15361fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_packets) }, 15371fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_bytes) }, 15381fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial) }, 15391fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial_inner) }, 1540f24686e8SGal Pressman { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, added_vlan_packets) }, 15411fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, nop) }, 1542d2ead1f3STariq Toukan #ifdef CONFIG_MLX5_EN_TLS 1543d2ead1f3STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tls_encrypted_packets) }, 1544d2ead1f3STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tls_encrypted_bytes) }, 1545d2ead1f3STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tls_ctx) }, 1546d2ead1f3STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tls_ooo) }, 1547d2ead1f3STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tls_dump_packets) }, 1548d2ead1f3STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tls_dump_bytes) }, 154946a3ea98STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tls_resync_bytes) }, 155046a3ea98STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tls_skip_no_sync_data) }, 155146a3ea98STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tls_drop_no_sync_data) }, 155246a3ea98STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tls_drop_bypass_req) }, 1553d2ead1f3STariq Toukan #endif 15541fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_none) }, 15551fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, stopped) }, 15561fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, dropped) }, 15571fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, xmit_more) }, 1558db75373cSEran Ben Elisha { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, recover) }, 155986155656STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, cqes) }, 1560f65a59ffSTariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, wake) }, 1561f65a59ffSTariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, cqe_err) }, 15621fe85006SKamal Heib }; 15631fe85006SKamal Heib 1564890388adSTariq Toukan static const struct counter_desc rq_xdpsq_stats_desc[] = { 1565890388adSTariq Toukan { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, xmit) }, 156673cab880SShay Agroskin { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, mpwqe) }, 1567c2273219SShay Agroskin { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, inlnw) }, 15686c085a8aSShay Agroskin { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, nops) }, 1569890388adSTariq Toukan { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, full) }, 1570890388adSTariq Toukan { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, err) }, 1571890388adSTariq Toukan { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, cqes) }, 1572890388adSTariq Toukan }; 1573890388adSTariq Toukan 157458b99ee3STariq Toukan static const struct counter_desc xdpsq_stats_desc[] = { 157558b99ee3STariq Toukan { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, xmit) }, 157673cab880SShay Agroskin { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, mpwqe) }, 1577c2273219SShay Agroskin { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, inlnw) }, 15786c085a8aSShay Agroskin { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, nops) }, 157958b99ee3STariq Toukan { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, full) }, 158058b99ee3STariq Toukan { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, err) }, 158158b99ee3STariq Toukan { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, cqes) }, 158258b99ee3STariq Toukan }; 158358b99ee3STariq Toukan 1584db05815bSMaxim Mikityanskiy static const struct counter_desc xskrq_stats_desc[] = { 1585db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, packets) }, 1586db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, bytes) }, 1587db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, csum_complete) }, 1588db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, csum_unnecessary) }, 1589db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, csum_unnecessary_inner) }, 1590db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, csum_none) }, 1591db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, ecn_mark) }, 1592db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, removed_vlan_packets) }, 1593db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, xdp_drop) }, 1594db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, xdp_redirect) }, 1595db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, wqe_err) }, 1596db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, mpwqe_filler_cqes) }, 1597db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, mpwqe_filler_strides) }, 1598db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, oversize_pkts_sw_drop) }, 1599db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, buff_alloc_err) }, 1600db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, cqe_compress_blks) }, 1601db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, cqe_compress_pkts) }, 1602db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, congst_umr) }, 1603db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKRQ_STAT(struct mlx5e_rq_stats, arfs_err) }, 1604db05815bSMaxim Mikityanskiy }; 1605db05815bSMaxim Mikityanskiy 1606db05815bSMaxim Mikityanskiy static const struct counter_desc xsksq_stats_desc[] = { 1607db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKSQ_STAT(struct mlx5e_xdpsq_stats, xmit) }, 1608db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKSQ_STAT(struct mlx5e_xdpsq_stats, mpwqe) }, 1609db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKSQ_STAT(struct mlx5e_xdpsq_stats, inlnw) }, 1610db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKSQ_STAT(struct mlx5e_xdpsq_stats, full) }, 1611db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKSQ_STAT(struct mlx5e_xdpsq_stats, err) }, 1612db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_XSKSQ_STAT(struct mlx5e_xdpsq_stats, cqes) }, 1613db05815bSMaxim Mikityanskiy }; 1614db05815bSMaxim Mikityanskiy 161557d689a8SEran Ben Elisha static const struct counter_desc ch_stats_desc[] = { 1616a1bf74dcSTariq Toukan { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, events) }, 16172d7103c8STariq Toukan { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, poll) }, 16182d7103c8STariq Toukan { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, arm) }, 16192d7103c8STariq Toukan { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, aff_change) }, 1620db05815bSMaxim Mikityanskiy { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, force_irq) }, 162157d689a8SEran Ben Elisha { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, eq_rearm) }, 162257d689a8SEran Ben Elisha }; 162357d689a8SEran Ben Elisha 16241fe85006SKamal Heib #define NUM_RQ_STATS ARRAY_SIZE(rq_stats_desc) 16251fe85006SKamal Heib #define NUM_SQ_STATS ARRAY_SIZE(sq_stats_desc) 162658b99ee3STariq Toukan #define NUM_XDPSQ_STATS ARRAY_SIZE(xdpsq_stats_desc) 1627890388adSTariq Toukan #define NUM_RQ_XDPSQ_STATS ARRAY_SIZE(rq_xdpsq_stats_desc) 1628db05815bSMaxim Mikityanskiy #define NUM_XSKRQ_STATS ARRAY_SIZE(xskrq_stats_desc) 1629db05815bSMaxim Mikityanskiy #define NUM_XSKSQ_STATS ARRAY_SIZE(xsksq_stats_desc) 163057d689a8SEran Ben Elisha #define NUM_CH_STATS ARRAY_SIZE(ch_stats_desc) 16311fe85006SKamal Heib 163296b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(channels) 16331fe85006SKamal Heib { 1634694826e3STariq Toukan int max_nch = priv->max_nch; 163505909babSEran Ben Elisha 163605909babSEran Ben Elisha return (NUM_RQ_STATS * max_nch) + 163705909babSEran Ben Elisha (NUM_CH_STATS * max_nch) + 1638890388adSTariq Toukan (NUM_SQ_STATS * max_nch * priv->max_opened_tc) + 163958b99ee3STariq Toukan (NUM_RQ_XDPSQ_STATS * max_nch) + 1640db05815bSMaxim Mikityanskiy (NUM_XDPSQ_STATS * max_nch) + 1641db05815bSMaxim Mikityanskiy (NUM_XSKRQ_STATS * max_nch * priv->xsk.ever_used) + 1642db05815bSMaxim Mikityanskiy (NUM_XSKSQ_STATS * max_nch * priv->xsk.ever_used); 16431fe85006SKamal Heib } 16441fe85006SKamal Heib 164596b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(channels) 16461fe85006SKamal Heib { 1647db05815bSMaxim Mikityanskiy bool is_xsk = priv->xsk.ever_used; 1648694826e3STariq Toukan int max_nch = priv->max_nch; 16491fe85006SKamal Heib int i, j, tc; 16501fe85006SKamal Heib 165105909babSEran Ben Elisha for (i = 0; i < max_nch; i++) 165257d689a8SEran Ben Elisha for (j = 0; j < NUM_CH_STATS; j++) 165357d689a8SEran Ben Elisha sprintf(data + (idx++) * ETH_GSTRING_LEN, 165457d689a8SEran Ben Elisha ch_stats_desc[j].format, i); 165557d689a8SEran Ben Elisha 1656890388adSTariq Toukan for (i = 0; i < max_nch; i++) { 16571fe85006SKamal Heib for (j = 0; j < NUM_RQ_STATS; j++) 1658890388adSTariq Toukan sprintf(data + (idx++) * ETH_GSTRING_LEN, 1659890388adSTariq Toukan rq_stats_desc[j].format, i); 1660db05815bSMaxim Mikityanskiy for (j = 0; j < NUM_XSKRQ_STATS * is_xsk; j++) 1661db05815bSMaxim Mikityanskiy sprintf(data + (idx++) * ETH_GSTRING_LEN, 1662db05815bSMaxim Mikityanskiy xskrq_stats_desc[j].format, i); 1663890388adSTariq Toukan for (j = 0; j < NUM_RQ_XDPSQ_STATS; j++) 1664890388adSTariq Toukan sprintf(data + (idx++) * ETH_GSTRING_LEN, 1665890388adSTariq Toukan rq_xdpsq_stats_desc[j].format, i); 1666890388adSTariq Toukan } 16671fe85006SKamal Heib 166805909babSEran Ben Elisha for (tc = 0; tc < priv->max_opened_tc; tc++) 166905909babSEran Ben Elisha for (i = 0; i < max_nch; i++) 16701fe85006SKamal Heib for (j = 0; j < NUM_SQ_STATS; j++) 16711fe85006SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 16721fe85006SKamal Heib sq_stats_desc[j].format, 1673c55d8b10SEran Ben Elisha i + tc * max_nch); 16741fe85006SKamal Heib 1675db05815bSMaxim Mikityanskiy for (i = 0; i < max_nch; i++) { 1676db05815bSMaxim Mikityanskiy for (j = 0; j < NUM_XSKSQ_STATS * is_xsk; j++) 1677db05815bSMaxim Mikityanskiy sprintf(data + (idx++) * ETH_GSTRING_LEN, 1678db05815bSMaxim Mikityanskiy xsksq_stats_desc[j].format, i); 167958b99ee3STariq Toukan for (j = 0; j < NUM_XDPSQ_STATS; j++) 168058b99ee3STariq Toukan sprintf(data + (idx++) * ETH_GSTRING_LEN, 168158b99ee3STariq Toukan xdpsq_stats_desc[j].format, i); 1682db05815bSMaxim Mikityanskiy } 168358b99ee3STariq Toukan 16841fe85006SKamal Heib return idx; 16851fe85006SKamal Heib } 16861fe85006SKamal Heib 168796b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(channels) 16881fe85006SKamal Heib { 1689db05815bSMaxim Mikityanskiy bool is_xsk = priv->xsk.ever_used; 1690694826e3STariq Toukan int max_nch = priv->max_nch; 16911fe85006SKamal Heib int i, j, tc; 16921fe85006SKamal Heib 169305909babSEran Ben Elisha for (i = 0; i < max_nch; i++) 169457d689a8SEran Ben Elisha for (j = 0; j < NUM_CH_STATS; j++) 169557d689a8SEran Ben Elisha data[idx++] = 169605909babSEran Ben Elisha MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].ch, 169757d689a8SEran Ben Elisha ch_stats_desc, j); 169857d689a8SEran Ben Elisha 1699890388adSTariq Toukan for (i = 0; i < max_nch; i++) { 17001fe85006SKamal Heib for (j = 0; j < NUM_RQ_STATS; j++) 17011fe85006SKamal Heib data[idx++] = 170205909babSEran Ben Elisha MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].rq, 17031fe85006SKamal Heib rq_stats_desc, j); 1704db05815bSMaxim Mikityanskiy for (j = 0; j < NUM_XSKRQ_STATS * is_xsk; j++) 1705db05815bSMaxim Mikityanskiy data[idx++] = 1706db05815bSMaxim Mikityanskiy MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].xskrq, 1707db05815bSMaxim Mikityanskiy xskrq_stats_desc, j); 1708890388adSTariq Toukan for (j = 0; j < NUM_RQ_XDPSQ_STATS; j++) 1709890388adSTariq Toukan data[idx++] = 1710890388adSTariq Toukan MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].rq_xdpsq, 1711890388adSTariq Toukan rq_xdpsq_stats_desc, j); 1712890388adSTariq Toukan } 17131fe85006SKamal Heib 171405909babSEran Ben Elisha for (tc = 0; tc < priv->max_opened_tc; tc++) 171505909babSEran Ben Elisha for (i = 0; i < max_nch; i++) 17161fe85006SKamal Heib for (j = 0; j < NUM_SQ_STATS; j++) 17171fe85006SKamal Heib data[idx++] = 171805909babSEran Ben Elisha MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].sq[tc], 17191fe85006SKamal Heib sq_stats_desc, j); 17201fe85006SKamal Heib 1721db05815bSMaxim Mikityanskiy for (i = 0; i < max_nch; i++) { 1722db05815bSMaxim Mikityanskiy for (j = 0; j < NUM_XSKSQ_STATS * is_xsk; j++) 1723db05815bSMaxim Mikityanskiy data[idx++] = 1724db05815bSMaxim Mikityanskiy MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].xsksq, 1725db05815bSMaxim Mikityanskiy xsksq_stats_desc, j); 172658b99ee3STariq Toukan for (j = 0; j < NUM_XDPSQ_STATS; j++) 172758b99ee3STariq Toukan data[idx++] = 172858b99ee3STariq Toukan MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].xdpsq, 172958b99ee3STariq Toukan xdpsq_stats_desc, j); 1730db05815bSMaxim Mikityanskiy } 173158b99ee3STariq Toukan 17321fe85006SKamal Heib return idx; 17331fe85006SKamal Heib } 17341fe85006SKamal Heib 173596b12796SSaeed Mahameed static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(channels) { return; } 173696b12796SSaeed Mahameed 17372a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(sw, 0); 17382a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(qcnt, MLX5E_NDO_UPDATE_STATS); 17392a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(vnic_env, 0); 17402a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(vport, MLX5E_NDO_UPDATE_STATS); 17412a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(802_3, MLX5E_NDO_UPDATE_STATS); 17422a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(2863, 0); 17432a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(2819, 0); 17442a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(phy, 0); 17452a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(pcie, 0); 17462a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(per_prio, 0); 17472a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(pme, 0); 17482a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(channels, 0); 17492a303f13SSaeed Mahameed MLX5E_DEFINE_STATS_GRP(per_port_buff_congest, 0); 17507c453526SVlad Buslov MLX5E_DEFINE_STATS_GRP(eth_ext, 0); 1751f0ff8e8cSSaeed Mahameed static MLX5E_DEFINE_STATS_GRP(tls, 0); 1752f0ff8e8cSSaeed Mahameed 175319386177SKamal Heib /* The stats groups order is opposite to the update_stats() order calls */ 1754f0ff8e8cSSaeed Mahameed mlx5e_stats_grp_t mlx5e_nic_stats_grps[] = { 1755f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(sw), 1756f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(qcnt), 1757f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(vnic_env), 1758f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(vport), 1759f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(802_3), 1760f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(2863), 1761f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(2819), 1762f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(phy), 1763f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(eth_ext), 1764f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(pcie), 1765f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(per_prio), 1766f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(pme), 17670aab3e1bSRaed Salem #ifdef CONFIG_MLX5_EN_IPSEC 17680aab3e1bSRaed Salem &MLX5E_STATS_GRP(ipsec_sw), 17690aab3e1bSRaed Salem &MLX5E_STATS_GRP(ipsec_hw), 17700aab3e1bSRaed Salem #endif 1771f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(tls), 1772f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(channels), 1773f0ff8e8cSSaeed Mahameed &MLX5E_STATS_GRP(per_port_buff_congest), 1774c0752f2bSKamal Heib }; 1775c0752f2bSKamal Heib 17763460c184SSaeed Mahameed unsigned int mlx5e_nic_stats_grps_num(struct mlx5e_priv *priv) 17773460c184SSaeed Mahameed { 17783460c184SSaeed Mahameed return ARRAY_SIZE(mlx5e_nic_stats_grps); 17793460c184SSaeed Mahameed } 1780