1c0752f2bSKamal Heib /* 2c0752f2bSKamal Heib * Copyright (c) 2017, Mellanox Technologies, Ltd. All rights reserved. 3c0752f2bSKamal Heib * 4c0752f2bSKamal Heib * This software is available to you under a choice of one of two 5c0752f2bSKamal Heib * licenses. You may choose to be licensed under the terms of the GNU 6c0752f2bSKamal Heib * General Public License (GPL) Version 2, available from the file 7c0752f2bSKamal Heib * COPYING in the main directory of this source tree, or the 8c0752f2bSKamal Heib * OpenIB.org BSD license below: 9c0752f2bSKamal Heib * 10c0752f2bSKamal Heib * Redistribution and use in source and binary forms, with or 11c0752f2bSKamal Heib * without modification, are permitted provided that the following 12c0752f2bSKamal Heib * conditions are met: 13c0752f2bSKamal Heib * 14c0752f2bSKamal Heib * - Redistributions of source code must retain the above 15c0752f2bSKamal Heib * copyright notice, this list of conditions and the following 16c0752f2bSKamal Heib * disclaimer. 17c0752f2bSKamal Heib * 18c0752f2bSKamal Heib * - Redistributions in binary form must reproduce the above 19c0752f2bSKamal Heib * copyright notice, this list of conditions and the following 20c0752f2bSKamal Heib * disclaimer in the documentation and/or other materials 21c0752f2bSKamal Heib * provided with the distribution. 22c0752f2bSKamal Heib * 23c0752f2bSKamal Heib * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24c0752f2bSKamal Heib * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25c0752f2bSKamal Heib * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26c0752f2bSKamal Heib * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27c0752f2bSKamal Heib * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28c0752f2bSKamal Heib * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29c0752f2bSKamal Heib * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30c0752f2bSKamal Heib * SOFTWARE. 31c0752f2bSKamal Heib */ 32c0752f2bSKamal Heib 33c0752f2bSKamal Heib #include "en.h" 34e185d43fSKamal Heib #include "en_accel/ipsec.h" 3543585a41SIlya Lesokhin #include "en_accel/tls.h" 36c0752f2bSKamal Heib 37c0752f2bSKamal Heib static const struct counter_desc sw_stats_desc[] = { 38c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) }, 39c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) }, 40c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) }, 41c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) }, 42c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_packets) }, 43c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_bytes) }, 44c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_packets) }, 45c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_bytes) }, 46f24686e8SGal Pressman { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_added_vlan_packets) }, 472ad9ecdbSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_nop) }, 48bf239741SIlya Lesokhin 49bf239741SIlya Lesokhin #ifdef CONFIG_MLX5_EN_TLS 50bf239741SIlya Lesokhin { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_ooo) }, 51bf239741SIlya Lesokhin { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_resync_bytes) }, 52bf239741SIlya Lesokhin #endif 53bf239741SIlya Lesokhin 54c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_packets) }, 55c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_bytes) }, 56f007c13dSNatali Shechtman { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_ecn_mark) }, 57f24686e8SGal Pressman { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_removed_vlan_packets) }, 58c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary) }, 59c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_none) }, 60c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete) }, 61c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary_inner) }, 62c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_drop) }, 6386690b4bSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_redirect) }, 64890388adSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_xmit) }, 65c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_full) }, 66890388adSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_err) }, 67890388adSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_cqe) }, 68c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_none) }, 69c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial) }, 70c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial_inner) }, 71c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_stopped) }, 72c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_dropped) }, 73c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xmit_more) }, 74db75373cSEran Ben Elisha { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_recover) }, 7586155656STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_cqes) }, 76f65a59ffSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_wake) }, 77bc5a7ccdSBoris Pismenny { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_udp_seg_rem) }, 78f65a59ffSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_cqe_err) }, 7958b99ee3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_xmit) }, 8058b99ee3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_full) }, 8158b99ee3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_err) }, 8258b99ee3STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xdp_cqes) }, 83c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_wqe_err) }, 84b71ba6b4STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler_cqes) }, 85b71ba6b4STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler_strides) }, 86c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_buff_alloc_err) }, 87c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_blks) }, 88c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_pkts) }, 89c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_page_reuse) }, 90c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_reuse) }, 91c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_full) }, 92c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_empty) }, 93c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_busy) }, 94c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_waive) }, 95dc983f0eSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_congst_umr) }, 9694563847SEran Ben Elisha { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_arfs_err) }, 97a1bf74dcSTariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_events) }, 982d7103c8STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_poll) }, 992d7103c8STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_arm) }, 1002d7103c8STariq Toukan { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_aff_change) }, 10157d689a8SEran Ben Elisha { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_eq_rearm) }, 102c0752f2bSKamal Heib }; 103c0752f2bSKamal Heib 104c0752f2bSKamal Heib #define NUM_SW_COUNTERS ARRAY_SIZE(sw_stats_desc) 105c0752f2bSKamal Heib 106c0752f2bSKamal Heib static int mlx5e_grp_sw_get_num_stats(struct mlx5e_priv *priv) 107c0752f2bSKamal Heib { 108c0752f2bSKamal Heib return NUM_SW_COUNTERS; 109c0752f2bSKamal Heib } 110c0752f2bSKamal Heib 111c0752f2bSKamal Heib static int mlx5e_grp_sw_fill_strings(struct mlx5e_priv *priv, u8 *data, int idx) 112c0752f2bSKamal Heib { 113c0752f2bSKamal Heib int i; 114c0752f2bSKamal Heib 115c0752f2bSKamal Heib for (i = 0; i < NUM_SW_COUNTERS; i++) 116c0752f2bSKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format); 117c0752f2bSKamal Heib return idx; 118c0752f2bSKamal Heib } 119c0752f2bSKamal Heib 120c0752f2bSKamal Heib static int mlx5e_grp_sw_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx) 121c0752f2bSKamal Heib { 122c0752f2bSKamal Heib int i; 123c0752f2bSKamal Heib 124c0752f2bSKamal Heib for (i = 0; i < NUM_SW_COUNTERS; i++) 125c0752f2bSKamal Heib data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw, sw_stats_desc, i); 126c0752f2bSKamal Heib return idx; 127c0752f2bSKamal Heib } 128c0752f2bSKamal Heib 129868a01a2SShalom Lagziel void mlx5e_grp_sw_update_stats(struct mlx5e_priv *priv) 13019386177SKamal Heib { 13119386177SKamal Heib struct mlx5e_sw_stats temp, *s = &temp; 13205909babSEran Ben Elisha int i; 13319386177SKamal Heib 13419386177SKamal Heib memset(s, 0, sizeof(*s)); 13519386177SKamal Heib 13605909babSEran Ben Elisha for (i = 0; i < priv->profile->max_nch(priv->mdev); i++) { 13705909babSEran Ben Elisha struct mlx5e_channel_stats *channel_stats = 13805909babSEran Ben Elisha &priv->channel_stats[i]; 13958b99ee3STariq Toukan struct mlx5e_xdpsq_stats *xdpsq_red_stats = &channel_stats->xdpsq; 140890388adSTariq Toukan struct mlx5e_xdpsq_stats *xdpsq_stats = &channel_stats->rq_xdpsq; 14105909babSEran Ben Elisha struct mlx5e_rq_stats *rq_stats = &channel_stats->rq; 14205909babSEran Ben Elisha struct mlx5e_ch_stats *ch_stats = &channel_stats->ch; 14305909babSEran Ben Elisha int j; 14419386177SKamal Heib 14519386177SKamal Heib s->rx_packets += rq_stats->packets; 14619386177SKamal Heib s->rx_bytes += rq_stats->bytes; 14719386177SKamal Heib s->rx_lro_packets += rq_stats->lro_packets; 14819386177SKamal Heib s->rx_lro_bytes += rq_stats->lro_bytes; 149f007c13dSNatali Shechtman s->rx_ecn_mark += rq_stats->ecn_mark; 15019386177SKamal Heib s->rx_removed_vlan_packets += rq_stats->removed_vlan_packets; 15119386177SKamal Heib s->rx_csum_none += rq_stats->csum_none; 15219386177SKamal Heib s->rx_csum_complete += rq_stats->csum_complete; 15319386177SKamal Heib s->rx_csum_unnecessary += rq_stats->csum_unnecessary; 15419386177SKamal Heib s->rx_csum_unnecessary_inner += rq_stats->csum_unnecessary_inner; 15519386177SKamal Heib s->rx_xdp_drop += rq_stats->xdp_drop; 15686690b4bSTariq Toukan s->rx_xdp_redirect += rq_stats->xdp_redirect; 157890388adSTariq Toukan s->rx_xdp_tx_xmit += xdpsq_stats->xmit; 158890388adSTariq Toukan s->rx_xdp_tx_full += xdpsq_stats->full; 159890388adSTariq Toukan s->rx_xdp_tx_err += xdpsq_stats->err; 160890388adSTariq Toukan s->rx_xdp_tx_cqe += xdpsq_stats->cqes; 16119386177SKamal Heib s->rx_wqe_err += rq_stats->wqe_err; 162b71ba6b4STariq Toukan s->rx_mpwqe_filler_cqes += rq_stats->mpwqe_filler_cqes; 163b71ba6b4STariq Toukan s->rx_mpwqe_filler_strides += rq_stats->mpwqe_filler_strides; 16419386177SKamal Heib s->rx_buff_alloc_err += rq_stats->buff_alloc_err; 16519386177SKamal Heib s->rx_cqe_compress_blks += rq_stats->cqe_compress_blks; 16619386177SKamal Heib s->rx_cqe_compress_pkts += rq_stats->cqe_compress_pkts; 16719386177SKamal Heib s->rx_page_reuse += rq_stats->page_reuse; 16819386177SKamal Heib s->rx_cache_reuse += rq_stats->cache_reuse; 16919386177SKamal Heib s->rx_cache_full += rq_stats->cache_full; 17019386177SKamal Heib s->rx_cache_empty += rq_stats->cache_empty; 17119386177SKamal Heib s->rx_cache_busy += rq_stats->cache_busy; 17219386177SKamal Heib s->rx_cache_waive += rq_stats->cache_waive; 173dc983f0eSTariq Toukan s->rx_congst_umr += rq_stats->congst_umr; 17494563847SEran Ben Elisha s->rx_arfs_err += rq_stats->arfs_err; 175a1bf74dcSTariq Toukan s->ch_events += ch_stats->events; 1762d7103c8STariq Toukan s->ch_poll += ch_stats->poll; 1772d7103c8STariq Toukan s->ch_arm += ch_stats->arm; 1782d7103c8STariq Toukan s->ch_aff_change += ch_stats->aff_change; 17919386177SKamal Heib s->ch_eq_rearm += ch_stats->eq_rearm; 18058b99ee3STariq Toukan /* xdp redirect */ 18158b99ee3STariq Toukan s->tx_xdp_xmit += xdpsq_red_stats->xmit; 18258b99ee3STariq Toukan s->tx_xdp_full += xdpsq_red_stats->full; 18358b99ee3STariq Toukan s->tx_xdp_err += xdpsq_red_stats->err; 18458b99ee3STariq Toukan s->tx_xdp_cqes += xdpsq_red_stats->cqes; 18519386177SKamal Heib 18605909babSEran Ben Elisha for (j = 0; j < priv->max_opened_tc; j++) { 18705909babSEran Ben Elisha struct mlx5e_sq_stats *sq_stats = &channel_stats->sq[j]; 18819386177SKamal Heib 18919386177SKamal Heib s->tx_packets += sq_stats->packets; 19019386177SKamal Heib s->tx_bytes += sq_stats->bytes; 19119386177SKamal Heib s->tx_tso_packets += sq_stats->tso_packets; 19219386177SKamal Heib s->tx_tso_bytes += sq_stats->tso_bytes; 19319386177SKamal Heib s->tx_tso_inner_packets += sq_stats->tso_inner_packets; 19419386177SKamal Heib s->tx_tso_inner_bytes += sq_stats->tso_inner_bytes; 19519386177SKamal Heib s->tx_added_vlan_packets += sq_stats->added_vlan_packets; 1962ad9ecdbSTariq Toukan s->tx_nop += sq_stats->nop; 19719386177SKamal Heib s->tx_queue_stopped += sq_stats->stopped; 19819386177SKamal Heib s->tx_queue_wake += sq_stats->wake; 199bc5a7ccdSBoris Pismenny s->tx_udp_seg_rem += sq_stats->udp_seg_rem; 20019386177SKamal Heib s->tx_queue_dropped += sq_stats->dropped; 20116cc14d8SEran Ben Elisha s->tx_cqe_err += sq_stats->cqe_err; 202db75373cSEran Ben Elisha s->tx_recover += sq_stats->recover; 20319386177SKamal Heib s->tx_xmit_more += sq_stats->xmit_more; 20419386177SKamal Heib s->tx_csum_partial_inner += sq_stats->csum_partial_inner; 20519386177SKamal Heib s->tx_csum_none += sq_stats->csum_none; 20619386177SKamal Heib s->tx_csum_partial += sq_stats->csum_partial; 207bf239741SIlya Lesokhin #ifdef CONFIG_MLX5_EN_TLS 208bf239741SIlya Lesokhin s->tx_tls_ooo += sq_stats->tls_ooo; 209bf239741SIlya Lesokhin s->tx_tls_resync_bytes += sq_stats->tls_resync_bytes; 210bf239741SIlya Lesokhin #endif 21186155656STariq Toukan s->tx_cqes += sq_stats->cqes; 21219386177SKamal Heib } 21319386177SKamal Heib } 21419386177SKamal Heib 21519386177SKamal Heib memcpy(&priv->stats.sw, s, sizeof(*s)); 21619386177SKamal Heib } 21719386177SKamal Heib 218fd8dcdb8SKamal Heib static const struct counter_desc q_stats_desc[] = { 219fd8dcdb8SKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_out_of_buffer) }, 220fd8dcdb8SKamal Heib }; 221fd8dcdb8SKamal Heib 2227cbaf9a3SMoshe Shemesh static const struct counter_desc drop_rq_stats_desc[] = { 2237cbaf9a3SMoshe Shemesh { MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_if_down_packets) }, 2247cbaf9a3SMoshe Shemesh }; 2257cbaf9a3SMoshe Shemesh 226fd8dcdb8SKamal Heib #define NUM_Q_COUNTERS ARRAY_SIZE(q_stats_desc) 2277cbaf9a3SMoshe Shemesh #define NUM_DROP_RQ_COUNTERS ARRAY_SIZE(drop_rq_stats_desc) 228fd8dcdb8SKamal Heib 229fd8dcdb8SKamal Heib static int mlx5e_grp_q_get_num_stats(struct mlx5e_priv *priv) 230fd8dcdb8SKamal Heib { 2317cbaf9a3SMoshe Shemesh int num_stats = 0; 2327cbaf9a3SMoshe Shemesh 2337cbaf9a3SMoshe Shemesh if (priv->q_counter) 2347cbaf9a3SMoshe Shemesh num_stats += NUM_Q_COUNTERS; 2357cbaf9a3SMoshe Shemesh 2367cbaf9a3SMoshe Shemesh if (priv->drop_rq_q_counter) 2377cbaf9a3SMoshe Shemesh num_stats += NUM_DROP_RQ_COUNTERS; 2387cbaf9a3SMoshe Shemesh 2397cbaf9a3SMoshe Shemesh return num_stats; 240fd8dcdb8SKamal Heib } 241fd8dcdb8SKamal Heib 242fd8dcdb8SKamal Heib static int mlx5e_grp_q_fill_strings(struct mlx5e_priv *priv, u8 *data, int idx) 243fd8dcdb8SKamal Heib { 244fd8dcdb8SKamal Heib int i; 245fd8dcdb8SKamal Heib 246fd8dcdb8SKamal Heib for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++) 2477cbaf9a3SMoshe Shemesh strcpy(data + (idx++) * ETH_GSTRING_LEN, 2487cbaf9a3SMoshe Shemesh q_stats_desc[i].format); 2497cbaf9a3SMoshe Shemesh 2507cbaf9a3SMoshe Shemesh for (i = 0; i < NUM_DROP_RQ_COUNTERS && priv->drop_rq_q_counter; i++) 2517cbaf9a3SMoshe Shemesh strcpy(data + (idx++) * ETH_GSTRING_LEN, 2527cbaf9a3SMoshe Shemesh drop_rq_stats_desc[i].format); 2537cbaf9a3SMoshe Shemesh 254fd8dcdb8SKamal Heib return idx; 255fd8dcdb8SKamal Heib } 256fd8dcdb8SKamal Heib 257fd8dcdb8SKamal Heib static int mlx5e_grp_q_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx) 258fd8dcdb8SKamal Heib { 259fd8dcdb8SKamal Heib int i; 260fd8dcdb8SKamal Heib 261fd8dcdb8SKamal Heib for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++) 2627cbaf9a3SMoshe Shemesh data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt, 2637cbaf9a3SMoshe Shemesh q_stats_desc, i); 2647cbaf9a3SMoshe Shemesh for (i = 0; i < NUM_DROP_RQ_COUNTERS && priv->drop_rq_q_counter; i++) 2657cbaf9a3SMoshe Shemesh data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt, 2667cbaf9a3SMoshe Shemesh drop_rq_stats_desc, i); 267fd8dcdb8SKamal Heib return idx; 268fd8dcdb8SKamal Heib } 269fd8dcdb8SKamal Heib 27019386177SKamal Heib static void mlx5e_grp_q_update_stats(struct mlx5e_priv *priv) 27119386177SKamal Heib { 27219386177SKamal Heib struct mlx5e_qcounter_stats *qcnt = &priv->stats.qcnt; 27319386177SKamal Heib u32 out[MLX5_ST_SZ_DW(query_q_counter_out)]; 27419386177SKamal Heib 2757cbaf9a3SMoshe Shemesh if (priv->q_counter && 2767cbaf9a3SMoshe Shemesh !mlx5_core_query_q_counter(priv->mdev, priv->q_counter, 0, out, 2777cbaf9a3SMoshe Shemesh sizeof(out))) 2787cbaf9a3SMoshe Shemesh qcnt->rx_out_of_buffer = MLX5_GET(query_q_counter_out, 2797cbaf9a3SMoshe Shemesh out, out_of_buffer); 2807cbaf9a3SMoshe Shemesh if (priv->drop_rq_q_counter && 2817cbaf9a3SMoshe Shemesh !mlx5_core_query_q_counter(priv->mdev, priv->drop_rq_q_counter, 0, 2827cbaf9a3SMoshe Shemesh out, sizeof(out))) 2837cbaf9a3SMoshe Shemesh qcnt->rx_if_down_packets = MLX5_GET(query_q_counter_out, out, 2847cbaf9a3SMoshe Shemesh out_of_buffer); 28519386177SKamal Heib } 28619386177SKamal Heib 2875c298143SMoshe Shemesh #define VNIC_ENV_OFF(c) MLX5_BYTE_OFF(query_vnic_env_out, c) 2885c298143SMoshe Shemesh static const struct counter_desc vnic_env_stats_desc[] = { 2895c298143SMoshe Shemesh { "rx_steer_missed_packets", 2905c298143SMoshe Shemesh VNIC_ENV_OFF(vport_env.nic_receive_steering_discard) }, 2915c298143SMoshe Shemesh }; 2925c298143SMoshe Shemesh 2935c298143SMoshe Shemesh #define NUM_VNIC_ENV_COUNTERS ARRAY_SIZE(vnic_env_stats_desc) 2945c298143SMoshe Shemesh 2955c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_get_num_stats(struct mlx5e_priv *priv) 2965c298143SMoshe Shemesh { 2975c298143SMoshe Shemesh return MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard) ? 2985c298143SMoshe Shemesh NUM_VNIC_ENV_COUNTERS : 0; 2995c298143SMoshe Shemesh } 3005c298143SMoshe Shemesh 3015c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_fill_strings(struct mlx5e_priv *priv, u8 *data, 3025c298143SMoshe Shemesh int idx) 3035c298143SMoshe Shemesh { 3045c298143SMoshe Shemesh int i; 3055c298143SMoshe Shemesh 3065c298143SMoshe Shemesh if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) 3075c298143SMoshe Shemesh return idx; 3085c298143SMoshe Shemesh 3095c298143SMoshe Shemesh for (i = 0; i < NUM_VNIC_ENV_COUNTERS; i++) 3105c298143SMoshe Shemesh strcpy(data + (idx++) * ETH_GSTRING_LEN, 3115c298143SMoshe Shemesh vnic_env_stats_desc[i].format); 3125c298143SMoshe Shemesh return idx; 3135c298143SMoshe Shemesh } 3145c298143SMoshe Shemesh 3155c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_fill_stats(struct mlx5e_priv *priv, u64 *data, 3165c298143SMoshe Shemesh int idx) 3175c298143SMoshe Shemesh { 3185c298143SMoshe Shemesh int i; 3195c298143SMoshe Shemesh 3205c298143SMoshe Shemesh if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) 3215c298143SMoshe Shemesh return idx; 3225c298143SMoshe Shemesh 3235c298143SMoshe Shemesh for (i = 0; i < NUM_VNIC_ENV_COUNTERS; i++) 3245c298143SMoshe Shemesh data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vnic.query_vnic_env_out, 3255c298143SMoshe Shemesh vnic_env_stats_desc, i); 3265c298143SMoshe Shemesh return idx; 3275c298143SMoshe Shemesh } 3285c298143SMoshe Shemesh 3295c298143SMoshe Shemesh static void mlx5e_grp_vnic_env_update_stats(struct mlx5e_priv *priv) 3305c298143SMoshe Shemesh { 3315c298143SMoshe Shemesh u32 *out = (u32 *)priv->stats.vnic.query_vnic_env_out; 3325c298143SMoshe Shemesh int outlen = MLX5_ST_SZ_BYTES(query_vnic_env_out); 3335c298143SMoshe Shemesh u32 in[MLX5_ST_SZ_DW(query_vnic_env_in)] = {0}; 3345c298143SMoshe Shemesh struct mlx5_core_dev *mdev = priv->mdev; 3355c298143SMoshe Shemesh 3365c298143SMoshe Shemesh if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) 3375c298143SMoshe Shemesh return; 3385c298143SMoshe Shemesh 3395c298143SMoshe Shemesh MLX5_SET(query_vnic_env_in, in, opcode, 3405c298143SMoshe Shemesh MLX5_CMD_OP_QUERY_VNIC_ENV); 3415c298143SMoshe Shemesh MLX5_SET(query_vnic_env_in, in, op_mod, 0); 3425c298143SMoshe Shemesh MLX5_SET(query_vnic_env_in, in, other_vport, 0); 3435c298143SMoshe Shemesh mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen); 3445c298143SMoshe Shemesh } 3455c298143SMoshe Shemesh 34640cab9f1SKamal Heib #define VPORT_COUNTER_OFF(c) MLX5_BYTE_OFF(query_vport_counter_out, c) 34740cab9f1SKamal Heib static const struct counter_desc vport_stats_desc[] = { 34840cab9f1SKamal Heib { "rx_vport_unicast_packets", 34940cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_unicast.packets) }, 35040cab9f1SKamal Heib { "rx_vport_unicast_bytes", 35140cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_unicast.octets) }, 35240cab9f1SKamal Heib { "tx_vport_unicast_packets", 35340cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_unicast.packets) }, 35440cab9f1SKamal Heib { "tx_vport_unicast_bytes", 35540cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_unicast.octets) }, 35640cab9f1SKamal Heib { "rx_vport_multicast_packets", 35740cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_multicast.packets) }, 35840cab9f1SKamal Heib { "rx_vport_multicast_bytes", 35940cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_multicast.octets) }, 36040cab9f1SKamal Heib { "tx_vport_multicast_packets", 36140cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_multicast.packets) }, 36240cab9f1SKamal Heib { "tx_vport_multicast_bytes", 36340cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_multicast.octets) }, 36440cab9f1SKamal Heib { "rx_vport_broadcast_packets", 36540cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_broadcast.packets) }, 36640cab9f1SKamal Heib { "rx_vport_broadcast_bytes", 36740cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_broadcast.octets) }, 36840cab9f1SKamal Heib { "tx_vport_broadcast_packets", 36940cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_broadcast.packets) }, 37040cab9f1SKamal Heib { "tx_vport_broadcast_bytes", 37140cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_broadcast.octets) }, 37240cab9f1SKamal Heib { "rx_vport_rdma_unicast_packets", 37340cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_unicast.packets) }, 37440cab9f1SKamal Heib { "rx_vport_rdma_unicast_bytes", 37540cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_unicast.octets) }, 37640cab9f1SKamal Heib { "tx_vport_rdma_unicast_packets", 37740cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_unicast.packets) }, 37840cab9f1SKamal Heib { "tx_vport_rdma_unicast_bytes", 37940cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_unicast.octets) }, 38040cab9f1SKamal Heib { "rx_vport_rdma_multicast_packets", 38140cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_multicast.packets) }, 38240cab9f1SKamal Heib { "rx_vport_rdma_multicast_bytes", 38340cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_multicast.octets) }, 38440cab9f1SKamal Heib { "tx_vport_rdma_multicast_packets", 38540cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_multicast.packets) }, 38640cab9f1SKamal Heib { "tx_vport_rdma_multicast_bytes", 38740cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_multicast.octets) }, 38840cab9f1SKamal Heib }; 38940cab9f1SKamal Heib 39040cab9f1SKamal Heib #define NUM_VPORT_COUNTERS ARRAY_SIZE(vport_stats_desc) 39140cab9f1SKamal Heib 39240cab9f1SKamal Heib static int mlx5e_grp_vport_get_num_stats(struct mlx5e_priv *priv) 39340cab9f1SKamal Heib { 39440cab9f1SKamal Heib return NUM_VPORT_COUNTERS; 39540cab9f1SKamal Heib } 39640cab9f1SKamal Heib 39740cab9f1SKamal Heib static int mlx5e_grp_vport_fill_strings(struct mlx5e_priv *priv, u8 *data, 39840cab9f1SKamal Heib int idx) 39940cab9f1SKamal Heib { 40040cab9f1SKamal Heib int i; 40140cab9f1SKamal Heib 40240cab9f1SKamal Heib for (i = 0; i < NUM_VPORT_COUNTERS; i++) 40340cab9f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, vport_stats_desc[i].format); 40440cab9f1SKamal Heib return idx; 40540cab9f1SKamal Heib } 40640cab9f1SKamal Heib 40740cab9f1SKamal Heib static int mlx5e_grp_vport_fill_stats(struct mlx5e_priv *priv, u64 *data, 40840cab9f1SKamal Heib int idx) 40940cab9f1SKamal Heib { 41040cab9f1SKamal Heib int i; 41140cab9f1SKamal Heib 41240cab9f1SKamal Heib for (i = 0; i < NUM_VPORT_COUNTERS; i++) 41340cab9f1SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out, 41440cab9f1SKamal Heib vport_stats_desc, i); 41540cab9f1SKamal Heib return idx; 41640cab9f1SKamal Heib } 41740cab9f1SKamal Heib 41819386177SKamal Heib static void mlx5e_grp_vport_update_stats(struct mlx5e_priv *priv) 41919386177SKamal Heib { 42019386177SKamal Heib int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out); 42119386177SKamal Heib u32 *out = (u32 *)priv->stats.vport.query_vport_out; 42219386177SKamal Heib u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {0}; 42319386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 42419386177SKamal Heib 42519386177SKamal Heib MLX5_SET(query_vport_counter_in, in, opcode, MLX5_CMD_OP_QUERY_VPORT_COUNTER); 42619386177SKamal Heib MLX5_SET(query_vport_counter_in, in, op_mod, 0); 42719386177SKamal Heib MLX5_SET(query_vport_counter_in, in, other_vport, 0); 42819386177SKamal Heib mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen); 42919386177SKamal Heib } 43019386177SKamal Heib 4316e6ef814SKamal Heib #define PPORT_802_3_OFF(c) \ 4326e6ef814SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 4336e6ef814SKamal Heib counter_set.eth_802_3_cntrs_grp_data_layout.c##_high) 4346e6ef814SKamal Heib static const struct counter_desc pport_802_3_stats_desc[] = { 4356e6ef814SKamal Heib { "tx_packets_phy", PPORT_802_3_OFF(a_frames_transmitted_ok) }, 4366e6ef814SKamal Heib { "rx_packets_phy", PPORT_802_3_OFF(a_frames_received_ok) }, 4376e6ef814SKamal Heib { "rx_crc_errors_phy", PPORT_802_3_OFF(a_frame_check_sequence_errors) }, 4386e6ef814SKamal Heib { "tx_bytes_phy", PPORT_802_3_OFF(a_octets_transmitted_ok) }, 4396e6ef814SKamal Heib { "rx_bytes_phy", PPORT_802_3_OFF(a_octets_received_ok) }, 4406e6ef814SKamal Heib { "tx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_xmitted_ok) }, 4416e6ef814SKamal Heib { "tx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_xmitted_ok) }, 4426e6ef814SKamal Heib { "rx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_received_ok) }, 4436e6ef814SKamal Heib { "rx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_received_ok) }, 4446e6ef814SKamal Heib { "rx_in_range_len_errors_phy", PPORT_802_3_OFF(a_in_range_length_errors) }, 4456e6ef814SKamal Heib { "rx_out_of_range_len_phy", PPORT_802_3_OFF(a_out_of_range_length_field) }, 4466e6ef814SKamal Heib { "rx_oversize_pkts_phy", PPORT_802_3_OFF(a_frame_too_long_errors) }, 4476e6ef814SKamal Heib { "rx_symbol_err_phy", PPORT_802_3_OFF(a_symbol_error_during_carrier) }, 4486e6ef814SKamal Heib { "tx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_transmitted) }, 4496e6ef814SKamal Heib { "rx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_received) }, 4506e6ef814SKamal Heib { "rx_unsupported_op_phy", PPORT_802_3_OFF(a_unsupported_opcodes_received) }, 4516e6ef814SKamal Heib { "rx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_received) }, 4526e6ef814SKamal Heib { "tx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_transmitted) }, 4536e6ef814SKamal Heib }; 4546e6ef814SKamal Heib 4556e6ef814SKamal Heib #define NUM_PPORT_802_3_COUNTERS ARRAY_SIZE(pport_802_3_stats_desc) 4566e6ef814SKamal Heib 4576e6ef814SKamal Heib static int mlx5e_grp_802_3_get_num_stats(struct mlx5e_priv *priv) 4586e6ef814SKamal Heib { 4596e6ef814SKamal Heib return NUM_PPORT_802_3_COUNTERS; 4606e6ef814SKamal Heib } 4616e6ef814SKamal Heib 4626e6ef814SKamal Heib static int mlx5e_grp_802_3_fill_strings(struct mlx5e_priv *priv, u8 *data, 4636e6ef814SKamal Heib int idx) 4646e6ef814SKamal Heib { 4656e6ef814SKamal Heib int i; 4666e6ef814SKamal Heib 4676e6ef814SKamal Heib for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++) 4686e6ef814SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_802_3_stats_desc[i].format); 4696e6ef814SKamal Heib return idx; 4706e6ef814SKamal Heib } 4716e6ef814SKamal Heib 4726e6ef814SKamal Heib static int mlx5e_grp_802_3_fill_stats(struct mlx5e_priv *priv, u64 *data, 4736e6ef814SKamal Heib int idx) 4746e6ef814SKamal Heib { 4756e6ef814SKamal Heib int i; 4766e6ef814SKamal Heib 4776e6ef814SKamal Heib for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++) 4786e6ef814SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters, 4796e6ef814SKamal Heib pport_802_3_stats_desc, i); 4806e6ef814SKamal Heib return idx; 4816e6ef814SKamal Heib } 4826e6ef814SKamal Heib 48319386177SKamal Heib static void mlx5e_grp_802_3_update_stats(struct mlx5e_priv *priv) 48419386177SKamal Heib { 48519386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 48619386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 48719386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 48819386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 48919386177SKamal Heib void *out; 49019386177SKamal Heib 49119386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 49219386177SKamal Heib out = pstats->IEEE_802_3_counters; 49319386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_IEEE_802_3_COUNTERS_GROUP); 49419386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 49519386177SKamal Heib } 49619386177SKamal Heib 497fc8e64a3SKamal Heib #define PPORT_2863_OFF(c) \ 498fc8e64a3SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 499fc8e64a3SKamal Heib counter_set.eth_2863_cntrs_grp_data_layout.c##_high) 500fc8e64a3SKamal Heib static const struct counter_desc pport_2863_stats_desc[] = { 501fc8e64a3SKamal Heib { "rx_discards_phy", PPORT_2863_OFF(if_in_discards) }, 502fc8e64a3SKamal Heib { "tx_discards_phy", PPORT_2863_OFF(if_out_discards) }, 503fc8e64a3SKamal Heib { "tx_errors_phy", PPORT_2863_OFF(if_out_errors) }, 504fc8e64a3SKamal Heib }; 505fc8e64a3SKamal Heib 506fc8e64a3SKamal Heib #define NUM_PPORT_2863_COUNTERS ARRAY_SIZE(pport_2863_stats_desc) 507fc8e64a3SKamal Heib 508fc8e64a3SKamal Heib static int mlx5e_grp_2863_get_num_stats(struct mlx5e_priv *priv) 509fc8e64a3SKamal Heib { 510fc8e64a3SKamal Heib return NUM_PPORT_2863_COUNTERS; 511fc8e64a3SKamal Heib } 512fc8e64a3SKamal Heib 513fc8e64a3SKamal Heib static int mlx5e_grp_2863_fill_strings(struct mlx5e_priv *priv, u8 *data, 514fc8e64a3SKamal Heib int idx) 515fc8e64a3SKamal Heib { 516fc8e64a3SKamal Heib int i; 517fc8e64a3SKamal Heib 518fc8e64a3SKamal Heib for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++) 519fc8e64a3SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2863_stats_desc[i].format); 520fc8e64a3SKamal Heib return idx; 521fc8e64a3SKamal Heib } 522fc8e64a3SKamal Heib 523fc8e64a3SKamal Heib static int mlx5e_grp_2863_fill_stats(struct mlx5e_priv *priv, u64 *data, 524fc8e64a3SKamal Heib int idx) 525fc8e64a3SKamal Heib { 526fc8e64a3SKamal Heib int i; 527fc8e64a3SKamal Heib 528fc8e64a3SKamal Heib for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++) 529fc8e64a3SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters, 530fc8e64a3SKamal Heib pport_2863_stats_desc, i); 531fc8e64a3SKamal Heib return idx; 532fc8e64a3SKamal Heib } 533fc8e64a3SKamal Heib 53419386177SKamal Heib static void mlx5e_grp_2863_update_stats(struct mlx5e_priv *priv) 53519386177SKamal Heib { 53619386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 53719386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 53819386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 53919386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 54019386177SKamal Heib void *out; 54119386177SKamal Heib 54219386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 54319386177SKamal Heib out = pstats->RFC_2863_counters; 54419386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2863_COUNTERS_GROUP); 54519386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 54619386177SKamal Heib } 54719386177SKamal Heib 548e0e0def9SKamal Heib #define PPORT_2819_OFF(c) \ 549e0e0def9SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 550e0e0def9SKamal Heib counter_set.eth_2819_cntrs_grp_data_layout.c##_high) 551e0e0def9SKamal Heib static const struct counter_desc pport_2819_stats_desc[] = { 552e0e0def9SKamal Heib { "rx_undersize_pkts_phy", PPORT_2819_OFF(ether_stats_undersize_pkts) }, 553e0e0def9SKamal Heib { "rx_fragments_phy", PPORT_2819_OFF(ether_stats_fragments) }, 554e0e0def9SKamal Heib { "rx_jabbers_phy", PPORT_2819_OFF(ether_stats_jabbers) }, 555e0e0def9SKamal Heib { "rx_64_bytes_phy", PPORT_2819_OFF(ether_stats_pkts64octets) }, 556e0e0def9SKamal Heib { "rx_65_to_127_bytes_phy", PPORT_2819_OFF(ether_stats_pkts65to127octets) }, 557e0e0def9SKamal Heib { "rx_128_to_255_bytes_phy", PPORT_2819_OFF(ether_stats_pkts128to255octets) }, 558e0e0def9SKamal Heib { "rx_256_to_511_bytes_phy", PPORT_2819_OFF(ether_stats_pkts256to511octets) }, 559e0e0def9SKamal Heib { "rx_512_to_1023_bytes_phy", PPORT_2819_OFF(ether_stats_pkts512to1023octets) }, 560e0e0def9SKamal Heib { "rx_1024_to_1518_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1024to1518octets) }, 561e0e0def9SKamal Heib { "rx_1519_to_2047_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1519to2047octets) }, 562e0e0def9SKamal Heib { "rx_2048_to_4095_bytes_phy", PPORT_2819_OFF(ether_stats_pkts2048to4095octets) }, 563e0e0def9SKamal Heib { "rx_4096_to_8191_bytes_phy", PPORT_2819_OFF(ether_stats_pkts4096to8191octets) }, 564e0e0def9SKamal Heib { "rx_8192_to_10239_bytes_phy", PPORT_2819_OFF(ether_stats_pkts8192to10239octets) }, 565e0e0def9SKamal Heib }; 566e0e0def9SKamal Heib 567e0e0def9SKamal Heib #define NUM_PPORT_2819_COUNTERS ARRAY_SIZE(pport_2819_stats_desc) 568e0e0def9SKamal Heib 569e0e0def9SKamal Heib static int mlx5e_grp_2819_get_num_stats(struct mlx5e_priv *priv) 570e0e0def9SKamal Heib { 571e0e0def9SKamal Heib return NUM_PPORT_2819_COUNTERS; 572e0e0def9SKamal Heib } 573e0e0def9SKamal Heib 574e0e0def9SKamal Heib static int mlx5e_grp_2819_fill_strings(struct mlx5e_priv *priv, u8 *data, 575e0e0def9SKamal Heib int idx) 576e0e0def9SKamal Heib { 577e0e0def9SKamal Heib int i; 578e0e0def9SKamal Heib 579e0e0def9SKamal Heib for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++) 580e0e0def9SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2819_stats_desc[i].format); 581e0e0def9SKamal Heib return idx; 582e0e0def9SKamal Heib } 583e0e0def9SKamal Heib 584e0e0def9SKamal Heib static int mlx5e_grp_2819_fill_stats(struct mlx5e_priv *priv, u64 *data, 585e0e0def9SKamal Heib int idx) 586e0e0def9SKamal Heib { 587e0e0def9SKamal Heib int i; 588e0e0def9SKamal Heib 589e0e0def9SKamal Heib for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++) 590e0e0def9SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters, 591e0e0def9SKamal Heib pport_2819_stats_desc, i); 592e0e0def9SKamal Heib return idx; 593e0e0def9SKamal Heib } 594e0e0def9SKamal Heib 59519386177SKamal Heib static void mlx5e_grp_2819_update_stats(struct mlx5e_priv *priv) 59619386177SKamal Heib { 59719386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 59819386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 59919386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 60019386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 60119386177SKamal Heib void *out; 60219386177SKamal Heib 60319386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 60419386177SKamal Heib out = pstats->RFC_2819_counters; 60519386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2819_COUNTERS_GROUP); 60619386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 60719386177SKamal Heib } 60819386177SKamal Heib 6092e4df0b2SKamal Heib #define PPORT_PHY_STATISTICAL_OFF(c) \ 6102e4df0b2SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 6112e4df0b2SKamal Heib counter_set.phys_layer_statistical_cntrs.c##_high) 6122e4df0b2SKamal Heib static const struct counter_desc pport_phy_statistical_stats_desc[] = { 6132e4df0b2SKamal Heib { "rx_pcs_symbol_err_phy", PPORT_PHY_STATISTICAL_OFF(phy_symbol_errors) }, 6142e4df0b2SKamal Heib { "rx_corrected_bits_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits) }, 6152e4df0b2SKamal Heib }; 6162e4df0b2SKamal Heib 6176ab75516SSaeed Mahameed #define NUM_PPORT_PHY_STATISTICAL_COUNTERS ARRAY_SIZE(pport_phy_statistical_stats_desc) 6182e4df0b2SKamal Heib 6192e4df0b2SKamal Heib static int mlx5e_grp_phy_get_num_stats(struct mlx5e_priv *priv) 6202e4df0b2SKamal Heib { 6216ab75516SSaeed Mahameed /* "1" for link_down_events special counter */ 6222e4df0b2SKamal Heib return MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group) ? 6236ab75516SSaeed Mahameed NUM_PPORT_PHY_STATISTICAL_COUNTERS + 1 : 1; 6242e4df0b2SKamal Heib } 6252e4df0b2SKamal Heib 6262e4df0b2SKamal Heib static int mlx5e_grp_phy_fill_strings(struct mlx5e_priv *priv, u8 *data, 6272e4df0b2SKamal Heib int idx) 6282e4df0b2SKamal Heib { 6292e4df0b2SKamal Heib int i; 6302e4df0b2SKamal Heib 6316ab75516SSaeed Mahameed strcpy(data + (idx++) * ETH_GSTRING_LEN, "link_down_events_phy"); 6326ab75516SSaeed Mahameed 6336ab75516SSaeed Mahameed if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group)) 6346ab75516SSaeed Mahameed return idx; 6356ab75516SSaeed Mahameed 6366ab75516SSaeed Mahameed for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++) 6372e4df0b2SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 6382e4df0b2SKamal Heib pport_phy_statistical_stats_desc[i].format); 6392e4df0b2SKamal Heib return idx; 6402e4df0b2SKamal Heib } 6412e4df0b2SKamal Heib 6422e4df0b2SKamal Heib static int mlx5e_grp_phy_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx) 6432e4df0b2SKamal Heib { 6442e4df0b2SKamal Heib int i; 6452e4df0b2SKamal Heib 6466ab75516SSaeed Mahameed /* link_down_events_phy has special handling since it is not stored in __be64 format */ 6476ab75516SSaeed Mahameed data[idx++] = MLX5_GET(ppcnt_reg, priv->stats.pport.phy_counters, 6486ab75516SSaeed Mahameed counter_set.phys_layer_cntrs.link_down_events); 6496ab75516SSaeed Mahameed 6506ab75516SSaeed Mahameed if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group)) 6516ab75516SSaeed Mahameed return idx; 6526ab75516SSaeed Mahameed 6536ab75516SSaeed Mahameed for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++) 6542e4df0b2SKamal Heib data[idx++] = 6552e4df0b2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.phy_statistical_counters, 6562e4df0b2SKamal Heib pport_phy_statistical_stats_desc, i); 6572e4df0b2SKamal Heib return idx; 6582e4df0b2SKamal Heib } 6592e4df0b2SKamal Heib 66019386177SKamal Heib static void mlx5e_grp_phy_update_stats(struct mlx5e_priv *priv) 66119386177SKamal Heib { 66219386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 66319386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 66419386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 66519386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 66619386177SKamal Heib void *out; 66719386177SKamal Heib 66819386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 66919386177SKamal Heib out = pstats->phy_counters; 67019386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_COUNTERS_GROUP); 67119386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 67219386177SKamal Heib 67319386177SKamal Heib if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) 67419386177SKamal Heib return; 67519386177SKamal Heib 67619386177SKamal Heib out = pstats->phy_statistical_counters; 67719386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_STATISTICAL_GROUP); 67819386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 67919386177SKamal Heib } 68019386177SKamal Heib 6813488bd4cSKamal Heib #define PPORT_ETH_EXT_OFF(c) \ 6823488bd4cSKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 6833488bd4cSKamal Heib counter_set.eth_extended_cntrs_grp_data_layout.c##_high) 6843488bd4cSKamal Heib static const struct counter_desc pport_eth_ext_stats_desc[] = { 6853488bd4cSKamal Heib { "rx_buffer_passed_thres_phy", PPORT_ETH_EXT_OFF(rx_buffer_almost_full) }, 6863488bd4cSKamal Heib }; 6873488bd4cSKamal Heib 6883488bd4cSKamal Heib #define NUM_PPORT_ETH_EXT_COUNTERS ARRAY_SIZE(pport_eth_ext_stats_desc) 6893488bd4cSKamal Heib 6903488bd4cSKamal Heib static int mlx5e_grp_eth_ext_get_num_stats(struct mlx5e_priv *priv) 6913488bd4cSKamal Heib { 6923488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 6933488bd4cSKamal Heib return NUM_PPORT_ETH_EXT_COUNTERS; 6943488bd4cSKamal Heib 6953488bd4cSKamal Heib return 0; 6963488bd4cSKamal Heib } 6973488bd4cSKamal Heib 6983488bd4cSKamal Heib static int mlx5e_grp_eth_ext_fill_strings(struct mlx5e_priv *priv, u8 *data, 6993488bd4cSKamal Heib int idx) 7003488bd4cSKamal Heib { 7013488bd4cSKamal Heib int i; 7023488bd4cSKamal Heib 7033488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 7043488bd4cSKamal Heib for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++) 7053488bd4cSKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 7063488bd4cSKamal Heib pport_eth_ext_stats_desc[i].format); 7073488bd4cSKamal Heib return idx; 7083488bd4cSKamal Heib } 7093488bd4cSKamal Heib 7103488bd4cSKamal Heib static int mlx5e_grp_eth_ext_fill_stats(struct mlx5e_priv *priv, u64 *data, 7113488bd4cSKamal Heib int idx) 7123488bd4cSKamal Heib { 7133488bd4cSKamal Heib int i; 7143488bd4cSKamal Heib 7153488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 7163488bd4cSKamal Heib for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++) 7173488bd4cSKamal Heib data[idx++] = 7183488bd4cSKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.eth_ext_counters, 7193488bd4cSKamal Heib pport_eth_ext_stats_desc, i); 7203488bd4cSKamal Heib return idx; 7213488bd4cSKamal Heib } 7223488bd4cSKamal Heib 72319386177SKamal Heib static void mlx5e_grp_eth_ext_update_stats(struct mlx5e_priv *priv) 72419386177SKamal Heib { 72519386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 72619386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 72719386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 72819386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 72919386177SKamal Heib void *out; 73019386177SKamal Heib 73119386177SKamal Heib if (!MLX5_CAP_PCAM_FEATURE(mdev, rx_buffer_fullness_counters)) 73219386177SKamal Heib return; 73319386177SKamal Heib 73419386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 73519386177SKamal Heib out = pstats->eth_ext_counters; 73619386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP); 73719386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 73819386177SKamal Heib } 73919386177SKamal Heib 7409fd2b5f1SKamal Heib #define PCIE_PERF_OFF(c) \ 7419fd2b5f1SKamal Heib MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c) 7429fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc[] = { 7439fd2b5f1SKamal Heib { "rx_pci_signal_integrity", PCIE_PERF_OFF(rx_errors) }, 7449fd2b5f1SKamal Heib { "tx_pci_signal_integrity", PCIE_PERF_OFF(tx_errors) }, 7459fd2b5f1SKamal Heib }; 7469fd2b5f1SKamal Heib 7479fd2b5f1SKamal Heib #define PCIE_PERF_OFF64(c) \ 7489fd2b5f1SKamal Heib MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c##_high) 7499fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc64[] = { 7509fd2b5f1SKamal Heib { "outbound_pci_buffer_overflow", PCIE_PERF_OFF64(tx_overflow_buffer_pkt) }, 7519fd2b5f1SKamal Heib }; 7529fd2b5f1SKamal Heib 7539fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stall_stats_desc[] = { 7549fd2b5f1SKamal Heib { "outbound_pci_stalled_rd", PCIE_PERF_OFF(outbound_stalled_reads) }, 7559fd2b5f1SKamal Heib { "outbound_pci_stalled_wr", PCIE_PERF_OFF(outbound_stalled_writes) }, 7569fd2b5f1SKamal Heib { "outbound_pci_stalled_rd_events", PCIE_PERF_OFF(outbound_stalled_reads_events) }, 7579fd2b5f1SKamal Heib { "outbound_pci_stalled_wr_events", PCIE_PERF_OFF(outbound_stalled_writes_events) }, 7589fd2b5f1SKamal Heib }; 7599fd2b5f1SKamal Heib 7609fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS ARRAY_SIZE(pcie_perf_stats_desc) 7619fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS64 ARRAY_SIZE(pcie_perf_stats_desc64) 7629fd2b5f1SKamal Heib #define NUM_PCIE_PERF_STALL_COUNTERS ARRAY_SIZE(pcie_perf_stall_stats_desc) 7639fd2b5f1SKamal Heib 7649fd2b5f1SKamal Heib static int mlx5e_grp_pcie_get_num_stats(struct mlx5e_priv *priv) 7659fd2b5f1SKamal Heib { 7669fd2b5f1SKamal Heib int num_stats = 0; 7679fd2b5f1SKamal Heib 7689fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 7699fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_COUNTERS; 7709fd2b5f1SKamal Heib 7719fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 7729fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_COUNTERS64; 7739fd2b5f1SKamal Heib 7749fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 7759fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_STALL_COUNTERS; 7769fd2b5f1SKamal Heib 7779fd2b5f1SKamal Heib return num_stats; 7789fd2b5f1SKamal Heib } 7799fd2b5f1SKamal Heib 7809fd2b5f1SKamal Heib static int mlx5e_grp_pcie_fill_strings(struct mlx5e_priv *priv, u8 *data, 7819fd2b5f1SKamal Heib int idx) 7829fd2b5f1SKamal Heib { 7839fd2b5f1SKamal Heib int i; 7849fd2b5f1SKamal Heib 7859fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 7869fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++) 7879fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 7889fd2b5f1SKamal Heib pcie_perf_stats_desc[i].format); 7899fd2b5f1SKamal Heib 7909fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 7919fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++) 7929fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 7939fd2b5f1SKamal Heib pcie_perf_stats_desc64[i].format); 7949fd2b5f1SKamal Heib 7959fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 7969fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++) 7979fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 7989fd2b5f1SKamal Heib pcie_perf_stall_stats_desc[i].format); 7999fd2b5f1SKamal Heib return idx; 8009fd2b5f1SKamal Heib } 8019fd2b5f1SKamal Heib 8029fd2b5f1SKamal Heib static int mlx5e_grp_pcie_fill_stats(struct mlx5e_priv *priv, u64 *data, 8039fd2b5f1SKamal Heib int idx) 8049fd2b5f1SKamal Heib { 8059fd2b5f1SKamal Heib int i; 8069fd2b5f1SKamal Heib 8079fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 8089fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++) 8099fd2b5f1SKamal Heib data[idx++] = 8109fd2b5f1SKamal Heib MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters, 8119fd2b5f1SKamal Heib pcie_perf_stats_desc, i); 8129fd2b5f1SKamal Heib 8139fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 8149fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++) 8159fd2b5f1SKamal Heib data[idx++] = 8169fd2b5f1SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pcie.pcie_perf_counters, 8179fd2b5f1SKamal Heib pcie_perf_stats_desc64, i); 8189fd2b5f1SKamal Heib 8199fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 8209fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++) 8219fd2b5f1SKamal Heib data[idx++] = 8229fd2b5f1SKamal Heib MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters, 8239fd2b5f1SKamal Heib pcie_perf_stall_stats_desc, i); 8249fd2b5f1SKamal Heib return idx; 8259fd2b5f1SKamal Heib } 8269fd2b5f1SKamal Heib 82719386177SKamal Heib static void mlx5e_grp_pcie_update_stats(struct mlx5e_priv *priv) 82819386177SKamal Heib { 82919386177SKamal Heib struct mlx5e_pcie_stats *pcie_stats = &priv->stats.pcie; 83019386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 83119386177SKamal Heib u32 in[MLX5_ST_SZ_DW(mpcnt_reg)] = {0}; 83219386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(mpcnt_reg); 83319386177SKamal Heib void *out; 83419386177SKamal Heib 83519386177SKamal Heib if (!MLX5_CAP_MCAM_FEATURE(mdev, pcie_performance_group)) 83619386177SKamal Heib return; 83719386177SKamal Heib 83819386177SKamal Heib out = pcie_stats->pcie_perf_counters; 83919386177SKamal Heib MLX5_SET(mpcnt_reg, in, grp, MLX5_PCIE_PERFORMANCE_COUNTERS_GROUP); 84019386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_MPCNT, 0, 0); 84119386177SKamal Heib } 84219386177SKamal Heib 8434377bea2SKamal Heib #define PPORT_PER_PRIO_OFF(c) \ 8444377bea2SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 8454377bea2SKamal Heib counter_set.eth_per_prio_grp_data_layout.c##_high) 846e6000651SKamal Heib static const struct counter_desc pport_per_prio_traffic_stats_desc[] = { 847e6000651SKamal Heib { "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets) }, 848e6000651SKamal Heib { "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames) }, 849e6000651SKamal Heib { "tx_prio%d_bytes", PPORT_PER_PRIO_OFF(tx_octets) }, 850e6000651SKamal Heib { "tx_prio%d_packets", PPORT_PER_PRIO_OFF(tx_frames) }, 851e6000651SKamal Heib }; 852e6000651SKamal Heib 853e6000651SKamal Heib #define NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS ARRAY_SIZE(pport_per_prio_traffic_stats_desc) 854e6000651SKamal Heib 85554c73f86SYuval Shaia static int mlx5e_grp_per_prio_traffic_get_num_stats(void) 856e6000651SKamal Heib { 857e6000651SKamal Heib return NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS * NUM_PPORT_PRIO; 858e6000651SKamal Heib } 859e6000651SKamal Heib 860e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_strings(struct mlx5e_priv *priv, 861e6000651SKamal Heib u8 *data, 862e6000651SKamal Heib int idx) 863e6000651SKamal Heib { 864e6000651SKamal Heib int i, prio; 865e6000651SKamal Heib 866e6000651SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 867e6000651SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++) 868e6000651SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 869e6000651SKamal Heib pport_per_prio_traffic_stats_desc[i].format, prio); 870e6000651SKamal Heib } 871e6000651SKamal Heib 872e6000651SKamal Heib return idx; 873e6000651SKamal Heib } 874e6000651SKamal Heib 875e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_stats(struct mlx5e_priv *priv, 876e6000651SKamal Heib u64 *data, 877e6000651SKamal Heib int idx) 878e6000651SKamal Heib { 879e6000651SKamal Heib int i, prio; 880e6000651SKamal Heib 881e6000651SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 882e6000651SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++) 883e6000651SKamal Heib data[idx++] = 884e6000651SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio], 885e6000651SKamal Heib pport_per_prio_traffic_stats_desc, i); 886e6000651SKamal Heib } 887e6000651SKamal Heib 888e6000651SKamal Heib return idx; 889e6000651SKamal Heib } 890e6000651SKamal Heib 8914377bea2SKamal Heib static const struct counter_desc pport_per_prio_pfc_stats_desc[] = { 8924377bea2SKamal Heib /* %s is "global" or "prio{i}" */ 8934377bea2SKamal Heib { "rx_%s_pause", PPORT_PER_PRIO_OFF(rx_pause) }, 8944377bea2SKamal Heib { "rx_%s_pause_duration", PPORT_PER_PRIO_OFF(rx_pause_duration) }, 8954377bea2SKamal Heib { "tx_%s_pause", PPORT_PER_PRIO_OFF(tx_pause) }, 8964377bea2SKamal Heib { "tx_%s_pause_duration", PPORT_PER_PRIO_OFF(tx_pause_duration) }, 8974377bea2SKamal Heib { "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) }, 8984377bea2SKamal Heib }; 8994377bea2SKamal Heib 9002fcb12dfSInbar Karmy static const struct counter_desc pport_pfc_stall_stats_desc[] = { 9012fcb12dfSInbar Karmy { "tx_pause_storm_warning_events ", PPORT_PER_PRIO_OFF(device_stall_minor_watermark_cnt) }, 9022fcb12dfSInbar Karmy { "tx_pause_storm_error_events", PPORT_PER_PRIO_OFF(device_stall_critical_watermark_cnt) }, 9032fcb12dfSInbar Karmy }; 9042fcb12dfSInbar Karmy 9054377bea2SKamal Heib #define NUM_PPORT_PER_PRIO_PFC_COUNTERS ARRAY_SIZE(pport_per_prio_pfc_stats_desc) 9062fcb12dfSInbar Karmy #define NUM_PPORT_PFC_STALL_COUNTERS(priv) (ARRAY_SIZE(pport_pfc_stall_stats_desc) * \ 9072fcb12dfSInbar Karmy MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) * \ 9082fcb12dfSInbar Karmy MLX5_CAP_DEBUG((priv)->mdev, stall_detect)) 9094377bea2SKamal Heib 9104377bea2SKamal Heib static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv) 9114377bea2SKamal Heib { 9124377bea2SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 9134377bea2SKamal Heib u8 pfc_en_tx; 9144377bea2SKamal Heib u8 pfc_en_rx; 9154377bea2SKamal Heib int err; 9164377bea2SKamal Heib 9174377bea2SKamal Heib if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) 9184377bea2SKamal Heib return 0; 9194377bea2SKamal Heib 9204377bea2SKamal Heib err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx); 9214377bea2SKamal Heib 9224377bea2SKamal Heib return err ? 0 : pfc_en_tx | pfc_en_rx; 9234377bea2SKamal Heib } 9244377bea2SKamal Heib 9254377bea2SKamal Heib static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv) 9264377bea2SKamal Heib { 9274377bea2SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 9284377bea2SKamal Heib u32 rx_pause; 9294377bea2SKamal Heib u32 tx_pause; 9304377bea2SKamal Heib int err; 9314377bea2SKamal Heib 9324377bea2SKamal Heib if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) 9334377bea2SKamal Heib return false; 9344377bea2SKamal Heib 9354377bea2SKamal Heib err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause); 9364377bea2SKamal Heib 9374377bea2SKamal Heib return err ? false : rx_pause | tx_pause; 9384377bea2SKamal Heib } 9394377bea2SKamal Heib 9404377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_get_num_stats(struct mlx5e_priv *priv) 9414377bea2SKamal Heib { 9424377bea2SKamal Heib return (mlx5e_query_global_pause_combined(priv) + 9434377bea2SKamal Heib hweight8(mlx5e_query_pfc_combined(priv))) * 9442fcb12dfSInbar Karmy NUM_PPORT_PER_PRIO_PFC_COUNTERS + 9452fcb12dfSInbar Karmy NUM_PPORT_PFC_STALL_COUNTERS(priv); 9464377bea2SKamal Heib } 9474377bea2SKamal Heib 9484377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_strings(struct mlx5e_priv *priv, 9494377bea2SKamal Heib u8 *data, 9504377bea2SKamal Heib int idx) 9514377bea2SKamal Heib { 9524377bea2SKamal Heib unsigned long pfc_combined; 9534377bea2SKamal Heib int i, prio; 9544377bea2SKamal Heib 9554377bea2SKamal Heib pfc_combined = mlx5e_query_pfc_combined(priv); 9564377bea2SKamal Heib for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) { 9574377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 9584377bea2SKamal Heib char pfc_string[ETH_GSTRING_LEN]; 9594377bea2SKamal Heib 9604377bea2SKamal Heib snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio); 9614377bea2SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 9624377bea2SKamal Heib pport_per_prio_pfc_stats_desc[i].format, pfc_string); 9634377bea2SKamal Heib } 9644377bea2SKamal Heib } 9654377bea2SKamal Heib 9664377bea2SKamal Heib if (mlx5e_query_global_pause_combined(priv)) { 9674377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 9684377bea2SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 9694377bea2SKamal Heib pport_per_prio_pfc_stats_desc[i].format, "global"); 9704377bea2SKamal Heib } 9714377bea2SKamal Heib } 9724377bea2SKamal Heib 9732fcb12dfSInbar Karmy for (i = 0; i < NUM_PPORT_PFC_STALL_COUNTERS(priv); i++) 9742fcb12dfSInbar Karmy strcpy(data + (idx++) * ETH_GSTRING_LEN, 9752fcb12dfSInbar Karmy pport_pfc_stall_stats_desc[i].format); 9762fcb12dfSInbar Karmy 9774377bea2SKamal Heib return idx; 9784377bea2SKamal Heib } 9794377bea2SKamal Heib 9804377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_stats(struct mlx5e_priv *priv, 9814377bea2SKamal Heib u64 *data, 9824377bea2SKamal Heib int idx) 9834377bea2SKamal Heib { 9844377bea2SKamal Heib unsigned long pfc_combined; 9854377bea2SKamal Heib int i, prio; 9864377bea2SKamal Heib 9874377bea2SKamal Heib pfc_combined = mlx5e_query_pfc_combined(priv); 9884377bea2SKamal Heib for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) { 9894377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 9904377bea2SKamal Heib data[idx++] = 9914377bea2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio], 9924377bea2SKamal Heib pport_per_prio_pfc_stats_desc, i); 9934377bea2SKamal Heib } 9944377bea2SKamal Heib } 9954377bea2SKamal Heib 9964377bea2SKamal Heib if (mlx5e_query_global_pause_combined(priv)) { 9974377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 9984377bea2SKamal Heib data[idx++] = 9994377bea2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0], 10004377bea2SKamal Heib pport_per_prio_pfc_stats_desc, i); 10014377bea2SKamal Heib } 10024377bea2SKamal Heib } 10034377bea2SKamal Heib 10042fcb12dfSInbar Karmy for (i = 0; i < NUM_PPORT_PFC_STALL_COUNTERS(priv); i++) 10052fcb12dfSInbar Karmy data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0], 10062fcb12dfSInbar Karmy pport_pfc_stall_stats_desc, i); 10072fcb12dfSInbar Karmy 10084377bea2SKamal Heib return idx; 10094377bea2SKamal Heib } 10104377bea2SKamal Heib 1011a8984281SKamal Heib static int mlx5e_grp_per_prio_get_num_stats(struct mlx5e_priv *priv) 1012a8984281SKamal Heib { 101354c73f86SYuval Shaia return mlx5e_grp_per_prio_traffic_get_num_stats() + 1014a8984281SKamal Heib mlx5e_grp_per_prio_pfc_get_num_stats(priv); 1015a8984281SKamal Heib } 1016a8984281SKamal Heib 1017a8984281SKamal Heib static int mlx5e_grp_per_prio_fill_strings(struct mlx5e_priv *priv, u8 *data, 1018a8984281SKamal Heib int idx) 1019a8984281SKamal Heib { 1020a8984281SKamal Heib idx = mlx5e_grp_per_prio_traffic_fill_strings(priv, data, idx); 1021a8984281SKamal Heib idx = mlx5e_grp_per_prio_pfc_fill_strings(priv, data, idx); 1022a8984281SKamal Heib return idx; 1023a8984281SKamal Heib } 1024a8984281SKamal Heib 1025a8984281SKamal Heib static int mlx5e_grp_per_prio_fill_stats(struct mlx5e_priv *priv, u64 *data, 1026a8984281SKamal Heib int idx) 1027a8984281SKamal Heib { 1028a8984281SKamal Heib idx = mlx5e_grp_per_prio_traffic_fill_stats(priv, data, idx); 1029a8984281SKamal Heib idx = mlx5e_grp_per_prio_pfc_fill_stats(priv, data, idx); 1030a8984281SKamal Heib return idx; 1031a8984281SKamal Heib } 1032a8984281SKamal Heib 103319386177SKamal Heib static void mlx5e_grp_per_prio_update_stats(struct mlx5e_priv *priv) 103419386177SKamal Heib { 103519386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 103619386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 103719386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 103819386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 103919386177SKamal Heib int prio; 104019386177SKamal Heib void *out; 104119386177SKamal Heib 104219386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 104319386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_PER_PRIORITY_COUNTERS_GROUP); 104419386177SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 104519386177SKamal Heib out = pstats->per_prio_counters[prio]; 104619386177SKamal Heib MLX5_SET(ppcnt_reg, in, prio_tc, prio); 104719386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, 104819386177SKamal Heib MLX5_REG_PPCNT, 0, 0); 104919386177SKamal Heib } 105019386177SKamal Heib } 105119386177SKamal Heib 10520e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_status_desc[] = { 10530e6f01a4SKamal Heib { "module_unplug", 8 }, 10540e6f01a4SKamal Heib }; 10550e6f01a4SKamal Heib 10560e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_error_desc[] = { 10570e6f01a4SKamal Heib { "module_bus_stuck", 16 }, /* bus stuck (I2C or data shorted) */ 10580e6f01a4SKamal Heib { "module_high_temp", 48 }, /* high temperature */ 10590e6f01a4SKamal Heib { "module_bad_shorted", 56 }, /* bad or shorted cable/module */ 10600e6f01a4SKamal Heib }; 10610e6f01a4SKamal Heib 10620e6f01a4SKamal Heib #define NUM_PME_STATUS_STATS ARRAY_SIZE(mlx5e_pme_status_desc) 10630e6f01a4SKamal Heib #define NUM_PME_ERR_STATS ARRAY_SIZE(mlx5e_pme_error_desc) 10640e6f01a4SKamal Heib 10650e6f01a4SKamal Heib static int mlx5e_grp_pme_get_num_stats(struct mlx5e_priv *priv) 10660e6f01a4SKamal Heib { 10670e6f01a4SKamal Heib return NUM_PME_STATUS_STATS + NUM_PME_ERR_STATS; 10680e6f01a4SKamal Heib } 10690e6f01a4SKamal Heib 10700e6f01a4SKamal Heib static int mlx5e_grp_pme_fill_strings(struct mlx5e_priv *priv, u8 *data, 10710e6f01a4SKamal Heib int idx) 10720e6f01a4SKamal Heib { 10730e6f01a4SKamal Heib int i; 10740e6f01a4SKamal Heib 10750e6f01a4SKamal Heib for (i = 0; i < NUM_PME_STATUS_STATS; i++) 10760e6f01a4SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_status_desc[i].format); 10770e6f01a4SKamal Heib 10780e6f01a4SKamal Heib for (i = 0; i < NUM_PME_ERR_STATS; i++) 10790e6f01a4SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_error_desc[i].format); 10800e6f01a4SKamal Heib 10810e6f01a4SKamal Heib return idx; 10820e6f01a4SKamal Heib } 10830e6f01a4SKamal Heib 10840e6f01a4SKamal Heib static int mlx5e_grp_pme_fill_stats(struct mlx5e_priv *priv, u64 *data, 10850e6f01a4SKamal Heib int idx) 10860e6f01a4SKamal Heib { 10870e6f01a4SKamal Heib struct mlx5_priv *mlx5_priv = &priv->mdev->priv; 10880e6f01a4SKamal Heib int i; 10890e6f01a4SKamal Heib 10900e6f01a4SKamal Heib for (i = 0; i < NUM_PME_STATUS_STATS; i++) 10910e6f01a4SKamal Heib data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.status_counters, 10920e6f01a4SKamal Heib mlx5e_pme_status_desc, i); 10930e6f01a4SKamal Heib 10940e6f01a4SKamal Heib for (i = 0; i < NUM_PME_ERR_STATS; i++) 10950e6f01a4SKamal Heib data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.error_counters, 10960e6f01a4SKamal Heib mlx5e_pme_error_desc, i); 10970e6f01a4SKamal Heib 10980e6f01a4SKamal Heib return idx; 10990e6f01a4SKamal Heib } 11000e6f01a4SKamal Heib 1101e185d43fSKamal Heib static int mlx5e_grp_ipsec_get_num_stats(struct mlx5e_priv *priv) 1102e185d43fSKamal Heib { 1103e185d43fSKamal Heib return mlx5e_ipsec_get_count(priv); 1104e185d43fSKamal Heib } 1105e185d43fSKamal Heib 1106e185d43fSKamal Heib static int mlx5e_grp_ipsec_fill_strings(struct mlx5e_priv *priv, u8 *data, 1107e185d43fSKamal Heib int idx) 1108e185d43fSKamal Heib { 1109e185d43fSKamal Heib return idx + mlx5e_ipsec_get_strings(priv, 1110e185d43fSKamal Heib data + idx * ETH_GSTRING_LEN); 1111e185d43fSKamal Heib } 1112e185d43fSKamal Heib 1113e185d43fSKamal Heib static int mlx5e_grp_ipsec_fill_stats(struct mlx5e_priv *priv, u64 *data, 1114e185d43fSKamal Heib int idx) 1115e185d43fSKamal Heib { 1116e185d43fSKamal Heib return idx + mlx5e_ipsec_get_stats(priv, data + idx); 1117e185d43fSKamal Heib } 1118e185d43fSKamal Heib 111919386177SKamal Heib static void mlx5e_grp_ipsec_update_stats(struct mlx5e_priv *priv) 112019386177SKamal Heib { 112119386177SKamal Heib mlx5e_ipsec_update_stats(priv); 112219386177SKamal Heib } 112319386177SKamal Heib 112443585a41SIlya Lesokhin static int mlx5e_grp_tls_get_num_stats(struct mlx5e_priv *priv) 112543585a41SIlya Lesokhin { 112643585a41SIlya Lesokhin return mlx5e_tls_get_count(priv); 112743585a41SIlya Lesokhin } 112843585a41SIlya Lesokhin 112943585a41SIlya Lesokhin static int mlx5e_grp_tls_fill_strings(struct mlx5e_priv *priv, u8 *data, 113043585a41SIlya Lesokhin int idx) 113143585a41SIlya Lesokhin { 113243585a41SIlya Lesokhin return idx + mlx5e_tls_get_strings(priv, data + idx * ETH_GSTRING_LEN); 113343585a41SIlya Lesokhin } 113443585a41SIlya Lesokhin 113543585a41SIlya Lesokhin static int mlx5e_grp_tls_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx) 113643585a41SIlya Lesokhin { 113743585a41SIlya Lesokhin return idx + mlx5e_tls_get_stats(priv, data + idx); 113843585a41SIlya Lesokhin } 113943585a41SIlya Lesokhin 11401fe85006SKamal Heib static const struct counter_desc rq_stats_desc[] = { 11411fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, packets) }, 11421fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, bytes) }, 11431fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete) }, 11441fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary) }, 11451fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary_inner) }, 11461fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_none) }, 11471fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_drop) }, 114886690b4bSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_redirect) }, 11491fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_packets) }, 11501fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_bytes) }, 1151f007c13dSNatali Shechtman { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, ecn_mark) }, 1152f24686e8SGal Pressman { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, removed_vlan_packets) }, 11531fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, wqe_err) }, 1154b71ba6b4STariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler_cqes) }, 1155b71ba6b4STariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler_strides) }, 11561fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, buff_alloc_err) }, 11571fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_blks) }, 11581fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_pkts) }, 11591fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, page_reuse) }, 11601fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_reuse) }, 11611fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_full) }, 11621fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_empty) }, 11631fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_busy) }, 11641fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_waive) }, 1165dc983f0eSTariq Toukan { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, congst_umr) }, 116694563847SEran Ben Elisha { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, arfs_err) }, 11671fe85006SKamal Heib }; 11681fe85006SKamal Heib 11691fe85006SKamal Heib static const struct counter_desc sq_stats_desc[] = { 11701fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, packets) }, 11711fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, bytes) }, 11721fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_packets) }, 11731fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_bytes) }, 11741fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_packets) }, 11751fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_bytes) }, 11761fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial) }, 11771fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial_inner) }, 1178f24686e8SGal Pressman { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, added_vlan_packets) }, 11791fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, nop) }, 11801fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_none) }, 11811fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, stopped) }, 11821fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, dropped) }, 11831fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, xmit_more) }, 1184db75373cSEran Ben Elisha { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, recover) }, 118586155656STariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, cqes) }, 1186f65a59ffSTariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, wake) }, 1187f65a59ffSTariq Toukan { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, cqe_err) }, 11881fe85006SKamal Heib }; 11891fe85006SKamal Heib 1190890388adSTariq Toukan static const struct counter_desc rq_xdpsq_stats_desc[] = { 1191890388adSTariq Toukan { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, xmit) }, 1192890388adSTariq Toukan { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, full) }, 1193890388adSTariq Toukan { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, err) }, 1194890388adSTariq Toukan { MLX5E_DECLARE_RQ_XDPSQ_STAT(struct mlx5e_xdpsq_stats, cqes) }, 1195890388adSTariq Toukan }; 1196890388adSTariq Toukan 119758b99ee3STariq Toukan static const struct counter_desc xdpsq_stats_desc[] = { 119858b99ee3STariq Toukan { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, xmit) }, 119958b99ee3STariq Toukan { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, full) }, 120058b99ee3STariq Toukan { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, err) }, 120158b99ee3STariq Toukan { MLX5E_DECLARE_XDPSQ_STAT(struct mlx5e_xdpsq_stats, cqes) }, 120258b99ee3STariq Toukan }; 120358b99ee3STariq Toukan 120457d689a8SEran Ben Elisha static const struct counter_desc ch_stats_desc[] = { 1205a1bf74dcSTariq Toukan { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, events) }, 12062d7103c8STariq Toukan { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, poll) }, 12072d7103c8STariq Toukan { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, arm) }, 12082d7103c8STariq Toukan { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, aff_change) }, 120957d689a8SEran Ben Elisha { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, eq_rearm) }, 121057d689a8SEran Ben Elisha }; 121157d689a8SEran Ben Elisha 12121fe85006SKamal Heib #define NUM_RQ_STATS ARRAY_SIZE(rq_stats_desc) 12131fe85006SKamal Heib #define NUM_SQ_STATS ARRAY_SIZE(sq_stats_desc) 121458b99ee3STariq Toukan #define NUM_XDPSQ_STATS ARRAY_SIZE(xdpsq_stats_desc) 1215890388adSTariq Toukan #define NUM_RQ_XDPSQ_STATS ARRAY_SIZE(rq_xdpsq_stats_desc) 121657d689a8SEran Ben Elisha #define NUM_CH_STATS ARRAY_SIZE(ch_stats_desc) 12171fe85006SKamal Heib 12181fe85006SKamal Heib static int mlx5e_grp_channels_get_num_stats(struct mlx5e_priv *priv) 12191fe85006SKamal Heib { 122005909babSEran Ben Elisha int max_nch = priv->profile->max_nch(priv->mdev); 122105909babSEran Ben Elisha 122205909babSEran Ben Elisha return (NUM_RQ_STATS * max_nch) + 122305909babSEran Ben Elisha (NUM_CH_STATS * max_nch) + 1224890388adSTariq Toukan (NUM_SQ_STATS * max_nch * priv->max_opened_tc) + 122558b99ee3STariq Toukan (NUM_RQ_XDPSQ_STATS * max_nch) + 122658b99ee3STariq Toukan (NUM_XDPSQ_STATS * max_nch); 12271fe85006SKamal Heib } 12281fe85006SKamal Heib 12291fe85006SKamal Heib static int mlx5e_grp_channels_fill_strings(struct mlx5e_priv *priv, u8 *data, 12301fe85006SKamal Heib int idx) 12311fe85006SKamal Heib { 123205909babSEran Ben Elisha int max_nch = priv->profile->max_nch(priv->mdev); 12331fe85006SKamal Heib int i, j, tc; 12341fe85006SKamal Heib 123505909babSEran Ben Elisha for (i = 0; i < max_nch; i++) 123657d689a8SEran Ben Elisha for (j = 0; j < NUM_CH_STATS; j++) 123757d689a8SEran Ben Elisha sprintf(data + (idx++) * ETH_GSTRING_LEN, 123857d689a8SEran Ben Elisha ch_stats_desc[j].format, i); 123957d689a8SEran Ben Elisha 1240890388adSTariq Toukan for (i = 0; i < max_nch; i++) { 12411fe85006SKamal Heib for (j = 0; j < NUM_RQ_STATS; j++) 1242890388adSTariq Toukan sprintf(data + (idx++) * ETH_GSTRING_LEN, 1243890388adSTariq Toukan rq_stats_desc[j].format, i); 1244890388adSTariq Toukan for (j = 0; j < NUM_RQ_XDPSQ_STATS; j++) 1245890388adSTariq Toukan sprintf(data + (idx++) * ETH_GSTRING_LEN, 1246890388adSTariq Toukan rq_xdpsq_stats_desc[j].format, i); 1247890388adSTariq Toukan } 12481fe85006SKamal Heib 124905909babSEran Ben Elisha for (tc = 0; tc < priv->max_opened_tc; tc++) 125005909babSEran Ben Elisha for (i = 0; i < max_nch; i++) 12511fe85006SKamal Heib for (j = 0; j < NUM_SQ_STATS; j++) 12521fe85006SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 12531fe85006SKamal Heib sq_stats_desc[j].format, 12541fe85006SKamal Heib priv->channel_tc2txq[i][tc]); 12551fe85006SKamal Heib 125658b99ee3STariq Toukan for (i = 0; i < max_nch; i++) 125758b99ee3STariq Toukan for (j = 0; j < NUM_XDPSQ_STATS; j++) 125858b99ee3STariq Toukan sprintf(data + (idx++) * ETH_GSTRING_LEN, 125958b99ee3STariq Toukan xdpsq_stats_desc[j].format, i); 126058b99ee3STariq Toukan 12611fe85006SKamal Heib return idx; 12621fe85006SKamal Heib } 12631fe85006SKamal Heib 12641fe85006SKamal Heib static int mlx5e_grp_channels_fill_stats(struct mlx5e_priv *priv, u64 *data, 12651fe85006SKamal Heib int idx) 12661fe85006SKamal Heib { 126705909babSEran Ben Elisha int max_nch = priv->profile->max_nch(priv->mdev); 12681fe85006SKamal Heib int i, j, tc; 12691fe85006SKamal Heib 127005909babSEran Ben Elisha for (i = 0; i < max_nch; i++) 127157d689a8SEran Ben Elisha for (j = 0; j < NUM_CH_STATS; j++) 127257d689a8SEran Ben Elisha data[idx++] = 127305909babSEran Ben Elisha MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].ch, 127457d689a8SEran Ben Elisha ch_stats_desc, j); 127557d689a8SEran Ben Elisha 1276890388adSTariq Toukan for (i = 0; i < max_nch; i++) { 12771fe85006SKamal Heib for (j = 0; j < NUM_RQ_STATS; j++) 12781fe85006SKamal Heib data[idx++] = 127905909babSEran Ben Elisha MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].rq, 12801fe85006SKamal Heib rq_stats_desc, j); 1281890388adSTariq Toukan for (j = 0; j < NUM_RQ_XDPSQ_STATS; j++) 1282890388adSTariq Toukan data[idx++] = 1283890388adSTariq Toukan MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].rq_xdpsq, 1284890388adSTariq Toukan rq_xdpsq_stats_desc, j); 1285890388adSTariq Toukan } 12861fe85006SKamal Heib 128705909babSEran Ben Elisha for (tc = 0; tc < priv->max_opened_tc; tc++) 128805909babSEran Ben Elisha for (i = 0; i < max_nch; i++) 12891fe85006SKamal Heib for (j = 0; j < NUM_SQ_STATS; j++) 12901fe85006SKamal Heib data[idx++] = 129105909babSEran Ben Elisha MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].sq[tc], 12921fe85006SKamal Heib sq_stats_desc, j); 12931fe85006SKamal Heib 129458b99ee3STariq Toukan for (i = 0; i < max_nch; i++) 129558b99ee3STariq Toukan for (j = 0; j < NUM_XDPSQ_STATS; j++) 129658b99ee3STariq Toukan data[idx++] = 129758b99ee3STariq Toukan MLX5E_READ_CTR64_CPU(&priv->channel_stats[i].xdpsq, 129858b99ee3STariq Toukan xdpsq_stats_desc, j); 129958b99ee3STariq Toukan 13001fe85006SKamal Heib return idx; 13011fe85006SKamal Heib } 13021fe85006SKamal Heib 130319386177SKamal Heib /* The stats groups order is opposite to the update_stats() order calls */ 1304c0752f2bSKamal Heib const struct mlx5e_stats_grp mlx5e_stats_grps[] = { 1305c0752f2bSKamal Heib { 1306c0752f2bSKamal Heib .get_num_stats = mlx5e_grp_sw_get_num_stats, 1307c0752f2bSKamal Heib .fill_strings = mlx5e_grp_sw_fill_strings, 1308c0752f2bSKamal Heib .fill_stats = mlx5e_grp_sw_fill_stats, 130919386177SKamal Heib .update_stats = mlx5e_grp_sw_update_stats, 1310fd8dcdb8SKamal Heib }, 1311fd8dcdb8SKamal Heib { 1312fd8dcdb8SKamal Heib .get_num_stats = mlx5e_grp_q_get_num_stats, 1313fd8dcdb8SKamal Heib .fill_strings = mlx5e_grp_q_fill_strings, 1314fd8dcdb8SKamal Heib .fill_stats = mlx5e_grp_q_fill_stats, 131519386177SKamal Heib .update_stats_mask = MLX5E_NDO_UPDATE_STATS, 131619386177SKamal Heib .update_stats = mlx5e_grp_q_update_stats, 1317fd8dcdb8SKamal Heib }, 131840cab9f1SKamal Heib { 13195c298143SMoshe Shemesh .get_num_stats = mlx5e_grp_vnic_env_get_num_stats, 13205c298143SMoshe Shemesh .fill_strings = mlx5e_grp_vnic_env_fill_strings, 13215c298143SMoshe Shemesh .fill_stats = mlx5e_grp_vnic_env_fill_stats, 13225c298143SMoshe Shemesh .update_stats = mlx5e_grp_vnic_env_update_stats, 13235c298143SMoshe Shemesh }, 13245c298143SMoshe Shemesh { 132540cab9f1SKamal Heib .get_num_stats = mlx5e_grp_vport_get_num_stats, 132640cab9f1SKamal Heib .fill_strings = mlx5e_grp_vport_fill_strings, 132740cab9f1SKamal Heib .fill_stats = mlx5e_grp_vport_fill_stats, 132819386177SKamal Heib .update_stats_mask = MLX5E_NDO_UPDATE_STATS, 132919386177SKamal Heib .update_stats = mlx5e_grp_vport_update_stats, 133040cab9f1SKamal Heib }, 13316e6ef814SKamal Heib { 13326e6ef814SKamal Heib .get_num_stats = mlx5e_grp_802_3_get_num_stats, 13336e6ef814SKamal Heib .fill_strings = mlx5e_grp_802_3_fill_strings, 13346e6ef814SKamal Heib .fill_stats = mlx5e_grp_802_3_fill_stats, 133519386177SKamal Heib .update_stats_mask = MLX5E_NDO_UPDATE_STATS, 133619386177SKamal Heib .update_stats = mlx5e_grp_802_3_update_stats, 13376e6ef814SKamal Heib }, 1338fc8e64a3SKamal Heib { 1339fc8e64a3SKamal Heib .get_num_stats = mlx5e_grp_2863_get_num_stats, 1340fc8e64a3SKamal Heib .fill_strings = mlx5e_grp_2863_fill_strings, 1341fc8e64a3SKamal Heib .fill_stats = mlx5e_grp_2863_fill_stats, 134219386177SKamal Heib .update_stats = mlx5e_grp_2863_update_stats, 1343fc8e64a3SKamal Heib }, 1344e0e0def9SKamal Heib { 1345e0e0def9SKamal Heib .get_num_stats = mlx5e_grp_2819_get_num_stats, 1346e0e0def9SKamal Heib .fill_strings = mlx5e_grp_2819_fill_strings, 1347e0e0def9SKamal Heib .fill_stats = mlx5e_grp_2819_fill_stats, 134819386177SKamal Heib .update_stats = mlx5e_grp_2819_update_stats, 1349e0e0def9SKamal Heib }, 13502e4df0b2SKamal Heib { 13512e4df0b2SKamal Heib .get_num_stats = mlx5e_grp_phy_get_num_stats, 13522e4df0b2SKamal Heib .fill_strings = mlx5e_grp_phy_fill_strings, 13532e4df0b2SKamal Heib .fill_stats = mlx5e_grp_phy_fill_stats, 135419386177SKamal Heib .update_stats = mlx5e_grp_phy_update_stats, 13552e4df0b2SKamal Heib }, 13563488bd4cSKamal Heib { 13573488bd4cSKamal Heib .get_num_stats = mlx5e_grp_eth_ext_get_num_stats, 13583488bd4cSKamal Heib .fill_strings = mlx5e_grp_eth_ext_fill_strings, 13593488bd4cSKamal Heib .fill_stats = mlx5e_grp_eth_ext_fill_stats, 136019386177SKamal Heib .update_stats = mlx5e_grp_eth_ext_update_stats, 13619fd2b5f1SKamal Heib }, 13629fd2b5f1SKamal Heib { 13639fd2b5f1SKamal Heib .get_num_stats = mlx5e_grp_pcie_get_num_stats, 13649fd2b5f1SKamal Heib .fill_strings = mlx5e_grp_pcie_fill_strings, 13659fd2b5f1SKamal Heib .fill_stats = mlx5e_grp_pcie_fill_stats, 136619386177SKamal Heib .update_stats = mlx5e_grp_pcie_update_stats, 13679fd2b5f1SKamal Heib }, 1368e6000651SKamal Heib { 1369a8984281SKamal Heib .get_num_stats = mlx5e_grp_per_prio_get_num_stats, 1370a8984281SKamal Heib .fill_strings = mlx5e_grp_per_prio_fill_strings, 1371a8984281SKamal Heib .fill_stats = mlx5e_grp_per_prio_fill_stats, 137219386177SKamal Heib .update_stats = mlx5e_grp_per_prio_update_stats, 13734377bea2SKamal Heib }, 13740e6f01a4SKamal Heib { 13750e6f01a4SKamal Heib .get_num_stats = mlx5e_grp_pme_get_num_stats, 13760e6f01a4SKamal Heib .fill_strings = mlx5e_grp_pme_fill_strings, 13770e6f01a4SKamal Heib .fill_stats = mlx5e_grp_pme_fill_stats, 13780e6f01a4SKamal Heib }, 1379e185d43fSKamal Heib { 1380e185d43fSKamal Heib .get_num_stats = mlx5e_grp_ipsec_get_num_stats, 1381e185d43fSKamal Heib .fill_strings = mlx5e_grp_ipsec_fill_strings, 1382e185d43fSKamal Heib .fill_stats = mlx5e_grp_ipsec_fill_stats, 138319386177SKamal Heib .update_stats = mlx5e_grp_ipsec_update_stats, 1384e185d43fSKamal Heib }, 13851fe85006SKamal Heib { 138643585a41SIlya Lesokhin .get_num_stats = mlx5e_grp_tls_get_num_stats, 138743585a41SIlya Lesokhin .fill_strings = mlx5e_grp_tls_fill_strings, 138843585a41SIlya Lesokhin .fill_stats = mlx5e_grp_tls_fill_stats, 138943585a41SIlya Lesokhin }, 139043585a41SIlya Lesokhin { 13911fe85006SKamal Heib .get_num_stats = mlx5e_grp_channels_get_num_stats, 13921fe85006SKamal Heib .fill_strings = mlx5e_grp_channels_fill_strings, 13931fe85006SKamal Heib .fill_stats = mlx5e_grp_channels_fill_stats, 13941fe85006SKamal Heib } 1395c0752f2bSKamal Heib }; 1396c0752f2bSKamal Heib 1397c0752f2bSKamal Heib const int mlx5e_num_stats_grps = ARRAY_SIZE(mlx5e_stats_grps); 1398