1c0752f2bSKamal Heib /*
2c0752f2bSKamal Heib  * Copyright (c) 2017, Mellanox Technologies, Ltd.  All rights reserved.
3c0752f2bSKamal Heib  *
4c0752f2bSKamal Heib  * This software is available to you under a choice of one of two
5c0752f2bSKamal Heib  * licenses.  You may choose to be licensed under the terms of the GNU
6c0752f2bSKamal Heib  * General Public License (GPL) Version 2, available from the file
7c0752f2bSKamal Heib  * COPYING in the main directory of this source tree, or the
8c0752f2bSKamal Heib  * OpenIB.org BSD license below:
9c0752f2bSKamal Heib  *
10c0752f2bSKamal Heib  *     Redistribution and use in source and binary forms, with or
11c0752f2bSKamal Heib  *     without modification, are permitted provided that the following
12c0752f2bSKamal Heib  *     conditions are met:
13c0752f2bSKamal Heib  *
14c0752f2bSKamal Heib  *      - Redistributions of source code must retain the above
15c0752f2bSKamal Heib  *        copyright notice, this list of conditions and the following
16c0752f2bSKamal Heib  *        disclaimer.
17c0752f2bSKamal Heib  *
18c0752f2bSKamal Heib  *      - Redistributions in binary form must reproduce the above
19c0752f2bSKamal Heib  *        copyright notice, this list of conditions and the following
20c0752f2bSKamal Heib  *        disclaimer in the documentation and/or other materials
21c0752f2bSKamal Heib  *        provided with the distribution.
22c0752f2bSKamal Heib  *
23c0752f2bSKamal Heib  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24c0752f2bSKamal Heib  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25c0752f2bSKamal Heib  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26c0752f2bSKamal Heib  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27c0752f2bSKamal Heib  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28c0752f2bSKamal Heib  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29c0752f2bSKamal Heib  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30c0752f2bSKamal Heib  * SOFTWARE.
31c0752f2bSKamal Heib  */
32c0752f2bSKamal Heib 
33c0752f2bSKamal Heib #include "en.h"
34e185d43fSKamal Heib #include "en_accel/ipsec.h"
3543585a41SIlya Lesokhin #include "en_accel/tls.h"
36c0752f2bSKamal Heib 
37c0752f2bSKamal Heib static const struct counter_desc sw_stats_desc[] = {
38c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) },
39c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) },
40c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) },
41c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) },
42c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_packets) },
43c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_bytes) },
44c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_packets) },
45c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_bytes) },
46f24686e8SGal Pressman 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_added_vlan_packets) },
47bf239741SIlya Lesokhin 
48bf239741SIlya Lesokhin #ifdef CONFIG_MLX5_EN_TLS
49bf239741SIlya Lesokhin 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_ooo) },
50bf239741SIlya Lesokhin 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tls_resync_bytes) },
51bf239741SIlya Lesokhin #endif
52bf239741SIlya Lesokhin 
53c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_packets) },
54c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_bytes) },
55f24686e8SGal Pressman 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_removed_vlan_packets) },
56c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary) },
57c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_none) },
58c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete) },
59c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary_inner) },
60c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_drop) },
61c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx) },
62c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_full) },
63c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_none) },
64c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial) },
65c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial_inner) },
66c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_stopped) },
67c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_wake) },
68c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_dropped) },
69c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xmit_more) },
7016cc14d8SEran Ben Elisha 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_cqe_err) },
71db75373cSEran Ben Elisha 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_recover) },
72c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_wqe_err) },
73c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler) },
74c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_buff_alloc_err) },
75c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_blks) },
76c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_pkts) },
77c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_page_reuse) },
78c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_reuse) },
79c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_full) },
80c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_empty) },
81c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_busy) },
82c0752f2bSKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_waive) },
8357d689a8SEran Ben Elisha 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_eq_rearm) },
84c0752f2bSKamal Heib };
85c0752f2bSKamal Heib 
86c0752f2bSKamal Heib #define NUM_SW_COUNTERS			ARRAY_SIZE(sw_stats_desc)
87c0752f2bSKamal Heib 
88c0752f2bSKamal Heib static int mlx5e_grp_sw_get_num_stats(struct mlx5e_priv *priv)
89c0752f2bSKamal Heib {
90c0752f2bSKamal Heib 	return NUM_SW_COUNTERS;
91c0752f2bSKamal Heib }
92c0752f2bSKamal Heib 
93c0752f2bSKamal Heib static int mlx5e_grp_sw_fill_strings(struct mlx5e_priv *priv, u8 *data, int idx)
94c0752f2bSKamal Heib {
95c0752f2bSKamal Heib 	int i;
96c0752f2bSKamal Heib 
97c0752f2bSKamal Heib 	for (i = 0; i < NUM_SW_COUNTERS; i++)
98c0752f2bSKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format);
99c0752f2bSKamal Heib 	return idx;
100c0752f2bSKamal Heib }
101c0752f2bSKamal Heib 
102c0752f2bSKamal Heib static int mlx5e_grp_sw_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx)
103c0752f2bSKamal Heib {
104c0752f2bSKamal Heib 	int i;
105c0752f2bSKamal Heib 
106c0752f2bSKamal Heib 	for (i = 0; i < NUM_SW_COUNTERS; i++)
107c0752f2bSKamal Heib 		data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw, sw_stats_desc, i);
108c0752f2bSKamal Heib 	return idx;
109c0752f2bSKamal Heib }
110c0752f2bSKamal Heib 
111868a01a2SShalom Lagziel void mlx5e_grp_sw_update_stats(struct mlx5e_priv *priv)
11219386177SKamal Heib {
11319386177SKamal Heib 	struct mlx5e_sw_stats temp, *s = &temp;
11419386177SKamal Heib 	struct mlx5e_rq_stats *rq_stats;
11519386177SKamal Heib 	struct mlx5e_sq_stats *sq_stats;
11619386177SKamal Heib 	struct mlx5e_ch_stats *ch_stats;
11719386177SKamal Heib 	int i, j;
11819386177SKamal Heib 
11919386177SKamal Heib 	memset(s, 0, sizeof(*s));
120868a01a2SShalom Lagziel 	read_lock(&priv->stats_lock);
121868a01a2SShalom Lagziel 	if (!priv->channels_active)
122868a01a2SShalom Lagziel 		goto out;
12319386177SKamal Heib 	for (i = 0; i < priv->channels.num; i++) {
12419386177SKamal Heib 		struct mlx5e_channel *c = priv->channels.c[i];
12519386177SKamal Heib 
12619386177SKamal Heib 		rq_stats = &c->rq.stats;
12719386177SKamal Heib 		ch_stats = &c->stats;
12819386177SKamal Heib 
12919386177SKamal Heib 		s->rx_packets	+= rq_stats->packets;
13019386177SKamal Heib 		s->rx_bytes	+= rq_stats->bytes;
13119386177SKamal Heib 		s->rx_lro_packets += rq_stats->lro_packets;
13219386177SKamal Heib 		s->rx_lro_bytes	+= rq_stats->lro_bytes;
13319386177SKamal Heib 		s->rx_removed_vlan_packets += rq_stats->removed_vlan_packets;
13419386177SKamal Heib 		s->rx_csum_none	+= rq_stats->csum_none;
13519386177SKamal Heib 		s->rx_csum_complete += rq_stats->csum_complete;
13619386177SKamal Heib 		s->rx_csum_unnecessary += rq_stats->csum_unnecessary;
13719386177SKamal Heib 		s->rx_csum_unnecessary_inner += rq_stats->csum_unnecessary_inner;
13819386177SKamal Heib 		s->rx_xdp_drop += rq_stats->xdp_drop;
13919386177SKamal Heib 		s->rx_xdp_tx += rq_stats->xdp_tx;
14019386177SKamal Heib 		s->rx_xdp_tx_full += rq_stats->xdp_tx_full;
14119386177SKamal Heib 		s->rx_wqe_err   += rq_stats->wqe_err;
14219386177SKamal Heib 		s->rx_mpwqe_filler += rq_stats->mpwqe_filler;
14319386177SKamal Heib 		s->rx_buff_alloc_err += rq_stats->buff_alloc_err;
14419386177SKamal Heib 		s->rx_cqe_compress_blks += rq_stats->cqe_compress_blks;
14519386177SKamal Heib 		s->rx_cqe_compress_pkts += rq_stats->cqe_compress_pkts;
14619386177SKamal Heib 		s->rx_page_reuse  += rq_stats->page_reuse;
14719386177SKamal Heib 		s->rx_cache_reuse += rq_stats->cache_reuse;
14819386177SKamal Heib 		s->rx_cache_full  += rq_stats->cache_full;
14919386177SKamal Heib 		s->rx_cache_empty += rq_stats->cache_empty;
15019386177SKamal Heib 		s->rx_cache_busy  += rq_stats->cache_busy;
15119386177SKamal Heib 		s->rx_cache_waive += rq_stats->cache_waive;
15219386177SKamal Heib 		s->ch_eq_rearm += ch_stats->eq_rearm;
15319386177SKamal Heib 
15419386177SKamal Heib 		for (j = 0; j < priv->channels.params.num_tc; j++) {
15519386177SKamal Heib 			sq_stats = &c->sq[j].stats;
15619386177SKamal Heib 
15719386177SKamal Heib 			s->tx_packets		+= sq_stats->packets;
15819386177SKamal Heib 			s->tx_bytes		+= sq_stats->bytes;
15919386177SKamal Heib 			s->tx_tso_packets	+= sq_stats->tso_packets;
16019386177SKamal Heib 			s->tx_tso_bytes		+= sq_stats->tso_bytes;
16119386177SKamal Heib 			s->tx_tso_inner_packets	+= sq_stats->tso_inner_packets;
16219386177SKamal Heib 			s->tx_tso_inner_bytes	+= sq_stats->tso_inner_bytes;
16319386177SKamal Heib 			s->tx_added_vlan_packets += sq_stats->added_vlan_packets;
16419386177SKamal Heib 			s->tx_queue_stopped	+= sq_stats->stopped;
16519386177SKamal Heib 			s->tx_queue_wake	+= sq_stats->wake;
16619386177SKamal Heib 			s->tx_queue_dropped	+= sq_stats->dropped;
16716cc14d8SEran Ben Elisha 			s->tx_cqe_err		+= sq_stats->cqe_err;
168db75373cSEran Ben Elisha 			s->tx_recover		+= sq_stats->recover;
16919386177SKamal Heib 			s->tx_xmit_more		+= sq_stats->xmit_more;
17019386177SKamal Heib 			s->tx_csum_partial_inner += sq_stats->csum_partial_inner;
17119386177SKamal Heib 			s->tx_csum_none		+= sq_stats->csum_none;
17219386177SKamal Heib 			s->tx_csum_partial	+= sq_stats->csum_partial;
173bf239741SIlya Lesokhin #ifdef CONFIG_MLX5_EN_TLS
174bf239741SIlya Lesokhin 			s->tx_tls_ooo		+= sq_stats->tls_ooo;
175bf239741SIlya Lesokhin 			s->tx_tls_resync_bytes	+= sq_stats->tls_resync_bytes;
176bf239741SIlya Lesokhin #endif
17719386177SKamal Heib 		}
17819386177SKamal Heib 	}
17919386177SKamal Heib 
18019386177SKamal Heib 	memcpy(&priv->stats.sw, s, sizeof(*s));
181868a01a2SShalom Lagziel out:
182868a01a2SShalom Lagziel 	read_unlock(&priv->stats_lock);
18319386177SKamal Heib }
18419386177SKamal Heib 
185fd8dcdb8SKamal Heib static const struct counter_desc q_stats_desc[] = {
186fd8dcdb8SKamal Heib 	{ MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_out_of_buffer) },
187fd8dcdb8SKamal Heib };
188fd8dcdb8SKamal Heib 
1897cbaf9a3SMoshe Shemesh static const struct counter_desc drop_rq_stats_desc[] = {
1907cbaf9a3SMoshe Shemesh 	{ MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_if_down_packets) },
1917cbaf9a3SMoshe Shemesh };
1927cbaf9a3SMoshe Shemesh 
193fd8dcdb8SKamal Heib #define NUM_Q_COUNTERS			ARRAY_SIZE(q_stats_desc)
1947cbaf9a3SMoshe Shemesh #define NUM_DROP_RQ_COUNTERS		ARRAY_SIZE(drop_rq_stats_desc)
195fd8dcdb8SKamal Heib 
196fd8dcdb8SKamal Heib static int mlx5e_grp_q_get_num_stats(struct mlx5e_priv *priv)
197fd8dcdb8SKamal Heib {
1987cbaf9a3SMoshe Shemesh 	int num_stats = 0;
1997cbaf9a3SMoshe Shemesh 
2007cbaf9a3SMoshe Shemesh 	if (priv->q_counter)
2017cbaf9a3SMoshe Shemesh 		num_stats += NUM_Q_COUNTERS;
2027cbaf9a3SMoshe Shemesh 
2037cbaf9a3SMoshe Shemesh 	if (priv->drop_rq_q_counter)
2047cbaf9a3SMoshe Shemesh 		num_stats += NUM_DROP_RQ_COUNTERS;
2057cbaf9a3SMoshe Shemesh 
2067cbaf9a3SMoshe Shemesh 	return num_stats;
207fd8dcdb8SKamal Heib }
208fd8dcdb8SKamal Heib 
209fd8dcdb8SKamal Heib static int mlx5e_grp_q_fill_strings(struct mlx5e_priv *priv, u8 *data, int idx)
210fd8dcdb8SKamal Heib {
211fd8dcdb8SKamal Heib 	int i;
212fd8dcdb8SKamal Heib 
213fd8dcdb8SKamal Heib 	for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++)
2147cbaf9a3SMoshe Shemesh 		strcpy(data + (idx++) * ETH_GSTRING_LEN,
2157cbaf9a3SMoshe Shemesh 		       q_stats_desc[i].format);
2167cbaf9a3SMoshe Shemesh 
2177cbaf9a3SMoshe Shemesh 	for (i = 0; i < NUM_DROP_RQ_COUNTERS && priv->drop_rq_q_counter; i++)
2187cbaf9a3SMoshe Shemesh 		strcpy(data + (idx++) * ETH_GSTRING_LEN,
2197cbaf9a3SMoshe Shemesh 		       drop_rq_stats_desc[i].format);
2207cbaf9a3SMoshe Shemesh 
221fd8dcdb8SKamal Heib 	return idx;
222fd8dcdb8SKamal Heib }
223fd8dcdb8SKamal Heib 
224fd8dcdb8SKamal Heib static int mlx5e_grp_q_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx)
225fd8dcdb8SKamal Heib {
226fd8dcdb8SKamal Heib 	int i;
227fd8dcdb8SKamal Heib 
228fd8dcdb8SKamal Heib 	for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++)
2297cbaf9a3SMoshe Shemesh 		data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
2307cbaf9a3SMoshe Shemesh 						   q_stats_desc, i);
2317cbaf9a3SMoshe Shemesh 	for (i = 0; i < NUM_DROP_RQ_COUNTERS && priv->drop_rq_q_counter; i++)
2327cbaf9a3SMoshe Shemesh 		data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
2337cbaf9a3SMoshe Shemesh 						   drop_rq_stats_desc, i);
234fd8dcdb8SKamal Heib 	return idx;
235fd8dcdb8SKamal Heib }
236fd8dcdb8SKamal Heib 
23719386177SKamal Heib static void mlx5e_grp_q_update_stats(struct mlx5e_priv *priv)
23819386177SKamal Heib {
23919386177SKamal Heib 	struct mlx5e_qcounter_stats *qcnt = &priv->stats.qcnt;
24019386177SKamal Heib 	u32 out[MLX5_ST_SZ_DW(query_q_counter_out)];
24119386177SKamal Heib 
2427cbaf9a3SMoshe Shemesh 	if (priv->q_counter &&
2437cbaf9a3SMoshe Shemesh 	    !mlx5_core_query_q_counter(priv->mdev, priv->q_counter, 0, out,
2447cbaf9a3SMoshe Shemesh 				       sizeof(out)))
2457cbaf9a3SMoshe Shemesh 		qcnt->rx_out_of_buffer = MLX5_GET(query_q_counter_out,
2467cbaf9a3SMoshe Shemesh 						  out, out_of_buffer);
2477cbaf9a3SMoshe Shemesh 	if (priv->drop_rq_q_counter &&
2487cbaf9a3SMoshe Shemesh 	    !mlx5_core_query_q_counter(priv->mdev, priv->drop_rq_q_counter, 0,
2497cbaf9a3SMoshe Shemesh 				       out, sizeof(out)))
2507cbaf9a3SMoshe Shemesh 		qcnt->rx_if_down_packets = MLX5_GET(query_q_counter_out, out,
2517cbaf9a3SMoshe Shemesh 						    out_of_buffer);
25219386177SKamal Heib }
25319386177SKamal Heib 
2545c298143SMoshe Shemesh #define VNIC_ENV_OFF(c) MLX5_BYTE_OFF(query_vnic_env_out, c)
2555c298143SMoshe Shemesh static const struct counter_desc vnic_env_stats_desc[] = {
2565c298143SMoshe Shemesh 	{ "rx_steer_missed_packets",
2575c298143SMoshe Shemesh 		VNIC_ENV_OFF(vport_env.nic_receive_steering_discard) },
2585c298143SMoshe Shemesh };
2595c298143SMoshe Shemesh 
2605c298143SMoshe Shemesh #define NUM_VNIC_ENV_COUNTERS		ARRAY_SIZE(vnic_env_stats_desc)
2615c298143SMoshe Shemesh 
2625c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_get_num_stats(struct mlx5e_priv *priv)
2635c298143SMoshe Shemesh {
2645c298143SMoshe Shemesh 	return MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard) ?
2655c298143SMoshe Shemesh 		NUM_VNIC_ENV_COUNTERS : 0;
2665c298143SMoshe Shemesh }
2675c298143SMoshe Shemesh 
2685c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_fill_strings(struct mlx5e_priv *priv, u8 *data,
2695c298143SMoshe Shemesh 					   int idx)
2705c298143SMoshe Shemesh {
2715c298143SMoshe Shemesh 	int i;
2725c298143SMoshe Shemesh 
2735c298143SMoshe Shemesh 	if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard))
2745c298143SMoshe Shemesh 		return idx;
2755c298143SMoshe Shemesh 
2765c298143SMoshe Shemesh 	for (i = 0; i < NUM_VNIC_ENV_COUNTERS; i++)
2775c298143SMoshe Shemesh 		strcpy(data + (idx++) * ETH_GSTRING_LEN,
2785c298143SMoshe Shemesh 		       vnic_env_stats_desc[i].format);
2795c298143SMoshe Shemesh 	return idx;
2805c298143SMoshe Shemesh }
2815c298143SMoshe Shemesh 
2825c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_fill_stats(struct mlx5e_priv *priv, u64 *data,
2835c298143SMoshe Shemesh 					 int idx)
2845c298143SMoshe Shemesh {
2855c298143SMoshe Shemesh 	int i;
2865c298143SMoshe Shemesh 
2875c298143SMoshe Shemesh 	if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard))
2885c298143SMoshe Shemesh 		return idx;
2895c298143SMoshe Shemesh 
2905c298143SMoshe Shemesh 	for (i = 0; i < NUM_VNIC_ENV_COUNTERS; i++)
2915c298143SMoshe Shemesh 		data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vnic.query_vnic_env_out,
2925c298143SMoshe Shemesh 						  vnic_env_stats_desc, i);
2935c298143SMoshe Shemesh 	return idx;
2945c298143SMoshe Shemesh }
2955c298143SMoshe Shemesh 
2965c298143SMoshe Shemesh static void mlx5e_grp_vnic_env_update_stats(struct mlx5e_priv *priv)
2975c298143SMoshe Shemesh {
2985c298143SMoshe Shemesh 	u32 *out = (u32 *)priv->stats.vnic.query_vnic_env_out;
2995c298143SMoshe Shemesh 	int outlen = MLX5_ST_SZ_BYTES(query_vnic_env_out);
3005c298143SMoshe Shemesh 	u32 in[MLX5_ST_SZ_DW(query_vnic_env_in)] = {0};
3015c298143SMoshe Shemesh 	struct mlx5_core_dev *mdev = priv->mdev;
3025c298143SMoshe Shemesh 
3035c298143SMoshe Shemesh 	if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard))
3045c298143SMoshe Shemesh 		return;
3055c298143SMoshe Shemesh 
3065c298143SMoshe Shemesh 	MLX5_SET(query_vnic_env_in, in, opcode,
3075c298143SMoshe Shemesh 		 MLX5_CMD_OP_QUERY_VNIC_ENV);
3085c298143SMoshe Shemesh 	MLX5_SET(query_vnic_env_in, in, op_mod, 0);
3095c298143SMoshe Shemesh 	MLX5_SET(query_vnic_env_in, in, other_vport, 0);
3105c298143SMoshe Shemesh 	mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
3115c298143SMoshe Shemesh }
3125c298143SMoshe Shemesh 
31340cab9f1SKamal Heib #define VPORT_COUNTER_OFF(c) MLX5_BYTE_OFF(query_vport_counter_out, c)
31440cab9f1SKamal Heib static const struct counter_desc vport_stats_desc[] = {
31540cab9f1SKamal Heib 	{ "rx_vport_unicast_packets",
31640cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_unicast.packets) },
31740cab9f1SKamal Heib 	{ "rx_vport_unicast_bytes",
31840cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_unicast.octets) },
31940cab9f1SKamal Heib 	{ "tx_vport_unicast_packets",
32040cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_unicast.packets) },
32140cab9f1SKamal Heib 	{ "tx_vport_unicast_bytes",
32240cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_unicast.octets) },
32340cab9f1SKamal Heib 	{ "rx_vport_multicast_packets",
32440cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_multicast.packets) },
32540cab9f1SKamal Heib 	{ "rx_vport_multicast_bytes",
32640cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_multicast.octets) },
32740cab9f1SKamal Heib 	{ "tx_vport_multicast_packets",
32840cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_multicast.packets) },
32940cab9f1SKamal Heib 	{ "tx_vport_multicast_bytes",
33040cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_multicast.octets) },
33140cab9f1SKamal Heib 	{ "rx_vport_broadcast_packets",
33240cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_broadcast.packets) },
33340cab9f1SKamal Heib 	{ "rx_vport_broadcast_bytes",
33440cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_eth_broadcast.octets) },
33540cab9f1SKamal Heib 	{ "tx_vport_broadcast_packets",
33640cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_broadcast.packets) },
33740cab9f1SKamal Heib 	{ "tx_vport_broadcast_bytes",
33840cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_eth_broadcast.octets) },
33940cab9f1SKamal Heib 	{ "rx_vport_rdma_unicast_packets",
34040cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_ib_unicast.packets) },
34140cab9f1SKamal Heib 	{ "rx_vport_rdma_unicast_bytes",
34240cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_ib_unicast.octets) },
34340cab9f1SKamal Heib 	{ "tx_vport_rdma_unicast_packets",
34440cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_ib_unicast.packets) },
34540cab9f1SKamal Heib 	{ "tx_vport_rdma_unicast_bytes",
34640cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_ib_unicast.octets) },
34740cab9f1SKamal Heib 	{ "rx_vport_rdma_multicast_packets",
34840cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_ib_multicast.packets) },
34940cab9f1SKamal Heib 	{ "rx_vport_rdma_multicast_bytes",
35040cab9f1SKamal Heib 		VPORT_COUNTER_OFF(received_ib_multicast.octets) },
35140cab9f1SKamal Heib 	{ "tx_vport_rdma_multicast_packets",
35240cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_ib_multicast.packets) },
35340cab9f1SKamal Heib 	{ "tx_vport_rdma_multicast_bytes",
35440cab9f1SKamal Heib 		VPORT_COUNTER_OFF(transmitted_ib_multicast.octets) },
35540cab9f1SKamal Heib };
35640cab9f1SKamal Heib 
35740cab9f1SKamal Heib #define NUM_VPORT_COUNTERS		ARRAY_SIZE(vport_stats_desc)
35840cab9f1SKamal Heib 
35940cab9f1SKamal Heib static int mlx5e_grp_vport_get_num_stats(struct mlx5e_priv *priv)
36040cab9f1SKamal Heib {
36140cab9f1SKamal Heib 	return NUM_VPORT_COUNTERS;
36240cab9f1SKamal Heib }
36340cab9f1SKamal Heib 
36440cab9f1SKamal Heib static int mlx5e_grp_vport_fill_strings(struct mlx5e_priv *priv, u8 *data,
36540cab9f1SKamal Heib 					int idx)
36640cab9f1SKamal Heib {
36740cab9f1SKamal Heib 	int i;
36840cab9f1SKamal Heib 
36940cab9f1SKamal Heib 	for (i = 0; i < NUM_VPORT_COUNTERS; i++)
37040cab9f1SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, vport_stats_desc[i].format);
37140cab9f1SKamal Heib 	return idx;
37240cab9f1SKamal Heib }
37340cab9f1SKamal Heib 
37440cab9f1SKamal Heib static int mlx5e_grp_vport_fill_stats(struct mlx5e_priv *priv, u64 *data,
37540cab9f1SKamal Heib 				      int idx)
37640cab9f1SKamal Heib {
37740cab9f1SKamal Heib 	int i;
37840cab9f1SKamal Heib 
37940cab9f1SKamal Heib 	for (i = 0; i < NUM_VPORT_COUNTERS; i++)
38040cab9f1SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
38140cab9f1SKamal Heib 						  vport_stats_desc, i);
38240cab9f1SKamal Heib 	return idx;
38340cab9f1SKamal Heib }
38440cab9f1SKamal Heib 
38519386177SKamal Heib static void mlx5e_grp_vport_update_stats(struct mlx5e_priv *priv)
38619386177SKamal Heib {
38719386177SKamal Heib 	int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
38819386177SKamal Heib 	u32 *out = (u32 *)priv->stats.vport.query_vport_out;
38919386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {0};
39019386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
39119386177SKamal Heib 
39219386177SKamal Heib 	MLX5_SET(query_vport_counter_in, in, opcode, MLX5_CMD_OP_QUERY_VPORT_COUNTER);
39319386177SKamal Heib 	MLX5_SET(query_vport_counter_in, in, op_mod, 0);
39419386177SKamal Heib 	MLX5_SET(query_vport_counter_in, in, other_vport, 0);
39519386177SKamal Heib 	mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
39619386177SKamal Heib }
39719386177SKamal Heib 
3986e6ef814SKamal Heib #define PPORT_802_3_OFF(c) \
3996e6ef814SKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
4006e6ef814SKamal Heib 		      counter_set.eth_802_3_cntrs_grp_data_layout.c##_high)
4016e6ef814SKamal Heib static const struct counter_desc pport_802_3_stats_desc[] = {
4026e6ef814SKamal Heib 	{ "tx_packets_phy", PPORT_802_3_OFF(a_frames_transmitted_ok) },
4036e6ef814SKamal Heib 	{ "rx_packets_phy", PPORT_802_3_OFF(a_frames_received_ok) },
4046e6ef814SKamal Heib 	{ "rx_crc_errors_phy", PPORT_802_3_OFF(a_frame_check_sequence_errors) },
4056e6ef814SKamal Heib 	{ "tx_bytes_phy", PPORT_802_3_OFF(a_octets_transmitted_ok) },
4066e6ef814SKamal Heib 	{ "rx_bytes_phy", PPORT_802_3_OFF(a_octets_received_ok) },
4076e6ef814SKamal Heib 	{ "tx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_xmitted_ok) },
4086e6ef814SKamal Heib 	{ "tx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_xmitted_ok) },
4096e6ef814SKamal Heib 	{ "rx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_received_ok) },
4106e6ef814SKamal Heib 	{ "rx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_received_ok) },
4116e6ef814SKamal Heib 	{ "rx_in_range_len_errors_phy", PPORT_802_3_OFF(a_in_range_length_errors) },
4126e6ef814SKamal Heib 	{ "rx_out_of_range_len_phy", PPORT_802_3_OFF(a_out_of_range_length_field) },
4136e6ef814SKamal Heib 	{ "rx_oversize_pkts_phy", PPORT_802_3_OFF(a_frame_too_long_errors) },
4146e6ef814SKamal Heib 	{ "rx_symbol_err_phy", PPORT_802_3_OFF(a_symbol_error_during_carrier) },
4156e6ef814SKamal Heib 	{ "tx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_transmitted) },
4166e6ef814SKamal Heib 	{ "rx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_received) },
4176e6ef814SKamal Heib 	{ "rx_unsupported_op_phy", PPORT_802_3_OFF(a_unsupported_opcodes_received) },
4186e6ef814SKamal Heib 	{ "rx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_received) },
4196e6ef814SKamal Heib 	{ "tx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_transmitted) },
4206e6ef814SKamal Heib };
4216e6ef814SKamal Heib 
4226e6ef814SKamal Heib #define NUM_PPORT_802_3_COUNTERS	ARRAY_SIZE(pport_802_3_stats_desc)
4236e6ef814SKamal Heib 
4246e6ef814SKamal Heib static int mlx5e_grp_802_3_get_num_stats(struct mlx5e_priv *priv)
4256e6ef814SKamal Heib {
4266e6ef814SKamal Heib 	return NUM_PPORT_802_3_COUNTERS;
4276e6ef814SKamal Heib }
4286e6ef814SKamal Heib 
4296e6ef814SKamal Heib static int mlx5e_grp_802_3_fill_strings(struct mlx5e_priv *priv, u8 *data,
4306e6ef814SKamal Heib 					int idx)
4316e6ef814SKamal Heib {
4326e6ef814SKamal Heib 	int i;
4336e6ef814SKamal Heib 
4346e6ef814SKamal Heib 	for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
4356e6ef814SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_802_3_stats_desc[i].format);
4366e6ef814SKamal Heib 	return idx;
4376e6ef814SKamal Heib }
4386e6ef814SKamal Heib 
4396e6ef814SKamal Heib static int mlx5e_grp_802_3_fill_stats(struct mlx5e_priv *priv, u64 *data,
4406e6ef814SKamal Heib 				      int idx)
4416e6ef814SKamal Heib {
4426e6ef814SKamal Heib 	int i;
4436e6ef814SKamal Heib 
4446e6ef814SKamal Heib 	for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
4456e6ef814SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
4466e6ef814SKamal Heib 						  pport_802_3_stats_desc, i);
4476e6ef814SKamal Heib 	return idx;
4486e6ef814SKamal Heib }
4496e6ef814SKamal Heib 
45019386177SKamal Heib static void mlx5e_grp_802_3_update_stats(struct mlx5e_priv *priv)
45119386177SKamal Heib {
45219386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
45319386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
45419386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
45519386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
45619386177SKamal Heib 	void *out;
45719386177SKamal Heib 
45819386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
45919386177SKamal Heib 	out = pstats->IEEE_802_3_counters;
46019386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_IEEE_802_3_COUNTERS_GROUP);
46119386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
46219386177SKamal Heib }
46319386177SKamal Heib 
464fc8e64a3SKamal Heib #define PPORT_2863_OFF(c) \
465fc8e64a3SKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
466fc8e64a3SKamal Heib 		      counter_set.eth_2863_cntrs_grp_data_layout.c##_high)
467fc8e64a3SKamal Heib static const struct counter_desc pport_2863_stats_desc[] = {
468fc8e64a3SKamal Heib 	{ "rx_discards_phy", PPORT_2863_OFF(if_in_discards) },
469fc8e64a3SKamal Heib 	{ "tx_discards_phy", PPORT_2863_OFF(if_out_discards) },
470fc8e64a3SKamal Heib 	{ "tx_errors_phy", PPORT_2863_OFF(if_out_errors) },
471fc8e64a3SKamal Heib };
472fc8e64a3SKamal Heib 
473fc8e64a3SKamal Heib #define NUM_PPORT_2863_COUNTERS		ARRAY_SIZE(pport_2863_stats_desc)
474fc8e64a3SKamal Heib 
475fc8e64a3SKamal Heib static int mlx5e_grp_2863_get_num_stats(struct mlx5e_priv *priv)
476fc8e64a3SKamal Heib {
477fc8e64a3SKamal Heib 	return NUM_PPORT_2863_COUNTERS;
478fc8e64a3SKamal Heib }
479fc8e64a3SKamal Heib 
480fc8e64a3SKamal Heib static int mlx5e_grp_2863_fill_strings(struct mlx5e_priv *priv, u8 *data,
481fc8e64a3SKamal Heib 				       int idx)
482fc8e64a3SKamal Heib {
483fc8e64a3SKamal Heib 	int i;
484fc8e64a3SKamal Heib 
485fc8e64a3SKamal Heib 	for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
486fc8e64a3SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2863_stats_desc[i].format);
487fc8e64a3SKamal Heib 	return idx;
488fc8e64a3SKamal Heib }
489fc8e64a3SKamal Heib 
490fc8e64a3SKamal Heib static int mlx5e_grp_2863_fill_stats(struct mlx5e_priv *priv, u64 *data,
491fc8e64a3SKamal Heib 				     int idx)
492fc8e64a3SKamal Heib {
493fc8e64a3SKamal Heib 	int i;
494fc8e64a3SKamal Heib 
495fc8e64a3SKamal Heib 	for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
496fc8e64a3SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
497fc8e64a3SKamal Heib 						  pport_2863_stats_desc, i);
498fc8e64a3SKamal Heib 	return idx;
499fc8e64a3SKamal Heib }
500fc8e64a3SKamal Heib 
50119386177SKamal Heib static void mlx5e_grp_2863_update_stats(struct mlx5e_priv *priv)
50219386177SKamal Heib {
50319386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
50419386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
50519386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
50619386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
50719386177SKamal Heib 	void *out;
50819386177SKamal Heib 
50919386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
51019386177SKamal Heib 	out = pstats->RFC_2863_counters;
51119386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2863_COUNTERS_GROUP);
51219386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
51319386177SKamal Heib }
51419386177SKamal Heib 
515e0e0def9SKamal Heib #define PPORT_2819_OFF(c) \
516e0e0def9SKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
517e0e0def9SKamal Heib 		      counter_set.eth_2819_cntrs_grp_data_layout.c##_high)
518e0e0def9SKamal Heib static const struct counter_desc pport_2819_stats_desc[] = {
519e0e0def9SKamal Heib 	{ "rx_undersize_pkts_phy", PPORT_2819_OFF(ether_stats_undersize_pkts) },
520e0e0def9SKamal Heib 	{ "rx_fragments_phy", PPORT_2819_OFF(ether_stats_fragments) },
521e0e0def9SKamal Heib 	{ "rx_jabbers_phy", PPORT_2819_OFF(ether_stats_jabbers) },
522e0e0def9SKamal Heib 	{ "rx_64_bytes_phy", PPORT_2819_OFF(ether_stats_pkts64octets) },
523e0e0def9SKamal Heib 	{ "rx_65_to_127_bytes_phy", PPORT_2819_OFF(ether_stats_pkts65to127octets) },
524e0e0def9SKamal Heib 	{ "rx_128_to_255_bytes_phy", PPORT_2819_OFF(ether_stats_pkts128to255octets) },
525e0e0def9SKamal Heib 	{ "rx_256_to_511_bytes_phy", PPORT_2819_OFF(ether_stats_pkts256to511octets) },
526e0e0def9SKamal Heib 	{ "rx_512_to_1023_bytes_phy", PPORT_2819_OFF(ether_stats_pkts512to1023octets) },
527e0e0def9SKamal Heib 	{ "rx_1024_to_1518_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1024to1518octets) },
528e0e0def9SKamal Heib 	{ "rx_1519_to_2047_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1519to2047octets) },
529e0e0def9SKamal Heib 	{ "rx_2048_to_4095_bytes_phy", PPORT_2819_OFF(ether_stats_pkts2048to4095octets) },
530e0e0def9SKamal Heib 	{ "rx_4096_to_8191_bytes_phy", PPORT_2819_OFF(ether_stats_pkts4096to8191octets) },
531e0e0def9SKamal Heib 	{ "rx_8192_to_10239_bytes_phy", PPORT_2819_OFF(ether_stats_pkts8192to10239octets) },
532e0e0def9SKamal Heib };
533e0e0def9SKamal Heib 
534e0e0def9SKamal Heib #define NUM_PPORT_2819_COUNTERS		ARRAY_SIZE(pport_2819_stats_desc)
535e0e0def9SKamal Heib 
536e0e0def9SKamal Heib static int mlx5e_grp_2819_get_num_stats(struct mlx5e_priv *priv)
537e0e0def9SKamal Heib {
538e0e0def9SKamal Heib 	return NUM_PPORT_2819_COUNTERS;
539e0e0def9SKamal Heib }
540e0e0def9SKamal Heib 
541e0e0def9SKamal Heib static int mlx5e_grp_2819_fill_strings(struct mlx5e_priv *priv, u8 *data,
542e0e0def9SKamal Heib 				       int idx)
543e0e0def9SKamal Heib {
544e0e0def9SKamal Heib 	int i;
545e0e0def9SKamal Heib 
546e0e0def9SKamal Heib 	for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
547e0e0def9SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2819_stats_desc[i].format);
548e0e0def9SKamal Heib 	return idx;
549e0e0def9SKamal Heib }
550e0e0def9SKamal Heib 
551e0e0def9SKamal Heib static int mlx5e_grp_2819_fill_stats(struct mlx5e_priv *priv, u64 *data,
552e0e0def9SKamal Heib 				     int idx)
553e0e0def9SKamal Heib {
554e0e0def9SKamal Heib 	int i;
555e0e0def9SKamal Heib 
556e0e0def9SKamal Heib 	for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
557e0e0def9SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
558e0e0def9SKamal Heib 						  pport_2819_stats_desc, i);
559e0e0def9SKamal Heib 	return idx;
560e0e0def9SKamal Heib }
561e0e0def9SKamal Heib 
56219386177SKamal Heib static void mlx5e_grp_2819_update_stats(struct mlx5e_priv *priv)
56319386177SKamal Heib {
56419386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
56519386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
56619386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
56719386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
56819386177SKamal Heib 	void *out;
56919386177SKamal Heib 
57019386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
57119386177SKamal Heib 	out = pstats->RFC_2819_counters;
57219386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2819_COUNTERS_GROUP);
57319386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
57419386177SKamal Heib }
57519386177SKamal Heib 
5762e4df0b2SKamal Heib #define PPORT_PHY_STATISTICAL_OFF(c) \
5772e4df0b2SKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
5782e4df0b2SKamal Heib 		      counter_set.phys_layer_statistical_cntrs.c##_high)
5792e4df0b2SKamal Heib static const struct counter_desc pport_phy_statistical_stats_desc[] = {
5802e4df0b2SKamal Heib 	{ "rx_pcs_symbol_err_phy", PPORT_PHY_STATISTICAL_OFF(phy_symbol_errors) },
5812e4df0b2SKamal Heib 	{ "rx_corrected_bits_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits) },
5822e4df0b2SKamal Heib };
5832e4df0b2SKamal Heib 
5846ab75516SSaeed Mahameed #define NUM_PPORT_PHY_STATISTICAL_COUNTERS ARRAY_SIZE(pport_phy_statistical_stats_desc)
5852e4df0b2SKamal Heib 
5862e4df0b2SKamal Heib static int mlx5e_grp_phy_get_num_stats(struct mlx5e_priv *priv)
5872e4df0b2SKamal Heib {
5886ab75516SSaeed Mahameed 	/* "1" for link_down_events special counter */
5892e4df0b2SKamal Heib 	return MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group) ?
5906ab75516SSaeed Mahameed 		NUM_PPORT_PHY_STATISTICAL_COUNTERS + 1 : 1;
5912e4df0b2SKamal Heib }
5922e4df0b2SKamal Heib 
5932e4df0b2SKamal Heib static int mlx5e_grp_phy_fill_strings(struct mlx5e_priv *priv, u8 *data,
5942e4df0b2SKamal Heib 				      int idx)
5952e4df0b2SKamal Heib {
5962e4df0b2SKamal Heib 	int i;
5972e4df0b2SKamal Heib 
5986ab75516SSaeed Mahameed 	strcpy(data + (idx++) * ETH_GSTRING_LEN, "link_down_events_phy");
5996ab75516SSaeed Mahameed 
6006ab75516SSaeed Mahameed 	if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group))
6016ab75516SSaeed Mahameed 		return idx;
6026ab75516SSaeed Mahameed 
6036ab75516SSaeed Mahameed 	for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++)
6042e4df0b2SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN,
6052e4df0b2SKamal Heib 		       pport_phy_statistical_stats_desc[i].format);
6062e4df0b2SKamal Heib 	return idx;
6072e4df0b2SKamal Heib }
6082e4df0b2SKamal Heib 
6092e4df0b2SKamal Heib static int mlx5e_grp_phy_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx)
6102e4df0b2SKamal Heib {
6112e4df0b2SKamal Heib 	int i;
6122e4df0b2SKamal Heib 
6136ab75516SSaeed Mahameed 	/* link_down_events_phy has special handling since it is not stored in __be64 format */
6146ab75516SSaeed Mahameed 	data[idx++] = MLX5_GET(ppcnt_reg, priv->stats.pport.phy_counters,
6156ab75516SSaeed Mahameed 			       counter_set.phys_layer_cntrs.link_down_events);
6166ab75516SSaeed Mahameed 
6176ab75516SSaeed Mahameed 	if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group))
6186ab75516SSaeed Mahameed 		return idx;
6196ab75516SSaeed Mahameed 
6206ab75516SSaeed Mahameed 	for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++)
6212e4df0b2SKamal Heib 		data[idx++] =
6222e4df0b2SKamal Heib 			MLX5E_READ_CTR64_BE(&priv->stats.pport.phy_statistical_counters,
6232e4df0b2SKamal Heib 					    pport_phy_statistical_stats_desc, i);
6242e4df0b2SKamal Heib 	return idx;
6252e4df0b2SKamal Heib }
6262e4df0b2SKamal Heib 
62719386177SKamal Heib static void mlx5e_grp_phy_update_stats(struct mlx5e_priv *priv)
62819386177SKamal Heib {
62919386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
63019386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
63119386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
63219386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
63319386177SKamal Heib 	void *out;
63419386177SKamal Heib 
63519386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
63619386177SKamal Heib 	out = pstats->phy_counters;
63719386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_COUNTERS_GROUP);
63819386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
63919386177SKamal Heib 
64019386177SKamal Heib 	if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group))
64119386177SKamal Heib 		return;
64219386177SKamal Heib 
64319386177SKamal Heib 	out = pstats->phy_statistical_counters;
64419386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_STATISTICAL_GROUP);
64519386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
64619386177SKamal Heib }
64719386177SKamal Heib 
6483488bd4cSKamal Heib #define PPORT_ETH_EXT_OFF(c) \
6493488bd4cSKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
6503488bd4cSKamal Heib 		      counter_set.eth_extended_cntrs_grp_data_layout.c##_high)
6513488bd4cSKamal Heib static const struct counter_desc pport_eth_ext_stats_desc[] = {
6523488bd4cSKamal Heib 	{ "rx_buffer_passed_thres_phy", PPORT_ETH_EXT_OFF(rx_buffer_almost_full) },
6533488bd4cSKamal Heib };
6543488bd4cSKamal Heib 
6553488bd4cSKamal Heib #define NUM_PPORT_ETH_EXT_COUNTERS	ARRAY_SIZE(pport_eth_ext_stats_desc)
6563488bd4cSKamal Heib 
6573488bd4cSKamal Heib static int mlx5e_grp_eth_ext_get_num_stats(struct mlx5e_priv *priv)
6583488bd4cSKamal Heib {
6593488bd4cSKamal Heib 	if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
6603488bd4cSKamal Heib 		return NUM_PPORT_ETH_EXT_COUNTERS;
6613488bd4cSKamal Heib 
6623488bd4cSKamal Heib 	return 0;
6633488bd4cSKamal Heib }
6643488bd4cSKamal Heib 
6653488bd4cSKamal Heib static int mlx5e_grp_eth_ext_fill_strings(struct mlx5e_priv *priv, u8 *data,
6663488bd4cSKamal Heib 					  int idx)
6673488bd4cSKamal Heib {
6683488bd4cSKamal Heib 	int i;
6693488bd4cSKamal Heib 
6703488bd4cSKamal Heib 	if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
6713488bd4cSKamal Heib 		for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++)
6723488bd4cSKamal Heib 			strcpy(data + (idx++) * ETH_GSTRING_LEN,
6733488bd4cSKamal Heib 			       pport_eth_ext_stats_desc[i].format);
6743488bd4cSKamal Heib 	return idx;
6753488bd4cSKamal Heib }
6763488bd4cSKamal Heib 
6773488bd4cSKamal Heib static int mlx5e_grp_eth_ext_fill_stats(struct mlx5e_priv *priv, u64 *data,
6783488bd4cSKamal Heib 					int idx)
6793488bd4cSKamal Heib {
6803488bd4cSKamal Heib 	int i;
6813488bd4cSKamal Heib 
6823488bd4cSKamal Heib 	if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
6833488bd4cSKamal Heib 		for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++)
6843488bd4cSKamal Heib 			data[idx++] =
6853488bd4cSKamal Heib 				MLX5E_READ_CTR64_BE(&priv->stats.pport.eth_ext_counters,
6863488bd4cSKamal Heib 						    pport_eth_ext_stats_desc, i);
6873488bd4cSKamal Heib 	return idx;
6883488bd4cSKamal Heib }
6893488bd4cSKamal Heib 
69019386177SKamal Heib static void mlx5e_grp_eth_ext_update_stats(struct mlx5e_priv *priv)
69119386177SKamal Heib {
69219386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
69319386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
69419386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
69519386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
69619386177SKamal Heib 	void *out;
69719386177SKamal Heib 
69819386177SKamal Heib 	if (!MLX5_CAP_PCAM_FEATURE(mdev, rx_buffer_fullness_counters))
69919386177SKamal Heib 		return;
70019386177SKamal Heib 
70119386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
70219386177SKamal Heib 	out = pstats->eth_ext_counters;
70319386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP);
70419386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
70519386177SKamal Heib }
70619386177SKamal Heib 
7079fd2b5f1SKamal Heib #define PCIE_PERF_OFF(c) \
7089fd2b5f1SKamal Heib 	MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c)
7099fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc[] = {
7109fd2b5f1SKamal Heib 	{ "rx_pci_signal_integrity", PCIE_PERF_OFF(rx_errors) },
7119fd2b5f1SKamal Heib 	{ "tx_pci_signal_integrity", PCIE_PERF_OFF(tx_errors) },
7129fd2b5f1SKamal Heib };
7139fd2b5f1SKamal Heib 
7149fd2b5f1SKamal Heib #define PCIE_PERF_OFF64(c) \
7159fd2b5f1SKamal Heib 	MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c##_high)
7169fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc64[] = {
7179fd2b5f1SKamal Heib 	{ "outbound_pci_buffer_overflow", PCIE_PERF_OFF64(tx_overflow_buffer_pkt) },
7189fd2b5f1SKamal Heib };
7199fd2b5f1SKamal Heib 
7209fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stall_stats_desc[] = {
7219fd2b5f1SKamal Heib 	{ "outbound_pci_stalled_rd", PCIE_PERF_OFF(outbound_stalled_reads) },
7229fd2b5f1SKamal Heib 	{ "outbound_pci_stalled_wr", PCIE_PERF_OFF(outbound_stalled_writes) },
7239fd2b5f1SKamal Heib 	{ "outbound_pci_stalled_rd_events", PCIE_PERF_OFF(outbound_stalled_reads_events) },
7249fd2b5f1SKamal Heib 	{ "outbound_pci_stalled_wr_events", PCIE_PERF_OFF(outbound_stalled_writes_events) },
7259fd2b5f1SKamal Heib };
7269fd2b5f1SKamal Heib 
7279fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS		ARRAY_SIZE(pcie_perf_stats_desc)
7289fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS64	ARRAY_SIZE(pcie_perf_stats_desc64)
7299fd2b5f1SKamal Heib #define NUM_PCIE_PERF_STALL_COUNTERS	ARRAY_SIZE(pcie_perf_stall_stats_desc)
7309fd2b5f1SKamal Heib 
7319fd2b5f1SKamal Heib static int mlx5e_grp_pcie_get_num_stats(struct mlx5e_priv *priv)
7329fd2b5f1SKamal Heib {
7339fd2b5f1SKamal Heib 	int num_stats = 0;
7349fd2b5f1SKamal Heib 
7359fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group))
7369fd2b5f1SKamal Heib 		num_stats += NUM_PCIE_PERF_COUNTERS;
7379fd2b5f1SKamal Heib 
7389fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt))
7399fd2b5f1SKamal Heib 		num_stats += NUM_PCIE_PERF_COUNTERS64;
7409fd2b5f1SKamal Heib 
7419fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled))
7429fd2b5f1SKamal Heib 		num_stats += NUM_PCIE_PERF_STALL_COUNTERS;
7439fd2b5f1SKamal Heib 
7449fd2b5f1SKamal Heib 	return num_stats;
7459fd2b5f1SKamal Heib }
7469fd2b5f1SKamal Heib 
7479fd2b5f1SKamal Heib static int mlx5e_grp_pcie_fill_strings(struct mlx5e_priv *priv, u8 *data,
7489fd2b5f1SKamal Heib 				       int idx)
7499fd2b5f1SKamal Heib {
7509fd2b5f1SKamal Heib 	int i;
7519fd2b5f1SKamal Heib 
7529fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group))
7539fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++)
7549fd2b5f1SKamal Heib 			strcpy(data + (idx++) * ETH_GSTRING_LEN,
7559fd2b5f1SKamal Heib 			       pcie_perf_stats_desc[i].format);
7569fd2b5f1SKamal Heib 
7579fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt))
7589fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++)
7599fd2b5f1SKamal Heib 			strcpy(data + (idx++) * ETH_GSTRING_LEN,
7609fd2b5f1SKamal Heib 			       pcie_perf_stats_desc64[i].format);
7619fd2b5f1SKamal Heib 
7629fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled))
7639fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++)
7649fd2b5f1SKamal Heib 			strcpy(data + (idx++) * ETH_GSTRING_LEN,
7659fd2b5f1SKamal Heib 			       pcie_perf_stall_stats_desc[i].format);
7669fd2b5f1SKamal Heib 	return idx;
7679fd2b5f1SKamal Heib }
7689fd2b5f1SKamal Heib 
7699fd2b5f1SKamal Heib static int mlx5e_grp_pcie_fill_stats(struct mlx5e_priv *priv, u64 *data,
7709fd2b5f1SKamal Heib 				     int idx)
7719fd2b5f1SKamal Heib {
7729fd2b5f1SKamal Heib 	int i;
7739fd2b5f1SKamal Heib 
7749fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group))
7759fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++)
7769fd2b5f1SKamal Heib 			data[idx++] =
7779fd2b5f1SKamal Heib 				MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters,
7789fd2b5f1SKamal Heib 						    pcie_perf_stats_desc, i);
7799fd2b5f1SKamal Heib 
7809fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt))
7819fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++)
7829fd2b5f1SKamal Heib 			data[idx++] =
7839fd2b5f1SKamal Heib 				MLX5E_READ_CTR64_BE(&priv->stats.pcie.pcie_perf_counters,
7849fd2b5f1SKamal Heib 						    pcie_perf_stats_desc64, i);
7859fd2b5f1SKamal Heib 
7869fd2b5f1SKamal Heib 	if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled))
7879fd2b5f1SKamal Heib 		for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++)
7889fd2b5f1SKamal Heib 			data[idx++] =
7899fd2b5f1SKamal Heib 				MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters,
7909fd2b5f1SKamal Heib 						    pcie_perf_stall_stats_desc, i);
7919fd2b5f1SKamal Heib 	return idx;
7929fd2b5f1SKamal Heib }
7939fd2b5f1SKamal Heib 
79419386177SKamal Heib static void mlx5e_grp_pcie_update_stats(struct mlx5e_priv *priv)
79519386177SKamal Heib {
79619386177SKamal Heib 	struct mlx5e_pcie_stats *pcie_stats = &priv->stats.pcie;
79719386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
79819386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(mpcnt_reg)] = {0};
79919386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(mpcnt_reg);
80019386177SKamal Heib 	void *out;
80119386177SKamal Heib 
80219386177SKamal Heib 	if (!MLX5_CAP_MCAM_FEATURE(mdev, pcie_performance_group))
80319386177SKamal Heib 		return;
80419386177SKamal Heib 
80519386177SKamal Heib 	out = pcie_stats->pcie_perf_counters;
80619386177SKamal Heib 	MLX5_SET(mpcnt_reg, in, grp, MLX5_PCIE_PERFORMANCE_COUNTERS_GROUP);
80719386177SKamal Heib 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_MPCNT, 0, 0);
80819386177SKamal Heib }
80919386177SKamal Heib 
8104377bea2SKamal Heib #define PPORT_PER_PRIO_OFF(c) \
8114377bea2SKamal Heib 	MLX5_BYTE_OFF(ppcnt_reg, \
8124377bea2SKamal Heib 		      counter_set.eth_per_prio_grp_data_layout.c##_high)
813e6000651SKamal Heib static const struct counter_desc pport_per_prio_traffic_stats_desc[] = {
814e6000651SKamal Heib 	{ "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets) },
815e6000651SKamal Heib 	{ "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames) },
816e6000651SKamal Heib 	{ "tx_prio%d_bytes", PPORT_PER_PRIO_OFF(tx_octets) },
817e6000651SKamal Heib 	{ "tx_prio%d_packets", PPORT_PER_PRIO_OFF(tx_frames) },
818e6000651SKamal Heib };
819e6000651SKamal Heib 
820e6000651SKamal Heib #define NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS	ARRAY_SIZE(pport_per_prio_traffic_stats_desc)
821e6000651SKamal Heib 
822e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_get_num_stats(struct mlx5e_priv *priv)
823e6000651SKamal Heib {
824e6000651SKamal Heib 	return NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS * NUM_PPORT_PRIO;
825e6000651SKamal Heib }
826e6000651SKamal Heib 
827e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_strings(struct mlx5e_priv *priv,
828e6000651SKamal Heib 						   u8 *data,
829e6000651SKamal Heib 						   int idx)
830e6000651SKamal Heib {
831e6000651SKamal Heib 	int i, prio;
832e6000651SKamal Heib 
833e6000651SKamal Heib 	for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
834e6000651SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
835e6000651SKamal Heib 			sprintf(data + (idx++) * ETH_GSTRING_LEN,
836e6000651SKamal Heib 				pport_per_prio_traffic_stats_desc[i].format, prio);
837e6000651SKamal Heib 	}
838e6000651SKamal Heib 
839e6000651SKamal Heib 	return idx;
840e6000651SKamal Heib }
841e6000651SKamal Heib 
842e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_stats(struct mlx5e_priv *priv,
843e6000651SKamal Heib 						 u64 *data,
844e6000651SKamal Heib 						 int idx)
845e6000651SKamal Heib {
846e6000651SKamal Heib 	int i, prio;
847e6000651SKamal Heib 
848e6000651SKamal Heib 	for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
849e6000651SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
850e6000651SKamal Heib 			data[idx++] =
851e6000651SKamal Heib 				MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
852e6000651SKamal Heib 						    pport_per_prio_traffic_stats_desc, i);
853e6000651SKamal Heib 	}
854e6000651SKamal Heib 
855e6000651SKamal Heib 	return idx;
856e6000651SKamal Heib }
857e6000651SKamal Heib 
8584377bea2SKamal Heib static const struct counter_desc pport_per_prio_pfc_stats_desc[] = {
8594377bea2SKamal Heib 	/* %s is "global" or "prio{i}" */
8604377bea2SKamal Heib 	{ "rx_%s_pause", PPORT_PER_PRIO_OFF(rx_pause) },
8614377bea2SKamal Heib 	{ "rx_%s_pause_duration", PPORT_PER_PRIO_OFF(rx_pause_duration) },
8624377bea2SKamal Heib 	{ "tx_%s_pause", PPORT_PER_PRIO_OFF(tx_pause) },
8634377bea2SKamal Heib 	{ "tx_%s_pause_duration", PPORT_PER_PRIO_OFF(tx_pause_duration) },
8644377bea2SKamal Heib 	{ "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) },
8654377bea2SKamal Heib };
8664377bea2SKamal Heib 
8672fcb12dfSInbar Karmy static const struct counter_desc pport_pfc_stall_stats_desc[] = {
8682fcb12dfSInbar Karmy 	{ "tx_pause_storm_warning_events ", PPORT_PER_PRIO_OFF(device_stall_minor_watermark_cnt) },
8692fcb12dfSInbar Karmy 	{ "tx_pause_storm_error_events", PPORT_PER_PRIO_OFF(device_stall_critical_watermark_cnt) },
8702fcb12dfSInbar Karmy };
8712fcb12dfSInbar Karmy 
8724377bea2SKamal Heib #define NUM_PPORT_PER_PRIO_PFC_COUNTERS		ARRAY_SIZE(pport_per_prio_pfc_stats_desc)
8732fcb12dfSInbar Karmy #define NUM_PPORT_PFC_STALL_COUNTERS(priv)	(ARRAY_SIZE(pport_pfc_stall_stats_desc) * \
8742fcb12dfSInbar Karmy 						 MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) * \
8752fcb12dfSInbar Karmy 						 MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
8764377bea2SKamal Heib 
8774377bea2SKamal Heib static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
8784377bea2SKamal Heib {
8794377bea2SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
8804377bea2SKamal Heib 	u8 pfc_en_tx;
8814377bea2SKamal Heib 	u8 pfc_en_rx;
8824377bea2SKamal Heib 	int err;
8834377bea2SKamal Heib 
8844377bea2SKamal Heib 	if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
8854377bea2SKamal Heib 		return 0;
8864377bea2SKamal Heib 
8874377bea2SKamal Heib 	err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
8884377bea2SKamal Heib 
8894377bea2SKamal Heib 	return err ? 0 : pfc_en_tx | pfc_en_rx;
8904377bea2SKamal Heib }
8914377bea2SKamal Heib 
8924377bea2SKamal Heib static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
8934377bea2SKamal Heib {
8944377bea2SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
8954377bea2SKamal Heib 	u32 rx_pause;
8964377bea2SKamal Heib 	u32 tx_pause;
8974377bea2SKamal Heib 	int err;
8984377bea2SKamal Heib 
8994377bea2SKamal Heib 	if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
9004377bea2SKamal Heib 		return false;
9014377bea2SKamal Heib 
9024377bea2SKamal Heib 	err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
9034377bea2SKamal Heib 
9044377bea2SKamal Heib 	return err ? false : rx_pause | tx_pause;
9054377bea2SKamal Heib }
9064377bea2SKamal Heib 
9074377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_get_num_stats(struct mlx5e_priv *priv)
9084377bea2SKamal Heib {
9094377bea2SKamal Heib 	return (mlx5e_query_global_pause_combined(priv) +
9104377bea2SKamal Heib 		hweight8(mlx5e_query_pfc_combined(priv))) *
9112fcb12dfSInbar Karmy 		NUM_PPORT_PER_PRIO_PFC_COUNTERS +
9122fcb12dfSInbar Karmy 		NUM_PPORT_PFC_STALL_COUNTERS(priv);
9134377bea2SKamal Heib }
9144377bea2SKamal Heib 
9154377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_strings(struct mlx5e_priv *priv,
9164377bea2SKamal Heib 					       u8 *data,
9174377bea2SKamal Heib 					       int idx)
9184377bea2SKamal Heib {
9194377bea2SKamal Heib 	unsigned long pfc_combined;
9204377bea2SKamal Heib 	int i, prio;
9214377bea2SKamal Heib 
9224377bea2SKamal Heib 	pfc_combined = mlx5e_query_pfc_combined(priv);
9234377bea2SKamal Heib 	for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
9244377bea2SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
9254377bea2SKamal Heib 			char pfc_string[ETH_GSTRING_LEN];
9264377bea2SKamal Heib 
9274377bea2SKamal Heib 			snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio);
9284377bea2SKamal Heib 			sprintf(data + (idx++) * ETH_GSTRING_LEN,
9294377bea2SKamal Heib 				pport_per_prio_pfc_stats_desc[i].format, pfc_string);
9304377bea2SKamal Heib 		}
9314377bea2SKamal Heib 	}
9324377bea2SKamal Heib 
9334377bea2SKamal Heib 	if (mlx5e_query_global_pause_combined(priv)) {
9344377bea2SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
9354377bea2SKamal Heib 			sprintf(data + (idx++) * ETH_GSTRING_LEN,
9364377bea2SKamal Heib 				pport_per_prio_pfc_stats_desc[i].format, "global");
9374377bea2SKamal Heib 		}
9384377bea2SKamal Heib 	}
9394377bea2SKamal Heib 
9402fcb12dfSInbar Karmy 	for (i = 0; i < NUM_PPORT_PFC_STALL_COUNTERS(priv); i++)
9412fcb12dfSInbar Karmy 		strcpy(data + (idx++) * ETH_GSTRING_LEN,
9422fcb12dfSInbar Karmy 		       pport_pfc_stall_stats_desc[i].format);
9432fcb12dfSInbar Karmy 
9444377bea2SKamal Heib 	return idx;
9454377bea2SKamal Heib }
9464377bea2SKamal Heib 
9474377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_stats(struct mlx5e_priv *priv,
9484377bea2SKamal Heib 					     u64 *data,
9494377bea2SKamal Heib 					     int idx)
9504377bea2SKamal Heib {
9514377bea2SKamal Heib 	unsigned long pfc_combined;
9524377bea2SKamal Heib 	int i, prio;
9534377bea2SKamal Heib 
9544377bea2SKamal Heib 	pfc_combined = mlx5e_query_pfc_combined(priv);
9554377bea2SKamal Heib 	for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
9564377bea2SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
9574377bea2SKamal Heib 			data[idx++] =
9584377bea2SKamal Heib 				MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
9594377bea2SKamal Heib 						    pport_per_prio_pfc_stats_desc, i);
9604377bea2SKamal Heib 		}
9614377bea2SKamal Heib 	}
9624377bea2SKamal Heib 
9634377bea2SKamal Heib 	if (mlx5e_query_global_pause_combined(priv)) {
9644377bea2SKamal Heib 		for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
9654377bea2SKamal Heib 			data[idx++] =
9664377bea2SKamal Heib 				MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
9674377bea2SKamal Heib 						    pport_per_prio_pfc_stats_desc, i);
9684377bea2SKamal Heib 		}
9694377bea2SKamal Heib 	}
9704377bea2SKamal Heib 
9712fcb12dfSInbar Karmy 	for (i = 0; i < NUM_PPORT_PFC_STALL_COUNTERS(priv); i++)
9722fcb12dfSInbar Karmy 		data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
9732fcb12dfSInbar Karmy 						  pport_pfc_stall_stats_desc, i);
9742fcb12dfSInbar Karmy 
9754377bea2SKamal Heib 	return idx;
9764377bea2SKamal Heib }
9774377bea2SKamal Heib 
978a8984281SKamal Heib static int mlx5e_grp_per_prio_get_num_stats(struct mlx5e_priv *priv)
979a8984281SKamal Heib {
980a8984281SKamal Heib 	return mlx5e_grp_per_prio_traffic_get_num_stats(priv) +
981a8984281SKamal Heib 		mlx5e_grp_per_prio_pfc_get_num_stats(priv);
982a8984281SKamal Heib }
983a8984281SKamal Heib 
984a8984281SKamal Heib static int mlx5e_grp_per_prio_fill_strings(struct mlx5e_priv *priv, u8 *data,
985a8984281SKamal Heib 					   int idx)
986a8984281SKamal Heib {
987a8984281SKamal Heib 	idx = mlx5e_grp_per_prio_traffic_fill_strings(priv, data, idx);
988a8984281SKamal Heib 	idx = mlx5e_grp_per_prio_pfc_fill_strings(priv, data, idx);
989a8984281SKamal Heib 	return idx;
990a8984281SKamal Heib }
991a8984281SKamal Heib 
992a8984281SKamal Heib static int mlx5e_grp_per_prio_fill_stats(struct mlx5e_priv *priv, u64 *data,
993a8984281SKamal Heib 					 int idx)
994a8984281SKamal Heib {
995a8984281SKamal Heib 	idx = mlx5e_grp_per_prio_traffic_fill_stats(priv, data, idx);
996a8984281SKamal Heib 	idx = mlx5e_grp_per_prio_pfc_fill_stats(priv, data, idx);
997a8984281SKamal Heib 	return idx;
998a8984281SKamal Heib }
999a8984281SKamal Heib 
100019386177SKamal Heib static void mlx5e_grp_per_prio_update_stats(struct mlx5e_priv *priv)
100119386177SKamal Heib {
100219386177SKamal Heib 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
100319386177SKamal Heib 	struct mlx5_core_dev *mdev = priv->mdev;
100419386177SKamal Heib 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
100519386177SKamal Heib 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
100619386177SKamal Heib 	int prio;
100719386177SKamal Heib 	void *out;
100819386177SKamal Heib 
100919386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, local_port, 1);
101019386177SKamal Heib 	MLX5_SET(ppcnt_reg, in, grp, MLX5_PER_PRIORITY_COUNTERS_GROUP);
101119386177SKamal Heib 	for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
101219386177SKamal Heib 		out = pstats->per_prio_counters[prio];
101319386177SKamal Heib 		MLX5_SET(ppcnt_reg, in, prio_tc, prio);
101419386177SKamal Heib 		mlx5_core_access_reg(mdev, in, sz, out, sz,
101519386177SKamal Heib 				     MLX5_REG_PPCNT, 0, 0);
101619386177SKamal Heib 	}
101719386177SKamal Heib }
101819386177SKamal Heib 
10190e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_status_desc[] = {
10200e6f01a4SKamal Heib 	{ "module_unplug", 8 },
10210e6f01a4SKamal Heib };
10220e6f01a4SKamal Heib 
10230e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_error_desc[] = {
10240e6f01a4SKamal Heib 	{ "module_bus_stuck", 16 },       /* bus stuck (I2C or data shorted) */
10250e6f01a4SKamal Heib 	{ "module_high_temp", 48 },       /* high temperature */
10260e6f01a4SKamal Heib 	{ "module_bad_shorted", 56 },    /* bad or shorted cable/module */
10270e6f01a4SKamal Heib };
10280e6f01a4SKamal Heib 
10290e6f01a4SKamal Heib #define NUM_PME_STATUS_STATS		ARRAY_SIZE(mlx5e_pme_status_desc)
10300e6f01a4SKamal Heib #define NUM_PME_ERR_STATS		ARRAY_SIZE(mlx5e_pme_error_desc)
10310e6f01a4SKamal Heib 
10320e6f01a4SKamal Heib static int mlx5e_grp_pme_get_num_stats(struct mlx5e_priv *priv)
10330e6f01a4SKamal Heib {
10340e6f01a4SKamal Heib 	return NUM_PME_STATUS_STATS + NUM_PME_ERR_STATS;
10350e6f01a4SKamal Heib }
10360e6f01a4SKamal Heib 
10370e6f01a4SKamal Heib static int mlx5e_grp_pme_fill_strings(struct mlx5e_priv *priv, u8 *data,
10380e6f01a4SKamal Heib 				      int idx)
10390e6f01a4SKamal Heib {
10400e6f01a4SKamal Heib 	int i;
10410e6f01a4SKamal Heib 
10420e6f01a4SKamal Heib 	for (i = 0; i < NUM_PME_STATUS_STATS; i++)
10430e6f01a4SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_status_desc[i].format);
10440e6f01a4SKamal Heib 
10450e6f01a4SKamal Heib 	for (i = 0; i < NUM_PME_ERR_STATS; i++)
10460e6f01a4SKamal Heib 		strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_error_desc[i].format);
10470e6f01a4SKamal Heib 
10480e6f01a4SKamal Heib 	return idx;
10490e6f01a4SKamal Heib }
10500e6f01a4SKamal Heib 
10510e6f01a4SKamal Heib static int mlx5e_grp_pme_fill_stats(struct mlx5e_priv *priv, u64 *data,
10520e6f01a4SKamal Heib 				    int idx)
10530e6f01a4SKamal Heib {
10540e6f01a4SKamal Heib 	struct mlx5_priv *mlx5_priv = &priv->mdev->priv;
10550e6f01a4SKamal Heib 	int i;
10560e6f01a4SKamal Heib 
10570e6f01a4SKamal Heib 	for (i = 0; i < NUM_PME_STATUS_STATS; i++)
10580e6f01a4SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.status_counters,
10590e6f01a4SKamal Heib 						   mlx5e_pme_status_desc, i);
10600e6f01a4SKamal Heib 
10610e6f01a4SKamal Heib 	for (i = 0; i < NUM_PME_ERR_STATS; i++)
10620e6f01a4SKamal Heib 		data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.error_counters,
10630e6f01a4SKamal Heib 						   mlx5e_pme_error_desc, i);
10640e6f01a4SKamal Heib 
10650e6f01a4SKamal Heib 	return idx;
10660e6f01a4SKamal Heib }
10670e6f01a4SKamal Heib 
1068e185d43fSKamal Heib static int mlx5e_grp_ipsec_get_num_stats(struct mlx5e_priv *priv)
1069e185d43fSKamal Heib {
1070e185d43fSKamal Heib 	return mlx5e_ipsec_get_count(priv);
1071e185d43fSKamal Heib }
1072e185d43fSKamal Heib 
1073e185d43fSKamal Heib static int mlx5e_grp_ipsec_fill_strings(struct mlx5e_priv *priv, u8 *data,
1074e185d43fSKamal Heib 					int idx)
1075e185d43fSKamal Heib {
1076e185d43fSKamal Heib 	return idx + mlx5e_ipsec_get_strings(priv,
1077e185d43fSKamal Heib 					     data + idx * ETH_GSTRING_LEN);
1078e185d43fSKamal Heib }
1079e185d43fSKamal Heib 
1080e185d43fSKamal Heib static int mlx5e_grp_ipsec_fill_stats(struct mlx5e_priv *priv, u64 *data,
1081e185d43fSKamal Heib 				      int idx)
1082e185d43fSKamal Heib {
1083e185d43fSKamal Heib 	return idx + mlx5e_ipsec_get_stats(priv, data + idx);
1084e185d43fSKamal Heib }
1085e185d43fSKamal Heib 
108619386177SKamal Heib static void mlx5e_grp_ipsec_update_stats(struct mlx5e_priv *priv)
108719386177SKamal Heib {
108819386177SKamal Heib 	mlx5e_ipsec_update_stats(priv);
108919386177SKamal Heib }
109019386177SKamal Heib 
109143585a41SIlya Lesokhin static int mlx5e_grp_tls_get_num_stats(struct mlx5e_priv *priv)
109243585a41SIlya Lesokhin {
109343585a41SIlya Lesokhin 	return mlx5e_tls_get_count(priv);
109443585a41SIlya Lesokhin }
109543585a41SIlya Lesokhin 
109643585a41SIlya Lesokhin static int mlx5e_grp_tls_fill_strings(struct mlx5e_priv *priv, u8 *data,
109743585a41SIlya Lesokhin 				      int idx)
109843585a41SIlya Lesokhin {
109943585a41SIlya Lesokhin 	return idx + mlx5e_tls_get_strings(priv, data + idx * ETH_GSTRING_LEN);
110043585a41SIlya Lesokhin }
110143585a41SIlya Lesokhin 
110243585a41SIlya Lesokhin static int mlx5e_grp_tls_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx)
110343585a41SIlya Lesokhin {
110443585a41SIlya Lesokhin 	return idx + mlx5e_tls_get_stats(priv, data + idx);
110543585a41SIlya Lesokhin }
110643585a41SIlya Lesokhin 
11071fe85006SKamal Heib static const struct counter_desc rq_stats_desc[] = {
11081fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, packets) },
11091fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, bytes) },
11101fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete) },
11111fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary) },
11121fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary_inner) },
11131fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_none) },
11141fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_drop) },
11151fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_tx) },
11161fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_tx_full) },
11171fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_packets) },
11181fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_bytes) },
1119f24686e8SGal Pressman 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, removed_vlan_packets) },
11201fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, wqe_err) },
11211fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler) },
11221fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, buff_alloc_err) },
11231fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_blks) },
11241fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_pkts) },
11251fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, page_reuse) },
11261fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_reuse) },
11271fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_full) },
11281fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_empty) },
11291fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_busy) },
11301fe85006SKamal Heib 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_waive) },
11311fe85006SKamal Heib };
11321fe85006SKamal Heib 
11331fe85006SKamal Heib static const struct counter_desc sq_stats_desc[] = {
11341fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, packets) },
11351fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, bytes) },
11361fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_packets) },
11371fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_bytes) },
11381fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_packets) },
11391fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_bytes) },
11401fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial) },
11411fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial_inner) },
1142f24686e8SGal Pressman 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, added_vlan_packets) },
11431fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, nop) },
11441fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_none) },
11451fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, stopped) },
11461fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, wake) },
11471fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, dropped) },
11481fe85006SKamal Heib 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, xmit_more) },
114916cc14d8SEran Ben Elisha 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, cqe_err) },
1150db75373cSEran Ben Elisha 	{ MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, recover) },
11511fe85006SKamal Heib };
11521fe85006SKamal Heib 
115357d689a8SEran Ben Elisha static const struct counter_desc ch_stats_desc[] = {
115457d689a8SEran Ben Elisha 	{ MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, eq_rearm) },
115557d689a8SEran Ben Elisha };
115657d689a8SEran Ben Elisha 
11571fe85006SKamal Heib #define NUM_RQ_STATS			ARRAY_SIZE(rq_stats_desc)
11581fe85006SKamal Heib #define NUM_SQ_STATS			ARRAY_SIZE(sq_stats_desc)
115957d689a8SEran Ben Elisha #define NUM_CH_STATS			ARRAY_SIZE(ch_stats_desc)
11601fe85006SKamal Heib 
11611fe85006SKamal Heib static int mlx5e_grp_channels_get_num_stats(struct mlx5e_priv *priv)
11621fe85006SKamal Heib {
11631fe85006SKamal Heib 	return (NUM_RQ_STATS * priv->channels.num) +
116457d689a8SEran Ben Elisha 		(NUM_CH_STATS * priv->channels.num) +
11651fe85006SKamal Heib 		(NUM_SQ_STATS * priv->channels.num * priv->channels.params.num_tc);
11661fe85006SKamal Heib }
11671fe85006SKamal Heib 
11681fe85006SKamal Heib static int mlx5e_grp_channels_fill_strings(struct mlx5e_priv *priv, u8 *data,
11691fe85006SKamal Heib 					   int idx)
11701fe85006SKamal Heib {
11711fe85006SKamal Heib 	int i, j, tc;
11721fe85006SKamal Heib 
11731fe85006SKamal Heib 	if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
11741fe85006SKamal Heib 		return idx;
11751fe85006SKamal Heib 
11761fe85006SKamal Heib 	for (i = 0; i < priv->channels.num; i++)
117757d689a8SEran Ben Elisha 		for (j = 0; j < NUM_CH_STATS; j++)
117857d689a8SEran Ben Elisha 			sprintf(data + (idx++) * ETH_GSTRING_LEN,
117957d689a8SEran Ben Elisha 				ch_stats_desc[j].format, i);
118057d689a8SEran Ben Elisha 
118157d689a8SEran Ben Elisha 	for (i = 0; i < priv->channels.num; i++)
11821fe85006SKamal Heib 		for (j = 0; j < NUM_RQ_STATS; j++)
11831fe85006SKamal Heib 			sprintf(data + (idx++) * ETH_GSTRING_LEN, rq_stats_desc[j].format, i);
11841fe85006SKamal Heib 
11851fe85006SKamal Heib 	for (tc = 0; tc < priv->channels.params.num_tc; tc++)
11861fe85006SKamal Heib 		for (i = 0; i < priv->channels.num; i++)
11871fe85006SKamal Heib 			for (j = 0; j < NUM_SQ_STATS; j++)
11881fe85006SKamal Heib 				sprintf(data + (idx++) * ETH_GSTRING_LEN,
11891fe85006SKamal Heib 					sq_stats_desc[j].format,
11901fe85006SKamal Heib 					priv->channel_tc2txq[i][tc]);
11911fe85006SKamal Heib 
11921fe85006SKamal Heib 	return idx;
11931fe85006SKamal Heib }
11941fe85006SKamal Heib 
11951fe85006SKamal Heib static int mlx5e_grp_channels_fill_stats(struct mlx5e_priv *priv, u64 *data,
11961fe85006SKamal Heib 					 int idx)
11971fe85006SKamal Heib {
11981fe85006SKamal Heib 	struct mlx5e_channels *channels = &priv->channels;
11991fe85006SKamal Heib 	int i, j, tc;
12001fe85006SKamal Heib 
12011fe85006SKamal Heib 	if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
12021fe85006SKamal Heib 		return idx;
12031fe85006SKamal Heib 
12041fe85006SKamal Heib 	for (i = 0; i < channels->num; i++)
120557d689a8SEran Ben Elisha 		for (j = 0; j < NUM_CH_STATS; j++)
120657d689a8SEran Ben Elisha 			data[idx++] =
120757d689a8SEran Ben Elisha 				MLX5E_READ_CTR64_CPU(&channels->c[i]->stats,
120857d689a8SEran Ben Elisha 						     ch_stats_desc, j);
120957d689a8SEran Ben Elisha 
121057d689a8SEran Ben Elisha 	for (i = 0; i < channels->num; i++)
12111fe85006SKamal Heib 		for (j = 0; j < NUM_RQ_STATS; j++)
12121fe85006SKamal Heib 			data[idx++] =
12131fe85006SKamal Heib 				MLX5E_READ_CTR64_CPU(&channels->c[i]->rq.stats,
12141fe85006SKamal Heib 						     rq_stats_desc, j);
12151fe85006SKamal Heib 
12161fe85006SKamal Heib 	for (tc = 0; tc < priv->channels.params.num_tc; tc++)
12171fe85006SKamal Heib 		for (i = 0; i < channels->num; i++)
12181fe85006SKamal Heib 			for (j = 0; j < NUM_SQ_STATS; j++)
12191fe85006SKamal Heib 				data[idx++] =
12201fe85006SKamal Heib 					MLX5E_READ_CTR64_CPU(&channels->c[i]->sq[tc].stats,
12211fe85006SKamal Heib 							     sq_stats_desc, j);
12221fe85006SKamal Heib 
12231fe85006SKamal Heib 	return idx;
12241fe85006SKamal Heib }
12251fe85006SKamal Heib 
122619386177SKamal Heib /* The stats groups order is opposite to the update_stats() order calls */
1227c0752f2bSKamal Heib const struct mlx5e_stats_grp mlx5e_stats_grps[] = {
1228c0752f2bSKamal Heib 	{
1229c0752f2bSKamal Heib 		.get_num_stats = mlx5e_grp_sw_get_num_stats,
1230c0752f2bSKamal Heib 		.fill_strings = mlx5e_grp_sw_fill_strings,
1231c0752f2bSKamal Heib 		.fill_stats = mlx5e_grp_sw_fill_stats,
123219386177SKamal Heib 		.update_stats = mlx5e_grp_sw_update_stats,
1233fd8dcdb8SKamal Heib 	},
1234fd8dcdb8SKamal Heib 	{
1235fd8dcdb8SKamal Heib 		.get_num_stats = mlx5e_grp_q_get_num_stats,
1236fd8dcdb8SKamal Heib 		.fill_strings = mlx5e_grp_q_fill_strings,
1237fd8dcdb8SKamal Heib 		.fill_stats = mlx5e_grp_q_fill_stats,
123819386177SKamal Heib 		.update_stats_mask = MLX5E_NDO_UPDATE_STATS,
123919386177SKamal Heib 		.update_stats = mlx5e_grp_q_update_stats,
1240fd8dcdb8SKamal Heib 	},
124140cab9f1SKamal Heib 	{
12425c298143SMoshe Shemesh 		.get_num_stats = mlx5e_grp_vnic_env_get_num_stats,
12435c298143SMoshe Shemesh 		.fill_strings = mlx5e_grp_vnic_env_fill_strings,
12445c298143SMoshe Shemesh 		.fill_stats = mlx5e_grp_vnic_env_fill_stats,
12455c298143SMoshe Shemesh 		.update_stats = mlx5e_grp_vnic_env_update_stats,
12465c298143SMoshe Shemesh 	},
12475c298143SMoshe Shemesh 	{
124840cab9f1SKamal Heib 		.get_num_stats = mlx5e_grp_vport_get_num_stats,
124940cab9f1SKamal Heib 		.fill_strings = mlx5e_grp_vport_fill_strings,
125040cab9f1SKamal Heib 		.fill_stats = mlx5e_grp_vport_fill_stats,
125119386177SKamal Heib 		.update_stats_mask = MLX5E_NDO_UPDATE_STATS,
125219386177SKamal Heib 		.update_stats = mlx5e_grp_vport_update_stats,
125340cab9f1SKamal Heib 	},
12546e6ef814SKamal Heib 	{
12556e6ef814SKamal Heib 		.get_num_stats = mlx5e_grp_802_3_get_num_stats,
12566e6ef814SKamal Heib 		.fill_strings = mlx5e_grp_802_3_fill_strings,
12576e6ef814SKamal Heib 		.fill_stats = mlx5e_grp_802_3_fill_stats,
125819386177SKamal Heib 		.update_stats_mask = MLX5E_NDO_UPDATE_STATS,
125919386177SKamal Heib 		.update_stats = mlx5e_grp_802_3_update_stats,
12606e6ef814SKamal Heib 	},
1261fc8e64a3SKamal Heib 	{
1262fc8e64a3SKamal Heib 		.get_num_stats = mlx5e_grp_2863_get_num_stats,
1263fc8e64a3SKamal Heib 		.fill_strings = mlx5e_grp_2863_fill_strings,
1264fc8e64a3SKamal Heib 		.fill_stats = mlx5e_grp_2863_fill_stats,
126519386177SKamal Heib 		.update_stats = mlx5e_grp_2863_update_stats,
1266fc8e64a3SKamal Heib 	},
1267e0e0def9SKamal Heib 	{
1268e0e0def9SKamal Heib 		.get_num_stats = mlx5e_grp_2819_get_num_stats,
1269e0e0def9SKamal Heib 		.fill_strings = mlx5e_grp_2819_fill_strings,
1270e0e0def9SKamal Heib 		.fill_stats = mlx5e_grp_2819_fill_stats,
127119386177SKamal Heib 		.update_stats = mlx5e_grp_2819_update_stats,
1272e0e0def9SKamal Heib 	},
12732e4df0b2SKamal Heib 	{
12742e4df0b2SKamal Heib 		.get_num_stats = mlx5e_grp_phy_get_num_stats,
12752e4df0b2SKamal Heib 		.fill_strings = mlx5e_grp_phy_fill_strings,
12762e4df0b2SKamal Heib 		.fill_stats = mlx5e_grp_phy_fill_stats,
127719386177SKamal Heib 		.update_stats = mlx5e_grp_phy_update_stats,
12782e4df0b2SKamal Heib 	},
12793488bd4cSKamal Heib 	{
12803488bd4cSKamal Heib 		.get_num_stats = mlx5e_grp_eth_ext_get_num_stats,
12813488bd4cSKamal Heib 		.fill_strings = mlx5e_grp_eth_ext_fill_strings,
12823488bd4cSKamal Heib 		.fill_stats = mlx5e_grp_eth_ext_fill_stats,
128319386177SKamal Heib 		.update_stats = mlx5e_grp_eth_ext_update_stats,
12849fd2b5f1SKamal Heib 	},
12859fd2b5f1SKamal Heib 	{
12869fd2b5f1SKamal Heib 		.get_num_stats = mlx5e_grp_pcie_get_num_stats,
12879fd2b5f1SKamal Heib 		.fill_strings = mlx5e_grp_pcie_fill_strings,
12889fd2b5f1SKamal Heib 		.fill_stats = mlx5e_grp_pcie_fill_stats,
128919386177SKamal Heib 		.update_stats = mlx5e_grp_pcie_update_stats,
12909fd2b5f1SKamal Heib 	},
1291e6000651SKamal Heib 	{
1292a8984281SKamal Heib 		.get_num_stats = mlx5e_grp_per_prio_get_num_stats,
1293a8984281SKamal Heib 		.fill_strings = mlx5e_grp_per_prio_fill_strings,
1294a8984281SKamal Heib 		.fill_stats = mlx5e_grp_per_prio_fill_stats,
129519386177SKamal Heib 		.update_stats = mlx5e_grp_per_prio_update_stats,
12964377bea2SKamal Heib 	},
12970e6f01a4SKamal Heib 	{
12980e6f01a4SKamal Heib 		.get_num_stats = mlx5e_grp_pme_get_num_stats,
12990e6f01a4SKamal Heib 		.fill_strings = mlx5e_grp_pme_fill_strings,
13000e6f01a4SKamal Heib 		.fill_stats = mlx5e_grp_pme_fill_stats,
13010e6f01a4SKamal Heib 	},
1302e185d43fSKamal Heib 	{
1303e185d43fSKamal Heib 		.get_num_stats = mlx5e_grp_ipsec_get_num_stats,
1304e185d43fSKamal Heib 		.fill_strings = mlx5e_grp_ipsec_fill_strings,
1305e185d43fSKamal Heib 		.fill_stats = mlx5e_grp_ipsec_fill_stats,
130619386177SKamal Heib 		.update_stats = mlx5e_grp_ipsec_update_stats,
1307e185d43fSKamal Heib 	},
13081fe85006SKamal Heib 	{
130943585a41SIlya Lesokhin 		.get_num_stats = mlx5e_grp_tls_get_num_stats,
131043585a41SIlya Lesokhin 		.fill_strings = mlx5e_grp_tls_fill_strings,
131143585a41SIlya Lesokhin 		.fill_stats = mlx5e_grp_tls_fill_stats,
131243585a41SIlya Lesokhin 	},
131343585a41SIlya Lesokhin 	{
13141fe85006SKamal Heib 		.get_num_stats = mlx5e_grp_channels_get_num_stats,
13151fe85006SKamal Heib 		.fill_strings = mlx5e_grp_channels_fill_strings,
13161fe85006SKamal Heib 		.fill_stats = mlx5e_grp_channels_fill_stats,
13171fe85006SKamal Heib 	}
1318c0752f2bSKamal Heib };
1319c0752f2bSKamal Heib 
1320c0752f2bSKamal Heib const int mlx5e_num_stats_grps = ARRAY_SIZE(mlx5e_stats_grps);
1321