1c0752f2bSKamal Heib /* 2c0752f2bSKamal Heib * Copyright (c) 2017, Mellanox Technologies, Ltd. All rights reserved. 3c0752f2bSKamal Heib * 4c0752f2bSKamal Heib * This software is available to you under a choice of one of two 5c0752f2bSKamal Heib * licenses. You may choose to be licensed under the terms of the GNU 6c0752f2bSKamal Heib * General Public License (GPL) Version 2, available from the file 7c0752f2bSKamal Heib * COPYING in the main directory of this source tree, or the 8c0752f2bSKamal Heib * OpenIB.org BSD license below: 9c0752f2bSKamal Heib * 10c0752f2bSKamal Heib * Redistribution and use in source and binary forms, with or 11c0752f2bSKamal Heib * without modification, are permitted provided that the following 12c0752f2bSKamal Heib * conditions are met: 13c0752f2bSKamal Heib * 14c0752f2bSKamal Heib * - Redistributions of source code must retain the above 15c0752f2bSKamal Heib * copyright notice, this list of conditions and the following 16c0752f2bSKamal Heib * disclaimer. 17c0752f2bSKamal Heib * 18c0752f2bSKamal Heib * - Redistributions in binary form must reproduce the above 19c0752f2bSKamal Heib * copyright notice, this list of conditions and the following 20c0752f2bSKamal Heib * disclaimer in the documentation and/or other materials 21c0752f2bSKamal Heib * provided with the distribution. 22c0752f2bSKamal Heib * 23c0752f2bSKamal Heib * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24c0752f2bSKamal Heib * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25c0752f2bSKamal Heib * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26c0752f2bSKamal Heib * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27c0752f2bSKamal Heib * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28c0752f2bSKamal Heib * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29c0752f2bSKamal Heib * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30c0752f2bSKamal Heib * SOFTWARE. 31c0752f2bSKamal Heib */ 32c0752f2bSKamal Heib 33c0752f2bSKamal Heib #include "en.h" 34e185d43fSKamal Heib #include "en_accel/ipsec.h" 35c0752f2bSKamal Heib 36c0752f2bSKamal Heib static const struct counter_desc sw_stats_desc[] = { 37c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) }, 38c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) }, 39c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) }, 40c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) }, 41c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_packets) }, 42c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_bytes) }, 43c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_packets) }, 44c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_bytes) }, 45f24686e8SGal Pressman { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_added_vlan_packets) }, 46c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_packets) }, 47c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_bytes) }, 48f24686e8SGal Pressman { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_removed_vlan_packets) }, 49c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary) }, 50c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_none) }, 51c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete) }, 52c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary_inner) }, 53c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_drop) }, 54c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx) }, 55c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_full) }, 56c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_none) }, 57c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial) }, 58c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial_inner) }, 59c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_stopped) }, 60c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_wake) }, 61c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_dropped) }, 62c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xmit_more) }, 6316cc14d8SEran Ben Elisha { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_cqe_err) }, 64c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_wqe_err) }, 65c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler) }, 66c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_buff_alloc_err) }, 67c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_blks) }, 68c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_pkts) }, 69c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_page_reuse) }, 70c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_reuse) }, 71c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_full) }, 72c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_empty) }, 73c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_busy) }, 74c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_waive) }, 7557d689a8SEran Ben Elisha { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_eq_rearm) }, 76c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, link_down_events_phy) }, 77c0752f2bSKamal Heib }; 78c0752f2bSKamal Heib 79c0752f2bSKamal Heib #define NUM_SW_COUNTERS ARRAY_SIZE(sw_stats_desc) 80c0752f2bSKamal Heib 81c0752f2bSKamal Heib static int mlx5e_grp_sw_get_num_stats(struct mlx5e_priv *priv) 82c0752f2bSKamal Heib { 83c0752f2bSKamal Heib return NUM_SW_COUNTERS; 84c0752f2bSKamal Heib } 85c0752f2bSKamal Heib 86c0752f2bSKamal Heib static int mlx5e_grp_sw_fill_strings(struct mlx5e_priv *priv, u8 *data, int idx) 87c0752f2bSKamal Heib { 88c0752f2bSKamal Heib int i; 89c0752f2bSKamal Heib 90c0752f2bSKamal Heib for (i = 0; i < NUM_SW_COUNTERS; i++) 91c0752f2bSKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format); 92c0752f2bSKamal Heib return idx; 93c0752f2bSKamal Heib } 94c0752f2bSKamal Heib 95c0752f2bSKamal Heib static int mlx5e_grp_sw_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx) 96c0752f2bSKamal Heib { 97c0752f2bSKamal Heib int i; 98c0752f2bSKamal Heib 99c0752f2bSKamal Heib for (i = 0; i < NUM_SW_COUNTERS; i++) 100c0752f2bSKamal Heib data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw, sw_stats_desc, i); 101c0752f2bSKamal Heib return idx; 102c0752f2bSKamal Heib } 103c0752f2bSKamal Heib 10419386177SKamal Heib static void mlx5e_grp_sw_update_stats(struct mlx5e_priv *priv) 10519386177SKamal Heib { 10619386177SKamal Heib struct mlx5e_sw_stats temp, *s = &temp; 10719386177SKamal Heib struct mlx5e_rq_stats *rq_stats; 10819386177SKamal Heib struct mlx5e_sq_stats *sq_stats; 10919386177SKamal Heib struct mlx5e_ch_stats *ch_stats; 11019386177SKamal Heib int i, j; 11119386177SKamal Heib 11219386177SKamal Heib memset(s, 0, sizeof(*s)); 11319386177SKamal Heib for (i = 0; i < priv->channels.num; i++) { 11419386177SKamal Heib struct mlx5e_channel *c = priv->channels.c[i]; 11519386177SKamal Heib 11619386177SKamal Heib rq_stats = &c->rq.stats; 11719386177SKamal Heib ch_stats = &c->stats; 11819386177SKamal Heib 11919386177SKamal Heib s->rx_packets += rq_stats->packets; 12019386177SKamal Heib s->rx_bytes += rq_stats->bytes; 12119386177SKamal Heib s->rx_lro_packets += rq_stats->lro_packets; 12219386177SKamal Heib s->rx_lro_bytes += rq_stats->lro_bytes; 12319386177SKamal Heib s->rx_removed_vlan_packets += rq_stats->removed_vlan_packets; 12419386177SKamal Heib s->rx_csum_none += rq_stats->csum_none; 12519386177SKamal Heib s->rx_csum_complete += rq_stats->csum_complete; 12619386177SKamal Heib s->rx_csum_unnecessary += rq_stats->csum_unnecessary; 12719386177SKamal Heib s->rx_csum_unnecessary_inner += rq_stats->csum_unnecessary_inner; 12819386177SKamal Heib s->rx_xdp_drop += rq_stats->xdp_drop; 12919386177SKamal Heib s->rx_xdp_tx += rq_stats->xdp_tx; 13019386177SKamal Heib s->rx_xdp_tx_full += rq_stats->xdp_tx_full; 13119386177SKamal Heib s->rx_wqe_err += rq_stats->wqe_err; 13219386177SKamal Heib s->rx_mpwqe_filler += rq_stats->mpwqe_filler; 13319386177SKamal Heib s->rx_buff_alloc_err += rq_stats->buff_alloc_err; 13419386177SKamal Heib s->rx_cqe_compress_blks += rq_stats->cqe_compress_blks; 13519386177SKamal Heib s->rx_cqe_compress_pkts += rq_stats->cqe_compress_pkts; 13619386177SKamal Heib s->rx_page_reuse += rq_stats->page_reuse; 13719386177SKamal Heib s->rx_cache_reuse += rq_stats->cache_reuse; 13819386177SKamal Heib s->rx_cache_full += rq_stats->cache_full; 13919386177SKamal Heib s->rx_cache_empty += rq_stats->cache_empty; 14019386177SKamal Heib s->rx_cache_busy += rq_stats->cache_busy; 14119386177SKamal Heib s->rx_cache_waive += rq_stats->cache_waive; 14219386177SKamal Heib s->ch_eq_rearm += ch_stats->eq_rearm; 14319386177SKamal Heib 14419386177SKamal Heib for (j = 0; j < priv->channels.params.num_tc; j++) { 14519386177SKamal Heib sq_stats = &c->sq[j].stats; 14619386177SKamal Heib 14719386177SKamal Heib s->tx_packets += sq_stats->packets; 14819386177SKamal Heib s->tx_bytes += sq_stats->bytes; 14919386177SKamal Heib s->tx_tso_packets += sq_stats->tso_packets; 15019386177SKamal Heib s->tx_tso_bytes += sq_stats->tso_bytes; 15119386177SKamal Heib s->tx_tso_inner_packets += sq_stats->tso_inner_packets; 15219386177SKamal Heib s->tx_tso_inner_bytes += sq_stats->tso_inner_bytes; 15319386177SKamal Heib s->tx_added_vlan_packets += sq_stats->added_vlan_packets; 15419386177SKamal Heib s->tx_queue_stopped += sq_stats->stopped; 15519386177SKamal Heib s->tx_queue_wake += sq_stats->wake; 15619386177SKamal Heib s->tx_queue_dropped += sq_stats->dropped; 15716cc14d8SEran Ben Elisha s->tx_cqe_err += sq_stats->cqe_err; 15819386177SKamal Heib s->tx_xmit_more += sq_stats->xmit_more; 15919386177SKamal Heib s->tx_csum_partial_inner += sq_stats->csum_partial_inner; 16019386177SKamal Heib s->tx_csum_none += sq_stats->csum_none; 16119386177SKamal Heib s->tx_csum_partial += sq_stats->csum_partial; 16219386177SKamal Heib } 16319386177SKamal Heib } 16419386177SKamal Heib 16519386177SKamal Heib s->link_down_events_phy = MLX5_GET(ppcnt_reg, 16619386177SKamal Heib priv->stats.pport.phy_counters, 16719386177SKamal Heib counter_set.phys_layer_cntrs.link_down_events); 16819386177SKamal Heib memcpy(&priv->stats.sw, s, sizeof(*s)); 16919386177SKamal Heib } 17019386177SKamal Heib 171fd8dcdb8SKamal Heib static const struct counter_desc q_stats_desc[] = { 172fd8dcdb8SKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_out_of_buffer) }, 173fd8dcdb8SKamal Heib }; 174fd8dcdb8SKamal Heib 1757cbaf9a3SMoshe Shemesh static const struct counter_desc drop_rq_stats_desc[] = { 1767cbaf9a3SMoshe Shemesh { MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_if_down_packets) }, 1777cbaf9a3SMoshe Shemesh }; 1787cbaf9a3SMoshe Shemesh 179fd8dcdb8SKamal Heib #define NUM_Q_COUNTERS ARRAY_SIZE(q_stats_desc) 1807cbaf9a3SMoshe Shemesh #define NUM_DROP_RQ_COUNTERS ARRAY_SIZE(drop_rq_stats_desc) 181fd8dcdb8SKamal Heib 182fd8dcdb8SKamal Heib static int mlx5e_grp_q_get_num_stats(struct mlx5e_priv *priv) 183fd8dcdb8SKamal Heib { 1847cbaf9a3SMoshe Shemesh int num_stats = 0; 1857cbaf9a3SMoshe Shemesh 1867cbaf9a3SMoshe Shemesh if (priv->q_counter) 1877cbaf9a3SMoshe Shemesh num_stats += NUM_Q_COUNTERS; 1887cbaf9a3SMoshe Shemesh 1897cbaf9a3SMoshe Shemesh if (priv->drop_rq_q_counter) 1907cbaf9a3SMoshe Shemesh num_stats += NUM_DROP_RQ_COUNTERS; 1917cbaf9a3SMoshe Shemesh 1927cbaf9a3SMoshe Shemesh return num_stats; 193fd8dcdb8SKamal Heib } 194fd8dcdb8SKamal Heib 195fd8dcdb8SKamal Heib static int mlx5e_grp_q_fill_strings(struct mlx5e_priv *priv, u8 *data, int idx) 196fd8dcdb8SKamal Heib { 197fd8dcdb8SKamal Heib int i; 198fd8dcdb8SKamal Heib 199fd8dcdb8SKamal Heib for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++) 2007cbaf9a3SMoshe Shemesh strcpy(data + (idx++) * ETH_GSTRING_LEN, 2017cbaf9a3SMoshe Shemesh q_stats_desc[i].format); 2027cbaf9a3SMoshe Shemesh 2037cbaf9a3SMoshe Shemesh for (i = 0; i < NUM_DROP_RQ_COUNTERS && priv->drop_rq_q_counter; i++) 2047cbaf9a3SMoshe Shemesh strcpy(data + (idx++) * ETH_GSTRING_LEN, 2057cbaf9a3SMoshe Shemesh drop_rq_stats_desc[i].format); 2067cbaf9a3SMoshe Shemesh 207fd8dcdb8SKamal Heib return idx; 208fd8dcdb8SKamal Heib } 209fd8dcdb8SKamal Heib 210fd8dcdb8SKamal Heib static int mlx5e_grp_q_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx) 211fd8dcdb8SKamal Heib { 212fd8dcdb8SKamal Heib int i; 213fd8dcdb8SKamal Heib 214fd8dcdb8SKamal Heib for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++) 2157cbaf9a3SMoshe Shemesh data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt, 2167cbaf9a3SMoshe Shemesh q_stats_desc, i); 2177cbaf9a3SMoshe Shemesh for (i = 0; i < NUM_DROP_RQ_COUNTERS && priv->drop_rq_q_counter; i++) 2187cbaf9a3SMoshe Shemesh data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt, 2197cbaf9a3SMoshe Shemesh drop_rq_stats_desc, i); 220fd8dcdb8SKamal Heib return idx; 221fd8dcdb8SKamal Heib } 222fd8dcdb8SKamal Heib 22319386177SKamal Heib static void mlx5e_grp_q_update_stats(struct mlx5e_priv *priv) 22419386177SKamal Heib { 22519386177SKamal Heib struct mlx5e_qcounter_stats *qcnt = &priv->stats.qcnt; 22619386177SKamal Heib u32 out[MLX5_ST_SZ_DW(query_q_counter_out)]; 22719386177SKamal Heib 2287cbaf9a3SMoshe Shemesh if (priv->q_counter && 2297cbaf9a3SMoshe Shemesh !mlx5_core_query_q_counter(priv->mdev, priv->q_counter, 0, out, 2307cbaf9a3SMoshe Shemesh sizeof(out))) 2317cbaf9a3SMoshe Shemesh qcnt->rx_out_of_buffer = MLX5_GET(query_q_counter_out, 2327cbaf9a3SMoshe Shemesh out, out_of_buffer); 2337cbaf9a3SMoshe Shemesh if (priv->drop_rq_q_counter && 2347cbaf9a3SMoshe Shemesh !mlx5_core_query_q_counter(priv->mdev, priv->drop_rq_q_counter, 0, 2357cbaf9a3SMoshe Shemesh out, sizeof(out))) 2367cbaf9a3SMoshe Shemesh qcnt->rx_if_down_packets = MLX5_GET(query_q_counter_out, out, 2377cbaf9a3SMoshe Shemesh out_of_buffer); 23819386177SKamal Heib } 23919386177SKamal Heib 2405c298143SMoshe Shemesh #define VNIC_ENV_OFF(c) MLX5_BYTE_OFF(query_vnic_env_out, c) 2415c298143SMoshe Shemesh static const struct counter_desc vnic_env_stats_desc[] = { 2425c298143SMoshe Shemesh { "rx_steer_missed_packets", 2435c298143SMoshe Shemesh VNIC_ENV_OFF(vport_env.nic_receive_steering_discard) }, 2445c298143SMoshe Shemesh }; 2455c298143SMoshe Shemesh 2465c298143SMoshe Shemesh #define NUM_VNIC_ENV_COUNTERS ARRAY_SIZE(vnic_env_stats_desc) 2475c298143SMoshe Shemesh 2485c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_get_num_stats(struct mlx5e_priv *priv) 2495c298143SMoshe Shemesh { 2505c298143SMoshe Shemesh return MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard) ? 2515c298143SMoshe Shemesh NUM_VNIC_ENV_COUNTERS : 0; 2525c298143SMoshe Shemesh } 2535c298143SMoshe Shemesh 2545c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_fill_strings(struct mlx5e_priv *priv, u8 *data, 2555c298143SMoshe Shemesh int idx) 2565c298143SMoshe Shemesh { 2575c298143SMoshe Shemesh int i; 2585c298143SMoshe Shemesh 2595c298143SMoshe Shemesh if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) 2605c298143SMoshe Shemesh return idx; 2615c298143SMoshe Shemesh 2625c298143SMoshe Shemesh for (i = 0; i < NUM_VNIC_ENV_COUNTERS; i++) 2635c298143SMoshe Shemesh strcpy(data + (idx++) * ETH_GSTRING_LEN, 2645c298143SMoshe Shemesh vnic_env_stats_desc[i].format); 2655c298143SMoshe Shemesh return idx; 2665c298143SMoshe Shemesh } 2675c298143SMoshe Shemesh 2685c298143SMoshe Shemesh static int mlx5e_grp_vnic_env_fill_stats(struct mlx5e_priv *priv, u64 *data, 2695c298143SMoshe Shemesh int idx) 2705c298143SMoshe Shemesh { 2715c298143SMoshe Shemesh int i; 2725c298143SMoshe Shemesh 2735c298143SMoshe Shemesh if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) 2745c298143SMoshe Shemesh return idx; 2755c298143SMoshe Shemesh 2765c298143SMoshe Shemesh for (i = 0; i < NUM_VNIC_ENV_COUNTERS; i++) 2775c298143SMoshe Shemesh data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vnic.query_vnic_env_out, 2785c298143SMoshe Shemesh vnic_env_stats_desc, i); 2795c298143SMoshe Shemesh return idx; 2805c298143SMoshe Shemesh } 2815c298143SMoshe Shemesh 2825c298143SMoshe Shemesh static void mlx5e_grp_vnic_env_update_stats(struct mlx5e_priv *priv) 2835c298143SMoshe Shemesh { 2845c298143SMoshe Shemesh u32 *out = (u32 *)priv->stats.vnic.query_vnic_env_out; 2855c298143SMoshe Shemesh int outlen = MLX5_ST_SZ_BYTES(query_vnic_env_out); 2865c298143SMoshe Shemesh u32 in[MLX5_ST_SZ_DW(query_vnic_env_in)] = {0}; 2875c298143SMoshe Shemesh struct mlx5_core_dev *mdev = priv->mdev; 2885c298143SMoshe Shemesh 2895c298143SMoshe Shemesh if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) 2905c298143SMoshe Shemesh return; 2915c298143SMoshe Shemesh 2925c298143SMoshe Shemesh MLX5_SET(query_vnic_env_in, in, opcode, 2935c298143SMoshe Shemesh MLX5_CMD_OP_QUERY_VNIC_ENV); 2945c298143SMoshe Shemesh MLX5_SET(query_vnic_env_in, in, op_mod, 0); 2955c298143SMoshe Shemesh MLX5_SET(query_vnic_env_in, in, other_vport, 0); 2965c298143SMoshe Shemesh mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen); 2975c298143SMoshe Shemesh } 2985c298143SMoshe Shemesh 29940cab9f1SKamal Heib #define VPORT_COUNTER_OFF(c) MLX5_BYTE_OFF(query_vport_counter_out, c) 30040cab9f1SKamal Heib static const struct counter_desc vport_stats_desc[] = { 30140cab9f1SKamal Heib { "rx_vport_unicast_packets", 30240cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_unicast.packets) }, 30340cab9f1SKamal Heib { "rx_vport_unicast_bytes", 30440cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_unicast.octets) }, 30540cab9f1SKamal Heib { "tx_vport_unicast_packets", 30640cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_unicast.packets) }, 30740cab9f1SKamal Heib { "tx_vport_unicast_bytes", 30840cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_unicast.octets) }, 30940cab9f1SKamal Heib { "rx_vport_multicast_packets", 31040cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_multicast.packets) }, 31140cab9f1SKamal Heib { "rx_vport_multicast_bytes", 31240cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_multicast.octets) }, 31340cab9f1SKamal Heib { "tx_vport_multicast_packets", 31440cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_multicast.packets) }, 31540cab9f1SKamal Heib { "tx_vport_multicast_bytes", 31640cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_multicast.octets) }, 31740cab9f1SKamal Heib { "rx_vport_broadcast_packets", 31840cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_broadcast.packets) }, 31940cab9f1SKamal Heib { "rx_vport_broadcast_bytes", 32040cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_broadcast.octets) }, 32140cab9f1SKamal Heib { "tx_vport_broadcast_packets", 32240cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_broadcast.packets) }, 32340cab9f1SKamal Heib { "tx_vport_broadcast_bytes", 32440cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_broadcast.octets) }, 32540cab9f1SKamal Heib { "rx_vport_rdma_unicast_packets", 32640cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_unicast.packets) }, 32740cab9f1SKamal Heib { "rx_vport_rdma_unicast_bytes", 32840cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_unicast.octets) }, 32940cab9f1SKamal Heib { "tx_vport_rdma_unicast_packets", 33040cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_unicast.packets) }, 33140cab9f1SKamal Heib { "tx_vport_rdma_unicast_bytes", 33240cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_unicast.octets) }, 33340cab9f1SKamal Heib { "rx_vport_rdma_multicast_packets", 33440cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_multicast.packets) }, 33540cab9f1SKamal Heib { "rx_vport_rdma_multicast_bytes", 33640cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_multicast.octets) }, 33740cab9f1SKamal Heib { "tx_vport_rdma_multicast_packets", 33840cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_multicast.packets) }, 33940cab9f1SKamal Heib { "tx_vport_rdma_multicast_bytes", 34040cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_multicast.octets) }, 34140cab9f1SKamal Heib }; 34240cab9f1SKamal Heib 34340cab9f1SKamal Heib #define NUM_VPORT_COUNTERS ARRAY_SIZE(vport_stats_desc) 34440cab9f1SKamal Heib 34540cab9f1SKamal Heib static int mlx5e_grp_vport_get_num_stats(struct mlx5e_priv *priv) 34640cab9f1SKamal Heib { 34740cab9f1SKamal Heib return NUM_VPORT_COUNTERS; 34840cab9f1SKamal Heib } 34940cab9f1SKamal Heib 35040cab9f1SKamal Heib static int mlx5e_grp_vport_fill_strings(struct mlx5e_priv *priv, u8 *data, 35140cab9f1SKamal Heib int idx) 35240cab9f1SKamal Heib { 35340cab9f1SKamal Heib int i; 35440cab9f1SKamal Heib 35540cab9f1SKamal Heib for (i = 0; i < NUM_VPORT_COUNTERS; i++) 35640cab9f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, vport_stats_desc[i].format); 35740cab9f1SKamal Heib return idx; 35840cab9f1SKamal Heib } 35940cab9f1SKamal Heib 36040cab9f1SKamal Heib static int mlx5e_grp_vport_fill_stats(struct mlx5e_priv *priv, u64 *data, 36140cab9f1SKamal Heib int idx) 36240cab9f1SKamal Heib { 36340cab9f1SKamal Heib int i; 36440cab9f1SKamal Heib 36540cab9f1SKamal Heib for (i = 0; i < NUM_VPORT_COUNTERS; i++) 36640cab9f1SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out, 36740cab9f1SKamal Heib vport_stats_desc, i); 36840cab9f1SKamal Heib return idx; 36940cab9f1SKamal Heib } 37040cab9f1SKamal Heib 37119386177SKamal Heib static void mlx5e_grp_vport_update_stats(struct mlx5e_priv *priv) 37219386177SKamal Heib { 37319386177SKamal Heib int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out); 37419386177SKamal Heib u32 *out = (u32 *)priv->stats.vport.query_vport_out; 37519386177SKamal Heib u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {0}; 37619386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 37719386177SKamal Heib 37819386177SKamal Heib MLX5_SET(query_vport_counter_in, in, opcode, MLX5_CMD_OP_QUERY_VPORT_COUNTER); 37919386177SKamal Heib MLX5_SET(query_vport_counter_in, in, op_mod, 0); 38019386177SKamal Heib MLX5_SET(query_vport_counter_in, in, other_vport, 0); 38119386177SKamal Heib mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen); 38219386177SKamal Heib } 38319386177SKamal Heib 3846e6ef814SKamal Heib #define PPORT_802_3_OFF(c) \ 3856e6ef814SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 3866e6ef814SKamal Heib counter_set.eth_802_3_cntrs_grp_data_layout.c##_high) 3876e6ef814SKamal Heib static const struct counter_desc pport_802_3_stats_desc[] = { 3886e6ef814SKamal Heib { "tx_packets_phy", PPORT_802_3_OFF(a_frames_transmitted_ok) }, 3896e6ef814SKamal Heib { "rx_packets_phy", PPORT_802_3_OFF(a_frames_received_ok) }, 3906e6ef814SKamal Heib { "rx_crc_errors_phy", PPORT_802_3_OFF(a_frame_check_sequence_errors) }, 3916e6ef814SKamal Heib { "tx_bytes_phy", PPORT_802_3_OFF(a_octets_transmitted_ok) }, 3926e6ef814SKamal Heib { "rx_bytes_phy", PPORT_802_3_OFF(a_octets_received_ok) }, 3936e6ef814SKamal Heib { "tx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_xmitted_ok) }, 3946e6ef814SKamal Heib { "tx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_xmitted_ok) }, 3956e6ef814SKamal Heib { "rx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_received_ok) }, 3966e6ef814SKamal Heib { "rx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_received_ok) }, 3976e6ef814SKamal Heib { "rx_in_range_len_errors_phy", PPORT_802_3_OFF(a_in_range_length_errors) }, 3986e6ef814SKamal Heib { "rx_out_of_range_len_phy", PPORT_802_3_OFF(a_out_of_range_length_field) }, 3996e6ef814SKamal Heib { "rx_oversize_pkts_phy", PPORT_802_3_OFF(a_frame_too_long_errors) }, 4006e6ef814SKamal Heib { "rx_symbol_err_phy", PPORT_802_3_OFF(a_symbol_error_during_carrier) }, 4016e6ef814SKamal Heib { "tx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_transmitted) }, 4026e6ef814SKamal Heib { "rx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_received) }, 4036e6ef814SKamal Heib { "rx_unsupported_op_phy", PPORT_802_3_OFF(a_unsupported_opcodes_received) }, 4046e6ef814SKamal Heib { "rx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_received) }, 4056e6ef814SKamal Heib { "tx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_transmitted) }, 4066e6ef814SKamal Heib }; 4076e6ef814SKamal Heib 4086e6ef814SKamal Heib #define NUM_PPORT_802_3_COUNTERS ARRAY_SIZE(pport_802_3_stats_desc) 4096e6ef814SKamal Heib 4106e6ef814SKamal Heib static int mlx5e_grp_802_3_get_num_stats(struct mlx5e_priv *priv) 4116e6ef814SKamal Heib { 4126e6ef814SKamal Heib return NUM_PPORT_802_3_COUNTERS; 4136e6ef814SKamal Heib } 4146e6ef814SKamal Heib 4156e6ef814SKamal Heib static int mlx5e_grp_802_3_fill_strings(struct mlx5e_priv *priv, u8 *data, 4166e6ef814SKamal Heib int idx) 4176e6ef814SKamal Heib { 4186e6ef814SKamal Heib int i; 4196e6ef814SKamal Heib 4206e6ef814SKamal Heib for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++) 4216e6ef814SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_802_3_stats_desc[i].format); 4226e6ef814SKamal Heib return idx; 4236e6ef814SKamal Heib } 4246e6ef814SKamal Heib 4256e6ef814SKamal Heib static int mlx5e_grp_802_3_fill_stats(struct mlx5e_priv *priv, u64 *data, 4266e6ef814SKamal Heib int idx) 4276e6ef814SKamal Heib { 4286e6ef814SKamal Heib int i; 4296e6ef814SKamal Heib 4306e6ef814SKamal Heib for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++) 4316e6ef814SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters, 4326e6ef814SKamal Heib pport_802_3_stats_desc, i); 4336e6ef814SKamal Heib return idx; 4346e6ef814SKamal Heib } 4356e6ef814SKamal Heib 43619386177SKamal Heib static void mlx5e_grp_802_3_update_stats(struct mlx5e_priv *priv) 43719386177SKamal Heib { 43819386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 43919386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 44019386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 44119386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 44219386177SKamal Heib void *out; 44319386177SKamal Heib 44419386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 44519386177SKamal Heib out = pstats->IEEE_802_3_counters; 44619386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_IEEE_802_3_COUNTERS_GROUP); 44719386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 44819386177SKamal Heib } 44919386177SKamal Heib 450fc8e64a3SKamal Heib #define PPORT_2863_OFF(c) \ 451fc8e64a3SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 452fc8e64a3SKamal Heib counter_set.eth_2863_cntrs_grp_data_layout.c##_high) 453fc8e64a3SKamal Heib static const struct counter_desc pport_2863_stats_desc[] = { 454fc8e64a3SKamal Heib { "rx_discards_phy", PPORT_2863_OFF(if_in_discards) }, 455fc8e64a3SKamal Heib { "tx_discards_phy", PPORT_2863_OFF(if_out_discards) }, 456fc8e64a3SKamal Heib { "tx_errors_phy", PPORT_2863_OFF(if_out_errors) }, 457fc8e64a3SKamal Heib }; 458fc8e64a3SKamal Heib 459fc8e64a3SKamal Heib #define NUM_PPORT_2863_COUNTERS ARRAY_SIZE(pport_2863_stats_desc) 460fc8e64a3SKamal Heib 461fc8e64a3SKamal Heib static int mlx5e_grp_2863_get_num_stats(struct mlx5e_priv *priv) 462fc8e64a3SKamal Heib { 463fc8e64a3SKamal Heib return NUM_PPORT_2863_COUNTERS; 464fc8e64a3SKamal Heib } 465fc8e64a3SKamal Heib 466fc8e64a3SKamal Heib static int mlx5e_grp_2863_fill_strings(struct mlx5e_priv *priv, u8 *data, 467fc8e64a3SKamal Heib int idx) 468fc8e64a3SKamal Heib { 469fc8e64a3SKamal Heib int i; 470fc8e64a3SKamal Heib 471fc8e64a3SKamal Heib for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++) 472fc8e64a3SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2863_stats_desc[i].format); 473fc8e64a3SKamal Heib return idx; 474fc8e64a3SKamal Heib } 475fc8e64a3SKamal Heib 476fc8e64a3SKamal Heib static int mlx5e_grp_2863_fill_stats(struct mlx5e_priv *priv, u64 *data, 477fc8e64a3SKamal Heib int idx) 478fc8e64a3SKamal Heib { 479fc8e64a3SKamal Heib int i; 480fc8e64a3SKamal Heib 481fc8e64a3SKamal Heib for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++) 482fc8e64a3SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters, 483fc8e64a3SKamal Heib pport_2863_stats_desc, i); 484fc8e64a3SKamal Heib return idx; 485fc8e64a3SKamal Heib } 486fc8e64a3SKamal Heib 48719386177SKamal Heib static void mlx5e_grp_2863_update_stats(struct mlx5e_priv *priv) 48819386177SKamal Heib { 48919386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 49019386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 49119386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 49219386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 49319386177SKamal Heib void *out; 49419386177SKamal Heib 49519386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 49619386177SKamal Heib out = pstats->RFC_2863_counters; 49719386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2863_COUNTERS_GROUP); 49819386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 49919386177SKamal Heib } 50019386177SKamal Heib 501e0e0def9SKamal Heib #define PPORT_2819_OFF(c) \ 502e0e0def9SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 503e0e0def9SKamal Heib counter_set.eth_2819_cntrs_grp_data_layout.c##_high) 504e0e0def9SKamal Heib static const struct counter_desc pport_2819_stats_desc[] = { 505e0e0def9SKamal Heib { "rx_undersize_pkts_phy", PPORT_2819_OFF(ether_stats_undersize_pkts) }, 506e0e0def9SKamal Heib { "rx_fragments_phy", PPORT_2819_OFF(ether_stats_fragments) }, 507e0e0def9SKamal Heib { "rx_jabbers_phy", PPORT_2819_OFF(ether_stats_jabbers) }, 508e0e0def9SKamal Heib { "rx_64_bytes_phy", PPORT_2819_OFF(ether_stats_pkts64octets) }, 509e0e0def9SKamal Heib { "rx_65_to_127_bytes_phy", PPORT_2819_OFF(ether_stats_pkts65to127octets) }, 510e0e0def9SKamal Heib { "rx_128_to_255_bytes_phy", PPORT_2819_OFF(ether_stats_pkts128to255octets) }, 511e0e0def9SKamal Heib { "rx_256_to_511_bytes_phy", PPORT_2819_OFF(ether_stats_pkts256to511octets) }, 512e0e0def9SKamal Heib { "rx_512_to_1023_bytes_phy", PPORT_2819_OFF(ether_stats_pkts512to1023octets) }, 513e0e0def9SKamal Heib { "rx_1024_to_1518_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1024to1518octets) }, 514e0e0def9SKamal Heib { "rx_1519_to_2047_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1519to2047octets) }, 515e0e0def9SKamal Heib { "rx_2048_to_4095_bytes_phy", PPORT_2819_OFF(ether_stats_pkts2048to4095octets) }, 516e0e0def9SKamal Heib { "rx_4096_to_8191_bytes_phy", PPORT_2819_OFF(ether_stats_pkts4096to8191octets) }, 517e0e0def9SKamal Heib { "rx_8192_to_10239_bytes_phy", PPORT_2819_OFF(ether_stats_pkts8192to10239octets) }, 518e0e0def9SKamal Heib }; 519e0e0def9SKamal Heib 520e0e0def9SKamal Heib #define NUM_PPORT_2819_COUNTERS ARRAY_SIZE(pport_2819_stats_desc) 521e0e0def9SKamal Heib 522e0e0def9SKamal Heib static int mlx5e_grp_2819_get_num_stats(struct mlx5e_priv *priv) 523e0e0def9SKamal Heib { 524e0e0def9SKamal Heib return NUM_PPORT_2819_COUNTERS; 525e0e0def9SKamal Heib } 526e0e0def9SKamal Heib 527e0e0def9SKamal Heib static int mlx5e_grp_2819_fill_strings(struct mlx5e_priv *priv, u8 *data, 528e0e0def9SKamal Heib int idx) 529e0e0def9SKamal Heib { 530e0e0def9SKamal Heib int i; 531e0e0def9SKamal Heib 532e0e0def9SKamal Heib for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++) 533e0e0def9SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2819_stats_desc[i].format); 534e0e0def9SKamal Heib return idx; 535e0e0def9SKamal Heib } 536e0e0def9SKamal Heib 537e0e0def9SKamal Heib static int mlx5e_grp_2819_fill_stats(struct mlx5e_priv *priv, u64 *data, 538e0e0def9SKamal Heib int idx) 539e0e0def9SKamal Heib { 540e0e0def9SKamal Heib int i; 541e0e0def9SKamal Heib 542e0e0def9SKamal Heib for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++) 543e0e0def9SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters, 544e0e0def9SKamal Heib pport_2819_stats_desc, i); 545e0e0def9SKamal Heib return idx; 546e0e0def9SKamal Heib } 547e0e0def9SKamal Heib 54819386177SKamal Heib static void mlx5e_grp_2819_update_stats(struct mlx5e_priv *priv) 54919386177SKamal Heib { 55019386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 55119386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 55219386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 55319386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 55419386177SKamal Heib void *out; 55519386177SKamal Heib 55619386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 55719386177SKamal Heib out = pstats->RFC_2819_counters; 55819386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_RFC_2819_COUNTERS_GROUP); 55919386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 56019386177SKamal Heib } 56119386177SKamal Heib 5622e4df0b2SKamal Heib #define PPORT_PHY_STATISTICAL_OFF(c) \ 5632e4df0b2SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 5642e4df0b2SKamal Heib counter_set.phys_layer_statistical_cntrs.c##_high) 5652e4df0b2SKamal Heib static const struct counter_desc pport_phy_statistical_stats_desc[] = { 5662e4df0b2SKamal Heib { "rx_pcs_symbol_err_phy", PPORT_PHY_STATISTICAL_OFF(phy_symbol_errors) }, 5672e4df0b2SKamal Heib { "rx_corrected_bits_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits) }, 5682e4df0b2SKamal Heib }; 5692e4df0b2SKamal Heib 5702e4df0b2SKamal Heib #define NUM_PPORT_PHY_COUNTERS ARRAY_SIZE(pport_phy_statistical_stats_desc) 5712e4df0b2SKamal Heib 5722e4df0b2SKamal Heib static int mlx5e_grp_phy_get_num_stats(struct mlx5e_priv *priv) 5732e4df0b2SKamal Heib { 5742e4df0b2SKamal Heib return MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group) ? 5752e4df0b2SKamal Heib NUM_PPORT_PHY_COUNTERS : 0; 5762e4df0b2SKamal Heib } 5772e4df0b2SKamal Heib 5782e4df0b2SKamal Heib static int mlx5e_grp_phy_fill_strings(struct mlx5e_priv *priv, u8 *data, 5792e4df0b2SKamal Heib int idx) 5802e4df0b2SKamal Heib { 5812e4df0b2SKamal Heib int i; 5822e4df0b2SKamal Heib 5832e4df0b2SKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group)) 5842e4df0b2SKamal Heib for (i = 0; i < NUM_PPORT_PHY_COUNTERS; i++) 5852e4df0b2SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 5862e4df0b2SKamal Heib pport_phy_statistical_stats_desc[i].format); 5872e4df0b2SKamal Heib return idx; 5882e4df0b2SKamal Heib } 5892e4df0b2SKamal Heib 5902e4df0b2SKamal Heib static int mlx5e_grp_phy_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx) 5912e4df0b2SKamal Heib { 5922e4df0b2SKamal Heib int i; 5932e4df0b2SKamal Heib 5942e4df0b2SKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group)) 5952e4df0b2SKamal Heib for (i = 0; i < NUM_PPORT_PHY_COUNTERS; i++) 5962e4df0b2SKamal Heib data[idx++] = 5972e4df0b2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.phy_statistical_counters, 5982e4df0b2SKamal Heib pport_phy_statistical_stats_desc, i); 5992e4df0b2SKamal Heib return idx; 6002e4df0b2SKamal Heib } 6012e4df0b2SKamal Heib 60219386177SKamal Heib static void mlx5e_grp_phy_update_stats(struct mlx5e_priv *priv) 60319386177SKamal Heib { 60419386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 60519386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 60619386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 60719386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 60819386177SKamal Heib void *out; 60919386177SKamal Heib 61019386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 61119386177SKamal Heib out = pstats->phy_counters; 61219386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_COUNTERS_GROUP); 61319386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 61419386177SKamal Heib 61519386177SKamal Heib if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) 61619386177SKamal Heib return; 61719386177SKamal Heib 61819386177SKamal Heib out = pstats->phy_statistical_counters; 61919386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_STATISTICAL_GROUP); 62019386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 62119386177SKamal Heib } 62219386177SKamal Heib 6233488bd4cSKamal Heib #define PPORT_ETH_EXT_OFF(c) \ 6243488bd4cSKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 6253488bd4cSKamal Heib counter_set.eth_extended_cntrs_grp_data_layout.c##_high) 6263488bd4cSKamal Heib static const struct counter_desc pport_eth_ext_stats_desc[] = { 6273488bd4cSKamal Heib { "rx_buffer_passed_thres_phy", PPORT_ETH_EXT_OFF(rx_buffer_almost_full) }, 6283488bd4cSKamal Heib }; 6293488bd4cSKamal Heib 6303488bd4cSKamal Heib #define NUM_PPORT_ETH_EXT_COUNTERS ARRAY_SIZE(pport_eth_ext_stats_desc) 6313488bd4cSKamal Heib 6323488bd4cSKamal Heib static int mlx5e_grp_eth_ext_get_num_stats(struct mlx5e_priv *priv) 6333488bd4cSKamal Heib { 6343488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 6353488bd4cSKamal Heib return NUM_PPORT_ETH_EXT_COUNTERS; 6363488bd4cSKamal Heib 6373488bd4cSKamal Heib return 0; 6383488bd4cSKamal Heib } 6393488bd4cSKamal Heib 6403488bd4cSKamal Heib static int mlx5e_grp_eth_ext_fill_strings(struct mlx5e_priv *priv, u8 *data, 6413488bd4cSKamal Heib int idx) 6423488bd4cSKamal Heib { 6433488bd4cSKamal Heib int i; 6443488bd4cSKamal Heib 6453488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 6463488bd4cSKamal Heib for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++) 6473488bd4cSKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 6483488bd4cSKamal Heib pport_eth_ext_stats_desc[i].format); 6493488bd4cSKamal Heib return idx; 6503488bd4cSKamal Heib } 6513488bd4cSKamal Heib 6523488bd4cSKamal Heib static int mlx5e_grp_eth_ext_fill_stats(struct mlx5e_priv *priv, u64 *data, 6533488bd4cSKamal Heib int idx) 6543488bd4cSKamal Heib { 6553488bd4cSKamal Heib int i; 6563488bd4cSKamal Heib 6573488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 6583488bd4cSKamal Heib for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++) 6593488bd4cSKamal Heib data[idx++] = 6603488bd4cSKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.eth_ext_counters, 6613488bd4cSKamal Heib pport_eth_ext_stats_desc, i); 6623488bd4cSKamal Heib return idx; 6633488bd4cSKamal Heib } 6643488bd4cSKamal Heib 66519386177SKamal Heib static void mlx5e_grp_eth_ext_update_stats(struct mlx5e_priv *priv) 66619386177SKamal Heib { 66719386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 66819386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 66919386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 67019386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 67119386177SKamal Heib void *out; 67219386177SKamal Heib 67319386177SKamal Heib if (!MLX5_CAP_PCAM_FEATURE(mdev, rx_buffer_fullness_counters)) 67419386177SKamal Heib return; 67519386177SKamal Heib 67619386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 67719386177SKamal Heib out = pstats->eth_ext_counters; 67819386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP); 67919386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); 68019386177SKamal Heib } 68119386177SKamal Heib 6829fd2b5f1SKamal Heib #define PCIE_PERF_OFF(c) \ 6839fd2b5f1SKamal Heib MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c) 6849fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc[] = { 6859fd2b5f1SKamal Heib { "rx_pci_signal_integrity", PCIE_PERF_OFF(rx_errors) }, 6869fd2b5f1SKamal Heib { "tx_pci_signal_integrity", PCIE_PERF_OFF(tx_errors) }, 6879fd2b5f1SKamal Heib }; 6889fd2b5f1SKamal Heib 6899fd2b5f1SKamal Heib #define PCIE_PERF_OFF64(c) \ 6909fd2b5f1SKamal Heib MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c##_high) 6919fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc64[] = { 6929fd2b5f1SKamal Heib { "outbound_pci_buffer_overflow", PCIE_PERF_OFF64(tx_overflow_buffer_pkt) }, 6939fd2b5f1SKamal Heib }; 6949fd2b5f1SKamal Heib 6959fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stall_stats_desc[] = { 6969fd2b5f1SKamal Heib { "outbound_pci_stalled_rd", PCIE_PERF_OFF(outbound_stalled_reads) }, 6979fd2b5f1SKamal Heib { "outbound_pci_stalled_wr", PCIE_PERF_OFF(outbound_stalled_writes) }, 6989fd2b5f1SKamal Heib { "outbound_pci_stalled_rd_events", PCIE_PERF_OFF(outbound_stalled_reads_events) }, 6999fd2b5f1SKamal Heib { "outbound_pci_stalled_wr_events", PCIE_PERF_OFF(outbound_stalled_writes_events) }, 7009fd2b5f1SKamal Heib }; 7019fd2b5f1SKamal Heib 7029fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS ARRAY_SIZE(pcie_perf_stats_desc) 7039fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS64 ARRAY_SIZE(pcie_perf_stats_desc64) 7049fd2b5f1SKamal Heib #define NUM_PCIE_PERF_STALL_COUNTERS ARRAY_SIZE(pcie_perf_stall_stats_desc) 7059fd2b5f1SKamal Heib 7069fd2b5f1SKamal Heib static int mlx5e_grp_pcie_get_num_stats(struct mlx5e_priv *priv) 7079fd2b5f1SKamal Heib { 7089fd2b5f1SKamal Heib int num_stats = 0; 7099fd2b5f1SKamal Heib 7109fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 7119fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_COUNTERS; 7129fd2b5f1SKamal Heib 7139fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 7149fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_COUNTERS64; 7159fd2b5f1SKamal Heib 7169fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 7179fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_STALL_COUNTERS; 7189fd2b5f1SKamal Heib 7199fd2b5f1SKamal Heib return num_stats; 7209fd2b5f1SKamal Heib } 7219fd2b5f1SKamal Heib 7229fd2b5f1SKamal Heib static int mlx5e_grp_pcie_fill_strings(struct mlx5e_priv *priv, u8 *data, 7239fd2b5f1SKamal Heib int idx) 7249fd2b5f1SKamal Heib { 7259fd2b5f1SKamal Heib int i; 7269fd2b5f1SKamal Heib 7279fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 7289fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++) 7299fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 7309fd2b5f1SKamal Heib pcie_perf_stats_desc[i].format); 7319fd2b5f1SKamal Heib 7329fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 7339fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++) 7349fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 7359fd2b5f1SKamal Heib pcie_perf_stats_desc64[i].format); 7369fd2b5f1SKamal Heib 7379fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 7389fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++) 7399fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 7409fd2b5f1SKamal Heib pcie_perf_stall_stats_desc[i].format); 7419fd2b5f1SKamal Heib return idx; 7429fd2b5f1SKamal Heib } 7439fd2b5f1SKamal Heib 7449fd2b5f1SKamal Heib static int mlx5e_grp_pcie_fill_stats(struct mlx5e_priv *priv, u64 *data, 7459fd2b5f1SKamal Heib int idx) 7469fd2b5f1SKamal Heib { 7479fd2b5f1SKamal Heib int i; 7489fd2b5f1SKamal Heib 7499fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 7509fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++) 7519fd2b5f1SKamal Heib data[idx++] = 7529fd2b5f1SKamal Heib MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters, 7539fd2b5f1SKamal Heib pcie_perf_stats_desc, i); 7549fd2b5f1SKamal Heib 7559fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 7569fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++) 7579fd2b5f1SKamal Heib data[idx++] = 7589fd2b5f1SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pcie.pcie_perf_counters, 7599fd2b5f1SKamal Heib pcie_perf_stats_desc64, i); 7609fd2b5f1SKamal Heib 7619fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 7629fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++) 7639fd2b5f1SKamal Heib data[idx++] = 7649fd2b5f1SKamal Heib MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters, 7659fd2b5f1SKamal Heib pcie_perf_stall_stats_desc, i); 7669fd2b5f1SKamal Heib return idx; 7679fd2b5f1SKamal Heib } 7689fd2b5f1SKamal Heib 76919386177SKamal Heib static void mlx5e_grp_pcie_update_stats(struct mlx5e_priv *priv) 77019386177SKamal Heib { 77119386177SKamal Heib struct mlx5e_pcie_stats *pcie_stats = &priv->stats.pcie; 77219386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 77319386177SKamal Heib u32 in[MLX5_ST_SZ_DW(mpcnt_reg)] = {0}; 77419386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(mpcnt_reg); 77519386177SKamal Heib void *out; 77619386177SKamal Heib 77719386177SKamal Heib if (!MLX5_CAP_MCAM_FEATURE(mdev, pcie_performance_group)) 77819386177SKamal Heib return; 77919386177SKamal Heib 78019386177SKamal Heib out = pcie_stats->pcie_perf_counters; 78119386177SKamal Heib MLX5_SET(mpcnt_reg, in, grp, MLX5_PCIE_PERFORMANCE_COUNTERS_GROUP); 78219386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_MPCNT, 0, 0); 78319386177SKamal Heib } 78419386177SKamal Heib 7854377bea2SKamal Heib #define PPORT_PER_PRIO_OFF(c) \ 7864377bea2SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 7874377bea2SKamal Heib counter_set.eth_per_prio_grp_data_layout.c##_high) 788e6000651SKamal Heib static const struct counter_desc pport_per_prio_traffic_stats_desc[] = { 789e6000651SKamal Heib { "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets) }, 790e6000651SKamal Heib { "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames) }, 791e6000651SKamal Heib { "tx_prio%d_bytes", PPORT_PER_PRIO_OFF(tx_octets) }, 792e6000651SKamal Heib { "tx_prio%d_packets", PPORT_PER_PRIO_OFF(tx_frames) }, 793e6000651SKamal Heib }; 794e6000651SKamal Heib 795e6000651SKamal Heib #define NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS ARRAY_SIZE(pport_per_prio_traffic_stats_desc) 796e6000651SKamal Heib 797e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_get_num_stats(struct mlx5e_priv *priv) 798e6000651SKamal Heib { 799e6000651SKamal Heib return NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS * NUM_PPORT_PRIO; 800e6000651SKamal Heib } 801e6000651SKamal Heib 802e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_strings(struct mlx5e_priv *priv, 803e6000651SKamal Heib u8 *data, 804e6000651SKamal Heib int idx) 805e6000651SKamal Heib { 806e6000651SKamal Heib int i, prio; 807e6000651SKamal Heib 808e6000651SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 809e6000651SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++) 810e6000651SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 811e6000651SKamal Heib pport_per_prio_traffic_stats_desc[i].format, prio); 812e6000651SKamal Heib } 813e6000651SKamal Heib 814e6000651SKamal Heib return idx; 815e6000651SKamal Heib } 816e6000651SKamal Heib 817e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_stats(struct mlx5e_priv *priv, 818e6000651SKamal Heib u64 *data, 819e6000651SKamal Heib int idx) 820e6000651SKamal Heib { 821e6000651SKamal Heib int i, prio; 822e6000651SKamal Heib 823e6000651SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 824e6000651SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++) 825e6000651SKamal Heib data[idx++] = 826e6000651SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio], 827e6000651SKamal Heib pport_per_prio_traffic_stats_desc, i); 828e6000651SKamal Heib } 829e6000651SKamal Heib 830e6000651SKamal Heib return idx; 831e6000651SKamal Heib } 832e6000651SKamal Heib 8334377bea2SKamal Heib static const struct counter_desc pport_per_prio_pfc_stats_desc[] = { 8344377bea2SKamal Heib /* %s is "global" or "prio{i}" */ 8354377bea2SKamal Heib { "rx_%s_pause", PPORT_PER_PRIO_OFF(rx_pause) }, 8364377bea2SKamal Heib { "rx_%s_pause_duration", PPORT_PER_PRIO_OFF(rx_pause_duration) }, 8374377bea2SKamal Heib { "tx_%s_pause", PPORT_PER_PRIO_OFF(tx_pause) }, 8384377bea2SKamal Heib { "tx_%s_pause_duration", PPORT_PER_PRIO_OFF(tx_pause_duration) }, 8394377bea2SKamal Heib { "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) }, 8404377bea2SKamal Heib }; 8414377bea2SKamal Heib 8422fcb12dfSInbar Karmy static const struct counter_desc pport_pfc_stall_stats_desc[] = { 8432fcb12dfSInbar Karmy { "tx_pause_storm_warning_events ", PPORT_PER_PRIO_OFF(device_stall_minor_watermark_cnt) }, 8442fcb12dfSInbar Karmy { "tx_pause_storm_error_events", PPORT_PER_PRIO_OFF(device_stall_critical_watermark_cnt) }, 8452fcb12dfSInbar Karmy }; 8462fcb12dfSInbar Karmy 8474377bea2SKamal Heib #define NUM_PPORT_PER_PRIO_PFC_COUNTERS ARRAY_SIZE(pport_per_prio_pfc_stats_desc) 8482fcb12dfSInbar Karmy #define NUM_PPORT_PFC_STALL_COUNTERS(priv) (ARRAY_SIZE(pport_pfc_stall_stats_desc) * \ 8492fcb12dfSInbar Karmy MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) * \ 8502fcb12dfSInbar Karmy MLX5_CAP_DEBUG((priv)->mdev, stall_detect)) 8514377bea2SKamal Heib 8524377bea2SKamal Heib static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv) 8534377bea2SKamal Heib { 8544377bea2SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 8554377bea2SKamal Heib u8 pfc_en_tx; 8564377bea2SKamal Heib u8 pfc_en_rx; 8574377bea2SKamal Heib int err; 8584377bea2SKamal Heib 8594377bea2SKamal Heib if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) 8604377bea2SKamal Heib return 0; 8614377bea2SKamal Heib 8624377bea2SKamal Heib err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx); 8634377bea2SKamal Heib 8644377bea2SKamal Heib return err ? 0 : pfc_en_tx | pfc_en_rx; 8654377bea2SKamal Heib } 8664377bea2SKamal Heib 8674377bea2SKamal Heib static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv) 8684377bea2SKamal Heib { 8694377bea2SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 8704377bea2SKamal Heib u32 rx_pause; 8714377bea2SKamal Heib u32 tx_pause; 8724377bea2SKamal Heib int err; 8734377bea2SKamal Heib 8744377bea2SKamal Heib if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) 8754377bea2SKamal Heib return false; 8764377bea2SKamal Heib 8774377bea2SKamal Heib err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause); 8784377bea2SKamal Heib 8794377bea2SKamal Heib return err ? false : rx_pause | tx_pause; 8804377bea2SKamal Heib } 8814377bea2SKamal Heib 8824377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_get_num_stats(struct mlx5e_priv *priv) 8834377bea2SKamal Heib { 8844377bea2SKamal Heib return (mlx5e_query_global_pause_combined(priv) + 8854377bea2SKamal Heib hweight8(mlx5e_query_pfc_combined(priv))) * 8862fcb12dfSInbar Karmy NUM_PPORT_PER_PRIO_PFC_COUNTERS + 8872fcb12dfSInbar Karmy NUM_PPORT_PFC_STALL_COUNTERS(priv); 8884377bea2SKamal Heib } 8894377bea2SKamal Heib 8904377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_strings(struct mlx5e_priv *priv, 8914377bea2SKamal Heib u8 *data, 8924377bea2SKamal Heib int idx) 8934377bea2SKamal Heib { 8944377bea2SKamal Heib unsigned long pfc_combined; 8954377bea2SKamal Heib int i, prio; 8964377bea2SKamal Heib 8974377bea2SKamal Heib pfc_combined = mlx5e_query_pfc_combined(priv); 8984377bea2SKamal Heib for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) { 8994377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 9004377bea2SKamal Heib char pfc_string[ETH_GSTRING_LEN]; 9014377bea2SKamal Heib 9024377bea2SKamal Heib snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio); 9034377bea2SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 9044377bea2SKamal Heib pport_per_prio_pfc_stats_desc[i].format, pfc_string); 9054377bea2SKamal Heib } 9064377bea2SKamal Heib } 9074377bea2SKamal Heib 9084377bea2SKamal Heib if (mlx5e_query_global_pause_combined(priv)) { 9094377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 9104377bea2SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 9114377bea2SKamal Heib pport_per_prio_pfc_stats_desc[i].format, "global"); 9124377bea2SKamal Heib } 9134377bea2SKamal Heib } 9144377bea2SKamal Heib 9152fcb12dfSInbar Karmy for (i = 0; i < NUM_PPORT_PFC_STALL_COUNTERS(priv); i++) 9162fcb12dfSInbar Karmy strcpy(data + (idx++) * ETH_GSTRING_LEN, 9172fcb12dfSInbar Karmy pport_pfc_stall_stats_desc[i].format); 9182fcb12dfSInbar Karmy 9194377bea2SKamal Heib return idx; 9204377bea2SKamal Heib } 9214377bea2SKamal Heib 9224377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_stats(struct mlx5e_priv *priv, 9234377bea2SKamal Heib u64 *data, 9244377bea2SKamal Heib int idx) 9254377bea2SKamal Heib { 9264377bea2SKamal Heib unsigned long pfc_combined; 9274377bea2SKamal Heib int i, prio; 9284377bea2SKamal Heib 9294377bea2SKamal Heib pfc_combined = mlx5e_query_pfc_combined(priv); 9304377bea2SKamal Heib for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) { 9314377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 9324377bea2SKamal Heib data[idx++] = 9334377bea2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio], 9344377bea2SKamal Heib pport_per_prio_pfc_stats_desc, i); 9354377bea2SKamal Heib } 9364377bea2SKamal Heib } 9374377bea2SKamal Heib 9384377bea2SKamal Heib if (mlx5e_query_global_pause_combined(priv)) { 9394377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 9404377bea2SKamal Heib data[idx++] = 9414377bea2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0], 9424377bea2SKamal Heib pport_per_prio_pfc_stats_desc, i); 9434377bea2SKamal Heib } 9444377bea2SKamal Heib } 9454377bea2SKamal Heib 9462fcb12dfSInbar Karmy for (i = 0; i < NUM_PPORT_PFC_STALL_COUNTERS(priv); i++) 9472fcb12dfSInbar Karmy data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0], 9482fcb12dfSInbar Karmy pport_pfc_stall_stats_desc, i); 9492fcb12dfSInbar Karmy 9504377bea2SKamal Heib return idx; 9514377bea2SKamal Heib } 9524377bea2SKamal Heib 953a8984281SKamal Heib static int mlx5e_grp_per_prio_get_num_stats(struct mlx5e_priv *priv) 954a8984281SKamal Heib { 955a8984281SKamal Heib return mlx5e_grp_per_prio_traffic_get_num_stats(priv) + 956a8984281SKamal Heib mlx5e_grp_per_prio_pfc_get_num_stats(priv); 957a8984281SKamal Heib } 958a8984281SKamal Heib 959a8984281SKamal Heib static int mlx5e_grp_per_prio_fill_strings(struct mlx5e_priv *priv, u8 *data, 960a8984281SKamal Heib int idx) 961a8984281SKamal Heib { 962a8984281SKamal Heib idx = mlx5e_grp_per_prio_traffic_fill_strings(priv, data, idx); 963a8984281SKamal Heib idx = mlx5e_grp_per_prio_pfc_fill_strings(priv, data, idx); 964a8984281SKamal Heib return idx; 965a8984281SKamal Heib } 966a8984281SKamal Heib 967a8984281SKamal Heib static int mlx5e_grp_per_prio_fill_stats(struct mlx5e_priv *priv, u64 *data, 968a8984281SKamal Heib int idx) 969a8984281SKamal Heib { 970a8984281SKamal Heib idx = mlx5e_grp_per_prio_traffic_fill_stats(priv, data, idx); 971a8984281SKamal Heib idx = mlx5e_grp_per_prio_pfc_fill_stats(priv, data, idx); 972a8984281SKamal Heib return idx; 973a8984281SKamal Heib } 974a8984281SKamal Heib 97519386177SKamal Heib static void mlx5e_grp_per_prio_update_stats(struct mlx5e_priv *priv) 97619386177SKamal Heib { 97719386177SKamal Heib struct mlx5e_pport_stats *pstats = &priv->stats.pport; 97819386177SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 97919386177SKamal Heib u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; 98019386177SKamal Heib int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); 98119386177SKamal Heib int prio; 98219386177SKamal Heib void *out; 98319386177SKamal Heib 98419386177SKamal Heib MLX5_SET(ppcnt_reg, in, local_port, 1); 98519386177SKamal Heib MLX5_SET(ppcnt_reg, in, grp, MLX5_PER_PRIORITY_COUNTERS_GROUP); 98619386177SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 98719386177SKamal Heib out = pstats->per_prio_counters[prio]; 98819386177SKamal Heib MLX5_SET(ppcnt_reg, in, prio_tc, prio); 98919386177SKamal Heib mlx5_core_access_reg(mdev, in, sz, out, sz, 99019386177SKamal Heib MLX5_REG_PPCNT, 0, 0); 99119386177SKamal Heib } 99219386177SKamal Heib } 99319386177SKamal Heib 9940e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_status_desc[] = { 9950e6f01a4SKamal Heib { "module_unplug", 8 }, 9960e6f01a4SKamal Heib }; 9970e6f01a4SKamal Heib 9980e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_error_desc[] = { 9990e6f01a4SKamal Heib { "module_bus_stuck", 16 }, /* bus stuck (I2C or data shorted) */ 10000e6f01a4SKamal Heib { "module_high_temp", 48 }, /* high temperature */ 10010e6f01a4SKamal Heib { "module_bad_shorted", 56 }, /* bad or shorted cable/module */ 10020e6f01a4SKamal Heib }; 10030e6f01a4SKamal Heib 10040e6f01a4SKamal Heib #define NUM_PME_STATUS_STATS ARRAY_SIZE(mlx5e_pme_status_desc) 10050e6f01a4SKamal Heib #define NUM_PME_ERR_STATS ARRAY_SIZE(mlx5e_pme_error_desc) 10060e6f01a4SKamal Heib 10070e6f01a4SKamal Heib static int mlx5e_grp_pme_get_num_stats(struct mlx5e_priv *priv) 10080e6f01a4SKamal Heib { 10090e6f01a4SKamal Heib return NUM_PME_STATUS_STATS + NUM_PME_ERR_STATS; 10100e6f01a4SKamal Heib } 10110e6f01a4SKamal Heib 10120e6f01a4SKamal Heib static int mlx5e_grp_pme_fill_strings(struct mlx5e_priv *priv, u8 *data, 10130e6f01a4SKamal Heib int idx) 10140e6f01a4SKamal Heib { 10150e6f01a4SKamal Heib int i; 10160e6f01a4SKamal Heib 10170e6f01a4SKamal Heib for (i = 0; i < NUM_PME_STATUS_STATS; i++) 10180e6f01a4SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_status_desc[i].format); 10190e6f01a4SKamal Heib 10200e6f01a4SKamal Heib for (i = 0; i < NUM_PME_ERR_STATS; i++) 10210e6f01a4SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_error_desc[i].format); 10220e6f01a4SKamal Heib 10230e6f01a4SKamal Heib return idx; 10240e6f01a4SKamal Heib } 10250e6f01a4SKamal Heib 10260e6f01a4SKamal Heib static int mlx5e_grp_pme_fill_stats(struct mlx5e_priv *priv, u64 *data, 10270e6f01a4SKamal Heib int idx) 10280e6f01a4SKamal Heib { 10290e6f01a4SKamal Heib struct mlx5_priv *mlx5_priv = &priv->mdev->priv; 10300e6f01a4SKamal Heib int i; 10310e6f01a4SKamal Heib 10320e6f01a4SKamal Heib for (i = 0; i < NUM_PME_STATUS_STATS; i++) 10330e6f01a4SKamal Heib data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.status_counters, 10340e6f01a4SKamal Heib mlx5e_pme_status_desc, i); 10350e6f01a4SKamal Heib 10360e6f01a4SKamal Heib for (i = 0; i < NUM_PME_ERR_STATS; i++) 10370e6f01a4SKamal Heib data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.error_counters, 10380e6f01a4SKamal Heib mlx5e_pme_error_desc, i); 10390e6f01a4SKamal Heib 10400e6f01a4SKamal Heib return idx; 10410e6f01a4SKamal Heib } 10420e6f01a4SKamal Heib 1043e185d43fSKamal Heib static int mlx5e_grp_ipsec_get_num_stats(struct mlx5e_priv *priv) 1044e185d43fSKamal Heib { 1045e185d43fSKamal Heib return mlx5e_ipsec_get_count(priv); 1046e185d43fSKamal Heib } 1047e185d43fSKamal Heib 1048e185d43fSKamal Heib static int mlx5e_grp_ipsec_fill_strings(struct mlx5e_priv *priv, u8 *data, 1049e185d43fSKamal Heib int idx) 1050e185d43fSKamal Heib { 1051e185d43fSKamal Heib return idx + mlx5e_ipsec_get_strings(priv, 1052e185d43fSKamal Heib data + idx * ETH_GSTRING_LEN); 1053e185d43fSKamal Heib } 1054e185d43fSKamal Heib 1055e185d43fSKamal Heib static int mlx5e_grp_ipsec_fill_stats(struct mlx5e_priv *priv, u64 *data, 1056e185d43fSKamal Heib int idx) 1057e185d43fSKamal Heib { 1058e185d43fSKamal Heib return idx + mlx5e_ipsec_get_stats(priv, data + idx); 1059e185d43fSKamal Heib } 1060e185d43fSKamal Heib 106119386177SKamal Heib static void mlx5e_grp_ipsec_update_stats(struct mlx5e_priv *priv) 106219386177SKamal Heib { 106319386177SKamal Heib mlx5e_ipsec_update_stats(priv); 106419386177SKamal Heib } 106519386177SKamal Heib 10661fe85006SKamal Heib static const struct counter_desc rq_stats_desc[] = { 10671fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, packets) }, 10681fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, bytes) }, 10691fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete) }, 10701fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary) }, 10711fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary_inner) }, 10721fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_none) }, 10731fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_drop) }, 10741fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_tx) }, 10751fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, xdp_tx_full) }, 10761fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_packets) }, 10771fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_bytes) }, 1078f24686e8SGal Pressman { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, removed_vlan_packets) }, 10791fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, wqe_err) }, 10801fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler) }, 10811fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, buff_alloc_err) }, 10821fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_blks) }, 10831fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_pkts) }, 10841fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, page_reuse) }, 10851fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_reuse) }, 10861fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_full) }, 10871fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_empty) }, 10881fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_busy) }, 10891fe85006SKamal Heib { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_waive) }, 10901fe85006SKamal Heib }; 10911fe85006SKamal Heib 10921fe85006SKamal Heib static const struct counter_desc sq_stats_desc[] = { 10931fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, packets) }, 10941fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, bytes) }, 10951fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_packets) }, 10961fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_bytes) }, 10971fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_packets) }, 10981fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_bytes) }, 10991fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial) }, 11001fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial_inner) }, 1101f24686e8SGal Pressman { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, added_vlan_packets) }, 11021fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, nop) }, 11031fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_none) }, 11041fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, stopped) }, 11051fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, wake) }, 11061fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, dropped) }, 11071fe85006SKamal Heib { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, xmit_more) }, 110816cc14d8SEran Ben Elisha { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, cqe_err) }, 11091fe85006SKamal Heib }; 11101fe85006SKamal Heib 111157d689a8SEran Ben Elisha static const struct counter_desc ch_stats_desc[] = { 111257d689a8SEran Ben Elisha { MLX5E_DECLARE_CH_STAT(struct mlx5e_ch_stats, eq_rearm) }, 111357d689a8SEran Ben Elisha }; 111457d689a8SEran Ben Elisha 11151fe85006SKamal Heib #define NUM_RQ_STATS ARRAY_SIZE(rq_stats_desc) 11161fe85006SKamal Heib #define NUM_SQ_STATS ARRAY_SIZE(sq_stats_desc) 111757d689a8SEran Ben Elisha #define NUM_CH_STATS ARRAY_SIZE(ch_stats_desc) 11181fe85006SKamal Heib 11191fe85006SKamal Heib static int mlx5e_grp_channels_get_num_stats(struct mlx5e_priv *priv) 11201fe85006SKamal Heib { 11211fe85006SKamal Heib return (NUM_RQ_STATS * priv->channels.num) + 112257d689a8SEran Ben Elisha (NUM_CH_STATS * priv->channels.num) + 11231fe85006SKamal Heib (NUM_SQ_STATS * priv->channels.num * priv->channels.params.num_tc); 11241fe85006SKamal Heib } 11251fe85006SKamal Heib 11261fe85006SKamal Heib static int mlx5e_grp_channels_fill_strings(struct mlx5e_priv *priv, u8 *data, 11271fe85006SKamal Heib int idx) 11281fe85006SKamal Heib { 11291fe85006SKamal Heib int i, j, tc; 11301fe85006SKamal Heib 11311fe85006SKamal Heib if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) 11321fe85006SKamal Heib return idx; 11331fe85006SKamal Heib 11341fe85006SKamal Heib for (i = 0; i < priv->channels.num; i++) 113557d689a8SEran Ben Elisha for (j = 0; j < NUM_CH_STATS; j++) 113657d689a8SEran Ben Elisha sprintf(data + (idx++) * ETH_GSTRING_LEN, 113757d689a8SEran Ben Elisha ch_stats_desc[j].format, i); 113857d689a8SEran Ben Elisha 113957d689a8SEran Ben Elisha for (i = 0; i < priv->channels.num; i++) 11401fe85006SKamal Heib for (j = 0; j < NUM_RQ_STATS; j++) 11411fe85006SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, rq_stats_desc[j].format, i); 11421fe85006SKamal Heib 11431fe85006SKamal Heib for (tc = 0; tc < priv->channels.params.num_tc; tc++) 11441fe85006SKamal Heib for (i = 0; i < priv->channels.num; i++) 11451fe85006SKamal Heib for (j = 0; j < NUM_SQ_STATS; j++) 11461fe85006SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 11471fe85006SKamal Heib sq_stats_desc[j].format, 11481fe85006SKamal Heib priv->channel_tc2txq[i][tc]); 11491fe85006SKamal Heib 11501fe85006SKamal Heib return idx; 11511fe85006SKamal Heib } 11521fe85006SKamal Heib 11531fe85006SKamal Heib static int mlx5e_grp_channels_fill_stats(struct mlx5e_priv *priv, u64 *data, 11541fe85006SKamal Heib int idx) 11551fe85006SKamal Heib { 11561fe85006SKamal Heib struct mlx5e_channels *channels = &priv->channels; 11571fe85006SKamal Heib int i, j, tc; 11581fe85006SKamal Heib 11591fe85006SKamal Heib if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) 11601fe85006SKamal Heib return idx; 11611fe85006SKamal Heib 11621fe85006SKamal Heib for (i = 0; i < channels->num; i++) 116357d689a8SEran Ben Elisha for (j = 0; j < NUM_CH_STATS; j++) 116457d689a8SEran Ben Elisha data[idx++] = 116557d689a8SEran Ben Elisha MLX5E_READ_CTR64_CPU(&channels->c[i]->stats, 116657d689a8SEran Ben Elisha ch_stats_desc, j); 116757d689a8SEran Ben Elisha 116857d689a8SEran Ben Elisha for (i = 0; i < channels->num; i++) 11691fe85006SKamal Heib for (j = 0; j < NUM_RQ_STATS; j++) 11701fe85006SKamal Heib data[idx++] = 11711fe85006SKamal Heib MLX5E_READ_CTR64_CPU(&channels->c[i]->rq.stats, 11721fe85006SKamal Heib rq_stats_desc, j); 11731fe85006SKamal Heib 11741fe85006SKamal Heib for (tc = 0; tc < priv->channels.params.num_tc; tc++) 11751fe85006SKamal Heib for (i = 0; i < channels->num; i++) 11761fe85006SKamal Heib for (j = 0; j < NUM_SQ_STATS; j++) 11771fe85006SKamal Heib data[idx++] = 11781fe85006SKamal Heib MLX5E_READ_CTR64_CPU(&channels->c[i]->sq[tc].stats, 11791fe85006SKamal Heib sq_stats_desc, j); 11801fe85006SKamal Heib 11811fe85006SKamal Heib return idx; 11821fe85006SKamal Heib } 11831fe85006SKamal Heib 118419386177SKamal Heib /* The stats groups order is opposite to the update_stats() order calls */ 1185c0752f2bSKamal Heib const struct mlx5e_stats_grp mlx5e_stats_grps[] = { 1186c0752f2bSKamal Heib { 1187c0752f2bSKamal Heib .get_num_stats = mlx5e_grp_sw_get_num_stats, 1188c0752f2bSKamal Heib .fill_strings = mlx5e_grp_sw_fill_strings, 1189c0752f2bSKamal Heib .fill_stats = mlx5e_grp_sw_fill_stats, 119019386177SKamal Heib .update_stats_mask = MLX5E_NDO_UPDATE_STATS, 119119386177SKamal Heib .update_stats = mlx5e_grp_sw_update_stats, 1192fd8dcdb8SKamal Heib }, 1193fd8dcdb8SKamal Heib { 1194fd8dcdb8SKamal Heib .get_num_stats = mlx5e_grp_q_get_num_stats, 1195fd8dcdb8SKamal Heib .fill_strings = mlx5e_grp_q_fill_strings, 1196fd8dcdb8SKamal Heib .fill_stats = mlx5e_grp_q_fill_stats, 119719386177SKamal Heib .update_stats_mask = MLX5E_NDO_UPDATE_STATS, 119819386177SKamal Heib .update_stats = mlx5e_grp_q_update_stats, 1199fd8dcdb8SKamal Heib }, 120040cab9f1SKamal Heib { 12015c298143SMoshe Shemesh .get_num_stats = mlx5e_grp_vnic_env_get_num_stats, 12025c298143SMoshe Shemesh .fill_strings = mlx5e_grp_vnic_env_fill_strings, 12035c298143SMoshe Shemesh .fill_stats = mlx5e_grp_vnic_env_fill_stats, 12045c298143SMoshe Shemesh .update_stats = mlx5e_grp_vnic_env_update_stats, 12055c298143SMoshe Shemesh }, 12065c298143SMoshe Shemesh { 120740cab9f1SKamal Heib .get_num_stats = mlx5e_grp_vport_get_num_stats, 120840cab9f1SKamal Heib .fill_strings = mlx5e_grp_vport_fill_strings, 120940cab9f1SKamal Heib .fill_stats = mlx5e_grp_vport_fill_stats, 121019386177SKamal Heib .update_stats_mask = MLX5E_NDO_UPDATE_STATS, 121119386177SKamal Heib .update_stats = mlx5e_grp_vport_update_stats, 121240cab9f1SKamal Heib }, 12136e6ef814SKamal Heib { 12146e6ef814SKamal Heib .get_num_stats = mlx5e_grp_802_3_get_num_stats, 12156e6ef814SKamal Heib .fill_strings = mlx5e_grp_802_3_fill_strings, 12166e6ef814SKamal Heib .fill_stats = mlx5e_grp_802_3_fill_stats, 121719386177SKamal Heib .update_stats_mask = MLX5E_NDO_UPDATE_STATS, 121819386177SKamal Heib .update_stats = mlx5e_grp_802_3_update_stats, 12196e6ef814SKamal Heib }, 1220fc8e64a3SKamal Heib { 1221fc8e64a3SKamal Heib .get_num_stats = mlx5e_grp_2863_get_num_stats, 1222fc8e64a3SKamal Heib .fill_strings = mlx5e_grp_2863_fill_strings, 1223fc8e64a3SKamal Heib .fill_stats = mlx5e_grp_2863_fill_stats, 122419386177SKamal Heib .update_stats = mlx5e_grp_2863_update_stats, 1225fc8e64a3SKamal Heib }, 1226e0e0def9SKamal Heib { 1227e0e0def9SKamal Heib .get_num_stats = mlx5e_grp_2819_get_num_stats, 1228e0e0def9SKamal Heib .fill_strings = mlx5e_grp_2819_fill_strings, 1229e0e0def9SKamal Heib .fill_stats = mlx5e_grp_2819_fill_stats, 123019386177SKamal Heib .update_stats = mlx5e_grp_2819_update_stats, 1231e0e0def9SKamal Heib }, 12322e4df0b2SKamal Heib { 12332e4df0b2SKamal Heib .get_num_stats = mlx5e_grp_phy_get_num_stats, 12342e4df0b2SKamal Heib .fill_strings = mlx5e_grp_phy_fill_strings, 12352e4df0b2SKamal Heib .fill_stats = mlx5e_grp_phy_fill_stats, 123619386177SKamal Heib .update_stats = mlx5e_grp_phy_update_stats, 12372e4df0b2SKamal Heib }, 12383488bd4cSKamal Heib { 12393488bd4cSKamal Heib .get_num_stats = mlx5e_grp_eth_ext_get_num_stats, 12403488bd4cSKamal Heib .fill_strings = mlx5e_grp_eth_ext_fill_strings, 12413488bd4cSKamal Heib .fill_stats = mlx5e_grp_eth_ext_fill_stats, 124219386177SKamal Heib .update_stats = mlx5e_grp_eth_ext_update_stats, 12439fd2b5f1SKamal Heib }, 12449fd2b5f1SKamal Heib { 12459fd2b5f1SKamal Heib .get_num_stats = mlx5e_grp_pcie_get_num_stats, 12469fd2b5f1SKamal Heib .fill_strings = mlx5e_grp_pcie_fill_strings, 12479fd2b5f1SKamal Heib .fill_stats = mlx5e_grp_pcie_fill_stats, 124819386177SKamal Heib .update_stats = mlx5e_grp_pcie_update_stats, 12499fd2b5f1SKamal Heib }, 1250e6000651SKamal Heib { 1251a8984281SKamal Heib .get_num_stats = mlx5e_grp_per_prio_get_num_stats, 1252a8984281SKamal Heib .fill_strings = mlx5e_grp_per_prio_fill_strings, 1253a8984281SKamal Heib .fill_stats = mlx5e_grp_per_prio_fill_stats, 125419386177SKamal Heib .update_stats = mlx5e_grp_per_prio_update_stats, 12554377bea2SKamal Heib }, 12560e6f01a4SKamal Heib { 12570e6f01a4SKamal Heib .get_num_stats = mlx5e_grp_pme_get_num_stats, 12580e6f01a4SKamal Heib .fill_strings = mlx5e_grp_pme_fill_strings, 12590e6f01a4SKamal Heib .fill_stats = mlx5e_grp_pme_fill_stats, 12600e6f01a4SKamal Heib }, 1261e185d43fSKamal Heib { 1262e185d43fSKamal Heib .get_num_stats = mlx5e_grp_ipsec_get_num_stats, 1263e185d43fSKamal Heib .fill_strings = mlx5e_grp_ipsec_fill_strings, 1264e185d43fSKamal Heib .fill_stats = mlx5e_grp_ipsec_fill_stats, 126519386177SKamal Heib .update_stats = mlx5e_grp_ipsec_update_stats, 1266e185d43fSKamal Heib }, 12671fe85006SKamal Heib { 12681fe85006SKamal Heib .get_num_stats = mlx5e_grp_channels_get_num_stats, 12691fe85006SKamal Heib .fill_strings = mlx5e_grp_channels_fill_strings, 12701fe85006SKamal Heib .fill_stats = mlx5e_grp_channels_fill_stats, 12711fe85006SKamal Heib } 1272c0752f2bSKamal Heib }; 1273c0752f2bSKamal Heib 1274c0752f2bSKamal Heib const int mlx5e_num_stats_grps = ARRAY_SIZE(mlx5e_stats_grps); 1275