1c0752f2bSKamal Heib /* 2c0752f2bSKamal Heib * Copyright (c) 2017, Mellanox Technologies, Ltd. All rights reserved. 3c0752f2bSKamal Heib * 4c0752f2bSKamal Heib * This software is available to you under a choice of one of two 5c0752f2bSKamal Heib * licenses. You may choose to be licensed under the terms of the GNU 6c0752f2bSKamal Heib * General Public License (GPL) Version 2, available from the file 7c0752f2bSKamal Heib * COPYING in the main directory of this source tree, or the 8c0752f2bSKamal Heib * OpenIB.org BSD license below: 9c0752f2bSKamal Heib * 10c0752f2bSKamal Heib * Redistribution and use in source and binary forms, with or 11c0752f2bSKamal Heib * without modification, are permitted provided that the following 12c0752f2bSKamal Heib * conditions are met: 13c0752f2bSKamal Heib * 14c0752f2bSKamal Heib * - Redistributions of source code must retain the above 15c0752f2bSKamal Heib * copyright notice, this list of conditions and the following 16c0752f2bSKamal Heib * disclaimer. 17c0752f2bSKamal Heib * 18c0752f2bSKamal Heib * - Redistributions in binary form must reproduce the above 19c0752f2bSKamal Heib * copyright notice, this list of conditions and the following 20c0752f2bSKamal Heib * disclaimer in the documentation and/or other materials 21c0752f2bSKamal Heib * provided with the distribution. 22c0752f2bSKamal Heib * 23c0752f2bSKamal Heib * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24c0752f2bSKamal Heib * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25c0752f2bSKamal Heib * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26c0752f2bSKamal Heib * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27c0752f2bSKamal Heib * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28c0752f2bSKamal Heib * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29c0752f2bSKamal Heib * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30c0752f2bSKamal Heib * SOFTWARE. 31c0752f2bSKamal Heib */ 32c0752f2bSKamal Heib 33c0752f2bSKamal Heib #include "en.h" 34c0752f2bSKamal Heib 35c0752f2bSKamal Heib static const struct counter_desc sw_stats_desc[] = { 36c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) }, 37c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) }, 38c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) }, 39c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) }, 40c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_packets) }, 41c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_bytes) }, 42c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_packets) }, 43c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_bytes) }, 44c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_packets) }, 45c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_bytes) }, 46c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary) }, 47c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_none) }, 48c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete) }, 49c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary_inner) }, 50c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_drop) }, 51c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx) }, 52c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_tx_full) }, 53c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_none) }, 54c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial) }, 55c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial_inner) }, 56c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_stopped) }, 57c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_wake) }, 58c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_dropped) }, 59c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_xmit_more) }, 60c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_wqe_err) }, 61c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler) }, 62c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_buff_alloc_err) }, 63c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_blks) }, 64c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_pkts) }, 65c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_page_reuse) }, 66c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_reuse) }, 67c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_full) }, 68c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_empty) }, 69c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_busy) }, 70c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_waive) }, 71c0752f2bSKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, link_down_events_phy) }, 72c0752f2bSKamal Heib }; 73c0752f2bSKamal Heib 74c0752f2bSKamal Heib #define NUM_SW_COUNTERS ARRAY_SIZE(sw_stats_desc) 75c0752f2bSKamal Heib 76c0752f2bSKamal Heib static int mlx5e_grp_sw_get_num_stats(struct mlx5e_priv *priv) 77c0752f2bSKamal Heib { 78c0752f2bSKamal Heib return NUM_SW_COUNTERS; 79c0752f2bSKamal Heib } 80c0752f2bSKamal Heib 81c0752f2bSKamal Heib static int mlx5e_grp_sw_fill_strings(struct mlx5e_priv *priv, u8 *data, int idx) 82c0752f2bSKamal Heib { 83c0752f2bSKamal Heib int i; 84c0752f2bSKamal Heib 85c0752f2bSKamal Heib for (i = 0; i < NUM_SW_COUNTERS; i++) 86c0752f2bSKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format); 87c0752f2bSKamal Heib return idx; 88c0752f2bSKamal Heib } 89c0752f2bSKamal Heib 90c0752f2bSKamal Heib static int mlx5e_grp_sw_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx) 91c0752f2bSKamal Heib { 92c0752f2bSKamal Heib int i; 93c0752f2bSKamal Heib 94c0752f2bSKamal Heib for (i = 0; i < NUM_SW_COUNTERS; i++) 95c0752f2bSKamal Heib data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw, sw_stats_desc, i); 96c0752f2bSKamal Heib return idx; 97c0752f2bSKamal Heib } 98c0752f2bSKamal Heib 99fd8dcdb8SKamal Heib static const struct counter_desc q_stats_desc[] = { 100fd8dcdb8SKamal Heib { MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_out_of_buffer) }, 101fd8dcdb8SKamal Heib }; 102fd8dcdb8SKamal Heib 103fd8dcdb8SKamal Heib #define NUM_Q_COUNTERS ARRAY_SIZE(q_stats_desc) 104fd8dcdb8SKamal Heib 105fd8dcdb8SKamal Heib static int mlx5e_grp_q_get_num_stats(struct mlx5e_priv *priv) 106fd8dcdb8SKamal Heib { 107fd8dcdb8SKamal Heib return priv->q_counter ? NUM_Q_COUNTERS : 0; 108fd8dcdb8SKamal Heib } 109fd8dcdb8SKamal Heib 110fd8dcdb8SKamal Heib static int mlx5e_grp_q_fill_strings(struct mlx5e_priv *priv, u8 *data, int idx) 111fd8dcdb8SKamal Heib { 112fd8dcdb8SKamal Heib int i; 113fd8dcdb8SKamal Heib 114fd8dcdb8SKamal Heib for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++) 115fd8dcdb8SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].format); 116fd8dcdb8SKamal Heib return idx; 117fd8dcdb8SKamal Heib } 118fd8dcdb8SKamal Heib 119fd8dcdb8SKamal Heib static int mlx5e_grp_q_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx) 120fd8dcdb8SKamal Heib { 121fd8dcdb8SKamal Heib int i; 122fd8dcdb8SKamal Heib 123fd8dcdb8SKamal Heib for (i = 0; i < NUM_Q_COUNTERS && priv->q_counter; i++) 124fd8dcdb8SKamal Heib data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt, q_stats_desc, i); 125fd8dcdb8SKamal Heib return idx; 126fd8dcdb8SKamal Heib } 127fd8dcdb8SKamal Heib 12840cab9f1SKamal Heib #define VPORT_COUNTER_OFF(c) MLX5_BYTE_OFF(query_vport_counter_out, c) 12940cab9f1SKamal Heib static const struct counter_desc vport_stats_desc[] = { 13040cab9f1SKamal Heib { "rx_vport_unicast_packets", 13140cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_unicast.packets) }, 13240cab9f1SKamal Heib { "rx_vport_unicast_bytes", 13340cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_unicast.octets) }, 13440cab9f1SKamal Heib { "tx_vport_unicast_packets", 13540cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_unicast.packets) }, 13640cab9f1SKamal Heib { "tx_vport_unicast_bytes", 13740cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_unicast.octets) }, 13840cab9f1SKamal Heib { "rx_vport_multicast_packets", 13940cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_multicast.packets) }, 14040cab9f1SKamal Heib { "rx_vport_multicast_bytes", 14140cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_multicast.octets) }, 14240cab9f1SKamal Heib { "tx_vport_multicast_packets", 14340cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_multicast.packets) }, 14440cab9f1SKamal Heib { "tx_vport_multicast_bytes", 14540cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_multicast.octets) }, 14640cab9f1SKamal Heib { "rx_vport_broadcast_packets", 14740cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_broadcast.packets) }, 14840cab9f1SKamal Heib { "rx_vport_broadcast_bytes", 14940cab9f1SKamal Heib VPORT_COUNTER_OFF(received_eth_broadcast.octets) }, 15040cab9f1SKamal Heib { "tx_vport_broadcast_packets", 15140cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_broadcast.packets) }, 15240cab9f1SKamal Heib { "tx_vport_broadcast_bytes", 15340cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_eth_broadcast.octets) }, 15440cab9f1SKamal Heib { "rx_vport_rdma_unicast_packets", 15540cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_unicast.packets) }, 15640cab9f1SKamal Heib { "rx_vport_rdma_unicast_bytes", 15740cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_unicast.octets) }, 15840cab9f1SKamal Heib { "tx_vport_rdma_unicast_packets", 15940cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_unicast.packets) }, 16040cab9f1SKamal Heib { "tx_vport_rdma_unicast_bytes", 16140cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_unicast.octets) }, 16240cab9f1SKamal Heib { "rx_vport_rdma_multicast_packets", 16340cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_multicast.packets) }, 16440cab9f1SKamal Heib { "rx_vport_rdma_multicast_bytes", 16540cab9f1SKamal Heib VPORT_COUNTER_OFF(received_ib_multicast.octets) }, 16640cab9f1SKamal Heib { "tx_vport_rdma_multicast_packets", 16740cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_multicast.packets) }, 16840cab9f1SKamal Heib { "tx_vport_rdma_multicast_bytes", 16940cab9f1SKamal Heib VPORT_COUNTER_OFF(transmitted_ib_multicast.octets) }, 17040cab9f1SKamal Heib }; 17140cab9f1SKamal Heib 17240cab9f1SKamal Heib #define NUM_VPORT_COUNTERS ARRAY_SIZE(vport_stats_desc) 17340cab9f1SKamal Heib 17440cab9f1SKamal Heib static int mlx5e_grp_vport_get_num_stats(struct mlx5e_priv *priv) 17540cab9f1SKamal Heib { 17640cab9f1SKamal Heib return NUM_VPORT_COUNTERS; 17740cab9f1SKamal Heib } 17840cab9f1SKamal Heib 17940cab9f1SKamal Heib static int mlx5e_grp_vport_fill_strings(struct mlx5e_priv *priv, u8 *data, 18040cab9f1SKamal Heib int idx) 18140cab9f1SKamal Heib { 18240cab9f1SKamal Heib int i; 18340cab9f1SKamal Heib 18440cab9f1SKamal Heib for (i = 0; i < NUM_VPORT_COUNTERS; i++) 18540cab9f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, vport_stats_desc[i].format); 18640cab9f1SKamal Heib return idx; 18740cab9f1SKamal Heib } 18840cab9f1SKamal Heib 18940cab9f1SKamal Heib static int mlx5e_grp_vport_fill_stats(struct mlx5e_priv *priv, u64 *data, 19040cab9f1SKamal Heib int idx) 19140cab9f1SKamal Heib { 19240cab9f1SKamal Heib int i; 19340cab9f1SKamal Heib 19440cab9f1SKamal Heib for (i = 0; i < NUM_VPORT_COUNTERS; i++) 19540cab9f1SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out, 19640cab9f1SKamal Heib vport_stats_desc, i); 19740cab9f1SKamal Heib return idx; 19840cab9f1SKamal Heib } 19940cab9f1SKamal Heib 2006e6ef814SKamal Heib #define PPORT_802_3_OFF(c) \ 2016e6ef814SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 2026e6ef814SKamal Heib counter_set.eth_802_3_cntrs_grp_data_layout.c##_high) 2036e6ef814SKamal Heib static const struct counter_desc pport_802_3_stats_desc[] = { 2046e6ef814SKamal Heib { "tx_packets_phy", PPORT_802_3_OFF(a_frames_transmitted_ok) }, 2056e6ef814SKamal Heib { "rx_packets_phy", PPORT_802_3_OFF(a_frames_received_ok) }, 2066e6ef814SKamal Heib { "rx_crc_errors_phy", PPORT_802_3_OFF(a_frame_check_sequence_errors) }, 2076e6ef814SKamal Heib { "tx_bytes_phy", PPORT_802_3_OFF(a_octets_transmitted_ok) }, 2086e6ef814SKamal Heib { "rx_bytes_phy", PPORT_802_3_OFF(a_octets_received_ok) }, 2096e6ef814SKamal Heib { "tx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_xmitted_ok) }, 2106e6ef814SKamal Heib { "tx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_xmitted_ok) }, 2116e6ef814SKamal Heib { "rx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_received_ok) }, 2126e6ef814SKamal Heib { "rx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_received_ok) }, 2136e6ef814SKamal Heib { "rx_in_range_len_errors_phy", PPORT_802_3_OFF(a_in_range_length_errors) }, 2146e6ef814SKamal Heib { "rx_out_of_range_len_phy", PPORT_802_3_OFF(a_out_of_range_length_field) }, 2156e6ef814SKamal Heib { "rx_oversize_pkts_phy", PPORT_802_3_OFF(a_frame_too_long_errors) }, 2166e6ef814SKamal Heib { "rx_symbol_err_phy", PPORT_802_3_OFF(a_symbol_error_during_carrier) }, 2176e6ef814SKamal Heib { "tx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_transmitted) }, 2186e6ef814SKamal Heib { "rx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_received) }, 2196e6ef814SKamal Heib { "rx_unsupported_op_phy", PPORT_802_3_OFF(a_unsupported_opcodes_received) }, 2206e6ef814SKamal Heib { "rx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_received) }, 2216e6ef814SKamal Heib { "tx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_transmitted) }, 2226e6ef814SKamal Heib }; 2236e6ef814SKamal Heib 2246e6ef814SKamal Heib #define NUM_PPORT_802_3_COUNTERS ARRAY_SIZE(pport_802_3_stats_desc) 2256e6ef814SKamal Heib 2266e6ef814SKamal Heib static int mlx5e_grp_802_3_get_num_stats(struct mlx5e_priv *priv) 2276e6ef814SKamal Heib { 2286e6ef814SKamal Heib return NUM_PPORT_802_3_COUNTERS; 2296e6ef814SKamal Heib } 2306e6ef814SKamal Heib 2316e6ef814SKamal Heib static int mlx5e_grp_802_3_fill_strings(struct mlx5e_priv *priv, u8 *data, 2326e6ef814SKamal Heib int idx) 2336e6ef814SKamal Heib { 2346e6ef814SKamal Heib int i; 2356e6ef814SKamal Heib 2366e6ef814SKamal Heib for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++) 2376e6ef814SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_802_3_stats_desc[i].format); 2386e6ef814SKamal Heib return idx; 2396e6ef814SKamal Heib } 2406e6ef814SKamal Heib 2416e6ef814SKamal Heib static int mlx5e_grp_802_3_fill_stats(struct mlx5e_priv *priv, u64 *data, 2426e6ef814SKamal Heib int idx) 2436e6ef814SKamal Heib { 2446e6ef814SKamal Heib int i; 2456e6ef814SKamal Heib 2466e6ef814SKamal Heib for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++) 2476e6ef814SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters, 2486e6ef814SKamal Heib pport_802_3_stats_desc, i); 2496e6ef814SKamal Heib return idx; 2506e6ef814SKamal Heib } 2516e6ef814SKamal Heib 252fc8e64a3SKamal Heib #define PPORT_2863_OFF(c) \ 253fc8e64a3SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 254fc8e64a3SKamal Heib counter_set.eth_2863_cntrs_grp_data_layout.c##_high) 255fc8e64a3SKamal Heib static const struct counter_desc pport_2863_stats_desc[] = { 256fc8e64a3SKamal Heib { "rx_discards_phy", PPORT_2863_OFF(if_in_discards) }, 257fc8e64a3SKamal Heib { "tx_discards_phy", PPORT_2863_OFF(if_out_discards) }, 258fc8e64a3SKamal Heib { "tx_errors_phy", PPORT_2863_OFF(if_out_errors) }, 259fc8e64a3SKamal Heib }; 260fc8e64a3SKamal Heib 261fc8e64a3SKamal Heib #define NUM_PPORT_2863_COUNTERS ARRAY_SIZE(pport_2863_stats_desc) 262fc8e64a3SKamal Heib 263fc8e64a3SKamal Heib static int mlx5e_grp_2863_get_num_stats(struct mlx5e_priv *priv) 264fc8e64a3SKamal Heib { 265fc8e64a3SKamal Heib return NUM_PPORT_2863_COUNTERS; 266fc8e64a3SKamal Heib } 267fc8e64a3SKamal Heib 268fc8e64a3SKamal Heib static int mlx5e_grp_2863_fill_strings(struct mlx5e_priv *priv, u8 *data, 269fc8e64a3SKamal Heib int idx) 270fc8e64a3SKamal Heib { 271fc8e64a3SKamal Heib int i; 272fc8e64a3SKamal Heib 273fc8e64a3SKamal Heib for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++) 274fc8e64a3SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2863_stats_desc[i].format); 275fc8e64a3SKamal Heib return idx; 276fc8e64a3SKamal Heib } 277fc8e64a3SKamal Heib 278fc8e64a3SKamal Heib static int mlx5e_grp_2863_fill_stats(struct mlx5e_priv *priv, u64 *data, 279fc8e64a3SKamal Heib int idx) 280fc8e64a3SKamal Heib { 281fc8e64a3SKamal Heib int i; 282fc8e64a3SKamal Heib 283fc8e64a3SKamal Heib for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++) 284fc8e64a3SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters, 285fc8e64a3SKamal Heib pport_2863_stats_desc, i); 286fc8e64a3SKamal Heib return idx; 287fc8e64a3SKamal Heib } 288fc8e64a3SKamal Heib 289e0e0def9SKamal Heib #define PPORT_2819_OFF(c) \ 290e0e0def9SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 291e0e0def9SKamal Heib counter_set.eth_2819_cntrs_grp_data_layout.c##_high) 292e0e0def9SKamal Heib static const struct counter_desc pport_2819_stats_desc[] = { 293e0e0def9SKamal Heib { "rx_undersize_pkts_phy", PPORT_2819_OFF(ether_stats_undersize_pkts) }, 294e0e0def9SKamal Heib { "rx_fragments_phy", PPORT_2819_OFF(ether_stats_fragments) }, 295e0e0def9SKamal Heib { "rx_jabbers_phy", PPORT_2819_OFF(ether_stats_jabbers) }, 296e0e0def9SKamal Heib { "rx_64_bytes_phy", PPORT_2819_OFF(ether_stats_pkts64octets) }, 297e0e0def9SKamal Heib { "rx_65_to_127_bytes_phy", PPORT_2819_OFF(ether_stats_pkts65to127octets) }, 298e0e0def9SKamal Heib { "rx_128_to_255_bytes_phy", PPORT_2819_OFF(ether_stats_pkts128to255octets) }, 299e0e0def9SKamal Heib { "rx_256_to_511_bytes_phy", PPORT_2819_OFF(ether_stats_pkts256to511octets) }, 300e0e0def9SKamal Heib { "rx_512_to_1023_bytes_phy", PPORT_2819_OFF(ether_stats_pkts512to1023octets) }, 301e0e0def9SKamal Heib { "rx_1024_to_1518_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1024to1518octets) }, 302e0e0def9SKamal Heib { "rx_1519_to_2047_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1519to2047octets) }, 303e0e0def9SKamal Heib { "rx_2048_to_4095_bytes_phy", PPORT_2819_OFF(ether_stats_pkts2048to4095octets) }, 304e0e0def9SKamal Heib { "rx_4096_to_8191_bytes_phy", PPORT_2819_OFF(ether_stats_pkts4096to8191octets) }, 305e0e0def9SKamal Heib { "rx_8192_to_10239_bytes_phy", PPORT_2819_OFF(ether_stats_pkts8192to10239octets) }, 306e0e0def9SKamal Heib }; 307e0e0def9SKamal Heib 308e0e0def9SKamal Heib #define NUM_PPORT_2819_COUNTERS ARRAY_SIZE(pport_2819_stats_desc) 309e0e0def9SKamal Heib 310e0e0def9SKamal Heib static int mlx5e_grp_2819_get_num_stats(struct mlx5e_priv *priv) 311e0e0def9SKamal Heib { 312e0e0def9SKamal Heib return NUM_PPORT_2819_COUNTERS; 313e0e0def9SKamal Heib } 314e0e0def9SKamal Heib 315e0e0def9SKamal Heib static int mlx5e_grp_2819_fill_strings(struct mlx5e_priv *priv, u8 *data, 316e0e0def9SKamal Heib int idx) 317e0e0def9SKamal Heib { 318e0e0def9SKamal Heib int i; 319e0e0def9SKamal Heib 320e0e0def9SKamal Heib for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++) 321e0e0def9SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, pport_2819_stats_desc[i].format); 322e0e0def9SKamal Heib return idx; 323e0e0def9SKamal Heib } 324e0e0def9SKamal Heib 325e0e0def9SKamal Heib static int mlx5e_grp_2819_fill_stats(struct mlx5e_priv *priv, u64 *data, 326e0e0def9SKamal Heib int idx) 327e0e0def9SKamal Heib { 328e0e0def9SKamal Heib int i; 329e0e0def9SKamal Heib 330e0e0def9SKamal Heib for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++) 331e0e0def9SKamal Heib data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters, 332e0e0def9SKamal Heib pport_2819_stats_desc, i); 333e0e0def9SKamal Heib return idx; 334e0e0def9SKamal Heib } 335e0e0def9SKamal Heib 3362e4df0b2SKamal Heib #define PPORT_PHY_STATISTICAL_OFF(c) \ 3372e4df0b2SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 3382e4df0b2SKamal Heib counter_set.phys_layer_statistical_cntrs.c##_high) 3392e4df0b2SKamal Heib static const struct counter_desc pport_phy_statistical_stats_desc[] = { 3402e4df0b2SKamal Heib { "rx_pcs_symbol_err_phy", PPORT_PHY_STATISTICAL_OFF(phy_symbol_errors) }, 3412e4df0b2SKamal Heib { "rx_corrected_bits_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits) }, 3422e4df0b2SKamal Heib }; 3432e4df0b2SKamal Heib 3442e4df0b2SKamal Heib #define NUM_PPORT_PHY_COUNTERS ARRAY_SIZE(pport_phy_statistical_stats_desc) 3452e4df0b2SKamal Heib 3462e4df0b2SKamal Heib static int mlx5e_grp_phy_get_num_stats(struct mlx5e_priv *priv) 3472e4df0b2SKamal Heib { 3482e4df0b2SKamal Heib return MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group) ? 3492e4df0b2SKamal Heib NUM_PPORT_PHY_COUNTERS : 0; 3502e4df0b2SKamal Heib } 3512e4df0b2SKamal Heib 3522e4df0b2SKamal Heib static int mlx5e_grp_phy_fill_strings(struct mlx5e_priv *priv, u8 *data, 3532e4df0b2SKamal Heib int idx) 3542e4df0b2SKamal Heib { 3552e4df0b2SKamal Heib int i; 3562e4df0b2SKamal Heib 3572e4df0b2SKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group)) 3582e4df0b2SKamal Heib for (i = 0; i < NUM_PPORT_PHY_COUNTERS; i++) 3592e4df0b2SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 3602e4df0b2SKamal Heib pport_phy_statistical_stats_desc[i].format); 3612e4df0b2SKamal Heib return idx; 3622e4df0b2SKamal Heib } 3632e4df0b2SKamal Heib 3642e4df0b2SKamal Heib static int mlx5e_grp_phy_fill_stats(struct mlx5e_priv *priv, u64 *data, int idx) 3652e4df0b2SKamal Heib { 3662e4df0b2SKamal Heib int i; 3672e4df0b2SKamal Heib 3682e4df0b2SKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group)) 3692e4df0b2SKamal Heib for (i = 0; i < NUM_PPORT_PHY_COUNTERS; i++) 3702e4df0b2SKamal Heib data[idx++] = 3712e4df0b2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.phy_statistical_counters, 3722e4df0b2SKamal Heib pport_phy_statistical_stats_desc, i); 3732e4df0b2SKamal Heib return idx; 3742e4df0b2SKamal Heib } 3752e4df0b2SKamal Heib 3763488bd4cSKamal Heib #define PPORT_ETH_EXT_OFF(c) \ 3773488bd4cSKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 3783488bd4cSKamal Heib counter_set.eth_extended_cntrs_grp_data_layout.c##_high) 3793488bd4cSKamal Heib static const struct counter_desc pport_eth_ext_stats_desc[] = { 3803488bd4cSKamal Heib { "rx_buffer_passed_thres_phy", PPORT_ETH_EXT_OFF(rx_buffer_almost_full) }, 3813488bd4cSKamal Heib }; 3823488bd4cSKamal Heib 3833488bd4cSKamal Heib #define NUM_PPORT_ETH_EXT_COUNTERS ARRAY_SIZE(pport_eth_ext_stats_desc) 3843488bd4cSKamal Heib 3853488bd4cSKamal Heib static int mlx5e_grp_eth_ext_get_num_stats(struct mlx5e_priv *priv) 3863488bd4cSKamal Heib { 3873488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 3883488bd4cSKamal Heib return NUM_PPORT_ETH_EXT_COUNTERS; 3893488bd4cSKamal Heib 3903488bd4cSKamal Heib return 0; 3913488bd4cSKamal Heib } 3923488bd4cSKamal Heib 3933488bd4cSKamal Heib static int mlx5e_grp_eth_ext_fill_strings(struct mlx5e_priv *priv, u8 *data, 3943488bd4cSKamal Heib int idx) 3953488bd4cSKamal Heib { 3963488bd4cSKamal Heib int i; 3973488bd4cSKamal Heib 3983488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 3993488bd4cSKamal Heib for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++) 4003488bd4cSKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 4013488bd4cSKamal Heib pport_eth_ext_stats_desc[i].format); 4023488bd4cSKamal Heib return idx; 4033488bd4cSKamal Heib } 4043488bd4cSKamal Heib 4053488bd4cSKamal Heib static int mlx5e_grp_eth_ext_fill_stats(struct mlx5e_priv *priv, u64 *data, 4063488bd4cSKamal Heib int idx) 4073488bd4cSKamal Heib { 4083488bd4cSKamal Heib int i; 4093488bd4cSKamal Heib 4103488bd4cSKamal Heib if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters)) 4113488bd4cSKamal Heib for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++) 4123488bd4cSKamal Heib data[idx++] = 4133488bd4cSKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.eth_ext_counters, 4143488bd4cSKamal Heib pport_eth_ext_stats_desc, i); 4153488bd4cSKamal Heib return idx; 4163488bd4cSKamal Heib } 4173488bd4cSKamal Heib 4189fd2b5f1SKamal Heib #define PCIE_PERF_OFF(c) \ 4199fd2b5f1SKamal Heib MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c) 4209fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc[] = { 4219fd2b5f1SKamal Heib { "rx_pci_signal_integrity", PCIE_PERF_OFF(rx_errors) }, 4229fd2b5f1SKamal Heib { "tx_pci_signal_integrity", PCIE_PERF_OFF(tx_errors) }, 4239fd2b5f1SKamal Heib }; 4249fd2b5f1SKamal Heib 4259fd2b5f1SKamal Heib #define PCIE_PERF_OFF64(c) \ 4269fd2b5f1SKamal Heib MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c##_high) 4279fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stats_desc64[] = { 4289fd2b5f1SKamal Heib { "outbound_pci_buffer_overflow", PCIE_PERF_OFF64(tx_overflow_buffer_pkt) }, 4299fd2b5f1SKamal Heib }; 4309fd2b5f1SKamal Heib 4319fd2b5f1SKamal Heib static const struct counter_desc pcie_perf_stall_stats_desc[] = { 4329fd2b5f1SKamal Heib { "outbound_pci_stalled_rd", PCIE_PERF_OFF(outbound_stalled_reads) }, 4339fd2b5f1SKamal Heib { "outbound_pci_stalled_wr", PCIE_PERF_OFF(outbound_stalled_writes) }, 4349fd2b5f1SKamal Heib { "outbound_pci_stalled_rd_events", PCIE_PERF_OFF(outbound_stalled_reads_events) }, 4359fd2b5f1SKamal Heib { "outbound_pci_stalled_wr_events", PCIE_PERF_OFF(outbound_stalled_writes_events) }, 4369fd2b5f1SKamal Heib }; 4379fd2b5f1SKamal Heib 4389fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS ARRAY_SIZE(pcie_perf_stats_desc) 4399fd2b5f1SKamal Heib #define NUM_PCIE_PERF_COUNTERS64 ARRAY_SIZE(pcie_perf_stats_desc64) 4409fd2b5f1SKamal Heib #define NUM_PCIE_PERF_STALL_COUNTERS ARRAY_SIZE(pcie_perf_stall_stats_desc) 4419fd2b5f1SKamal Heib 4429fd2b5f1SKamal Heib static int mlx5e_grp_pcie_get_num_stats(struct mlx5e_priv *priv) 4439fd2b5f1SKamal Heib { 4449fd2b5f1SKamal Heib int num_stats = 0; 4459fd2b5f1SKamal Heib 4469fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 4479fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_COUNTERS; 4489fd2b5f1SKamal Heib 4499fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 4509fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_COUNTERS64; 4519fd2b5f1SKamal Heib 4529fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 4539fd2b5f1SKamal Heib num_stats += NUM_PCIE_PERF_STALL_COUNTERS; 4549fd2b5f1SKamal Heib 4559fd2b5f1SKamal Heib return num_stats; 4569fd2b5f1SKamal Heib } 4579fd2b5f1SKamal Heib 4589fd2b5f1SKamal Heib static int mlx5e_grp_pcie_fill_strings(struct mlx5e_priv *priv, u8 *data, 4599fd2b5f1SKamal Heib int idx) 4609fd2b5f1SKamal Heib { 4619fd2b5f1SKamal Heib int i; 4629fd2b5f1SKamal Heib 4639fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 4649fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++) 4659fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 4669fd2b5f1SKamal Heib pcie_perf_stats_desc[i].format); 4679fd2b5f1SKamal Heib 4689fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 4699fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++) 4709fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 4719fd2b5f1SKamal Heib pcie_perf_stats_desc64[i].format); 4729fd2b5f1SKamal Heib 4739fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 4749fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++) 4759fd2b5f1SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, 4769fd2b5f1SKamal Heib pcie_perf_stall_stats_desc[i].format); 4779fd2b5f1SKamal Heib return idx; 4789fd2b5f1SKamal Heib } 4799fd2b5f1SKamal Heib 4809fd2b5f1SKamal Heib static int mlx5e_grp_pcie_fill_stats(struct mlx5e_priv *priv, u64 *data, 4819fd2b5f1SKamal Heib int idx) 4829fd2b5f1SKamal Heib { 4839fd2b5f1SKamal Heib int i; 4849fd2b5f1SKamal Heib 4859fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group)) 4869fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS; i++) 4879fd2b5f1SKamal Heib data[idx++] = 4889fd2b5f1SKamal Heib MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters, 4899fd2b5f1SKamal Heib pcie_perf_stats_desc, i); 4909fd2b5f1SKamal Heib 4919fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt)) 4929fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_COUNTERS64; i++) 4939fd2b5f1SKamal Heib data[idx++] = 4949fd2b5f1SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pcie.pcie_perf_counters, 4959fd2b5f1SKamal Heib pcie_perf_stats_desc64, i); 4969fd2b5f1SKamal Heib 4979fd2b5f1SKamal Heib if (MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled)) 4989fd2b5f1SKamal Heib for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS; i++) 4999fd2b5f1SKamal Heib data[idx++] = 5009fd2b5f1SKamal Heib MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters, 5019fd2b5f1SKamal Heib pcie_perf_stall_stats_desc, i); 5029fd2b5f1SKamal Heib return idx; 5039fd2b5f1SKamal Heib } 5049fd2b5f1SKamal Heib 5054377bea2SKamal Heib #define PPORT_PER_PRIO_OFF(c) \ 5064377bea2SKamal Heib MLX5_BYTE_OFF(ppcnt_reg, \ 5074377bea2SKamal Heib counter_set.eth_per_prio_grp_data_layout.c##_high) 508e6000651SKamal Heib static const struct counter_desc pport_per_prio_traffic_stats_desc[] = { 509e6000651SKamal Heib { "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets) }, 510e6000651SKamal Heib { "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames) }, 511e6000651SKamal Heib { "tx_prio%d_bytes", PPORT_PER_PRIO_OFF(tx_octets) }, 512e6000651SKamal Heib { "tx_prio%d_packets", PPORT_PER_PRIO_OFF(tx_frames) }, 513e6000651SKamal Heib }; 514e6000651SKamal Heib 515e6000651SKamal Heib #define NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS ARRAY_SIZE(pport_per_prio_traffic_stats_desc) 516e6000651SKamal Heib 517e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_get_num_stats(struct mlx5e_priv *priv) 518e6000651SKamal Heib { 519e6000651SKamal Heib return NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS * NUM_PPORT_PRIO; 520e6000651SKamal Heib } 521e6000651SKamal Heib 522e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_strings(struct mlx5e_priv *priv, 523e6000651SKamal Heib u8 *data, 524e6000651SKamal Heib int idx) 525e6000651SKamal Heib { 526e6000651SKamal Heib int i, prio; 527e6000651SKamal Heib 528e6000651SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 529e6000651SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++) 530e6000651SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 531e6000651SKamal Heib pport_per_prio_traffic_stats_desc[i].format, prio); 532e6000651SKamal Heib } 533e6000651SKamal Heib 534e6000651SKamal Heib return idx; 535e6000651SKamal Heib } 536e6000651SKamal Heib 537e6000651SKamal Heib static int mlx5e_grp_per_prio_traffic_fill_stats(struct mlx5e_priv *priv, 538e6000651SKamal Heib u64 *data, 539e6000651SKamal Heib int idx) 540e6000651SKamal Heib { 541e6000651SKamal Heib int i, prio; 542e6000651SKamal Heib 543e6000651SKamal Heib for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 544e6000651SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++) 545e6000651SKamal Heib data[idx++] = 546e6000651SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio], 547e6000651SKamal Heib pport_per_prio_traffic_stats_desc, i); 548e6000651SKamal Heib } 549e6000651SKamal Heib 550e6000651SKamal Heib return idx; 551e6000651SKamal Heib } 552e6000651SKamal Heib 5534377bea2SKamal Heib static const struct counter_desc pport_per_prio_pfc_stats_desc[] = { 5544377bea2SKamal Heib /* %s is "global" or "prio{i}" */ 5554377bea2SKamal Heib { "rx_%s_pause", PPORT_PER_PRIO_OFF(rx_pause) }, 5564377bea2SKamal Heib { "rx_%s_pause_duration", PPORT_PER_PRIO_OFF(rx_pause_duration) }, 5574377bea2SKamal Heib { "tx_%s_pause", PPORT_PER_PRIO_OFF(tx_pause) }, 5584377bea2SKamal Heib { "tx_%s_pause_duration", PPORT_PER_PRIO_OFF(tx_pause_duration) }, 5594377bea2SKamal Heib { "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) }, 5604377bea2SKamal Heib }; 5614377bea2SKamal Heib 5624377bea2SKamal Heib #define NUM_PPORT_PER_PRIO_PFC_COUNTERS ARRAY_SIZE(pport_per_prio_pfc_stats_desc) 5634377bea2SKamal Heib 5644377bea2SKamal Heib static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv) 5654377bea2SKamal Heib { 5664377bea2SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 5674377bea2SKamal Heib u8 pfc_en_tx; 5684377bea2SKamal Heib u8 pfc_en_rx; 5694377bea2SKamal Heib int err; 5704377bea2SKamal Heib 5714377bea2SKamal Heib if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) 5724377bea2SKamal Heib return 0; 5734377bea2SKamal Heib 5744377bea2SKamal Heib err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx); 5754377bea2SKamal Heib 5764377bea2SKamal Heib return err ? 0 : pfc_en_tx | pfc_en_rx; 5774377bea2SKamal Heib } 5784377bea2SKamal Heib 5794377bea2SKamal Heib static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv) 5804377bea2SKamal Heib { 5814377bea2SKamal Heib struct mlx5_core_dev *mdev = priv->mdev; 5824377bea2SKamal Heib u32 rx_pause; 5834377bea2SKamal Heib u32 tx_pause; 5844377bea2SKamal Heib int err; 5854377bea2SKamal Heib 5864377bea2SKamal Heib if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) 5874377bea2SKamal Heib return false; 5884377bea2SKamal Heib 5894377bea2SKamal Heib err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause); 5904377bea2SKamal Heib 5914377bea2SKamal Heib return err ? false : rx_pause | tx_pause; 5924377bea2SKamal Heib } 5934377bea2SKamal Heib 5944377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_get_num_stats(struct mlx5e_priv *priv) 5954377bea2SKamal Heib { 5964377bea2SKamal Heib return (mlx5e_query_global_pause_combined(priv) + 5974377bea2SKamal Heib hweight8(mlx5e_query_pfc_combined(priv))) * 5984377bea2SKamal Heib NUM_PPORT_PER_PRIO_PFC_COUNTERS; 5994377bea2SKamal Heib } 6004377bea2SKamal Heib 6014377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_strings(struct mlx5e_priv *priv, 6024377bea2SKamal Heib u8 *data, 6034377bea2SKamal Heib int idx) 6044377bea2SKamal Heib { 6054377bea2SKamal Heib unsigned long pfc_combined; 6064377bea2SKamal Heib int i, prio; 6074377bea2SKamal Heib 6084377bea2SKamal Heib pfc_combined = mlx5e_query_pfc_combined(priv); 6094377bea2SKamal Heib for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) { 6104377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 6114377bea2SKamal Heib char pfc_string[ETH_GSTRING_LEN]; 6124377bea2SKamal Heib 6134377bea2SKamal Heib snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio); 6144377bea2SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 6154377bea2SKamal Heib pport_per_prio_pfc_stats_desc[i].format, pfc_string); 6164377bea2SKamal Heib } 6174377bea2SKamal Heib } 6184377bea2SKamal Heib 6194377bea2SKamal Heib if (mlx5e_query_global_pause_combined(priv)) { 6204377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 6214377bea2SKamal Heib sprintf(data + (idx++) * ETH_GSTRING_LEN, 6224377bea2SKamal Heib pport_per_prio_pfc_stats_desc[i].format, "global"); 6234377bea2SKamal Heib } 6244377bea2SKamal Heib } 6254377bea2SKamal Heib 6264377bea2SKamal Heib return idx; 6274377bea2SKamal Heib } 6284377bea2SKamal Heib 6294377bea2SKamal Heib static int mlx5e_grp_per_prio_pfc_fill_stats(struct mlx5e_priv *priv, 6304377bea2SKamal Heib u64 *data, 6314377bea2SKamal Heib int idx) 6324377bea2SKamal Heib { 6334377bea2SKamal Heib unsigned long pfc_combined; 6344377bea2SKamal Heib int i, prio; 6354377bea2SKamal Heib 6364377bea2SKamal Heib pfc_combined = mlx5e_query_pfc_combined(priv); 6374377bea2SKamal Heib for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) { 6384377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 6394377bea2SKamal Heib data[idx++] = 6404377bea2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio], 6414377bea2SKamal Heib pport_per_prio_pfc_stats_desc, i); 6424377bea2SKamal Heib } 6434377bea2SKamal Heib } 6444377bea2SKamal Heib 6454377bea2SKamal Heib if (mlx5e_query_global_pause_combined(priv)) { 6464377bea2SKamal Heib for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 6474377bea2SKamal Heib data[idx++] = 6484377bea2SKamal Heib MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0], 6494377bea2SKamal Heib pport_per_prio_pfc_stats_desc, i); 6504377bea2SKamal Heib } 6514377bea2SKamal Heib } 6524377bea2SKamal Heib 6534377bea2SKamal Heib return idx; 6544377bea2SKamal Heib } 6554377bea2SKamal Heib 6560e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_status_desc[] = { 6570e6f01a4SKamal Heib { "module_unplug", 8 }, 6580e6f01a4SKamal Heib }; 6590e6f01a4SKamal Heib 6600e6f01a4SKamal Heib static const struct counter_desc mlx5e_pme_error_desc[] = { 6610e6f01a4SKamal Heib { "module_bus_stuck", 16 }, /* bus stuck (I2C or data shorted) */ 6620e6f01a4SKamal Heib { "module_high_temp", 48 }, /* high temperature */ 6630e6f01a4SKamal Heib { "module_bad_shorted", 56 }, /* bad or shorted cable/module */ 6640e6f01a4SKamal Heib }; 6650e6f01a4SKamal Heib 6660e6f01a4SKamal Heib #define NUM_PME_STATUS_STATS ARRAY_SIZE(mlx5e_pme_status_desc) 6670e6f01a4SKamal Heib #define NUM_PME_ERR_STATS ARRAY_SIZE(mlx5e_pme_error_desc) 6680e6f01a4SKamal Heib 6690e6f01a4SKamal Heib static int mlx5e_grp_pme_get_num_stats(struct mlx5e_priv *priv) 6700e6f01a4SKamal Heib { 6710e6f01a4SKamal Heib return NUM_PME_STATUS_STATS + NUM_PME_ERR_STATS; 6720e6f01a4SKamal Heib } 6730e6f01a4SKamal Heib 6740e6f01a4SKamal Heib static int mlx5e_grp_pme_fill_strings(struct mlx5e_priv *priv, u8 *data, 6750e6f01a4SKamal Heib int idx) 6760e6f01a4SKamal Heib { 6770e6f01a4SKamal Heib int i; 6780e6f01a4SKamal Heib 6790e6f01a4SKamal Heib for (i = 0; i < NUM_PME_STATUS_STATS; i++) 6800e6f01a4SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_status_desc[i].format); 6810e6f01a4SKamal Heib 6820e6f01a4SKamal Heib for (i = 0; i < NUM_PME_ERR_STATS; i++) 6830e6f01a4SKamal Heib strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_error_desc[i].format); 6840e6f01a4SKamal Heib 6850e6f01a4SKamal Heib return idx; 6860e6f01a4SKamal Heib } 6870e6f01a4SKamal Heib 6880e6f01a4SKamal Heib static int mlx5e_grp_pme_fill_stats(struct mlx5e_priv *priv, u64 *data, 6890e6f01a4SKamal Heib int idx) 6900e6f01a4SKamal Heib { 6910e6f01a4SKamal Heib struct mlx5_priv *mlx5_priv = &priv->mdev->priv; 6920e6f01a4SKamal Heib int i; 6930e6f01a4SKamal Heib 6940e6f01a4SKamal Heib for (i = 0; i < NUM_PME_STATUS_STATS; i++) 6950e6f01a4SKamal Heib data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.status_counters, 6960e6f01a4SKamal Heib mlx5e_pme_status_desc, i); 6970e6f01a4SKamal Heib 6980e6f01a4SKamal Heib for (i = 0; i < NUM_PME_ERR_STATS; i++) 6990e6f01a4SKamal Heib data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.error_counters, 7000e6f01a4SKamal Heib mlx5e_pme_error_desc, i); 7010e6f01a4SKamal Heib 7020e6f01a4SKamal Heib return idx; 7030e6f01a4SKamal Heib } 7040e6f01a4SKamal Heib 705c0752f2bSKamal Heib const struct mlx5e_stats_grp mlx5e_stats_grps[] = { 706c0752f2bSKamal Heib { 707c0752f2bSKamal Heib .get_num_stats = mlx5e_grp_sw_get_num_stats, 708c0752f2bSKamal Heib .fill_strings = mlx5e_grp_sw_fill_strings, 709c0752f2bSKamal Heib .fill_stats = mlx5e_grp_sw_fill_stats, 710fd8dcdb8SKamal Heib }, 711fd8dcdb8SKamal Heib { 712fd8dcdb8SKamal Heib .get_num_stats = mlx5e_grp_q_get_num_stats, 713fd8dcdb8SKamal Heib .fill_strings = mlx5e_grp_q_fill_strings, 714fd8dcdb8SKamal Heib .fill_stats = mlx5e_grp_q_fill_stats, 715fd8dcdb8SKamal Heib }, 71640cab9f1SKamal Heib { 71740cab9f1SKamal Heib .get_num_stats = mlx5e_grp_vport_get_num_stats, 71840cab9f1SKamal Heib .fill_strings = mlx5e_grp_vport_fill_strings, 71940cab9f1SKamal Heib .fill_stats = mlx5e_grp_vport_fill_stats, 72040cab9f1SKamal Heib }, 7216e6ef814SKamal Heib { 7226e6ef814SKamal Heib .get_num_stats = mlx5e_grp_802_3_get_num_stats, 7236e6ef814SKamal Heib .fill_strings = mlx5e_grp_802_3_fill_strings, 7246e6ef814SKamal Heib .fill_stats = mlx5e_grp_802_3_fill_stats, 7256e6ef814SKamal Heib }, 726fc8e64a3SKamal Heib { 727fc8e64a3SKamal Heib .get_num_stats = mlx5e_grp_2863_get_num_stats, 728fc8e64a3SKamal Heib .fill_strings = mlx5e_grp_2863_fill_strings, 729fc8e64a3SKamal Heib .fill_stats = mlx5e_grp_2863_fill_stats, 730fc8e64a3SKamal Heib }, 731e0e0def9SKamal Heib { 732e0e0def9SKamal Heib .get_num_stats = mlx5e_grp_2819_get_num_stats, 733e0e0def9SKamal Heib .fill_strings = mlx5e_grp_2819_fill_strings, 734e0e0def9SKamal Heib .fill_stats = mlx5e_grp_2819_fill_stats, 735e0e0def9SKamal Heib }, 7362e4df0b2SKamal Heib { 7372e4df0b2SKamal Heib .get_num_stats = mlx5e_grp_phy_get_num_stats, 7382e4df0b2SKamal Heib .fill_strings = mlx5e_grp_phy_fill_strings, 7392e4df0b2SKamal Heib .fill_stats = mlx5e_grp_phy_fill_stats, 7402e4df0b2SKamal Heib }, 7413488bd4cSKamal Heib { 7423488bd4cSKamal Heib .get_num_stats = mlx5e_grp_eth_ext_get_num_stats, 7433488bd4cSKamal Heib .fill_strings = mlx5e_grp_eth_ext_fill_strings, 7443488bd4cSKamal Heib .fill_stats = mlx5e_grp_eth_ext_fill_stats, 7459fd2b5f1SKamal Heib }, 7469fd2b5f1SKamal Heib { 7479fd2b5f1SKamal Heib .get_num_stats = mlx5e_grp_pcie_get_num_stats, 7489fd2b5f1SKamal Heib .fill_strings = mlx5e_grp_pcie_fill_strings, 7499fd2b5f1SKamal Heib .fill_stats = mlx5e_grp_pcie_fill_stats, 7509fd2b5f1SKamal Heib }, 751e6000651SKamal Heib { 752e6000651SKamal Heib .get_num_stats = mlx5e_grp_per_prio_traffic_get_num_stats, 753e6000651SKamal Heib .fill_strings = mlx5e_grp_per_prio_traffic_fill_strings, 754e6000651SKamal Heib .fill_stats = mlx5e_grp_per_prio_traffic_fill_stats, 755e6000651SKamal Heib }, 7564377bea2SKamal Heib { 7574377bea2SKamal Heib .get_num_stats = mlx5e_grp_per_prio_pfc_get_num_stats, 7584377bea2SKamal Heib .fill_strings = mlx5e_grp_per_prio_pfc_fill_strings, 7594377bea2SKamal Heib .fill_stats = mlx5e_grp_per_prio_pfc_fill_stats, 7604377bea2SKamal Heib }, 7610e6f01a4SKamal Heib { 7620e6f01a4SKamal Heib .get_num_stats = mlx5e_grp_pme_get_num_stats, 7630e6f01a4SKamal Heib .fill_strings = mlx5e_grp_pme_fill_strings, 7640e6f01a4SKamal Heib .fill_stats = mlx5e_grp_pme_fill_stats, 7650e6f01a4SKamal Heib }, 766c0752f2bSKamal Heib }; 767c0752f2bSKamal Heib 768c0752f2bSKamal Heib const int mlx5e_num_stats_grps = ARRAY_SIZE(mlx5e_stats_grps); 769