1159d2131STariq Toukan /* 2159d2131STariq Toukan * Copyright (c) 2018, Mellanox Technologies. All rights reserved. 3159d2131STariq Toukan * 4159d2131STariq Toukan * This software is available to you under a choice of one of two 5159d2131STariq Toukan * licenses. You may choose to be licensed under the terms of the GNU 6159d2131STariq Toukan * General Public License (GPL) Version 2, available from the file 7159d2131STariq Toukan * COPYING in the main directory of this source tree, or the 8159d2131STariq Toukan * OpenIB.org BSD license below: 9159d2131STariq Toukan * 10159d2131STariq Toukan * Redistribution and use in source and binary forms, with or 11159d2131STariq Toukan * without modification, are permitted provided that the following 12159d2131STariq Toukan * conditions are met: 13159d2131STariq Toukan * 14159d2131STariq Toukan * - Redistributions of source code must retain the above 15159d2131STariq Toukan * copyright notice, this list of conditions and the following 16159d2131STariq Toukan * disclaimer. 17159d2131STariq Toukan * 18159d2131STariq Toukan * - Redistributions in binary form must reproduce the above 19159d2131STariq Toukan * copyright notice, this list of conditions and the following 20159d2131STariq Toukan * disclaimer in the documentation and/or other materials 21159d2131STariq Toukan * provided with the distribution. 22159d2131STariq Toukan * 23159d2131STariq Toukan * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24159d2131STariq Toukan * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25159d2131STariq Toukan * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26159d2131STariq Toukan * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27159d2131STariq Toukan * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28159d2131STariq Toukan * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29159d2131STariq Toukan * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30159d2131STariq Toukan * SOFTWARE. 31159d2131STariq Toukan */ 32159d2131STariq Toukan #ifndef __MLX5_EN_XDP_H__ 33159d2131STariq Toukan #define __MLX5_EN_XDP_H__ 34159d2131STariq Toukan 3593761ca1STariq Toukan #include <linux/indirect_call_wrapper.h> 3693761ca1STariq Toukan 37159d2131STariq Toukan #include "en.h" 38542578c6STariq Toukan #include "en/txrx.h" 39159d2131STariq Toukan 40159d2131STariq Toukan #define MLX5E_XDP_MIN_INLINE (ETH_HLEN + VLAN_HLEN) 4197e3afd6SMaxim Mikityanskiy #define MLX5E_XDP_TX_DS_COUNT (MLX5E_TX_WQE_EMPTY_DS_COUNT + 1 /* SG DS */) 42159d2131STariq Toukan 43388a2b56SMaxim Mikityanskiy #define MLX5E_XDP_INLINE_WQE_MAX_DS_CNT 16 44388a2b56SMaxim Mikityanskiy #define MLX5E_XDP_INLINE_WQE_SZ_THRSD \ 45388a2b56SMaxim Mikityanskiy (MLX5E_XDP_INLINE_WQE_MAX_DS_CNT * MLX5_SEND_WQE_DS - \ 46388a2b56SMaxim Mikityanskiy sizeof(struct mlx5_wqe_inline_seg)) 476c085a8aSShay Agroskin 486c085a8aSShay Agroskin /* The mult of MLX5_SEND_WQE_MAX_WQEBBS * MLX5_SEND_WQEBB_NUM_DS 496c085a8aSShay Agroskin * (16 * 4 == 64) does not fit in the 6-bit DS field of Ctrl Segment. 506c085a8aSShay Agroskin * We use a bound lower that MLX5_SEND_WQE_MAX_WQEBBS to let a 516c085a8aSShay Agroskin * full-session WQE be cache-aligned. 526c085a8aSShay Agroskin */ 536c085a8aSShay Agroskin #if L1_CACHE_BYTES < 128 546c085a8aSShay Agroskin #define MLX5E_XDP_MPW_MAX_WQEBBS (MLX5_SEND_WQE_MAX_WQEBBS - 1) 556c085a8aSShay Agroskin #else 566c085a8aSShay Agroskin #define MLX5E_XDP_MPW_MAX_WQEBBS (MLX5_SEND_WQE_MAX_WQEBBS - 2) 576c085a8aSShay Agroskin #endif 586c085a8aSShay Agroskin 596c085a8aSShay Agroskin #define MLX5E_XDP_MPW_MAX_NUM_DS \ 606c085a8aSShay Agroskin (MLX5E_XDP_MPW_MAX_WQEBBS * MLX5_SEND_WQEBB_NUM_DS) 616c085a8aSShay Agroskin 62a011b49fSMaxim Mikityanskiy struct mlx5e_xsk_param; 63a011b49fSMaxim Mikityanskiy int mlx5e_xdp_max_mtu(struct mlx5e_params *params, struct mlx5e_xsk_param *xsk); 64159d2131STariq Toukan bool mlx5e_xdp_handle(struct mlx5e_rq *rq, struct mlx5e_dma_info *di, 6539d6443cSBjörn Töpel u32 *len, struct xdp_buff *xdp); 66db05815bSMaxim Mikityanskiy void mlx5e_xdp_mpwqe_complete(struct mlx5e_xdpsq *sq); 67b9673cf5SMaxim Mikityanskiy bool mlx5e_poll_xdpsq_cq(struct mlx5e_cq *cq); 68b9673cf5SMaxim Mikityanskiy void mlx5e_free_xdpsq_descs(struct mlx5e_xdpsq *sq); 695e0d2eefSTariq Toukan void mlx5e_set_xmit_fp(struct mlx5e_xdpsq *sq, bool is_mpw); 704fb2f516STariq Toukan void mlx5e_xdp_rx_poll_complete(struct mlx5e_rq *rq); 7158b99ee3STariq Toukan int mlx5e_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 7258b99ee3STariq Toukan u32 flags); 73159d2131STariq Toukan 7493761ca1STariq Toukan INDIRECT_CALLABLE_DECLARE(bool mlx5e_xmit_xdp_frame_mpwqe(struct mlx5e_xdpsq *sq, 7593761ca1STariq Toukan struct mlx5e_xdp_xmit_data *xdptxd, 7693761ca1STariq Toukan struct mlx5e_xdp_info *xdpi, 7793761ca1STariq Toukan int check_result)); 7893761ca1STariq Toukan INDIRECT_CALLABLE_DECLARE(bool mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, 7993761ca1STariq Toukan struct mlx5e_xdp_xmit_data *xdptxd, 8093761ca1STariq Toukan struct mlx5e_xdp_info *xdpi, 8193761ca1STariq Toukan int check_result)); 8293761ca1STariq Toukan INDIRECT_CALLABLE_DECLARE(int mlx5e_xmit_xdp_frame_check_mpwqe(struct mlx5e_xdpsq *sq)); 8393761ca1STariq Toukan INDIRECT_CALLABLE_DECLARE(int mlx5e_xmit_xdp_frame_check(struct mlx5e_xdpsq *sq)); 8493761ca1STariq Toukan 85407e17b1SSaeed Mahameed static inline void mlx5e_xdp_tx_enable(struct mlx5e_priv *priv) 86407e17b1SSaeed Mahameed { 87407e17b1SSaeed Mahameed set_bit(MLX5E_STATE_XDP_TX_ENABLED, &priv->state); 889cf88808SMaxim Mikityanskiy 899cf88808SMaxim Mikityanskiy if (priv->channels.params.xdp_prog) 909cf88808SMaxim Mikityanskiy set_bit(MLX5E_STATE_XDP_ACTIVE, &priv->state); 91407e17b1SSaeed Mahameed } 92407e17b1SSaeed Mahameed 93407e17b1SSaeed Mahameed static inline void mlx5e_xdp_tx_disable(struct mlx5e_priv *priv) 94407e17b1SSaeed Mahameed { 959cf88808SMaxim Mikityanskiy if (priv->channels.params.xdp_prog) 969cf88808SMaxim Mikityanskiy clear_bit(MLX5E_STATE_XDP_ACTIVE, &priv->state); 979cf88808SMaxim Mikityanskiy 98407e17b1SSaeed Mahameed clear_bit(MLX5E_STATE_XDP_TX_ENABLED, &priv->state); 999cf88808SMaxim Mikityanskiy /* Let other device's napi(s) and XSK wakeups see our new state. */ 100407e17b1SSaeed Mahameed synchronize_rcu(); 101407e17b1SSaeed Mahameed } 102407e17b1SSaeed Mahameed 103407e17b1SSaeed Mahameed static inline bool mlx5e_xdp_tx_is_enabled(struct mlx5e_priv *priv) 104407e17b1SSaeed Mahameed { 105407e17b1SSaeed Mahameed return test_bit(MLX5E_STATE_XDP_TX_ENABLED, &priv->state); 106407e17b1SSaeed Mahameed } 107407e17b1SSaeed Mahameed 1089cf88808SMaxim Mikityanskiy static inline bool mlx5e_xdp_is_active(struct mlx5e_priv *priv) 109db05815bSMaxim Mikityanskiy { 1109cf88808SMaxim Mikityanskiy return test_bit(MLX5E_STATE_XDP_ACTIVE, &priv->state); 111db05815bSMaxim Mikityanskiy } 112db05815bSMaxim Mikityanskiy 113159d2131STariq Toukan static inline void mlx5e_xmit_xdp_doorbell(struct mlx5e_xdpsq *sq) 114159d2131STariq Toukan { 115b8180392STariq Toukan if (sq->doorbell_cseg) { 116b8180392STariq Toukan mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, sq->doorbell_cseg); 117b8180392STariq Toukan sq->doorbell_cseg = NULL; 118b8180392STariq Toukan } 119159d2131STariq Toukan } 120159d2131STariq Toukan 121c2273219SShay Agroskin /* Enable inline WQEs to shift some load from a congested HCA (HW) to 122c2273219SShay Agroskin * a less congested cpu (SW). 123c2273219SShay Agroskin */ 12497e3afd6SMaxim Mikityanskiy static inline bool mlx5e_xdp_get_inline_state(struct mlx5e_xdpsq *sq, bool cur) 125c2273219SShay Agroskin { 126c2273219SShay Agroskin u16 outstanding = sq->xdpi_fifo_pc - sq->xdpi_fifo_cc; 127c2273219SShay Agroskin 128c2273219SShay Agroskin #define MLX5E_XDP_INLINE_WATERMARK_LOW 10 129c2273219SShay Agroskin #define MLX5E_XDP_INLINE_WATERMARK_HIGH 128 130c2273219SShay Agroskin 13197e3afd6SMaxim Mikityanskiy if (cur && outstanding <= MLX5E_XDP_INLINE_WATERMARK_LOW) 13297e3afd6SMaxim Mikityanskiy return false; 133c2273219SShay Agroskin 13497e3afd6SMaxim Mikityanskiy if (!cur && outstanding >= MLX5E_XDP_INLINE_WATERMARK_HIGH) 13597e3afd6SMaxim Mikityanskiy return true; 13697e3afd6SMaxim Mikityanskiy 13797e3afd6SMaxim Mikityanskiy return cur; 138c2273219SShay Agroskin } 139c2273219SShay Agroskin 140388a2b56SMaxim Mikityanskiy static inline bool mlx5e_xdp_mpqwe_is_full(struct mlx5e_xdp_mpwqe *session) 1416c085a8aSShay Agroskin { 142388a2b56SMaxim Mikityanskiy if (session->inline_on) 143388a2b56SMaxim Mikityanskiy return session->ds_count + MLX5E_XDP_INLINE_WQE_MAX_DS_CNT > 144388a2b56SMaxim Mikityanskiy MLX5E_XDP_MPW_MAX_NUM_DS; 145388a2b56SMaxim Mikityanskiy return session->ds_count == MLX5E_XDP_MPW_MAX_NUM_DS; 1466c085a8aSShay Agroskin } 1476c085a8aSShay Agroskin 14805dfd570STariq Toukan struct mlx5e_xdp_wqe_info { 14905dfd570STariq Toukan u8 num_wqebbs; 15005dfd570STariq Toukan u8 num_pkts; 15105dfd570STariq Toukan }; 15205dfd570STariq Toukan 1536c085a8aSShay Agroskin static inline void 154d963fa15SMaxim Mikityanskiy mlx5e_xdp_mpwqe_add_dseg(struct mlx5e_xdpsq *sq, 155d963fa15SMaxim Mikityanskiy struct mlx5e_xdp_xmit_data *xdptxd, 156c2273219SShay Agroskin struct mlx5e_xdpsq_stats *stats) 1575e0d2eefSTariq Toukan { 1585e0d2eefSTariq Toukan struct mlx5e_xdp_mpwqe *session = &sq->mpwqe; 1595e0d2eefSTariq Toukan struct mlx5_wqe_data_seg *dseg = 160c2273219SShay Agroskin (struct mlx5_wqe_data_seg *)session->wqe + session->ds_count; 161d963fa15SMaxim Mikityanskiy u32 dma_len = xdptxd->len; 1625e0d2eefSTariq Toukan 163c2273219SShay Agroskin session->pkt_count++; 164c2273219SShay Agroskin 165c2273219SShay Agroskin if (session->inline_on && dma_len <= MLX5E_XDP_INLINE_WQE_SZ_THRSD) { 166c2273219SShay Agroskin struct mlx5_wqe_inline_seg *inline_dseg = 167c2273219SShay Agroskin (struct mlx5_wqe_inline_seg *)dseg; 168c2273219SShay Agroskin u16 ds_len = sizeof(*inline_dseg) + dma_len; 169c2273219SShay Agroskin u16 ds_cnt = DIV_ROUND_UP(ds_len, MLX5_SEND_WQE_DS); 170c2273219SShay Agroskin 171c2273219SShay Agroskin inline_dseg->byte_count = cpu_to_be32(dma_len | MLX5_INLINE_SEG); 172d963fa15SMaxim Mikityanskiy memcpy(inline_dseg->data, xdptxd->data, dma_len); 173c2273219SShay Agroskin 174c2273219SShay Agroskin session->ds_count += ds_cnt; 175c2273219SShay Agroskin stats->inlnw++; 176c2273219SShay Agroskin return; 177c2273219SShay Agroskin } 178c2273219SShay Agroskin 179d963fa15SMaxim Mikityanskiy dseg->addr = cpu_to_be64(xdptxd->dma_addr); 1805e0d2eefSTariq Toukan dseg->byte_count = cpu_to_be32(dma_len); 1815e0d2eefSTariq Toukan dseg->lkey = sq->mkey_be; 182c2273219SShay Agroskin session->ds_count++; 1835e0d2eefSTariq Toukan } 1845e0d2eefSTariq Toukan 1855e0d2eefSTariq Toukan static inline void 186fea28dd6STariq Toukan mlx5e_xdpi_fifo_push(struct mlx5e_xdp_info_fifo *fifo, 187fea28dd6STariq Toukan struct mlx5e_xdp_info *xi) 188fea28dd6STariq Toukan { 189fea28dd6STariq Toukan u32 i = (*fifo->pc)++ & fifo->mask; 190fea28dd6STariq Toukan 191fea28dd6STariq Toukan fifo->xi[i] = *xi; 192fea28dd6STariq Toukan } 193fea28dd6STariq Toukan 194fea28dd6STariq Toukan static inline struct mlx5e_xdp_info 195fea28dd6STariq Toukan mlx5e_xdpi_fifo_pop(struct mlx5e_xdp_info_fifo *fifo) 196fea28dd6STariq Toukan { 197fea28dd6STariq Toukan return fifo->xi[(*fifo->cc)++ & fifo->mask]; 198fea28dd6STariq Toukan } 199159d2131STariq Toukan #endif 200