1159d2131STariq Toukan /* 2159d2131STariq Toukan * Copyright (c) 2018, Mellanox Technologies. All rights reserved. 3159d2131STariq Toukan * 4159d2131STariq Toukan * This software is available to you under a choice of one of two 5159d2131STariq Toukan * licenses. You may choose to be licensed under the terms of the GNU 6159d2131STariq Toukan * General Public License (GPL) Version 2, available from the file 7159d2131STariq Toukan * COPYING in the main directory of this source tree, or the 8159d2131STariq Toukan * OpenIB.org BSD license below: 9159d2131STariq Toukan * 10159d2131STariq Toukan * Redistribution and use in source and binary forms, with or 11159d2131STariq Toukan * without modification, are permitted provided that the following 12159d2131STariq Toukan * conditions are met: 13159d2131STariq Toukan * 14159d2131STariq Toukan * - Redistributions of source code must retain the above 15159d2131STariq Toukan * copyright notice, this list of conditions and the following 16159d2131STariq Toukan * disclaimer. 17159d2131STariq Toukan * 18159d2131STariq Toukan * - Redistributions in binary form must reproduce the above 19159d2131STariq Toukan * copyright notice, this list of conditions and the following 20159d2131STariq Toukan * disclaimer in the documentation and/or other materials 21159d2131STariq Toukan * provided with the distribution. 22159d2131STariq Toukan * 23159d2131STariq Toukan * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24159d2131STariq Toukan * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25159d2131STariq Toukan * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26159d2131STariq Toukan * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27159d2131STariq Toukan * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28159d2131STariq Toukan * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29159d2131STariq Toukan * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30159d2131STariq Toukan * SOFTWARE. 31159d2131STariq Toukan */ 32159d2131STariq Toukan #ifndef __MLX5_EN_XDP_H__ 33159d2131STariq Toukan #define __MLX5_EN_XDP_H__ 34159d2131STariq Toukan 3593761ca1STariq Toukan #include <linux/indirect_call_wrapper.h> 3693761ca1STariq Toukan 37159d2131STariq Toukan #include "en.h" 38542578c6STariq Toukan #include "en/txrx.h" 39159d2131STariq Toukan 40159d2131STariq Toukan #define MLX5E_XDP_MIN_INLINE (ETH_HLEN + VLAN_HLEN) 415e0d2eefSTariq Toukan #define MLX5E_XDP_TX_EMPTY_DS_COUNT \ 425e0d2eefSTariq Toukan (sizeof(struct mlx5e_tx_wqe) / MLX5_SEND_WQE_DS) 435e0d2eefSTariq Toukan #define MLX5E_XDP_TX_DS_COUNT (MLX5E_XDP_TX_EMPTY_DS_COUNT + 1 /* SG DS */) 44159d2131STariq Toukan 456c085a8aSShay Agroskin #define MLX5E_XDP_INLINE_WQE_SZ_THRSD (256 - sizeof(struct mlx5_wqe_inline_seg)) 466c085a8aSShay Agroskin #define MLX5E_XDP_INLINE_WQE_MAX_DS_CNT \ 476c085a8aSShay Agroskin DIV_ROUND_UP(MLX5E_XDP_INLINE_WQE_SZ_THRSD, MLX5_SEND_WQE_DS) 486c085a8aSShay Agroskin 496c085a8aSShay Agroskin /* The mult of MLX5_SEND_WQE_MAX_WQEBBS * MLX5_SEND_WQEBB_NUM_DS 506c085a8aSShay Agroskin * (16 * 4 == 64) does not fit in the 6-bit DS field of Ctrl Segment. 516c085a8aSShay Agroskin * We use a bound lower that MLX5_SEND_WQE_MAX_WQEBBS to let a 526c085a8aSShay Agroskin * full-session WQE be cache-aligned. 536c085a8aSShay Agroskin */ 546c085a8aSShay Agroskin #if L1_CACHE_BYTES < 128 556c085a8aSShay Agroskin #define MLX5E_XDP_MPW_MAX_WQEBBS (MLX5_SEND_WQE_MAX_WQEBBS - 1) 566c085a8aSShay Agroskin #else 576c085a8aSShay Agroskin #define MLX5E_XDP_MPW_MAX_WQEBBS (MLX5_SEND_WQE_MAX_WQEBBS - 2) 586c085a8aSShay Agroskin #endif 596c085a8aSShay Agroskin 606c085a8aSShay Agroskin #define MLX5E_XDP_MPW_MAX_NUM_DS \ 616c085a8aSShay Agroskin (MLX5E_XDP_MPW_MAX_WQEBBS * MLX5_SEND_WQEBB_NUM_DS) 626c085a8aSShay Agroskin 63a011b49fSMaxim Mikityanskiy struct mlx5e_xsk_param; 64a011b49fSMaxim Mikityanskiy int mlx5e_xdp_max_mtu(struct mlx5e_params *params, struct mlx5e_xsk_param *xsk); 65159d2131STariq Toukan bool mlx5e_xdp_handle(struct mlx5e_rq *rq, struct mlx5e_dma_info *di, 6639d6443cSBjörn Töpel u32 *len, struct xdp_buff *xdp); 67db05815bSMaxim Mikityanskiy void mlx5e_xdp_mpwqe_complete(struct mlx5e_xdpsq *sq); 68b9673cf5SMaxim Mikityanskiy bool mlx5e_poll_xdpsq_cq(struct mlx5e_cq *cq); 69b9673cf5SMaxim Mikityanskiy void mlx5e_free_xdpsq_descs(struct mlx5e_xdpsq *sq); 705e0d2eefSTariq Toukan void mlx5e_set_xmit_fp(struct mlx5e_xdpsq *sq, bool is_mpw); 714fb2f516STariq Toukan void mlx5e_xdp_rx_poll_complete(struct mlx5e_rq *rq); 7258b99ee3STariq Toukan int mlx5e_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 7358b99ee3STariq Toukan u32 flags); 74159d2131STariq Toukan 7593761ca1STariq Toukan INDIRECT_CALLABLE_DECLARE(bool mlx5e_xmit_xdp_frame_mpwqe(struct mlx5e_xdpsq *sq, 7693761ca1STariq Toukan struct mlx5e_xdp_xmit_data *xdptxd, 7793761ca1STariq Toukan struct mlx5e_xdp_info *xdpi, 7893761ca1STariq Toukan int check_result)); 7993761ca1STariq Toukan INDIRECT_CALLABLE_DECLARE(bool mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, 8093761ca1STariq Toukan struct mlx5e_xdp_xmit_data *xdptxd, 8193761ca1STariq Toukan struct mlx5e_xdp_info *xdpi, 8293761ca1STariq Toukan int check_result)); 8393761ca1STariq Toukan INDIRECT_CALLABLE_DECLARE(int mlx5e_xmit_xdp_frame_check_mpwqe(struct mlx5e_xdpsq *sq)); 8493761ca1STariq Toukan INDIRECT_CALLABLE_DECLARE(int mlx5e_xmit_xdp_frame_check(struct mlx5e_xdpsq *sq)); 8593761ca1STariq Toukan 86407e17b1SSaeed Mahameed static inline void mlx5e_xdp_tx_enable(struct mlx5e_priv *priv) 87407e17b1SSaeed Mahameed { 88407e17b1SSaeed Mahameed set_bit(MLX5E_STATE_XDP_TX_ENABLED, &priv->state); 899cf88808SMaxim Mikityanskiy 909cf88808SMaxim Mikityanskiy if (priv->channels.params.xdp_prog) 919cf88808SMaxim Mikityanskiy set_bit(MLX5E_STATE_XDP_ACTIVE, &priv->state); 92407e17b1SSaeed Mahameed } 93407e17b1SSaeed Mahameed 94407e17b1SSaeed Mahameed static inline void mlx5e_xdp_tx_disable(struct mlx5e_priv *priv) 95407e17b1SSaeed Mahameed { 969cf88808SMaxim Mikityanskiy if (priv->channels.params.xdp_prog) 979cf88808SMaxim Mikityanskiy clear_bit(MLX5E_STATE_XDP_ACTIVE, &priv->state); 989cf88808SMaxim Mikityanskiy 99407e17b1SSaeed Mahameed clear_bit(MLX5E_STATE_XDP_TX_ENABLED, &priv->state); 1009cf88808SMaxim Mikityanskiy /* Let other device's napi(s) and XSK wakeups see our new state. */ 101407e17b1SSaeed Mahameed synchronize_rcu(); 102407e17b1SSaeed Mahameed } 103407e17b1SSaeed Mahameed 104407e17b1SSaeed Mahameed static inline bool mlx5e_xdp_tx_is_enabled(struct mlx5e_priv *priv) 105407e17b1SSaeed Mahameed { 106407e17b1SSaeed Mahameed return test_bit(MLX5E_STATE_XDP_TX_ENABLED, &priv->state); 107407e17b1SSaeed Mahameed } 108407e17b1SSaeed Mahameed 1099cf88808SMaxim Mikityanskiy static inline bool mlx5e_xdp_is_active(struct mlx5e_priv *priv) 110db05815bSMaxim Mikityanskiy { 1119cf88808SMaxim Mikityanskiy return test_bit(MLX5E_STATE_XDP_ACTIVE, &priv->state); 112db05815bSMaxim Mikityanskiy } 113db05815bSMaxim Mikityanskiy 114159d2131STariq Toukan static inline void mlx5e_xmit_xdp_doorbell(struct mlx5e_xdpsq *sq) 115159d2131STariq Toukan { 116b8180392STariq Toukan if (sq->doorbell_cseg) { 117b8180392STariq Toukan mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, sq->doorbell_cseg); 118b8180392STariq Toukan sq->doorbell_cseg = NULL; 119b8180392STariq Toukan } 120159d2131STariq Toukan } 121159d2131STariq Toukan 122c2273219SShay Agroskin /* Enable inline WQEs to shift some load from a congested HCA (HW) to 123c2273219SShay Agroskin * a less congested cpu (SW). 124c2273219SShay Agroskin */ 125c2273219SShay Agroskin static inline void mlx5e_xdp_update_inline_state(struct mlx5e_xdpsq *sq) 126c2273219SShay Agroskin { 127c2273219SShay Agroskin u16 outstanding = sq->xdpi_fifo_pc - sq->xdpi_fifo_cc; 128c2273219SShay Agroskin struct mlx5e_xdp_mpwqe *session = &sq->mpwqe; 129c2273219SShay Agroskin 130c2273219SShay Agroskin #define MLX5E_XDP_INLINE_WATERMARK_LOW 10 131c2273219SShay Agroskin #define MLX5E_XDP_INLINE_WATERMARK_HIGH 128 132c2273219SShay Agroskin 133c2273219SShay Agroskin if (session->inline_on) { 134c2273219SShay Agroskin if (outstanding <= MLX5E_XDP_INLINE_WATERMARK_LOW) 135c2273219SShay Agroskin session->inline_on = 0; 136c2273219SShay Agroskin return; 137c2273219SShay Agroskin } 138c2273219SShay Agroskin 139c2273219SShay Agroskin /* inline is false */ 140c2273219SShay Agroskin if (outstanding >= MLX5E_XDP_INLINE_WATERMARK_HIGH) 141c2273219SShay Agroskin session->inline_on = 1; 142c2273219SShay Agroskin } 143c2273219SShay Agroskin 1446c085a8aSShay Agroskin static inline bool 1456c085a8aSShay Agroskin mlx5e_xdp_no_room_for_inline_pkt(struct mlx5e_xdp_mpwqe *session) 1466c085a8aSShay Agroskin { 1476c085a8aSShay Agroskin return session->inline_on && 1486c085a8aSShay Agroskin session->ds_count + MLX5E_XDP_INLINE_WQE_MAX_DS_CNT > MLX5E_XDP_MPW_MAX_NUM_DS; 1496c085a8aSShay Agroskin } 1506c085a8aSShay Agroskin 15105dfd570STariq Toukan struct mlx5e_xdp_wqe_info { 15205dfd570STariq Toukan u8 num_wqebbs; 15305dfd570STariq Toukan u8 num_pkts; 15405dfd570STariq Toukan }; 15505dfd570STariq Toukan 1566c085a8aSShay Agroskin static inline void 157d963fa15SMaxim Mikityanskiy mlx5e_xdp_mpwqe_add_dseg(struct mlx5e_xdpsq *sq, 158d963fa15SMaxim Mikityanskiy struct mlx5e_xdp_xmit_data *xdptxd, 159c2273219SShay Agroskin struct mlx5e_xdpsq_stats *stats) 1605e0d2eefSTariq Toukan { 1615e0d2eefSTariq Toukan struct mlx5e_xdp_mpwqe *session = &sq->mpwqe; 1625e0d2eefSTariq Toukan struct mlx5_wqe_data_seg *dseg = 163c2273219SShay Agroskin (struct mlx5_wqe_data_seg *)session->wqe + session->ds_count; 164d963fa15SMaxim Mikityanskiy u32 dma_len = xdptxd->len; 1655e0d2eefSTariq Toukan 166c2273219SShay Agroskin session->pkt_count++; 167c2273219SShay Agroskin 168c2273219SShay Agroskin if (session->inline_on && dma_len <= MLX5E_XDP_INLINE_WQE_SZ_THRSD) { 169c2273219SShay Agroskin struct mlx5_wqe_inline_seg *inline_dseg = 170c2273219SShay Agroskin (struct mlx5_wqe_inline_seg *)dseg; 171c2273219SShay Agroskin u16 ds_len = sizeof(*inline_dseg) + dma_len; 172c2273219SShay Agroskin u16 ds_cnt = DIV_ROUND_UP(ds_len, MLX5_SEND_WQE_DS); 173c2273219SShay Agroskin 174c2273219SShay Agroskin inline_dseg->byte_count = cpu_to_be32(dma_len | MLX5_INLINE_SEG); 175d963fa15SMaxim Mikityanskiy memcpy(inline_dseg->data, xdptxd->data, dma_len); 176c2273219SShay Agroskin 177c2273219SShay Agroskin session->ds_count += ds_cnt; 178c2273219SShay Agroskin stats->inlnw++; 179c2273219SShay Agroskin return; 180c2273219SShay Agroskin } 181c2273219SShay Agroskin 182d963fa15SMaxim Mikityanskiy dseg->addr = cpu_to_be64(xdptxd->dma_addr); 1835e0d2eefSTariq Toukan dseg->byte_count = cpu_to_be32(dma_len); 1845e0d2eefSTariq Toukan dseg->lkey = sq->mkey_be; 185c2273219SShay Agroskin session->ds_count++; 1865e0d2eefSTariq Toukan } 1875e0d2eefSTariq Toukan 1885e0d2eefSTariq Toukan static inline void 189fea28dd6STariq Toukan mlx5e_xdpi_fifo_push(struct mlx5e_xdp_info_fifo *fifo, 190fea28dd6STariq Toukan struct mlx5e_xdp_info *xi) 191fea28dd6STariq Toukan { 192fea28dd6STariq Toukan u32 i = (*fifo->pc)++ & fifo->mask; 193fea28dd6STariq Toukan 194fea28dd6STariq Toukan fifo->xi[i] = *xi; 195fea28dd6STariq Toukan } 196fea28dd6STariq Toukan 197fea28dd6STariq Toukan static inline struct mlx5e_xdp_info 198fea28dd6STariq Toukan mlx5e_xdpi_fifo_pop(struct mlx5e_xdp_info_fifo *fifo) 199fea28dd6STariq Toukan { 200fea28dd6STariq Toukan return fifo->xi[(*fifo->cc)++ & fifo->mask]; 201fea28dd6STariq Toukan } 202159d2131STariq Toukan #endif 203