1 /* 2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/errno.h> 34 #include <linux/if_ether.h> 35 #include <linux/if_vlan.h> 36 #include <linux/export.h> 37 38 #include <linux/mlx4/cmd.h> 39 40 #include "mlx4.h" 41 #include "mlx4_stats.h" 42 43 #define MLX4_MAC_VALID (1ull << 63) 44 45 #define MLX4_VLAN_VALID (1u << 31) 46 #define MLX4_VLAN_MASK 0xfff 47 48 #define MLX4_STATS_TRAFFIC_COUNTERS_MASK 0xfULL 49 #define MLX4_STATS_TRAFFIC_DROPS_MASK 0xc0ULL 50 #define MLX4_STATS_ERROR_COUNTERS_MASK 0x1ffc30ULL 51 #define MLX4_STATS_PORT_COUNTERS_MASK 0x1fe00000ULL 52 53 #define MLX4_FLAG2_V_IGNORE_FCS_MASK BIT(1) 54 #define MLX4_FLAG2_V_USER_MTU_MASK BIT(5) 55 #define MLX4_FLAG_V_MTU_MASK BIT(0) 56 #define MLX4_FLAG_V_PPRX_MASK BIT(1) 57 #define MLX4_FLAG_V_PPTX_MASK BIT(2) 58 #define MLX4_IGNORE_FCS_MASK 0x1 59 #define MLX4_TC_MAX_NUMBER 8 60 61 void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table) 62 { 63 int i; 64 65 mutex_init(&table->mutex); 66 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 67 table->entries[i] = 0; 68 table->refs[i] = 0; 69 table->is_dup[i] = false; 70 } 71 table->max = 1 << dev->caps.log_num_macs; 72 table->total = 0; 73 } 74 75 void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table) 76 { 77 int i; 78 79 mutex_init(&table->mutex); 80 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { 81 table->entries[i] = 0; 82 table->refs[i] = 0; 83 table->is_dup[i] = false; 84 } 85 table->max = (1 << dev->caps.log_num_vlans) - MLX4_VLAN_REGULAR; 86 table->total = 0; 87 } 88 89 void mlx4_init_roce_gid_table(struct mlx4_dev *dev, 90 struct mlx4_roce_gid_table *table) 91 { 92 int i; 93 94 mutex_init(&table->mutex); 95 for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) 96 memset(table->roce_gids[i].raw, 0, MLX4_ROCE_GID_ENTRY_SIZE); 97 } 98 99 static int validate_index(struct mlx4_dev *dev, 100 struct mlx4_mac_table *table, int index) 101 { 102 int err = 0; 103 104 if (index < 0 || index >= table->max || !table->entries[index]) { 105 mlx4_warn(dev, "No valid Mac entry for the given index\n"); 106 err = -EINVAL; 107 } 108 return err; 109 } 110 111 static int find_index(struct mlx4_dev *dev, 112 struct mlx4_mac_table *table, u64 mac) 113 { 114 int i; 115 116 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 117 if (table->refs[i] && 118 (MLX4_MAC_MASK & mac) == 119 (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) 120 return i; 121 } 122 /* Mac not found */ 123 return -EINVAL; 124 } 125 126 static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port, 127 __be64 *entries) 128 { 129 struct mlx4_cmd_mailbox *mailbox; 130 u32 in_mod; 131 int err; 132 133 mailbox = mlx4_alloc_cmd_mailbox(dev); 134 if (IS_ERR(mailbox)) 135 return PTR_ERR(mailbox); 136 137 memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE); 138 139 in_mod = MLX4_SET_PORT_MAC_TABLE << 8 | port; 140 141 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 142 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 143 MLX4_CMD_NATIVE); 144 145 mlx4_free_cmd_mailbox(dev, mailbox); 146 return err; 147 } 148 149 int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx) 150 { 151 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; 152 struct mlx4_mac_table *table = &info->mac_table; 153 int i; 154 155 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 156 if (!table->refs[i]) 157 continue; 158 159 if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) { 160 *idx = i; 161 return 0; 162 } 163 } 164 165 return -ENOENT; 166 } 167 EXPORT_SYMBOL_GPL(mlx4_find_cached_mac); 168 169 static bool mlx4_need_mf_bond(struct mlx4_dev *dev) 170 { 171 int i, num_eth_ports = 0; 172 173 if (!mlx4_is_mfunc(dev)) 174 return false; 175 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 176 ++num_eth_ports; 177 178 return (num_eth_ports == 2) ? true : false; 179 } 180 181 int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) 182 { 183 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; 184 struct mlx4_mac_table *table = &info->mac_table; 185 int i, err = 0; 186 int free = -1; 187 int free_for_dup = -1; 188 bool dup = mlx4_is_mf_bonded(dev); 189 u8 dup_port = (port == 1) ? 2 : 1; 190 struct mlx4_mac_table *dup_table = &mlx4_priv(dev)->port[dup_port].mac_table; 191 bool need_mf_bond = mlx4_need_mf_bond(dev); 192 bool can_mf_bond = true; 193 194 mlx4_dbg(dev, "Registering MAC: 0x%llx for port %d %s duplicate\n", 195 (unsigned long long)mac, port, 196 dup ? "with" : "without"); 197 198 if (need_mf_bond) { 199 if (port == 1) { 200 mutex_lock(&table->mutex); 201 mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); 202 } else { 203 mutex_lock(&dup_table->mutex); 204 mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); 205 } 206 } else { 207 mutex_lock(&table->mutex); 208 } 209 210 if (need_mf_bond) { 211 int index_at_port = -1; 212 int index_at_dup_port = -1; 213 214 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 215 if (((MLX4_MAC_MASK & mac) == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i])))) 216 index_at_port = i; 217 if (((MLX4_MAC_MASK & mac) == (MLX4_MAC_MASK & be64_to_cpu(dup_table->entries[i])))) 218 index_at_dup_port = i; 219 } 220 221 /* check that same mac is not in the tables at different indices */ 222 if ((index_at_port != index_at_dup_port) && 223 (index_at_port >= 0) && 224 (index_at_dup_port >= 0)) 225 can_mf_bond = false; 226 227 /* If the mac is already in the primary table, the slot must be 228 * available in the duplicate table as well. 229 */ 230 if (index_at_port >= 0 && index_at_dup_port < 0 && 231 dup_table->refs[index_at_port]) { 232 can_mf_bond = false; 233 } 234 /* If the mac is already in the duplicate table, check that the 235 * corresponding index is not occupied in the primary table, or 236 * the primary table already contains the mac at the same index. 237 * Otherwise, you cannot bond (primary contains a different mac 238 * at that index). 239 */ 240 if (index_at_dup_port >= 0) { 241 if (!table->refs[index_at_dup_port] || 242 ((MLX4_MAC_MASK & mac) == (MLX4_MAC_MASK & be64_to_cpu(table->entries[index_at_dup_port])))) 243 free_for_dup = index_at_dup_port; 244 else 245 can_mf_bond = false; 246 } 247 } 248 249 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 250 if (!table->refs[i]) { 251 if (free < 0) 252 free = i; 253 if (free_for_dup < 0 && need_mf_bond && can_mf_bond) { 254 if (!dup_table->refs[i]) 255 free_for_dup = i; 256 } 257 continue; 258 } 259 260 if ((MLX4_MAC_MASK & mac) == 261 (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) { 262 /* MAC already registered, increment ref count */ 263 err = i; 264 ++table->refs[i]; 265 if (dup) { 266 u64 dup_mac = MLX4_MAC_MASK & be64_to_cpu(dup_table->entries[i]); 267 268 if (dup_mac != mac || !dup_table->is_dup[i]) { 269 mlx4_warn(dev, "register mac: expect duplicate mac 0x%llx on port %d index %d\n", 270 mac, dup_port, i); 271 } 272 } 273 goto out; 274 } 275 } 276 277 if (need_mf_bond && (free_for_dup < 0)) { 278 if (dup) { 279 mlx4_warn(dev, "Fail to allocate duplicate MAC table entry\n"); 280 mlx4_warn(dev, "High Availability for virtual functions may not work as expected\n"); 281 dup = false; 282 } 283 can_mf_bond = false; 284 } 285 286 if (need_mf_bond && can_mf_bond) 287 free = free_for_dup; 288 289 mlx4_dbg(dev, "Free MAC index is %d\n", free); 290 291 if (table->total == table->max) { 292 /* No free mac entries */ 293 err = -ENOSPC; 294 goto out; 295 } 296 297 /* Register new MAC */ 298 table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID); 299 300 err = mlx4_set_port_mac_table(dev, port, table->entries); 301 if (unlikely(err)) { 302 mlx4_err(dev, "Failed adding MAC: 0x%llx\n", 303 (unsigned long long) mac); 304 table->entries[free] = 0; 305 goto out; 306 } 307 table->refs[free] = 1; 308 table->is_dup[free] = false; 309 ++table->total; 310 if (dup) { 311 dup_table->refs[free] = 0; 312 dup_table->is_dup[free] = true; 313 dup_table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID); 314 315 err = mlx4_set_port_mac_table(dev, dup_port, dup_table->entries); 316 if (unlikely(err)) { 317 mlx4_warn(dev, "Failed adding duplicate mac: 0x%llx\n", mac); 318 dup_table->is_dup[free] = false; 319 dup_table->entries[free] = 0; 320 goto out; 321 } 322 ++dup_table->total; 323 } 324 err = free; 325 out: 326 if (need_mf_bond) { 327 if (port == 2) { 328 mutex_unlock(&table->mutex); 329 mutex_unlock(&dup_table->mutex); 330 } else { 331 mutex_unlock(&dup_table->mutex); 332 mutex_unlock(&table->mutex); 333 } 334 } else { 335 mutex_unlock(&table->mutex); 336 } 337 return err; 338 } 339 EXPORT_SYMBOL_GPL(__mlx4_register_mac); 340 341 int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) 342 { 343 u64 out_param = 0; 344 int err = -EINVAL; 345 346 if (mlx4_is_mfunc(dev)) { 347 if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) { 348 err = mlx4_cmd_imm(dev, mac, &out_param, 349 ((u32) port) << 8 | (u32) RES_MAC, 350 RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, 351 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 352 } 353 if (err && err == -EINVAL && mlx4_is_slave(dev)) { 354 /* retry using old REG_MAC format */ 355 set_param_l(&out_param, port); 356 err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, 357 RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, 358 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 359 if (!err) 360 dev->flags |= MLX4_FLAG_OLD_REG_MAC; 361 } 362 if (err) 363 return err; 364 365 return get_param_l(&out_param); 366 } 367 return __mlx4_register_mac(dev, port, mac); 368 } 369 EXPORT_SYMBOL_GPL(mlx4_register_mac); 370 371 int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port) 372 { 373 return dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] + 374 (port - 1) * (1 << dev->caps.log_num_macs); 375 } 376 EXPORT_SYMBOL_GPL(mlx4_get_base_qpn); 377 378 void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) 379 { 380 struct mlx4_port_info *info; 381 struct mlx4_mac_table *table; 382 int index; 383 bool dup = mlx4_is_mf_bonded(dev); 384 u8 dup_port = (port == 1) ? 2 : 1; 385 struct mlx4_mac_table *dup_table = &mlx4_priv(dev)->port[dup_port].mac_table; 386 387 if (port < 1 || port > dev->caps.num_ports) { 388 mlx4_warn(dev, "invalid port number (%d), aborting...\n", port); 389 return; 390 } 391 info = &mlx4_priv(dev)->port[port]; 392 table = &info->mac_table; 393 394 if (dup) { 395 if (port == 1) { 396 mutex_lock(&table->mutex); 397 mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); 398 } else { 399 mutex_lock(&dup_table->mutex); 400 mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); 401 } 402 } else { 403 mutex_lock(&table->mutex); 404 } 405 406 index = find_index(dev, table, mac); 407 408 if (validate_index(dev, table, index)) 409 goto out; 410 411 if (--table->refs[index] || table->is_dup[index]) { 412 mlx4_dbg(dev, "Have more references for index %d, no need to modify mac table\n", 413 index); 414 if (!table->refs[index]) 415 dup_table->is_dup[index] = false; 416 goto out; 417 } 418 419 table->entries[index] = 0; 420 if (mlx4_set_port_mac_table(dev, port, table->entries)) 421 mlx4_warn(dev, "Fail to set mac in port %d during unregister\n", port); 422 --table->total; 423 424 if (dup) { 425 dup_table->is_dup[index] = false; 426 if (dup_table->refs[index]) 427 goto out; 428 dup_table->entries[index] = 0; 429 if (mlx4_set_port_mac_table(dev, dup_port, dup_table->entries)) 430 mlx4_warn(dev, "Fail to set mac in duplicate port %d during unregister\n", dup_port); 431 432 --table->total; 433 } 434 out: 435 if (dup) { 436 if (port == 2) { 437 mutex_unlock(&table->mutex); 438 mutex_unlock(&dup_table->mutex); 439 } else { 440 mutex_unlock(&dup_table->mutex); 441 mutex_unlock(&table->mutex); 442 } 443 } else { 444 mutex_unlock(&table->mutex); 445 } 446 } 447 EXPORT_SYMBOL_GPL(__mlx4_unregister_mac); 448 449 void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) 450 { 451 u64 out_param = 0; 452 453 if (mlx4_is_mfunc(dev)) { 454 if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) { 455 (void) mlx4_cmd_imm(dev, mac, &out_param, 456 ((u32) port) << 8 | (u32) RES_MAC, 457 RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES, 458 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 459 } else { 460 /* use old unregister mac format */ 461 set_param_l(&out_param, port); 462 (void) mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, 463 RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES, 464 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 465 } 466 return; 467 } 468 __mlx4_unregister_mac(dev, port, mac); 469 return; 470 } 471 EXPORT_SYMBOL_GPL(mlx4_unregister_mac); 472 473 int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac) 474 { 475 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; 476 struct mlx4_mac_table *table = &info->mac_table; 477 int index = qpn - info->base_qpn; 478 int err = 0; 479 bool dup = mlx4_is_mf_bonded(dev); 480 u8 dup_port = (port == 1) ? 2 : 1; 481 struct mlx4_mac_table *dup_table = &mlx4_priv(dev)->port[dup_port].mac_table; 482 483 /* CX1 doesn't support multi-functions */ 484 if (dup) { 485 if (port == 1) { 486 mutex_lock(&table->mutex); 487 mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); 488 } else { 489 mutex_lock(&dup_table->mutex); 490 mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); 491 } 492 } else { 493 mutex_lock(&table->mutex); 494 } 495 496 err = validate_index(dev, table, index); 497 if (err) 498 goto out; 499 500 table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID); 501 502 err = mlx4_set_port_mac_table(dev, port, table->entries); 503 if (unlikely(err)) { 504 mlx4_err(dev, "Failed adding MAC: 0x%llx\n", 505 (unsigned long long) new_mac); 506 table->entries[index] = 0; 507 } else { 508 if (dup) { 509 dup_table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID); 510 511 err = mlx4_set_port_mac_table(dev, dup_port, dup_table->entries); 512 if (unlikely(err)) { 513 mlx4_err(dev, "Failed adding duplicate MAC: 0x%llx\n", 514 (unsigned long long)new_mac); 515 dup_table->entries[index] = 0; 516 } 517 } 518 } 519 out: 520 if (dup) { 521 if (port == 2) { 522 mutex_unlock(&table->mutex); 523 mutex_unlock(&dup_table->mutex); 524 } else { 525 mutex_unlock(&dup_table->mutex); 526 mutex_unlock(&table->mutex); 527 } 528 } else { 529 mutex_unlock(&table->mutex); 530 } 531 return err; 532 } 533 EXPORT_SYMBOL_GPL(__mlx4_replace_mac); 534 535 static int mlx4_set_port_vlan_table(struct mlx4_dev *dev, u8 port, 536 __be32 *entries) 537 { 538 struct mlx4_cmd_mailbox *mailbox; 539 u32 in_mod; 540 int err; 541 542 mailbox = mlx4_alloc_cmd_mailbox(dev); 543 if (IS_ERR(mailbox)) 544 return PTR_ERR(mailbox); 545 546 memcpy(mailbox->buf, entries, MLX4_VLAN_TABLE_SIZE); 547 in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 | port; 548 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 549 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 550 MLX4_CMD_NATIVE); 551 552 mlx4_free_cmd_mailbox(dev, mailbox); 553 554 return err; 555 } 556 557 int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx) 558 { 559 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; 560 int i; 561 562 for (i = 0; i < MLX4_MAX_VLAN_NUM; ++i) { 563 if (table->refs[i] && 564 (vid == (MLX4_VLAN_MASK & 565 be32_to_cpu(table->entries[i])))) { 566 /* VLAN already registered, increase reference count */ 567 *idx = i; 568 return 0; 569 } 570 } 571 572 return -ENOENT; 573 } 574 EXPORT_SYMBOL_GPL(mlx4_find_cached_vlan); 575 576 int __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, 577 int *index) 578 { 579 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; 580 int i, err = 0; 581 int free = -1; 582 int free_for_dup = -1; 583 bool dup = mlx4_is_mf_bonded(dev); 584 u8 dup_port = (port == 1) ? 2 : 1; 585 struct mlx4_vlan_table *dup_table = &mlx4_priv(dev)->port[dup_port].vlan_table; 586 bool need_mf_bond = mlx4_need_mf_bond(dev); 587 bool can_mf_bond = true; 588 589 mlx4_dbg(dev, "Registering VLAN: %d for port %d %s duplicate\n", 590 vlan, port, 591 dup ? "with" : "without"); 592 593 if (need_mf_bond) { 594 if (port == 1) { 595 mutex_lock(&table->mutex); 596 mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); 597 } else { 598 mutex_lock(&dup_table->mutex); 599 mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); 600 } 601 } else { 602 mutex_lock(&table->mutex); 603 } 604 605 if (table->total == table->max) { 606 /* No free vlan entries */ 607 err = -ENOSPC; 608 goto out; 609 } 610 611 if (need_mf_bond) { 612 int index_at_port = -1; 613 int index_at_dup_port = -1; 614 615 for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) { 616 if ((vlan == (MLX4_VLAN_MASK & be32_to_cpu(table->entries[i])))) 617 index_at_port = i; 618 if ((vlan == (MLX4_VLAN_MASK & be32_to_cpu(dup_table->entries[i])))) 619 index_at_dup_port = i; 620 } 621 /* check that same vlan is not in the tables at different indices */ 622 if ((index_at_port != index_at_dup_port) && 623 (index_at_port >= 0) && 624 (index_at_dup_port >= 0)) 625 can_mf_bond = false; 626 627 /* If the vlan is already in the primary table, the slot must be 628 * available in the duplicate table as well. 629 */ 630 if (index_at_port >= 0 && index_at_dup_port < 0 && 631 dup_table->refs[index_at_port]) { 632 can_mf_bond = false; 633 } 634 /* If the vlan is already in the duplicate table, check that the 635 * corresponding index is not occupied in the primary table, or 636 * the primary table already contains the vlan at the same index. 637 * Otherwise, you cannot bond (primary contains a different vlan 638 * at that index). 639 */ 640 if (index_at_dup_port >= 0) { 641 if (!table->refs[index_at_dup_port] || 642 (vlan == (MLX4_VLAN_MASK & be32_to_cpu(dup_table->entries[index_at_dup_port])))) 643 free_for_dup = index_at_dup_port; 644 else 645 can_mf_bond = false; 646 } 647 } 648 649 for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) { 650 if (!table->refs[i]) { 651 if (free < 0) 652 free = i; 653 if (free_for_dup < 0 && need_mf_bond && can_mf_bond) { 654 if (!dup_table->refs[i]) 655 free_for_dup = i; 656 } 657 } 658 659 if ((table->refs[i] || table->is_dup[i]) && 660 (vlan == (MLX4_VLAN_MASK & 661 be32_to_cpu(table->entries[i])))) { 662 /* Vlan already registered, increase references count */ 663 mlx4_dbg(dev, "vlan %u is already registered.\n", vlan); 664 *index = i; 665 ++table->refs[i]; 666 if (dup) { 667 u16 dup_vlan = MLX4_VLAN_MASK & be32_to_cpu(dup_table->entries[i]); 668 669 if (dup_vlan != vlan || !dup_table->is_dup[i]) { 670 mlx4_warn(dev, "register vlan: expected duplicate vlan %u on port %d index %d\n", 671 vlan, dup_port, i); 672 } 673 } 674 goto out; 675 } 676 } 677 678 if (need_mf_bond && (free_for_dup < 0)) { 679 if (dup) { 680 mlx4_warn(dev, "Fail to allocate duplicate VLAN table entry\n"); 681 mlx4_warn(dev, "High Availability for virtual functions may not work as expected\n"); 682 dup = false; 683 } 684 can_mf_bond = false; 685 } 686 687 if (need_mf_bond && can_mf_bond) 688 free = free_for_dup; 689 690 if (free < 0) { 691 err = -ENOMEM; 692 goto out; 693 } 694 695 /* Register new VLAN */ 696 table->refs[free] = 1; 697 table->is_dup[free] = false; 698 table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID); 699 700 err = mlx4_set_port_vlan_table(dev, port, table->entries); 701 if (unlikely(err)) { 702 mlx4_warn(dev, "Failed adding vlan: %u\n", vlan); 703 table->refs[free] = 0; 704 table->entries[free] = 0; 705 goto out; 706 } 707 ++table->total; 708 if (dup) { 709 dup_table->refs[free] = 0; 710 dup_table->is_dup[free] = true; 711 dup_table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID); 712 713 err = mlx4_set_port_vlan_table(dev, dup_port, dup_table->entries); 714 if (unlikely(err)) { 715 mlx4_warn(dev, "Failed adding duplicate vlan: %u\n", vlan); 716 dup_table->is_dup[free] = false; 717 dup_table->entries[free] = 0; 718 goto out; 719 } 720 ++dup_table->total; 721 } 722 723 *index = free; 724 out: 725 if (need_mf_bond) { 726 if (port == 2) { 727 mutex_unlock(&table->mutex); 728 mutex_unlock(&dup_table->mutex); 729 } else { 730 mutex_unlock(&dup_table->mutex); 731 mutex_unlock(&table->mutex); 732 } 733 } else { 734 mutex_unlock(&table->mutex); 735 } 736 return err; 737 } 738 739 int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index) 740 { 741 u64 out_param = 0; 742 int err; 743 744 if (vlan > 4095) 745 return -EINVAL; 746 747 if (mlx4_is_mfunc(dev)) { 748 err = mlx4_cmd_imm(dev, vlan, &out_param, 749 ((u32) port) << 8 | (u32) RES_VLAN, 750 RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, 751 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 752 if (!err) 753 *index = get_param_l(&out_param); 754 755 return err; 756 } 757 return __mlx4_register_vlan(dev, port, vlan, index); 758 } 759 EXPORT_SYMBOL_GPL(mlx4_register_vlan); 760 761 void __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan) 762 { 763 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; 764 int index; 765 bool dup = mlx4_is_mf_bonded(dev); 766 u8 dup_port = (port == 1) ? 2 : 1; 767 struct mlx4_vlan_table *dup_table = &mlx4_priv(dev)->port[dup_port].vlan_table; 768 769 if (dup) { 770 if (port == 1) { 771 mutex_lock(&table->mutex); 772 mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); 773 } else { 774 mutex_lock(&dup_table->mutex); 775 mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); 776 } 777 } else { 778 mutex_lock(&table->mutex); 779 } 780 781 if (mlx4_find_cached_vlan(dev, port, vlan, &index)) { 782 mlx4_warn(dev, "vlan 0x%x is not in the vlan table\n", vlan); 783 goto out; 784 } 785 786 if (index < MLX4_VLAN_REGULAR) { 787 mlx4_warn(dev, "Trying to free special vlan index %d\n", index); 788 goto out; 789 } 790 791 if (--table->refs[index] || table->is_dup[index]) { 792 mlx4_dbg(dev, "Have %d more references for index %d, no need to modify vlan table\n", 793 table->refs[index], index); 794 if (!table->refs[index]) 795 dup_table->is_dup[index] = false; 796 goto out; 797 } 798 table->entries[index] = 0; 799 if (mlx4_set_port_vlan_table(dev, port, table->entries)) 800 mlx4_warn(dev, "Fail to set vlan in port %d during unregister\n", port); 801 --table->total; 802 if (dup) { 803 dup_table->is_dup[index] = false; 804 if (dup_table->refs[index]) 805 goto out; 806 dup_table->entries[index] = 0; 807 if (mlx4_set_port_vlan_table(dev, dup_port, dup_table->entries)) 808 mlx4_warn(dev, "Fail to set vlan in duplicate port %d during unregister\n", dup_port); 809 --dup_table->total; 810 } 811 out: 812 if (dup) { 813 if (port == 2) { 814 mutex_unlock(&table->mutex); 815 mutex_unlock(&dup_table->mutex); 816 } else { 817 mutex_unlock(&dup_table->mutex); 818 mutex_unlock(&table->mutex); 819 } 820 } else { 821 mutex_unlock(&table->mutex); 822 } 823 } 824 825 void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan) 826 { 827 u64 out_param = 0; 828 829 if (mlx4_is_mfunc(dev)) { 830 (void) mlx4_cmd_imm(dev, vlan, &out_param, 831 ((u32) port) << 8 | (u32) RES_VLAN, 832 RES_OP_RESERVE_AND_MAP, 833 MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, 834 MLX4_CMD_WRAPPED); 835 return; 836 } 837 __mlx4_unregister_vlan(dev, port, vlan); 838 } 839 EXPORT_SYMBOL_GPL(mlx4_unregister_vlan); 840 841 int mlx4_bond_mac_table(struct mlx4_dev *dev) 842 { 843 struct mlx4_mac_table *t1 = &mlx4_priv(dev)->port[1].mac_table; 844 struct mlx4_mac_table *t2 = &mlx4_priv(dev)->port[2].mac_table; 845 int ret = 0; 846 int i; 847 bool update1 = false; 848 bool update2 = false; 849 850 mutex_lock(&t1->mutex); 851 mutex_lock(&t2->mutex); 852 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 853 if ((t1->entries[i] != t2->entries[i]) && 854 t1->entries[i] && t2->entries[i]) { 855 mlx4_warn(dev, "can't duplicate entry %d in mac table\n", i); 856 ret = -EINVAL; 857 goto unlock; 858 } 859 } 860 861 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 862 if (t1->entries[i] && !t2->entries[i]) { 863 t2->entries[i] = t1->entries[i]; 864 t2->is_dup[i] = true; 865 update2 = true; 866 } else if (!t1->entries[i] && t2->entries[i]) { 867 t1->entries[i] = t2->entries[i]; 868 t1->is_dup[i] = true; 869 update1 = true; 870 } else if (t1->entries[i] && t2->entries[i]) { 871 t1->is_dup[i] = true; 872 t2->is_dup[i] = true; 873 } 874 } 875 876 if (update1) { 877 ret = mlx4_set_port_mac_table(dev, 1, t1->entries); 878 if (ret) 879 mlx4_warn(dev, "failed to set MAC table for port 1 (%d)\n", ret); 880 } 881 if (!ret && update2) { 882 ret = mlx4_set_port_mac_table(dev, 2, t2->entries); 883 if (ret) 884 mlx4_warn(dev, "failed to set MAC table for port 2 (%d)\n", ret); 885 } 886 887 if (ret) 888 mlx4_warn(dev, "failed to create mirror MAC tables\n"); 889 unlock: 890 mutex_unlock(&t2->mutex); 891 mutex_unlock(&t1->mutex); 892 return ret; 893 } 894 895 int mlx4_unbond_mac_table(struct mlx4_dev *dev) 896 { 897 struct mlx4_mac_table *t1 = &mlx4_priv(dev)->port[1].mac_table; 898 struct mlx4_mac_table *t2 = &mlx4_priv(dev)->port[2].mac_table; 899 int ret = 0; 900 int ret1; 901 int i; 902 bool update1 = false; 903 bool update2 = false; 904 905 mutex_lock(&t1->mutex); 906 mutex_lock(&t2->mutex); 907 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 908 if (t1->entries[i] != t2->entries[i]) { 909 mlx4_warn(dev, "mac table is in an unexpected state when trying to unbond\n"); 910 ret = -EINVAL; 911 goto unlock; 912 } 913 } 914 915 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 916 if (!t1->entries[i]) 917 continue; 918 t1->is_dup[i] = false; 919 if (!t1->refs[i]) { 920 t1->entries[i] = 0; 921 update1 = true; 922 } 923 t2->is_dup[i] = false; 924 if (!t2->refs[i]) { 925 t2->entries[i] = 0; 926 update2 = true; 927 } 928 } 929 930 if (update1) { 931 ret = mlx4_set_port_mac_table(dev, 1, t1->entries); 932 if (ret) 933 mlx4_warn(dev, "failed to unmirror MAC tables for port 1(%d)\n", ret); 934 } 935 if (update2) { 936 ret1 = mlx4_set_port_mac_table(dev, 2, t2->entries); 937 if (ret1) { 938 mlx4_warn(dev, "failed to unmirror MAC tables for port 2(%d)\n", ret1); 939 ret = ret1; 940 } 941 } 942 unlock: 943 mutex_unlock(&t2->mutex); 944 mutex_unlock(&t1->mutex); 945 return ret; 946 } 947 948 int mlx4_bond_vlan_table(struct mlx4_dev *dev) 949 { 950 struct mlx4_vlan_table *t1 = &mlx4_priv(dev)->port[1].vlan_table; 951 struct mlx4_vlan_table *t2 = &mlx4_priv(dev)->port[2].vlan_table; 952 int ret = 0; 953 int i; 954 bool update1 = false; 955 bool update2 = false; 956 957 mutex_lock(&t1->mutex); 958 mutex_lock(&t2->mutex); 959 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { 960 if ((t1->entries[i] != t2->entries[i]) && 961 t1->entries[i] && t2->entries[i]) { 962 mlx4_warn(dev, "can't duplicate entry %d in vlan table\n", i); 963 ret = -EINVAL; 964 goto unlock; 965 } 966 } 967 968 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { 969 if (t1->entries[i] && !t2->entries[i]) { 970 t2->entries[i] = t1->entries[i]; 971 t2->is_dup[i] = true; 972 update2 = true; 973 } else if (!t1->entries[i] && t2->entries[i]) { 974 t1->entries[i] = t2->entries[i]; 975 t1->is_dup[i] = true; 976 update1 = true; 977 } else if (t1->entries[i] && t2->entries[i]) { 978 t1->is_dup[i] = true; 979 t2->is_dup[i] = true; 980 } 981 } 982 983 if (update1) { 984 ret = mlx4_set_port_vlan_table(dev, 1, t1->entries); 985 if (ret) 986 mlx4_warn(dev, "failed to set VLAN table for port 1 (%d)\n", ret); 987 } 988 if (!ret && update2) { 989 ret = mlx4_set_port_vlan_table(dev, 2, t2->entries); 990 if (ret) 991 mlx4_warn(dev, "failed to set VLAN table for port 2 (%d)\n", ret); 992 } 993 994 if (ret) 995 mlx4_warn(dev, "failed to create mirror VLAN tables\n"); 996 unlock: 997 mutex_unlock(&t2->mutex); 998 mutex_unlock(&t1->mutex); 999 return ret; 1000 } 1001 1002 int mlx4_unbond_vlan_table(struct mlx4_dev *dev) 1003 { 1004 struct mlx4_vlan_table *t1 = &mlx4_priv(dev)->port[1].vlan_table; 1005 struct mlx4_vlan_table *t2 = &mlx4_priv(dev)->port[2].vlan_table; 1006 int ret = 0; 1007 int ret1; 1008 int i; 1009 bool update1 = false; 1010 bool update2 = false; 1011 1012 mutex_lock(&t1->mutex); 1013 mutex_lock(&t2->mutex); 1014 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { 1015 if (t1->entries[i] != t2->entries[i]) { 1016 mlx4_warn(dev, "vlan table is in an unexpected state when trying to unbond\n"); 1017 ret = -EINVAL; 1018 goto unlock; 1019 } 1020 } 1021 1022 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { 1023 if (!t1->entries[i]) 1024 continue; 1025 t1->is_dup[i] = false; 1026 if (!t1->refs[i]) { 1027 t1->entries[i] = 0; 1028 update1 = true; 1029 } 1030 t2->is_dup[i] = false; 1031 if (!t2->refs[i]) { 1032 t2->entries[i] = 0; 1033 update2 = true; 1034 } 1035 } 1036 1037 if (update1) { 1038 ret = mlx4_set_port_vlan_table(dev, 1, t1->entries); 1039 if (ret) 1040 mlx4_warn(dev, "failed to unmirror VLAN tables for port 1(%d)\n", ret); 1041 } 1042 if (update2) { 1043 ret1 = mlx4_set_port_vlan_table(dev, 2, t2->entries); 1044 if (ret1) { 1045 mlx4_warn(dev, "failed to unmirror VLAN tables for port 2(%d)\n", ret1); 1046 ret = ret1; 1047 } 1048 } 1049 unlock: 1050 mutex_unlock(&t2->mutex); 1051 mutex_unlock(&t1->mutex); 1052 return ret; 1053 } 1054 1055 int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps) 1056 { 1057 struct mlx4_cmd_mailbox *inmailbox, *outmailbox; 1058 u8 *inbuf, *outbuf; 1059 int err; 1060 1061 inmailbox = mlx4_alloc_cmd_mailbox(dev); 1062 if (IS_ERR(inmailbox)) 1063 return PTR_ERR(inmailbox); 1064 1065 outmailbox = mlx4_alloc_cmd_mailbox(dev); 1066 if (IS_ERR(outmailbox)) { 1067 mlx4_free_cmd_mailbox(dev, inmailbox); 1068 return PTR_ERR(outmailbox); 1069 } 1070 1071 inbuf = inmailbox->buf; 1072 outbuf = outmailbox->buf; 1073 inbuf[0] = 1; 1074 inbuf[1] = 1; 1075 inbuf[2] = 1; 1076 inbuf[3] = 1; 1077 *(__be16 *) (&inbuf[16]) = cpu_to_be16(0x0015); 1078 *(__be32 *) (&inbuf[20]) = cpu_to_be32(port); 1079 1080 err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3, 1081 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, 1082 MLX4_CMD_NATIVE); 1083 if (!err) 1084 *caps = *(__be32 *) (outbuf + 84); 1085 mlx4_free_cmd_mailbox(dev, inmailbox); 1086 mlx4_free_cmd_mailbox(dev, outmailbox); 1087 return err; 1088 } 1089 static struct mlx4_roce_gid_entry zgid_entry; 1090 1091 int mlx4_get_slave_num_gids(struct mlx4_dev *dev, int slave, int port) 1092 { 1093 int vfs; 1094 int slave_gid = slave; 1095 unsigned i; 1096 struct mlx4_slaves_pport slaves_pport; 1097 struct mlx4_active_ports actv_ports; 1098 unsigned max_port_p_one; 1099 1100 if (slave == 0) 1101 return MLX4_ROCE_PF_GIDS; 1102 1103 /* Slave is a VF */ 1104 slaves_pport = mlx4_phys_to_slaves_pport(dev, port); 1105 actv_ports = mlx4_get_active_ports(dev, slave); 1106 max_port_p_one = find_first_bit(actv_ports.ports, dev->caps.num_ports) + 1107 bitmap_weight(actv_ports.ports, dev->caps.num_ports) + 1; 1108 1109 for (i = 1; i < max_port_p_one; i++) { 1110 struct mlx4_active_ports exclusive_ports; 1111 struct mlx4_slaves_pport slaves_pport_actv; 1112 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); 1113 set_bit(i - 1, exclusive_ports.ports); 1114 if (i == port) 1115 continue; 1116 slaves_pport_actv = mlx4_phys_to_slaves_pport_actv( 1117 dev, &exclusive_ports); 1118 slave_gid -= bitmap_weight(slaves_pport_actv.slaves, 1119 dev->persist->num_vfs + 1); 1120 } 1121 vfs = bitmap_weight(slaves_pport.slaves, dev->persist->num_vfs + 1) - 1; 1122 if (slave_gid <= ((MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) % vfs)) 1123 return ((MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) / vfs) + 1; 1124 return (MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) / vfs; 1125 } 1126 1127 int mlx4_get_base_gid_ix(struct mlx4_dev *dev, int slave, int port) 1128 { 1129 int gids; 1130 unsigned i; 1131 int slave_gid = slave; 1132 int vfs; 1133 1134 struct mlx4_slaves_pport slaves_pport; 1135 struct mlx4_active_ports actv_ports; 1136 unsigned max_port_p_one; 1137 1138 if (slave == 0) 1139 return 0; 1140 1141 slaves_pport = mlx4_phys_to_slaves_pport(dev, port); 1142 actv_ports = mlx4_get_active_ports(dev, slave); 1143 max_port_p_one = find_first_bit(actv_ports.ports, dev->caps.num_ports) + 1144 bitmap_weight(actv_ports.ports, dev->caps.num_ports) + 1; 1145 1146 for (i = 1; i < max_port_p_one; i++) { 1147 struct mlx4_active_ports exclusive_ports; 1148 struct mlx4_slaves_pport slaves_pport_actv; 1149 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); 1150 set_bit(i - 1, exclusive_ports.ports); 1151 if (i == port) 1152 continue; 1153 slaves_pport_actv = mlx4_phys_to_slaves_pport_actv( 1154 dev, &exclusive_ports); 1155 slave_gid -= bitmap_weight(slaves_pport_actv.slaves, 1156 dev->persist->num_vfs + 1); 1157 } 1158 gids = MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS; 1159 vfs = bitmap_weight(slaves_pport.slaves, dev->persist->num_vfs + 1) - 1; 1160 if (slave_gid <= gids % vfs) 1161 return MLX4_ROCE_PF_GIDS + ((gids / vfs) + 1) * (slave_gid - 1); 1162 1163 return MLX4_ROCE_PF_GIDS + (gids % vfs) + 1164 ((gids / vfs) * (slave_gid - 1)); 1165 } 1166 EXPORT_SYMBOL_GPL(mlx4_get_base_gid_ix); 1167 1168 static int mlx4_reset_roce_port_gids(struct mlx4_dev *dev, int slave, 1169 int port, struct mlx4_cmd_mailbox *mailbox) 1170 { 1171 struct mlx4_roce_gid_entry *gid_entry_mbox; 1172 struct mlx4_priv *priv = mlx4_priv(dev); 1173 int num_gids, base, offset; 1174 int i, err; 1175 1176 num_gids = mlx4_get_slave_num_gids(dev, slave, port); 1177 base = mlx4_get_base_gid_ix(dev, slave, port); 1178 1179 memset(mailbox->buf, 0, MLX4_MAILBOX_SIZE); 1180 1181 mutex_lock(&(priv->port[port].gid_table.mutex)); 1182 /* Zero-out gids belonging to that slave in the port GID table */ 1183 for (i = 0, offset = base; i < num_gids; offset++, i++) 1184 memcpy(priv->port[port].gid_table.roce_gids[offset].raw, 1185 zgid_entry.raw, MLX4_ROCE_GID_ENTRY_SIZE); 1186 1187 /* Now, copy roce port gids table to mailbox for passing to FW */ 1188 gid_entry_mbox = (struct mlx4_roce_gid_entry *)mailbox->buf; 1189 for (i = 0; i < MLX4_ROCE_MAX_GIDS; gid_entry_mbox++, i++) 1190 memcpy(gid_entry_mbox->raw, 1191 priv->port[port].gid_table.roce_gids[i].raw, 1192 MLX4_ROCE_GID_ENTRY_SIZE); 1193 1194 err = mlx4_cmd(dev, mailbox->dma, 1195 ((u32)port) | (MLX4_SET_PORT_GID_TABLE << 8), 1196 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT, 1197 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); 1198 mutex_unlock(&(priv->port[port].gid_table.mutex)); 1199 return err; 1200 } 1201 1202 1203 void mlx4_reset_roce_gids(struct mlx4_dev *dev, int slave) 1204 { 1205 struct mlx4_active_ports actv_ports; 1206 struct mlx4_cmd_mailbox *mailbox; 1207 int num_eth_ports, err; 1208 int i; 1209 1210 if (slave < 0 || slave > dev->persist->num_vfs) 1211 return; 1212 1213 actv_ports = mlx4_get_active_ports(dev, slave); 1214 1215 for (i = 0, num_eth_ports = 0; i < dev->caps.num_ports; i++) { 1216 if (test_bit(i, actv_ports.ports)) { 1217 if (dev->caps.port_type[i + 1] != MLX4_PORT_TYPE_ETH) 1218 continue; 1219 num_eth_ports++; 1220 } 1221 } 1222 1223 if (!num_eth_ports) 1224 return; 1225 1226 /* have ETH ports. Alloc mailbox for SET_PORT command */ 1227 mailbox = mlx4_alloc_cmd_mailbox(dev); 1228 if (IS_ERR(mailbox)) 1229 return; 1230 1231 for (i = 0; i < dev->caps.num_ports; i++) { 1232 if (test_bit(i, actv_ports.ports)) { 1233 if (dev->caps.port_type[i + 1] != MLX4_PORT_TYPE_ETH) 1234 continue; 1235 err = mlx4_reset_roce_port_gids(dev, slave, i + 1, mailbox); 1236 if (err) 1237 mlx4_warn(dev, "Could not reset ETH port GID table for slave %d, port %d (%d)\n", 1238 slave, i + 1, err); 1239 } 1240 } 1241 1242 mlx4_free_cmd_mailbox(dev, mailbox); 1243 return; 1244 } 1245 1246 static void 1247 mlx4_en_set_port_mtu(struct mlx4_dev *dev, int slave, int port, 1248 struct mlx4_set_port_general_context *gen_context) 1249 { 1250 struct mlx4_priv *priv = mlx4_priv(dev); 1251 struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master; 1252 struct mlx4_slave_state *slave_st = &master->slave_state[slave]; 1253 u16 mtu, prev_mtu; 1254 1255 /* Mtu is configured as the max USER_MTU among all 1256 * the functions on the port. 1257 */ 1258 mtu = be16_to_cpu(gen_context->mtu); 1259 mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port] + 1260 ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); 1261 prev_mtu = slave_st->mtu[port]; 1262 slave_st->mtu[port] = mtu; 1263 if (mtu > master->max_mtu[port]) 1264 master->max_mtu[port] = mtu; 1265 if (mtu < prev_mtu && prev_mtu == master->max_mtu[port]) { 1266 int i; 1267 1268 slave_st->mtu[port] = mtu; 1269 master->max_mtu[port] = mtu; 1270 for (i = 0; i < dev->num_slaves; i++) 1271 master->max_mtu[port] = 1272 max_t(u16, master->max_mtu[port], 1273 master->slave_state[i].mtu[port]); 1274 } 1275 gen_context->mtu = cpu_to_be16(master->max_mtu[port]); 1276 } 1277 1278 static void 1279 mlx4_en_set_port_user_mtu(struct mlx4_dev *dev, int slave, int port, 1280 struct mlx4_set_port_general_context *gen_context) 1281 { 1282 struct mlx4_priv *priv = mlx4_priv(dev); 1283 struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master; 1284 struct mlx4_slave_state *slave_st = &master->slave_state[slave]; 1285 u16 user_mtu, prev_user_mtu; 1286 1287 /* User Mtu is configured as the max USER_MTU among all 1288 * the functions on the port. 1289 */ 1290 user_mtu = be16_to_cpu(gen_context->user_mtu); 1291 user_mtu = min_t(int, user_mtu, dev->caps.eth_mtu_cap[port]); 1292 prev_user_mtu = slave_st->user_mtu[port]; 1293 slave_st->user_mtu[port] = user_mtu; 1294 if (user_mtu > master->max_user_mtu[port]) 1295 master->max_user_mtu[port] = user_mtu; 1296 if (user_mtu < prev_user_mtu && 1297 prev_user_mtu == master->max_user_mtu[port]) { 1298 int i; 1299 1300 slave_st->user_mtu[port] = user_mtu; 1301 master->max_user_mtu[port] = user_mtu; 1302 for (i = 0; i < dev->num_slaves; i++) 1303 master->max_user_mtu[port] = 1304 max_t(u16, master->max_user_mtu[port], 1305 master->slave_state[i].user_mtu[port]); 1306 } 1307 gen_context->user_mtu = cpu_to_be16(master->max_user_mtu[port]); 1308 } 1309 1310 static void 1311 mlx4_en_set_port_global_pause(struct mlx4_dev *dev, int slave, 1312 struct mlx4_set_port_general_context *gen_context) 1313 { 1314 struct mlx4_priv *priv = mlx4_priv(dev); 1315 struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master; 1316 1317 /* Slave cannot change Global Pause configuration */ 1318 if (slave != mlx4_master_func_num(dev) && 1319 (gen_context->pptx != master->pptx || 1320 gen_context->pprx != master->pprx)) { 1321 gen_context->pptx = master->pptx; 1322 gen_context->pprx = master->pprx; 1323 mlx4_warn(dev, "denying Global Pause change for slave:%d\n", 1324 slave); 1325 } else { 1326 master->pptx = gen_context->pptx; 1327 master->pprx = gen_context->pprx; 1328 } 1329 } 1330 1331 static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod, 1332 u8 op_mod, struct mlx4_cmd_mailbox *inbox) 1333 { 1334 struct mlx4_priv *priv = mlx4_priv(dev); 1335 struct mlx4_port_info *port_info; 1336 struct mlx4_set_port_rqp_calc_context *qpn_context; 1337 struct mlx4_set_port_general_context *gen_context; 1338 struct mlx4_roce_gid_entry *gid_entry_tbl, *gid_entry_mbox, *gid_entry_mb1; 1339 int reset_qkey_viols; 1340 int port; 1341 int is_eth; 1342 int num_gids; 1343 int base; 1344 u32 in_modifier; 1345 u32 promisc; 1346 int err; 1347 int i, j; 1348 int offset; 1349 __be32 agg_cap_mask; 1350 __be32 slave_cap_mask; 1351 __be32 new_cap_mask; 1352 1353 port = in_mod & 0xff; 1354 in_modifier = in_mod >> 8; 1355 is_eth = op_mod; 1356 port_info = &priv->port[port]; 1357 1358 /* Slaves cannot perform SET_PORT operations, 1359 * except for changing MTU and USER_MTU. 1360 */ 1361 if (is_eth) { 1362 if (slave != dev->caps.function && 1363 in_modifier != MLX4_SET_PORT_GENERAL && 1364 in_modifier != MLX4_SET_PORT_GID_TABLE) { 1365 mlx4_warn(dev, "denying SET_PORT for slave:%d\n", 1366 slave); 1367 return -EINVAL; 1368 } 1369 switch (in_modifier) { 1370 case MLX4_SET_PORT_RQP_CALC: 1371 qpn_context = inbox->buf; 1372 qpn_context->base_qpn = 1373 cpu_to_be32(port_info->base_qpn); 1374 qpn_context->n_mac = 0x7; 1375 promisc = be32_to_cpu(qpn_context->promisc) >> 1376 SET_PORT_PROMISC_SHIFT; 1377 qpn_context->promisc = cpu_to_be32( 1378 promisc << SET_PORT_PROMISC_SHIFT | 1379 port_info->base_qpn); 1380 promisc = be32_to_cpu(qpn_context->mcast) >> 1381 SET_PORT_MC_PROMISC_SHIFT; 1382 qpn_context->mcast = cpu_to_be32( 1383 promisc << SET_PORT_MC_PROMISC_SHIFT | 1384 port_info->base_qpn); 1385 break; 1386 case MLX4_SET_PORT_GENERAL: 1387 gen_context = inbox->buf; 1388 1389 if (gen_context->flags & MLX4_FLAG_V_MTU_MASK) 1390 mlx4_en_set_port_mtu(dev, slave, port, 1391 gen_context); 1392 1393 if (gen_context->flags2 & MLX4_FLAG2_V_USER_MTU_MASK) 1394 mlx4_en_set_port_user_mtu(dev, slave, port, 1395 gen_context); 1396 1397 if (gen_context->flags & 1398 (MLX4_FLAG_V_PPRX_MASK | MLX4_FLAG_V_PPTX_MASK)) 1399 mlx4_en_set_port_global_pause(dev, slave, 1400 gen_context); 1401 1402 break; 1403 case MLX4_SET_PORT_GID_TABLE: 1404 /* change to MULTIPLE entries: number of guest's gids 1405 * need a FOR-loop here over number of gids the guest has. 1406 * 1. Check no duplicates in gids passed by slave 1407 */ 1408 num_gids = mlx4_get_slave_num_gids(dev, slave, port); 1409 base = mlx4_get_base_gid_ix(dev, slave, port); 1410 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); 1411 for (i = 0; i < num_gids; gid_entry_mbox++, i++) { 1412 if (!memcmp(gid_entry_mbox->raw, zgid_entry.raw, 1413 sizeof(zgid_entry))) 1414 continue; 1415 gid_entry_mb1 = gid_entry_mbox + 1; 1416 for (j = i + 1; j < num_gids; gid_entry_mb1++, j++) { 1417 if (!memcmp(gid_entry_mb1->raw, 1418 zgid_entry.raw, sizeof(zgid_entry))) 1419 continue; 1420 if (!memcmp(gid_entry_mb1->raw, gid_entry_mbox->raw, 1421 sizeof(gid_entry_mbox->raw))) { 1422 /* found duplicate */ 1423 return -EINVAL; 1424 } 1425 } 1426 } 1427 1428 /* 2. Check that do not have duplicates in OTHER 1429 * entries in the port GID table 1430 */ 1431 1432 mutex_lock(&(priv->port[port].gid_table.mutex)); 1433 for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) { 1434 if (i >= base && i < base + num_gids) 1435 continue; /* don't compare to slave's current gids */ 1436 gid_entry_tbl = &priv->port[port].gid_table.roce_gids[i]; 1437 if (!memcmp(gid_entry_tbl->raw, zgid_entry.raw, sizeof(zgid_entry))) 1438 continue; 1439 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); 1440 for (j = 0; j < num_gids; gid_entry_mbox++, j++) { 1441 if (!memcmp(gid_entry_mbox->raw, zgid_entry.raw, 1442 sizeof(zgid_entry))) 1443 continue; 1444 if (!memcmp(gid_entry_mbox->raw, gid_entry_tbl->raw, 1445 sizeof(gid_entry_tbl->raw))) { 1446 /* found duplicate */ 1447 mlx4_warn(dev, "requested gid entry for slave:%d is a duplicate of gid at index %d\n", 1448 slave, i); 1449 mutex_unlock(&(priv->port[port].gid_table.mutex)); 1450 return -EINVAL; 1451 } 1452 } 1453 } 1454 1455 /* insert slave GIDs with memcpy, starting at slave's base index */ 1456 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); 1457 for (i = 0, offset = base; i < num_gids; gid_entry_mbox++, offset++, i++) 1458 memcpy(priv->port[port].gid_table.roce_gids[offset].raw, 1459 gid_entry_mbox->raw, MLX4_ROCE_GID_ENTRY_SIZE); 1460 1461 /* Now, copy roce port gids table to current mailbox for passing to FW */ 1462 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); 1463 for (i = 0; i < MLX4_ROCE_MAX_GIDS; gid_entry_mbox++, i++) 1464 memcpy(gid_entry_mbox->raw, 1465 priv->port[port].gid_table.roce_gids[i].raw, 1466 MLX4_ROCE_GID_ENTRY_SIZE); 1467 1468 err = mlx4_cmd(dev, inbox->dma, in_mod & 0xffff, op_mod, 1469 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1470 MLX4_CMD_NATIVE); 1471 mutex_unlock(&(priv->port[port].gid_table.mutex)); 1472 return err; 1473 } 1474 1475 return mlx4_cmd(dev, inbox->dma, in_mod & 0xffff, op_mod, 1476 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1477 MLX4_CMD_NATIVE); 1478 } 1479 1480 /* Slaves are not allowed to SET_PORT beacon (LED) blink */ 1481 if (op_mod == MLX4_SET_PORT_BEACON_OPCODE) { 1482 mlx4_warn(dev, "denying SET_PORT Beacon slave:%d\n", slave); 1483 return -EPERM; 1484 } 1485 1486 /* For IB, we only consider: 1487 * - The capability mask, which is set to the aggregate of all 1488 * slave function capabilities 1489 * - The QKey violatin counter - reset according to each request. 1490 */ 1491 1492 if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 1493 reset_qkey_viols = (*(u8 *) inbox->buf) & 0x40; 1494 new_cap_mask = ((__be32 *) inbox->buf)[2]; 1495 } else { 1496 reset_qkey_viols = ((u8 *) inbox->buf)[3] & 0x1; 1497 new_cap_mask = ((__be32 *) inbox->buf)[1]; 1498 } 1499 1500 /* slave may not set the IS_SM capability for the port */ 1501 if (slave != mlx4_master_func_num(dev) && 1502 (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_IS_SM)) 1503 return -EINVAL; 1504 1505 /* No DEV_MGMT in multifunc mode */ 1506 if (mlx4_is_mfunc(dev) && 1507 (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_DEV_MGMT_SUP)) 1508 return -EINVAL; 1509 1510 agg_cap_mask = 0; 1511 slave_cap_mask = 1512 priv->mfunc.master.slave_state[slave].ib_cap_mask[port]; 1513 priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = new_cap_mask; 1514 for (i = 0; i < dev->num_slaves; i++) 1515 agg_cap_mask |= 1516 priv->mfunc.master.slave_state[i].ib_cap_mask[port]; 1517 1518 /* only clear mailbox for guests. Master may be setting 1519 * MTU or PKEY table size 1520 */ 1521 if (slave != dev->caps.function) 1522 memset(inbox->buf, 0, 256); 1523 if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 1524 *(u8 *) inbox->buf |= !!reset_qkey_viols << 6; 1525 ((__be32 *) inbox->buf)[2] = agg_cap_mask; 1526 } else { 1527 ((u8 *) inbox->buf)[3] |= !!reset_qkey_viols; 1528 ((__be32 *) inbox->buf)[1] = agg_cap_mask; 1529 } 1530 1531 err = mlx4_cmd(dev, inbox->dma, port, is_eth, MLX4_CMD_SET_PORT, 1532 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); 1533 if (err) 1534 priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = 1535 slave_cap_mask; 1536 return err; 1537 } 1538 1539 int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave, 1540 struct mlx4_vhcr *vhcr, 1541 struct mlx4_cmd_mailbox *inbox, 1542 struct mlx4_cmd_mailbox *outbox, 1543 struct mlx4_cmd_info *cmd) 1544 { 1545 int port = mlx4_slave_convert_port( 1546 dev, slave, vhcr->in_modifier & 0xFF); 1547 1548 if (port < 0) 1549 return -EINVAL; 1550 1551 vhcr->in_modifier = (vhcr->in_modifier & ~0xFF) | 1552 (port & 0xFF); 1553 1554 return mlx4_common_set_port(dev, slave, vhcr->in_modifier, 1555 vhcr->op_modifier, inbox); 1556 } 1557 1558 /* bit locations for set port command with zero op modifier */ 1559 enum { 1560 MLX4_SET_PORT_VL_CAP = 4, /* bits 7:4 */ 1561 MLX4_SET_PORT_MTU_CAP = 12, /* bits 15:12 */ 1562 MLX4_CHANGE_PORT_PKEY_TBL_SZ = 20, 1563 MLX4_CHANGE_PORT_VL_CAP = 21, 1564 MLX4_CHANGE_PORT_MTU_CAP = 22, 1565 }; 1566 1567 int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz) 1568 { 1569 struct mlx4_cmd_mailbox *mailbox; 1570 int err, vl_cap, pkey_tbl_flag = 0; 1571 1572 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) 1573 return 0; 1574 1575 mailbox = mlx4_alloc_cmd_mailbox(dev); 1576 if (IS_ERR(mailbox)) 1577 return PTR_ERR(mailbox); 1578 1579 ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port]; 1580 1581 if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) { 1582 pkey_tbl_flag = 1; 1583 ((__be16 *) mailbox->buf)[20] = cpu_to_be16(pkey_tbl_sz); 1584 } 1585 1586 /* IB VL CAP enum isn't used by the firmware, just numerical values */ 1587 for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) { 1588 ((__be32 *) mailbox->buf)[0] = cpu_to_be32( 1589 (1 << MLX4_CHANGE_PORT_MTU_CAP) | 1590 (1 << MLX4_CHANGE_PORT_VL_CAP) | 1591 (pkey_tbl_flag << MLX4_CHANGE_PORT_PKEY_TBL_SZ) | 1592 (dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) | 1593 (vl_cap << MLX4_SET_PORT_VL_CAP)); 1594 err = mlx4_cmd(dev, mailbox->dma, port, 1595 MLX4_SET_PORT_IB_OPCODE, MLX4_CMD_SET_PORT, 1596 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); 1597 if (err != -ENOMEM) 1598 break; 1599 } 1600 1601 mlx4_free_cmd_mailbox(dev, mailbox); 1602 return err; 1603 } 1604 1605 #define SET_PORT_ROCE_2_FLAGS 0x10 1606 #define MLX4_SET_PORT_ROCE_V1_V2 0x2 1607 int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, 1608 u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx) 1609 { 1610 struct mlx4_cmd_mailbox *mailbox; 1611 struct mlx4_set_port_general_context *context; 1612 int err; 1613 u32 in_mod; 1614 1615 mailbox = mlx4_alloc_cmd_mailbox(dev); 1616 if (IS_ERR(mailbox)) 1617 return PTR_ERR(mailbox); 1618 context = mailbox->buf; 1619 context->flags = SET_PORT_GEN_ALL_VALID; 1620 context->mtu = cpu_to_be16(mtu); 1621 context->pptx = (pptx * (!pfctx)) << 7; 1622 context->pfctx = pfctx; 1623 context->pprx = (pprx * (!pfcrx)) << 7; 1624 context->pfcrx = pfcrx; 1625 1626 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 1627 context->flags |= SET_PORT_ROCE_2_FLAGS; 1628 context->roce_mode |= 1629 MLX4_SET_PORT_ROCE_V1_V2 << 4; 1630 } 1631 in_mod = MLX4_SET_PORT_GENERAL << 8 | port; 1632 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 1633 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1634 MLX4_CMD_WRAPPED); 1635 1636 mlx4_free_cmd_mailbox(dev, mailbox); 1637 return err; 1638 } 1639 EXPORT_SYMBOL(mlx4_SET_PORT_general); 1640 1641 int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, 1642 u8 promisc) 1643 { 1644 struct mlx4_cmd_mailbox *mailbox; 1645 struct mlx4_set_port_rqp_calc_context *context; 1646 int err; 1647 u32 in_mod; 1648 u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ? 1649 MCAST_DIRECT : MCAST_DEFAULT; 1650 1651 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 1652 return 0; 1653 1654 mailbox = mlx4_alloc_cmd_mailbox(dev); 1655 if (IS_ERR(mailbox)) 1656 return PTR_ERR(mailbox); 1657 context = mailbox->buf; 1658 context->base_qpn = cpu_to_be32(base_qpn); 1659 context->n_mac = dev->caps.log_num_macs; 1660 context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT | 1661 base_qpn); 1662 context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT | 1663 base_qpn); 1664 context->intra_no_vlan = 0; 1665 context->no_vlan = MLX4_NO_VLAN_IDX; 1666 context->intra_vlan_miss = 0; 1667 context->vlan_miss = MLX4_VLAN_MISS_IDX; 1668 1669 in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port; 1670 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 1671 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1672 MLX4_CMD_WRAPPED); 1673 1674 mlx4_free_cmd_mailbox(dev, mailbox); 1675 return err; 1676 } 1677 EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc); 1678 1679 int mlx4_SET_PORT_user_mtu(struct mlx4_dev *dev, u8 port, u16 user_mtu) 1680 { 1681 struct mlx4_cmd_mailbox *mailbox; 1682 struct mlx4_set_port_general_context *context; 1683 u32 in_mod; 1684 int err; 1685 1686 mailbox = mlx4_alloc_cmd_mailbox(dev); 1687 if (IS_ERR(mailbox)) 1688 return PTR_ERR(mailbox); 1689 context = mailbox->buf; 1690 context->flags2 |= MLX4_FLAG2_V_USER_MTU_MASK; 1691 context->user_mtu = cpu_to_be16(user_mtu); 1692 1693 in_mod = MLX4_SET_PORT_GENERAL << 8 | port; 1694 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 1695 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1696 MLX4_CMD_WRAPPED); 1697 1698 mlx4_free_cmd_mailbox(dev, mailbox); 1699 return err; 1700 } 1701 EXPORT_SYMBOL(mlx4_SET_PORT_user_mtu); 1702 1703 int mlx4_SET_PORT_fcs_check(struct mlx4_dev *dev, u8 port, u8 ignore_fcs_value) 1704 { 1705 struct mlx4_cmd_mailbox *mailbox; 1706 struct mlx4_set_port_general_context *context; 1707 u32 in_mod; 1708 int err; 1709 1710 mailbox = mlx4_alloc_cmd_mailbox(dev); 1711 if (IS_ERR(mailbox)) 1712 return PTR_ERR(mailbox); 1713 context = mailbox->buf; 1714 context->flags2 |= MLX4_FLAG2_V_IGNORE_FCS_MASK; 1715 if (ignore_fcs_value) 1716 context->ignore_fcs |= MLX4_IGNORE_FCS_MASK; 1717 else 1718 context->ignore_fcs &= ~MLX4_IGNORE_FCS_MASK; 1719 1720 in_mod = MLX4_SET_PORT_GENERAL << 8 | port; 1721 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, 1722 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); 1723 1724 mlx4_free_cmd_mailbox(dev, mailbox); 1725 return err; 1726 } 1727 EXPORT_SYMBOL(mlx4_SET_PORT_fcs_check); 1728 1729 enum { 1730 VXLAN_ENABLE_MODIFY = 1 << 7, 1731 VXLAN_STEERING_MODIFY = 1 << 6, 1732 1733 VXLAN_ENABLE = 1 << 7, 1734 }; 1735 1736 struct mlx4_set_port_vxlan_context { 1737 u32 reserved1; 1738 u8 modify_flags; 1739 u8 reserved2; 1740 u8 enable_flags; 1741 u8 steering; 1742 }; 1743 1744 int mlx4_SET_PORT_VXLAN(struct mlx4_dev *dev, u8 port, u8 steering, int enable) 1745 { 1746 int err; 1747 u32 in_mod; 1748 struct mlx4_cmd_mailbox *mailbox; 1749 struct mlx4_set_port_vxlan_context *context; 1750 1751 mailbox = mlx4_alloc_cmd_mailbox(dev); 1752 if (IS_ERR(mailbox)) 1753 return PTR_ERR(mailbox); 1754 context = mailbox->buf; 1755 memset(context, 0, sizeof(*context)); 1756 1757 context->modify_flags = VXLAN_ENABLE_MODIFY | VXLAN_STEERING_MODIFY; 1758 if (enable) 1759 context->enable_flags = VXLAN_ENABLE; 1760 context->steering = steering; 1761 1762 in_mod = MLX4_SET_PORT_VXLAN << 8 | port; 1763 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 1764 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1765 MLX4_CMD_NATIVE); 1766 1767 mlx4_free_cmd_mailbox(dev, mailbox); 1768 return err; 1769 } 1770 EXPORT_SYMBOL(mlx4_SET_PORT_VXLAN); 1771 1772 int mlx4_SET_PORT_BEACON(struct mlx4_dev *dev, u8 port, u16 time) 1773 { 1774 int err; 1775 struct mlx4_cmd_mailbox *mailbox; 1776 1777 mailbox = mlx4_alloc_cmd_mailbox(dev); 1778 if (IS_ERR(mailbox)) 1779 return PTR_ERR(mailbox); 1780 1781 *((__be32 *)mailbox->buf) = cpu_to_be32(time); 1782 1783 err = mlx4_cmd(dev, mailbox->dma, port, MLX4_SET_PORT_BEACON_OPCODE, 1784 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1785 MLX4_CMD_NATIVE); 1786 1787 mlx4_free_cmd_mailbox(dev, mailbox); 1788 return err; 1789 } 1790 EXPORT_SYMBOL(mlx4_SET_PORT_BEACON); 1791 1792 int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave, 1793 struct mlx4_vhcr *vhcr, 1794 struct mlx4_cmd_mailbox *inbox, 1795 struct mlx4_cmd_mailbox *outbox, 1796 struct mlx4_cmd_info *cmd) 1797 { 1798 int err = 0; 1799 1800 return err; 1801 } 1802 1803 int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, 1804 u64 mac, u64 clear, u8 mode) 1805 { 1806 return mlx4_cmd(dev, (mac | (clear << 63)), port, mode, 1807 MLX4_CMD_SET_MCAST_FLTR, MLX4_CMD_TIME_CLASS_B, 1808 MLX4_CMD_WRAPPED); 1809 } 1810 EXPORT_SYMBOL(mlx4_SET_MCAST_FLTR); 1811 1812 int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave, 1813 struct mlx4_vhcr *vhcr, 1814 struct mlx4_cmd_mailbox *inbox, 1815 struct mlx4_cmd_mailbox *outbox, 1816 struct mlx4_cmd_info *cmd) 1817 { 1818 int err = 0; 1819 1820 return err; 1821 } 1822 1823 int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave, 1824 struct mlx4_vhcr *vhcr, 1825 struct mlx4_cmd_mailbox *inbox, 1826 struct mlx4_cmd_mailbox *outbox, 1827 struct mlx4_cmd_info *cmd) 1828 { 1829 return 0; 1830 } 1831 1832 int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid, 1833 int *slave_id) 1834 { 1835 struct mlx4_priv *priv = mlx4_priv(dev); 1836 int i, found_ix = -1; 1837 int vf_gids = MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS; 1838 struct mlx4_slaves_pport slaves_pport; 1839 unsigned num_vfs; 1840 int slave_gid; 1841 1842 if (!mlx4_is_mfunc(dev)) 1843 return -EINVAL; 1844 1845 slaves_pport = mlx4_phys_to_slaves_pport(dev, port); 1846 num_vfs = bitmap_weight(slaves_pport.slaves, 1847 dev->persist->num_vfs + 1) - 1; 1848 1849 for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) { 1850 if (!memcmp(priv->port[port].gid_table.roce_gids[i].raw, gid, 1851 MLX4_ROCE_GID_ENTRY_SIZE)) { 1852 found_ix = i; 1853 break; 1854 } 1855 } 1856 1857 if (found_ix >= 0) { 1858 /* Calculate a slave_gid which is the slave number in the gid 1859 * table and not a globally unique slave number. 1860 */ 1861 if (found_ix < MLX4_ROCE_PF_GIDS) 1862 slave_gid = 0; 1863 else if (found_ix < MLX4_ROCE_PF_GIDS + (vf_gids % num_vfs) * 1864 (vf_gids / num_vfs + 1)) 1865 slave_gid = ((found_ix - MLX4_ROCE_PF_GIDS) / 1866 (vf_gids / num_vfs + 1)) + 1; 1867 else 1868 slave_gid = 1869 ((found_ix - MLX4_ROCE_PF_GIDS - 1870 ((vf_gids % num_vfs) * ((vf_gids / num_vfs + 1)))) / 1871 (vf_gids / num_vfs)) + vf_gids % num_vfs + 1; 1872 1873 /* Calculate the globally unique slave id */ 1874 if (slave_gid) { 1875 struct mlx4_active_ports exclusive_ports; 1876 struct mlx4_active_ports actv_ports; 1877 struct mlx4_slaves_pport slaves_pport_actv; 1878 unsigned max_port_p_one; 1879 int num_vfs_before = 0; 1880 int candidate_slave_gid; 1881 1882 /* Calculate how many VFs are on the previous port, if exists */ 1883 for (i = 1; i < port; i++) { 1884 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); 1885 set_bit(i - 1, exclusive_ports.ports); 1886 slaves_pport_actv = 1887 mlx4_phys_to_slaves_pport_actv( 1888 dev, &exclusive_ports); 1889 num_vfs_before += bitmap_weight( 1890 slaves_pport_actv.slaves, 1891 dev->persist->num_vfs + 1); 1892 } 1893 1894 /* candidate_slave_gid isn't necessarily the correct slave, but 1895 * it has the same number of ports and is assigned to the same 1896 * ports as the real slave we're looking for. On dual port VF, 1897 * slave_gid = [single port VFs on port <port>] + 1898 * [offset of the current slave from the first dual port VF] + 1899 * 1 (for the PF). 1900 */ 1901 candidate_slave_gid = slave_gid + num_vfs_before; 1902 1903 actv_ports = mlx4_get_active_ports(dev, candidate_slave_gid); 1904 max_port_p_one = find_first_bit( 1905 actv_ports.ports, dev->caps.num_ports) + 1906 bitmap_weight(actv_ports.ports, 1907 dev->caps.num_ports) + 1; 1908 1909 /* Calculate the real slave number */ 1910 for (i = 1; i < max_port_p_one; i++) { 1911 if (i == port) 1912 continue; 1913 bitmap_zero(exclusive_ports.ports, 1914 dev->caps.num_ports); 1915 set_bit(i - 1, exclusive_ports.ports); 1916 slaves_pport_actv = 1917 mlx4_phys_to_slaves_pport_actv( 1918 dev, &exclusive_ports); 1919 slave_gid += bitmap_weight( 1920 slaves_pport_actv.slaves, 1921 dev->persist->num_vfs + 1); 1922 } 1923 } 1924 *slave_id = slave_gid; 1925 } 1926 1927 return (found_ix >= 0) ? 0 : -EINVAL; 1928 } 1929 EXPORT_SYMBOL(mlx4_get_slave_from_roce_gid); 1930 1931 int mlx4_get_roce_gid_from_slave(struct mlx4_dev *dev, int port, int slave_id, 1932 u8 *gid) 1933 { 1934 struct mlx4_priv *priv = mlx4_priv(dev); 1935 1936 if (!mlx4_is_master(dev)) 1937 return -EINVAL; 1938 1939 memcpy(gid, priv->port[port].gid_table.roce_gids[slave_id].raw, 1940 MLX4_ROCE_GID_ENTRY_SIZE); 1941 return 0; 1942 } 1943 EXPORT_SYMBOL(mlx4_get_roce_gid_from_slave); 1944 1945 /* Cable Module Info */ 1946 #define MODULE_INFO_MAX_READ 48 1947 1948 #define I2C_ADDR_LOW 0x50 1949 #define I2C_ADDR_HIGH 0x51 1950 #define I2C_PAGE_SIZE 256 1951 1952 /* Module Info Data */ 1953 struct mlx4_cable_info { 1954 u8 i2c_addr; 1955 u8 page_num; 1956 __be16 dev_mem_address; 1957 __be16 reserved1; 1958 __be16 size; 1959 __be32 reserved2[2]; 1960 u8 data[MODULE_INFO_MAX_READ]; 1961 }; 1962 1963 enum cable_info_err { 1964 CABLE_INF_INV_PORT = 0x1, 1965 CABLE_INF_OP_NOSUP = 0x2, 1966 CABLE_INF_NOT_CONN = 0x3, 1967 CABLE_INF_NO_EEPRM = 0x4, 1968 CABLE_INF_PAGE_ERR = 0x5, 1969 CABLE_INF_INV_ADDR = 0x6, 1970 CABLE_INF_I2C_ADDR = 0x7, 1971 CABLE_INF_QSFP_VIO = 0x8, 1972 CABLE_INF_I2C_BUSY = 0x9, 1973 }; 1974 1975 #define MAD_STATUS_2_CABLE_ERR(mad_status) ((mad_status >> 8) & 0xFF) 1976 1977 static inline const char *cable_info_mad_err_str(u16 mad_status) 1978 { 1979 u8 err = MAD_STATUS_2_CABLE_ERR(mad_status); 1980 1981 switch (err) { 1982 case CABLE_INF_INV_PORT: 1983 return "invalid port selected"; 1984 case CABLE_INF_OP_NOSUP: 1985 return "operation not supported for this port (the port is of type CX4 or internal)"; 1986 case CABLE_INF_NOT_CONN: 1987 return "cable is not connected"; 1988 case CABLE_INF_NO_EEPRM: 1989 return "the connected cable has no EPROM (passive copper cable)"; 1990 case CABLE_INF_PAGE_ERR: 1991 return "page number is greater than 15"; 1992 case CABLE_INF_INV_ADDR: 1993 return "invalid device_address or size (that is, size equals 0 or address+size is greater than 256)"; 1994 case CABLE_INF_I2C_ADDR: 1995 return "invalid I2C slave address"; 1996 case CABLE_INF_QSFP_VIO: 1997 return "at least one cable violates the QSFP specification and ignores the modsel signal"; 1998 case CABLE_INF_I2C_BUSY: 1999 return "I2C bus is constantly busy"; 2000 } 2001 return "Unknown Error"; 2002 } 2003 2004 /** 2005 * mlx4_get_module_info - Read cable module eeprom data 2006 * @dev: mlx4_dev. 2007 * @port: port number. 2008 * @offset: byte offset in eeprom to start reading data from. 2009 * @size: num of bytes to read. 2010 * @data: output buffer to put the requested data into. 2011 * 2012 * Reads cable module eeprom data, puts the outcome data into 2013 * data pointer paramer. 2014 * Returns num of read bytes on success or a negative error 2015 * code. 2016 */ 2017 int mlx4_get_module_info(struct mlx4_dev *dev, u8 port, 2018 u16 offset, u16 size, u8 *data) 2019 { 2020 struct mlx4_cmd_mailbox *inbox, *outbox; 2021 struct mlx4_mad_ifc *inmad, *outmad; 2022 struct mlx4_cable_info *cable_info; 2023 u16 i2c_addr; 2024 int ret; 2025 2026 if (size > MODULE_INFO_MAX_READ) 2027 size = MODULE_INFO_MAX_READ; 2028 2029 inbox = mlx4_alloc_cmd_mailbox(dev); 2030 if (IS_ERR(inbox)) 2031 return PTR_ERR(inbox); 2032 2033 outbox = mlx4_alloc_cmd_mailbox(dev); 2034 if (IS_ERR(outbox)) { 2035 mlx4_free_cmd_mailbox(dev, inbox); 2036 return PTR_ERR(outbox); 2037 } 2038 2039 inmad = (struct mlx4_mad_ifc *)(inbox->buf); 2040 outmad = (struct mlx4_mad_ifc *)(outbox->buf); 2041 2042 inmad->method = 0x1; /* Get */ 2043 inmad->class_version = 0x1; 2044 inmad->mgmt_class = 0x1; 2045 inmad->base_version = 0x1; 2046 inmad->attr_id = cpu_to_be16(0xFF60); /* Module Info */ 2047 2048 if (offset < I2C_PAGE_SIZE && offset + size > I2C_PAGE_SIZE) 2049 /* Cross pages reads are not allowed 2050 * read until offset 256 in low page 2051 */ 2052 size -= offset + size - I2C_PAGE_SIZE; 2053 2054 i2c_addr = I2C_ADDR_LOW; 2055 if (offset >= I2C_PAGE_SIZE) { 2056 /* Reset offset to high page */ 2057 i2c_addr = I2C_ADDR_HIGH; 2058 offset -= I2C_PAGE_SIZE; 2059 } 2060 2061 cable_info = (struct mlx4_cable_info *)inmad->data; 2062 cable_info->dev_mem_address = cpu_to_be16(offset); 2063 cable_info->page_num = 0; 2064 cable_info->i2c_addr = i2c_addr; 2065 cable_info->size = cpu_to_be16(size); 2066 2067 ret = mlx4_cmd_box(dev, inbox->dma, outbox->dma, port, 3, 2068 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, 2069 MLX4_CMD_NATIVE); 2070 if (ret) 2071 goto out; 2072 2073 if (be16_to_cpu(outmad->status)) { 2074 /* Mad returned with bad status */ 2075 ret = be16_to_cpu(outmad->status); 2076 mlx4_warn(dev, 2077 "MLX4_CMD_MAD_IFC Get Module info attr(%x) port(%d) i2c_addr(%x) offset(%d) size(%d): Response Mad Status(%x) - %s\n", 2078 0xFF60, port, i2c_addr, offset, size, 2079 ret, cable_info_mad_err_str(ret)); 2080 2081 if (i2c_addr == I2C_ADDR_HIGH && 2082 MAD_STATUS_2_CABLE_ERR(ret) == CABLE_INF_I2C_ADDR) 2083 /* Some SFP cables do not support i2c slave 2084 * address 0x51 (high page), abort silently. 2085 */ 2086 ret = 0; 2087 else 2088 ret = -ret; 2089 goto out; 2090 } 2091 cable_info = (struct mlx4_cable_info *)outmad->data; 2092 memcpy(data, cable_info->data, size); 2093 ret = size; 2094 out: 2095 mlx4_free_cmd_mailbox(dev, inbox); 2096 mlx4_free_cmd_mailbox(dev, outbox); 2097 return ret; 2098 } 2099 EXPORT_SYMBOL(mlx4_get_module_info); 2100 2101 int mlx4_max_tc(struct mlx4_dev *dev) 2102 { 2103 u8 num_tc = dev->caps.max_tc_eth; 2104 2105 if (!num_tc) 2106 num_tc = MLX4_TC_MAX_NUMBER; 2107 2108 return num_tc; 2109 } 2110 EXPORT_SYMBOL(mlx4_max_tc); 2111