1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _MLX4_STATS_ 3 #define _MLX4_STATS_ 4 5 #ifdef MLX4_EN_PERF_STAT 6 #define NUM_PERF_STATS NUM_PERF_COUNTERS 7 #else 8 #define NUM_PERF_STATS 0 9 #endif 10 11 #define NUM_PRIORITIES 9 12 #define NUM_PRIORITY_STATS 2 13 14 struct mlx4_en_pkt_stats { 15 unsigned long rx_multicast_packets; 16 unsigned long rx_broadcast_packets; 17 unsigned long rx_jabbers; 18 unsigned long rx_in_range_length_error; 19 unsigned long rx_out_range_length_error; 20 unsigned long tx_multicast_packets; 21 unsigned long tx_broadcast_packets; 22 unsigned long rx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS]; 23 unsigned long tx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS]; 24 #define NUM_PKT_STATS 43 25 }; 26 27 struct mlx4_en_counter_stats { 28 unsigned long rx_packets; 29 unsigned long rx_bytes; 30 unsigned long tx_packets; 31 unsigned long tx_bytes; 32 #define NUM_PF_STATS 4 33 }; 34 35 struct mlx4_en_port_stats { 36 unsigned long tso_packets; 37 unsigned long xmit_more; 38 unsigned long queue_stopped; 39 unsigned long wake_queue; 40 unsigned long tx_timeout; 41 unsigned long rx_alloc_pages; 42 unsigned long rx_chksum_good; 43 unsigned long rx_chksum_none; 44 unsigned long rx_chksum_complete; 45 unsigned long tx_chksum_offload; 46 #define NUM_PORT_STATS 10 47 }; 48 49 struct mlx4_en_perf_stats { 50 u32 tx_poll; 51 u64 tx_pktsz_avg; 52 u32 inflight_avg; 53 u16 tx_coal_avg; 54 u16 rx_coal_avg; 55 u32 napi_quota; 56 #define NUM_PERF_COUNTERS 6 57 }; 58 59 struct mlx4_en_xdp_stats { 60 unsigned long rx_xdp_drop; 61 unsigned long rx_xdp_tx; 62 unsigned long rx_xdp_tx_full; 63 #define NUM_XDP_STATS 3 64 }; 65 66 struct mlx4_en_phy_stats { 67 unsigned long rx_packets_phy; 68 unsigned long rx_bytes_phy; 69 unsigned long tx_packets_phy; 70 unsigned long tx_bytes_phy; 71 #define NUM_PHY_STATS 4 72 }; 73 74 #define NUM_MAIN_STATS 21 75 76 #define MLX4_NUM_PRIORITIES 8 77 78 struct mlx4_en_flow_stats_rx { 79 u64 rx_pause; 80 u64 rx_pause_duration; 81 u64 rx_pause_transition; 82 #define NUM_FLOW_STATS_RX 3 83 #define NUM_FLOW_PRIORITY_STATS_RX (NUM_FLOW_STATS_RX * \ 84 MLX4_NUM_PRIORITIES) 85 }; 86 87 struct mlx4_en_flow_stats_tx { 88 u64 tx_pause; 89 u64 tx_pause_duration; 90 u64 tx_pause_transition; 91 #define NUM_FLOW_STATS_TX 3 92 #define NUM_FLOW_PRIORITY_STATS_TX (NUM_FLOW_STATS_TX * \ 93 MLX4_NUM_PRIORITIES) 94 }; 95 96 #define NUM_FLOW_STATS (NUM_FLOW_STATS_RX + NUM_FLOW_STATS_TX + \ 97 NUM_FLOW_PRIORITY_STATS_TX + \ 98 NUM_FLOW_PRIORITY_STATS_RX) 99 100 struct mlx4_en_stat_out_flow_control_mbox { 101 /* Total number of PAUSE frames received from the far-end port */ 102 __be64 rx_pause; 103 /* Total number of microseconds that far-end port requested to pause 104 * transmission of packets 105 */ 106 __be64 rx_pause_duration; 107 /* Number of received transmission from XOFF state to XON state */ 108 __be64 rx_pause_transition; 109 /* Total number of PAUSE frames sent from the far-end port */ 110 __be64 tx_pause; 111 /* Total time in microseconds that transmission of packets has been 112 * paused 113 */ 114 __be64 tx_pause_duration; 115 /* Number of transmitter transitions from XOFF state to XON state */ 116 __be64 tx_pause_transition; 117 /* Reserverd */ 118 __be64 reserved[2]; 119 }; 120 121 enum { 122 MLX4_DUMP_ETH_STATS_FLOW_CONTROL = 1 << 12 123 }; 124 125 #define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + \ 126 NUM_FLOW_STATS + NUM_PERF_STATS + NUM_PF_STATS + \ 127 NUM_XDP_STATS + NUM_PHY_STATS) 128 129 #define MLX4_FIND_NETDEV_STAT(n) (offsetof(struct net_device_stats, n) / \ 130 sizeof(((struct net_device_stats *)0)->n)) 131 132 #endif 133