1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2b4b6e842SEran Ben Elisha #ifndef _MLX4_STATS_ 3b4b6e842SEran Ben Elisha #define _MLX4_STATS_ 4b4b6e842SEran Ben Elisha 5b4b6e842SEran Ben Elisha #define NUM_PRIORITIES 9 6b4b6e842SEran Ben Elisha #define NUM_PRIORITY_STATS 2 7b4b6e842SEran Ben Elisha 8b4b6e842SEran Ben Elisha struct mlx4_en_pkt_stats { 9a3333b35SEran Ben Elisha unsigned long rx_multicast_packets; 10a3333b35SEran Ben Elisha unsigned long rx_broadcast_packets; 11a3333b35SEran Ben Elisha unsigned long rx_jabbers; 12a3333b35SEran Ben Elisha unsigned long rx_in_range_length_error; 13a3333b35SEran Ben Elisha unsigned long rx_out_range_length_error; 14a3333b35SEran Ben Elisha unsigned long tx_multicast_packets; 15a3333b35SEran Ben Elisha unsigned long tx_broadcast_packets; 16a3333b35SEran Ben Elisha unsigned long rx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS]; 17a3333b35SEran Ben Elisha unsigned long tx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS]; 18a3333b35SEran Ben Elisha #define NUM_PKT_STATS 43 19b4b6e842SEran Ben Elisha }; 20b4b6e842SEran Ben Elisha 21b42de4d0SEran Ben Elisha struct mlx4_en_counter_stats { 22b42de4d0SEran Ben Elisha unsigned long rx_packets; 23b42de4d0SEran Ben Elisha unsigned long rx_bytes; 24b42de4d0SEran Ben Elisha unsigned long tx_packets; 25b42de4d0SEran Ben Elisha unsigned long tx_bytes; 26b42de4d0SEran Ben Elisha #define NUM_PF_STATS 4 27b42de4d0SEran Ben Elisha }; 28b42de4d0SEran Ben Elisha 29b4b6e842SEran Ben Elisha struct mlx4_en_port_stats { 30b4b6e842SEran Ben Elisha unsigned long tso_packets; 31b4b6e842SEran Ben Elisha unsigned long xmit_more; 32b4b6e842SEran Ben Elisha unsigned long queue_stopped; 33b4b6e842SEran Ben Elisha unsigned long wake_queue; 34b4b6e842SEran Ben Elisha unsigned long tx_timeout; 357d7bfc6aSEric Dumazet unsigned long rx_alloc_pages; 36b4b6e842SEran Ben Elisha unsigned long rx_chksum_good; 37b4b6e842SEran Ben Elisha unsigned long rx_chksum_none; 38b4b6e842SEran Ben Elisha unsigned long rx_chksum_complete; 39b4b6e842SEran Ben Elisha unsigned long tx_chksum_offload; 40b4b6e842SEran Ben Elisha #define NUM_PORT_STATS 10 41b4b6e842SEran Ben Elisha }; 42b4b6e842SEran Ben Elisha 4315fca2c8STariq Toukan struct mlx4_en_xdp_stats { 4415fca2c8STariq Toukan unsigned long rx_xdp_drop; 45*dee3b2d0SJoshua Roys unsigned long rx_xdp_redirect; 46*dee3b2d0SJoshua Roys unsigned long rx_xdp_redirect_fail; 4715fca2c8STariq Toukan unsigned long rx_xdp_tx; 4815fca2c8STariq Toukan unsigned long rx_xdp_tx_full; 49*dee3b2d0SJoshua Roys #define NUM_XDP_STATS 5 5015fca2c8STariq Toukan }; 5115fca2c8STariq Toukan 52f26d0d25SEran Ben Elisha struct mlx4_en_phy_stats { 53f26d0d25SEran Ben Elisha unsigned long rx_packets_phy; 54f26d0d25SEran Ben Elisha unsigned long rx_bytes_phy; 55f26d0d25SEran Ben Elisha unsigned long tx_packets_phy; 56f26d0d25SEran Ben Elisha unsigned long tx_bytes_phy; 57f26d0d25SEran Ben Elisha #define NUM_PHY_STATS 4 58f26d0d25SEran Ben Elisha }; 59f26d0d25SEran Ben Elisha 60b4b6e842SEran Ben Elisha #define NUM_MAIN_STATS 21 610b131561SMatan Barak 620b131561SMatan Barak #define MLX4_NUM_PRIORITIES 8 630b131561SMatan Barak 640b131561SMatan Barak struct mlx4_en_flow_stats_rx { 650b131561SMatan Barak u64 rx_pause; 660b131561SMatan Barak u64 rx_pause_duration; 670b131561SMatan Barak u64 rx_pause_transition; 680b131561SMatan Barak #define NUM_FLOW_STATS_RX 3 690b131561SMatan Barak #define NUM_FLOW_PRIORITY_STATS_RX (NUM_FLOW_STATS_RX * \ 700b131561SMatan Barak MLX4_NUM_PRIORITIES) 710b131561SMatan Barak }; 720b131561SMatan Barak 7312d342feSJakub Kicinski #define FLOW_PRIORITY_STATS_IDX_RX_FRAMES (NUM_MAIN_STATS + \ 7412d342feSJakub Kicinski NUM_PORT_STATS + \ 7512d342feSJakub Kicinski NUM_PF_STATS + \ 7612d342feSJakub Kicinski NUM_FLOW_PRIORITY_STATS_RX) 7712d342feSJakub Kicinski 780b131561SMatan Barak struct mlx4_en_flow_stats_tx { 790b131561SMatan Barak u64 tx_pause; 800b131561SMatan Barak u64 tx_pause_duration; 810b131561SMatan Barak u64 tx_pause_transition; 820b131561SMatan Barak #define NUM_FLOW_STATS_TX 3 830b131561SMatan Barak #define NUM_FLOW_PRIORITY_STATS_TX (NUM_FLOW_STATS_TX * \ 840b131561SMatan Barak MLX4_NUM_PRIORITIES) 850b131561SMatan Barak }; 860b131561SMatan Barak 8712d342feSJakub Kicinski #define FLOW_PRIORITY_STATS_IDX_TX_FRAMES (NUM_MAIN_STATS + \ 8812d342feSJakub Kicinski NUM_PORT_STATS + \ 8912d342feSJakub Kicinski NUM_PF_STATS + \ 9012d342feSJakub Kicinski NUM_FLOW_PRIORITY_STATS_RX + \ 9112d342feSJakub Kicinski NUM_FLOW_STATS_RX + \ 9212d342feSJakub Kicinski NUM_FLOW_PRIORITY_STATS_TX) 9312d342feSJakub Kicinski 940b131561SMatan Barak #define NUM_FLOW_STATS (NUM_FLOW_STATS_RX + NUM_FLOW_STATS_TX + \ 950b131561SMatan Barak NUM_FLOW_PRIORITY_STATS_TX + \ 969a2abf5aSEran Ben Elisha NUM_FLOW_PRIORITY_STATS_RX) 970b131561SMatan Barak 980b131561SMatan Barak struct mlx4_en_stat_out_flow_control_mbox { 990b131561SMatan Barak /* Total number of PAUSE frames received from the far-end port */ 1000b131561SMatan Barak __be64 rx_pause; 1010b131561SMatan Barak /* Total number of microseconds that far-end port requested to pause 1020b131561SMatan Barak * transmission of packets 1030b131561SMatan Barak */ 1040b131561SMatan Barak __be64 rx_pause_duration; 1050b131561SMatan Barak /* Number of received transmission from XOFF state to XON state */ 1060b131561SMatan Barak __be64 rx_pause_transition; 1070b131561SMatan Barak /* Total number of PAUSE frames sent from the far-end port */ 1080b131561SMatan Barak __be64 tx_pause; 1090b131561SMatan Barak /* Total time in microseconds that transmission of packets has been 1100b131561SMatan Barak * paused 1110b131561SMatan Barak */ 1120b131561SMatan Barak __be64 tx_pause_duration; 1130b131561SMatan Barak /* Number of transmitter transitions from XOFF state to XON state */ 1140b131561SMatan Barak __be64 tx_pause_transition; 1150b131561SMatan Barak /* Reserverd */ 1160b131561SMatan Barak __be64 reserved[2]; 1170b131561SMatan Barak }; 1180b131561SMatan Barak 1190b131561SMatan Barak enum { 1200b131561SMatan Barak MLX4_DUMP_ETH_STATS_FLOW_CONTROL = 1 << 12 1210b131561SMatan Barak }; 1220b131561SMatan Barak 123b4b6e842SEran Ben Elisha #define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + \ 1241a0058cfSTariq Toukan NUM_FLOW_STATS + NUM_PF_STATS + \ 125f26d0d25SEran Ben Elisha NUM_XDP_STATS + NUM_PHY_STATS) 1266fcd2735SEran Ben Elisha 1276fcd2735SEran Ben Elisha #define MLX4_FIND_NETDEV_STAT(n) (offsetof(struct net_device_stats, n) / \ 1286fcd2735SEran Ben Elisha sizeof(((struct net_device_stats *)0)->n)) 1296fcd2735SEran Ben Elisha 130b4b6e842SEran Ben Elisha #endif 131