1 /* 2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 * 32 */ 33 34 #include <linux/bpf.h> 35 #include <linux/etherdevice.h> 36 #include <linux/tcp.h> 37 #include <linux/if_vlan.h> 38 #include <linux/delay.h> 39 #include <linux/slab.h> 40 #include <linux/hash.h> 41 #include <net/ip.h> 42 #include <net/busy_poll.h> 43 #include <net/vxlan.h> 44 #include <net/devlink.h> 45 46 #include <linux/mlx4/driver.h> 47 #include <linux/mlx4/device.h> 48 #include <linux/mlx4/cmd.h> 49 #include <linux/mlx4/cq.h> 50 51 #include "mlx4_en.h" 52 #include "en_port.h" 53 54 #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \ 55 XDP_PACKET_HEADROOM)) 56 57 int mlx4_en_setup_tc(struct net_device *dev, u8 up) 58 { 59 struct mlx4_en_priv *priv = netdev_priv(dev); 60 int i; 61 unsigned int offset = 0; 62 63 if (up && up != MLX4_EN_NUM_UP_HIGH) 64 return -EINVAL; 65 66 netdev_set_num_tc(dev, up); 67 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 68 /* Partition Tx queues evenly amongst UP's */ 69 for (i = 0; i < up; i++) { 70 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset); 71 offset += priv->num_tx_rings_p_up; 72 } 73 74 #ifdef CONFIG_MLX4_EN_DCB 75 if (!mlx4_is_slave(priv->mdev->dev)) { 76 if (up) { 77 if (priv->dcbx_cap) 78 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED; 79 } else { 80 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED; 81 priv->cee_config.pfc_state = false; 82 } 83 } 84 #endif /* CONFIG_MLX4_EN_DCB */ 85 86 return 0; 87 } 88 89 int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc) 90 { 91 struct mlx4_en_priv *priv = netdev_priv(dev); 92 struct mlx4_en_dev *mdev = priv->mdev; 93 struct mlx4_en_port_profile new_prof; 94 struct mlx4_en_priv *tmp; 95 int port_up = 0; 96 int err = 0; 97 98 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 99 if (!tmp) 100 return -ENOMEM; 101 102 mutex_lock(&mdev->state_lock); 103 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 104 new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW : 105 MLX4_EN_NUM_UP_HIGH; 106 new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up * 107 new_prof.num_up; 108 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true); 109 if (err) 110 goto out; 111 112 if (priv->port_up) { 113 port_up = 1; 114 mlx4_en_stop_port(dev, 1); 115 } 116 117 mlx4_en_safe_replace_resources(priv, tmp); 118 if (port_up) { 119 err = mlx4_en_start_port(dev); 120 if (err) { 121 en_err(priv, "Failed starting port for setup TC\n"); 122 goto out; 123 } 124 } 125 126 err = mlx4_en_setup_tc(dev, tc); 127 out: 128 mutex_unlock(&mdev->state_lock); 129 kfree(tmp); 130 return err; 131 } 132 133 static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type, 134 void *type_data) 135 { 136 struct tc_mqprio_qopt *mqprio = type_data; 137 138 if (type != TC_SETUP_QDISC_MQPRIO) 139 return -EOPNOTSUPP; 140 141 if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH) 142 return -EINVAL; 143 144 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 145 146 return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc); 147 } 148 149 #ifdef CONFIG_RFS_ACCEL 150 151 struct mlx4_en_filter { 152 struct list_head next; 153 struct work_struct work; 154 155 u8 ip_proto; 156 __be32 src_ip; 157 __be32 dst_ip; 158 __be16 src_port; 159 __be16 dst_port; 160 161 int rxq_index; 162 struct mlx4_en_priv *priv; 163 u32 flow_id; /* RFS infrastructure id */ 164 int id; /* mlx4_en driver id */ 165 u64 reg_id; /* Flow steering API id */ 166 u8 activated; /* Used to prevent expiry before filter 167 * is attached 168 */ 169 struct hlist_node filter_chain; 170 }; 171 172 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv); 173 174 static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto) 175 { 176 switch (ip_proto) { 177 case IPPROTO_UDP: 178 return MLX4_NET_TRANS_RULE_ID_UDP; 179 case IPPROTO_TCP: 180 return MLX4_NET_TRANS_RULE_ID_TCP; 181 default: 182 return MLX4_NET_TRANS_RULE_NUM; 183 } 184 }; 185 186 /* Must not acquire state_lock, as its corresponding work_sync 187 * is done under it. 188 */ 189 static void mlx4_en_filter_work(struct work_struct *work) 190 { 191 struct mlx4_en_filter *filter = container_of(work, 192 struct mlx4_en_filter, 193 work); 194 struct mlx4_en_priv *priv = filter->priv; 195 struct mlx4_spec_list spec_tcp_udp = { 196 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto), 197 { 198 .tcp_udp = { 199 .dst_port = filter->dst_port, 200 .dst_port_msk = (__force __be16)-1, 201 .src_port = filter->src_port, 202 .src_port_msk = (__force __be16)-1, 203 }, 204 }, 205 }; 206 struct mlx4_spec_list spec_ip = { 207 .id = MLX4_NET_TRANS_RULE_ID_IPV4, 208 { 209 .ipv4 = { 210 .dst_ip = filter->dst_ip, 211 .dst_ip_msk = (__force __be32)-1, 212 .src_ip = filter->src_ip, 213 .src_ip_msk = (__force __be32)-1, 214 }, 215 }, 216 }; 217 struct mlx4_spec_list spec_eth = { 218 .id = MLX4_NET_TRANS_RULE_ID_ETH, 219 }; 220 struct mlx4_net_trans_rule rule = { 221 .list = LIST_HEAD_INIT(rule.list), 222 .queue_mode = MLX4_NET_TRANS_Q_LIFO, 223 .exclusive = 1, 224 .allow_loopback = 1, 225 .promisc_mode = MLX4_FS_REGULAR, 226 .port = priv->port, 227 .priority = MLX4_DOMAIN_RFS, 228 }; 229 int rc; 230 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 231 232 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) { 233 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n", 234 filter->ip_proto); 235 goto ignore; 236 } 237 list_add_tail(&spec_eth.list, &rule.list); 238 list_add_tail(&spec_ip.list, &rule.list); 239 list_add_tail(&spec_tcp_udp.list, &rule.list); 240 241 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn; 242 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN); 243 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 244 245 filter->activated = 0; 246 247 if (filter->reg_id) { 248 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 249 if (rc && rc != -ENOENT) 250 en_err(priv, "Error detaching flow. rc = %d\n", rc); 251 } 252 253 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); 254 if (rc) 255 en_err(priv, "Error attaching flow. err = %d\n", rc); 256 257 ignore: 258 mlx4_en_filter_rfs_expire(priv); 259 260 filter->activated = 1; 261 } 262 263 static inline struct hlist_head * 264 filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 265 __be16 src_port, __be16 dst_port) 266 { 267 unsigned long l; 268 int bucket_idx; 269 270 l = (__force unsigned long)src_port | 271 ((__force unsigned long)dst_port << 2); 272 l ^= (__force unsigned long)(src_ip ^ dst_ip); 273 274 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT); 275 276 return &priv->filter_hash[bucket_idx]; 277 } 278 279 static struct mlx4_en_filter * 280 mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip, 281 __be32 dst_ip, u8 ip_proto, __be16 src_port, 282 __be16 dst_port, u32 flow_id) 283 { 284 struct mlx4_en_filter *filter = NULL; 285 286 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC); 287 if (!filter) 288 return NULL; 289 290 filter->priv = priv; 291 filter->rxq_index = rxq_index; 292 INIT_WORK(&filter->work, mlx4_en_filter_work); 293 294 filter->src_ip = src_ip; 295 filter->dst_ip = dst_ip; 296 filter->ip_proto = ip_proto; 297 filter->src_port = src_port; 298 filter->dst_port = dst_port; 299 300 filter->flow_id = flow_id; 301 302 filter->id = priv->last_filter_id++ % RPS_NO_FILTER; 303 304 list_add_tail(&filter->next, &priv->filters); 305 hlist_add_head(&filter->filter_chain, 306 filter_hash_bucket(priv, src_ip, dst_ip, src_port, 307 dst_port)); 308 309 return filter; 310 } 311 312 static void mlx4_en_filter_free(struct mlx4_en_filter *filter) 313 { 314 struct mlx4_en_priv *priv = filter->priv; 315 int rc; 316 317 list_del(&filter->next); 318 319 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 320 if (rc && rc != -ENOENT) 321 en_err(priv, "Error detaching flow. rc = %d\n", rc); 322 323 kfree(filter); 324 } 325 326 static inline struct mlx4_en_filter * 327 mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 328 u8 ip_proto, __be16 src_port, __be16 dst_port) 329 { 330 struct mlx4_en_filter *filter; 331 struct mlx4_en_filter *ret = NULL; 332 333 hlist_for_each_entry(filter, 334 filter_hash_bucket(priv, src_ip, dst_ip, 335 src_port, dst_port), 336 filter_chain) { 337 if (filter->src_ip == src_ip && 338 filter->dst_ip == dst_ip && 339 filter->ip_proto == ip_proto && 340 filter->src_port == src_port && 341 filter->dst_port == dst_port) { 342 ret = filter; 343 break; 344 } 345 } 346 347 return ret; 348 } 349 350 static int 351 mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, 352 u16 rxq_index, u32 flow_id) 353 { 354 struct mlx4_en_priv *priv = netdev_priv(net_dev); 355 struct mlx4_en_filter *filter; 356 const struct iphdr *ip; 357 const __be16 *ports; 358 u8 ip_proto; 359 __be32 src_ip; 360 __be32 dst_ip; 361 __be16 src_port; 362 __be16 dst_port; 363 int nhoff = skb_network_offset(skb); 364 int ret = 0; 365 366 if (skb->protocol != htons(ETH_P_IP)) 367 return -EPROTONOSUPPORT; 368 369 ip = (const struct iphdr *)(skb->data + nhoff); 370 if (ip_is_fragment(ip)) 371 return -EPROTONOSUPPORT; 372 373 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP)) 374 return -EPROTONOSUPPORT; 375 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl); 376 377 ip_proto = ip->protocol; 378 src_ip = ip->saddr; 379 dst_ip = ip->daddr; 380 src_port = ports[0]; 381 dst_port = ports[1]; 382 383 spin_lock_bh(&priv->filters_lock); 384 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto, 385 src_port, dst_port); 386 if (filter) { 387 if (filter->rxq_index == rxq_index) 388 goto out; 389 390 filter->rxq_index = rxq_index; 391 } else { 392 filter = mlx4_en_filter_alloc(priv, rxq_index, 393 src_ip, dst_ip, ip_proto, 394 src_port, dst_port, flow_id); 395 if (!filter) { 396 ret = -ENOMEM; 397 goto err; 398 } 399 } 400 401 queue_work(priv->mdev->workqueue, &filter->work); 402 403 out: 404 ret = filter->id; 405 err: 406 spin_unlock_bh(&priv->filters_lock); 407 408 return ret; 409 } 410 411 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv) 412 { 413 struct mlx4_en_filter *filter, *tmp; 414 LIST_HEAD(del_list); 415 416 spin_lock_bh(&priv->filters_lock); 417 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 418 list_move(&filter->next, &del_list); 419 hlist_del(&filter->filter_chain); 420 } 421 spin_unlock_bh(&priv->filters_lock); 422 423 list_for_each_entry_safe(filter, tmp, &del_list, next) { 424 cancel_work_sync(&filter->work); 425 mlx4_en_filter_free(filter); 426 } 427 } 428 429 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv) 430 { 431 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL; 432 LIST_HEAD(del_list); 433 int i = 0; 434 435 spin_lock_bh(&priv->filters_lock); 436 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 437 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA) 438 break; 439 440 if (filter->activated && 441 !work_pending(&filter->work) && 442 rps_may_expire_flow(priv->dev, 443 filter->rxq_index, filter->flow_id, 444 filter->id)) { 445 list_move(&filter->next, &del_list); 446 hlist_del(&filter->filter_chain); 447 } else 448 last_filter = filter; 449 450 i++; 451 } 452 453 if (last_filter && (&last_filter->next != priv->filters.next)) 454 list_move(&priv->filters, &last_filter->next); 455 456 spin_unlock_bh(&priv->filters_lock); 457 458 list_for_each_entry_safe(filter, tmp, &del_list, next) 459 mlx4_en_filter_free(filter); 460 } 461 #endif 462 463 static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, 464 __be16 proto, u16 vid) 465 { 466 struct mlx4_en_priv *priv = netdev_priv(dev); 467 struct mlx4_en_dev *mdev = priv->mdev; 468 int err; 469 int idx; 470 471 en_dbg(HW, priv, "adding VLAN:%d\n", vid); 472 473 set_bit(vid, priv->active_vlans); 474 475 /* Add VID to port VLAN filter */ 476 mutex_lock(&mdev->state_lock); 477 if (mdev->device_up && priv->port_up) { 478 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 479 if (err) { 480 en_err(priv, "Failed configuring VLAN filter\n"); 481 goto out; 482 } 483 } 484 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx); 485 if (err) 486 en_dbg(HW, priv, "Failed adding vlan %d\n", vid); 487 488 out: 489 mutex_unlock(&mdev->state_lock); 490 return err; 491 } 492 493 static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, 494 __be16 proto, u16 vid) 495 { 496 struct mlx4_en_priv *priv = netdev_priv(dev); 497 struct mlx4_en_dev *mdev = priv->mdev; 498 int err = 0; 499 500 en_dbg(HW, priv, "Killing VID:%d\n", vid); 501 502 clear_bit(vid, priv->active_vlans); 503 504 /* Remove VID from port VLAN filter */ 505 mutex_lock(&mdev->state_lock); 506 mlx4_unregister_vlan(mdev->dev, priv->port, vid); 507 508 if (mdev->device_up && priv->port_up) { 509 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 510 if (err) 511 en_err(priv, "Failed configuring VLAN filter\n"); 512 } 513 mutex_unlock(&mdev->state_lock); 514 515 return err; 516 } 517 518 static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac) 519 { 520 int i; 521 for (i = ETH_ALEN - 1; i >= 0; --i) { 522 dst_mac[i] = src_mac & 0xff; 523 src_mac >>= 8; 524 } 525 memset(&dst_mac[ETH_ALEN], 0, 2); 526 } 527 528 529 static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr, 530 int qpn, u64 *reg_id) 531 { 532 int err; 533 534 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 535 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 536 return 0; /* do nothing */ 537 538 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn, 539 MLX4_DOMAIN_NIC, reg_id); 540 if (err) { 541 en_err(priv, "failed to add vxlan steering rule, err %d\n", err); 542 return err; 543 } 544 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id); 545 return 0; 546 } 547 548 549 static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv, 550 unsigned char *mac, int *qpn, u64 *reg_id) 551 { 552 struct mlx4_en_dev *mdev = priv->mdev; 553 struct mlx4_dev *dev = mdev->dev; 554 int err; 555 556 switch (dev->caps.steering_mode) { 557 case MLX4_STEERING_MODE_B0: { 558 struct mlx4_qp qp; 559 u8 gid[16] = {0}; 560 561 qp.qpn = *qpn; 562 memcpy(&gid[10], mac, ETH_ALEN); 563 gid[5] = priv->port; 564 565 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH); 566 break; 567 } 568 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 569 struct mlx4_spec_list spec_eth = { {NULL} }; 570 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 571 572 struct mlx4_net_trans_rule rule = { 573 .queue_mode = MLX4_NET_TRANS_Q_FIFO, 574 .exclusive = 0, 575 .allow_loopback = 1, 576 .promisc_mode = MLX4_FS_REGULAR, 577 .priority = MLX4_DOMAIN_NIC, 578 }; 579 580 rule.port = priv->port; 581 rule.qpn = *qpn; 582 INIT_LIST_HEAD(&rule.list); 583 584 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH; 585 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN); 586 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 587 list_add_tail(&spec_eth.list, &rule.list); 588 589 err = mlx4_flow_attach(dev, &rule, reg_id); 590 break; 591 } 592 default: 593 return -EINVAL; 594 } 595 if (err) 596 en_warn(priv, "Failed Attaching Unicast\n"); 597 598 return err; 599 } 600 601 static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv, 602 unsigned char *mac, int qpn, u64 reg_id) 603 { 604 struct mlx4_en_dev *mdev = priv->mdev; 605 struct mlx4_dev *dev = mdev->dev; 606 607 switch (dev->caps.steering_mode) { 608 case MLX4_STEERING_MODE_B0: { 609 struct mlx4_qp qp; 610 u8 gid[16] = {0}; 611 612 qp.qpn = qpn; 613 memcpy(&gid[10], mac, ETH_ALEN); 614 gid[5] = priv->port; 615 616 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH); 617 break; 618 } 619 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 620 mlx4_flow_detach(dev, reg_id); 621 break; 622 } 623 default: 624 en_err(priv, "Invalid steering mode.\n"); 625 } 626 } 627 628 static int mlx4_en_get_qp(struct mlx4_en_priv *priv) 629 { 630 struct mlx4_en_dev *mdev = priv->mdev; 631 struct mlx4_dev *dev = mdev->dev; 632 int index = 0; 633 int err = 0; 634 int *qpn = &priv->base_qpn; 635 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr); 636 637 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n", 638 priv->dev->dev_addr); 639 index = mlx4_register_mac(dev, priv->port, mac); 640 if (index < 0) { 641 err = index; 642 en_err(priv, "Failed adding MAC: %pM\n", 643 priv->dev->dev_addr); 644 return err; 645 } 646 647 en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode); 648 649 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 650 int base_qpn = mlx4_get_base_qpn(dev, priv->port); 651 *qpn = base_qpn + index; 652 return 0; 653 } 654 655 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP, 656 MLX4_RES_USAGE_DRIVER); 657 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn); 658 if (err) { 659 en_err(priv, "Failed to reserve qp for mac registration\n"); 660 mlx4_unregister_mac(dev, priv->port, mac); 661 return err; 662 } 663 664 return 0; 665 } 666 667 static void mlx4_en_put_qp(struct mlx4_en_priv *priv) 668 { 669 struct mlx4_en_dev *mdev = priv->mdev; 670 struct mlx4_dev *dev = mdev->dev; 671 int qpn = priv->base_qpn; 672 673 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 674 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr); 675 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", 676 priv->dev->dev_addr); 677 mlx4_unregister_mac(dev, priv->port, mac); 678 } else { 679 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n", 680 priv->port, qpn); 681 mlx4_qp_release_range(dev, qpn, 1); 682 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 683 } 684 } 685 686 static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn, 687 unsigned char *new_mac, unsigned char *prev_mac) 688 { 689 struct mlx4_en_dev *mdev = priv->mdev; 690 struct mlx4_dev *dev = mdev->dev; 691 int err = 0; 692 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac); 693 694 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { 695 struct hlist_head *bucket; 696 unsigned int mac_hash; 697 struct mlx4_mac_entry *entry; 698 struct hlist_node *tmp; 699 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac); 700 701 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]]; 702 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 703 if (ether_addr_equal_64bits(entry->mac, prev_mac)) { 704 mlx4_en_uc_steer_release(priv, entry->mac, 705 qpn, entry->reg_id); 706 mlx4_unregister_mac(dev, priv->port, 707 prev_mac_u64); 708 hlist_del_rcu(&entry->hlist); 709 synchronize_rcu(); 710 memcpy(entry->mac, new_mac, ETH_ALEN); 711 entry->reg_id = 0; 712 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX]; 713 hlist_add_head_rcu(&entry->hlist, 714 &priv->mac_hash[mac_hash]); 715 mlx4_register_mac(dev, priv->port, new_mac_u64); 716 err = mlx4_en_uc_steer_add(priv, new_mac, 717 &qpn, 718 &entry->reg_id); 719 if (err) 720 return err; 721 if (priv->tunnel_reg_id) { 722 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 723 priv->tunnel_reg_id = 0; 724 } 725 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn, 726 &priv->tunnel_reg_id); 727 return err; 728 } 729 } 730 return -EINVAL; 731 } 732 733 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64); 734 } 735 736 static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv, 737 unsigned char new_mac[ETH_ALEN + 2]) 738 { 739 struct mlx4_en_dev *mdev = priv->mdev; 740 int err; 741 742 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN)) 743 return; 744 745 err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac); 746 if (err) 747 en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n", 748 new_mac, priv->port, err); 749 } 750 751 static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv, 752 unsigned char new_mac[ETH_ALEN + 2]) 753 { 754 int err = 0; 755 756 if (priv->port_up) { 757 /* Remove old MAC and insert the new one */ 758 err = mlx4_en_replace_mac(priv, priv->base_qpn, 759 new_mac, priv->current_mac); 760 if (err) 761 en_err(priv, "Failed changing HW MAC address\n"); 762 } else 763 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n"); 764 765 if (!err) 766 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac)); 767 768 return err; 769 } 770 771 static int mlx4_en_set_mac(struct net_device *dev, void *addr) 772 { 773 struct mlx4_en_priv *priv = netdev_priv(dev); 774 struct mlx4_en_dev *mdev = priv->mdev; 775 struct sockaddr *saddr = addr; 776 unsigned char new_mac[ETH_ALEN + 2]; 777 int err; 778 779 if (!is_valid_ether_addr(saddr->sa_data)) 780 return -EADDRNOTAVAIL; 781 782 mutex_lock(&mdev->state_lock); 783 memcpy(new_mac, saddr->sa_data, ETH_ALEN); 784 err = mlx4_en_do_set_mac(priv, new_mac); 785 if (err) 786 goto out; 787 788 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); 789 mlx4_en_update_user_mac(priv, new_mac); 790 out: 791 mutex_unlock(&mdev->state_lock); 792 793 return err; 794 } 795 796 static void mlx4_en_clear_list(struct net_device *dev) 797 { 798 struct mlx4_en_priv *priv = netdev_priv(dev); 799 struct mlx4_en_mc_list *tmp, *mc_to_del; 800 801 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) { 802 list_del(&mc_to_del->list); 803 kfree(mc_to_del); 804 } 805 } 806 807 static void mlx4_en_cache_mclist(struct net_device *dev) 808 { 809 struct mlx4_en_priv *priv = netdev_priv(dev); 810 struct netdev_hw_addr *ha; 811 struct mlx4_en_mc_list *tmp; 812 813 mlx4_en_clear_list(dev); 814 netdev_for_each_mc_addr(ha, dev) { 815 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC); 816 if (!tmp) { 817 mlx4_en_clear_list(dev); 818 return; 819 } 820 memcpy(tmp->addr, ha->addr, ETH_ALEN); 821 list_add_tail(&tmp->list, &priv->mc_list); 822 } 823 } 824 825 static void update_mclist_flags(struct mlx4_en_priv *priv, 826 struct list_head *dst, 827 struct list_head *src) 828 { 829 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc; 830 bool found; 831 832 /* Find all the entries that should be removed from dst, 833 * These are the entries that are not found in src 834 */ 835 list_for_each_entry(dst_tmp, dst, list) { 836 found = false; 837 list_for_each_entry(src_tmp, src, list) { 838 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 839 found = true; 840 break; 841 } 842 } 843 if (!found) 844 dst_tmp->action = MCLIST_REM; 845 } 846 847 /* Add entries that exist in src but not in dst 848 * mark them as need to add 849 */ 850 list_for_each_entry(src_tmp, src, list) { 851 found = false; 852 list_for_each_entry(dst_tmp, dst, list) { 853 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 854 dst_tmp->action = MCLIST_NONE; 855 found = true; 856 break; 857 } 858 } 859 if (!found) { 860 new_mc = kmemdup(src_tmp, 861 sizeof(struct mlx4_en_mc_list), 862 GFP_KERNEL); 863 if (!new_mc) 864 return; 865 866 new_mc->action = MCLIST_ADD; 867 list_add_tail(&new_mc->list, dst); 868 } 869 } 870 } 871 872 static void mlx4_en_set_rx_mode(struct net_device *dev) 873 { 874 struct mlx4_en_priv *priv = netdev_priv(dev); 875 876 if (!priv->port_up) 877 return; 878 879 queue_work(priv->mdev->workqueue, &priv->rx_mode_task); 880 } 881 882 static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv, 883 struct mlx4_en_dev *mdev) 884 { 885 int err = 0; 886 887 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { 888 if (netif_msg_rx_status(priv)) 889 en_warn(priv, "Entering promiscuous mode\n"); 890 priv->flags |= MLX4_EN_FLAG_PROMISC; 891 892 /* Enable promiscouos mode */ 893 switch (mdev->dev->caps.steering_mode) { 894 case MLX4_STEERING_MODE_DEVICE_MANAGED: 895 err = mlx4_flow_steer_promisc_add(mdev->dev, 896 priv->port, 897 priv->base_qpn, 898 MLX4_FS_ALL_DEFAULT); 899 if (err) 900 en_err(priv, "Failed enabling promiscuous mode\n"); 901 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 902 break; 903 904 case MLX4_STEERING_MODE_B0: 905 err = mlx4_unicast_promisc_add(mdev->dev, 906 priv->base_qpn, 907 priv->port); 908 if (err) 909 en_err(priv, "Failed enabling unicast promiscuous mode\n"); 910 911 /* Add the default qp number as multicast 912 * promisc 913 */ 914 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 915 err = mlx4_multicast_promisc_add(mdev->dev, 916 priv->base_qpn, 917 priv->port); 918 if (err) 919 en_err(priv, "Failed enabling multicast promiscuous mode\n"); 920 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 921 } 922 break; 923 924 case MLX4_STEERING_MODE_A0: 925 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 926 priv->port, 927 priv->base_qpn, 928 1); 929 if (err) 930 en_err(priv, "Failed enabling promiscuous mode\n"); 931 break; 932 } 933 934 /* Disable port multicast filter (unconditionally) */ 935 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 936 0, MLX4_MCAST_DISABLE); 937 if (err) 938 en_err(priv, "Failed disabling multicast filter\n"); 939 } 940 } 941 942 static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv, 943 struct mlx4_en_dev *mdev) 944 { 945 int err = 0; 946 947 if (netif_msg_rx_status(priv)) 948 en_warn(priv, "Leaving promiscuous mode\n"); 949 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 950 951 /* Disable promiscouos mode */ 952 switch (mdev->dev->caps.steering_mode) { 953 case MLX4_STEERING_MODE_DEVICE_MANAGED: 954 err = mlx4_flow_steer_promisc_remove(mdev->dev, 955 priv->port, 956 MLX4_FS_ALL_DEFAULT); 957 if (err) 958 en_err(priv, "Failed disabling promiscuous mode\n"); 959 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 960 break; 961 962 case MLX4_STEERING_MODE_B0: 963 err = mlx4_unicast_promisc_remove(mdev->dev, 964 priv->base_qpn, 965 priv->port); 966 if (err) 967 en_err(priv, "Failed disabling unicast promiscuous mode\n"); 968 /* Disable Multicast promisc */ 969 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 970 err = mlx4_multicast_promisc_remove(mdev->dev, 971 priv->base_qpn, 972 priv->port); 973 if (err) 974 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 975 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 976 } 977 break; 978 979 case MLX4_STEERING_MODE_A0: 980 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 981 priv->port, 982 priv->base_qpn, 0); 983 if (err) 984 en_err(priv, "Failed disabling promiscuous mode\n"); 985 break; 986 } 987 } 988 989 static void mlx4_en_do_multicast(struct mlx4_en_priv *priv, 990 struct net_device *dev, 991 struct mlx4_en_dev *mdev) 992 { 993 struct mlx4_en_mc_list *mclist, *tmp; 994 u64 mcast_addr = 0; 995 u8 mc_list[16] = {0}; 996 int err = 0; 997 998 /* Enable/disable the multicast filter according to IFF_ALLMULTI */ 999 if (dev->flags & IFF_ALLMULTI) { 1000 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1001 0, MLX4_MCAST_DISABLE); 1002 if (err) 1003 en_err(priv, "Failed disabling multicast filter\n"); 1004 1005 /* Add the default qp number as multicast promisc */ 1006 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 1007 switch (mdev->dev->caps.steering_mode) { 1008 case MLX4_STEERING_MODE_DEVICE_MANAGED: 1009 err = mlx4_flow_steer_promisc_add(mdev->dev, 1010 priv->port, 1011 priv->base_qpn, 1012 MLX4_FS_MC_DEFAULT); 1013 break; 1014 1015 case MLX4_STEERING_MODE_B0: 1016 err = mlx4_multicast_promisc_add(mdev->dev, 1017 priv->base_qpn, 1018 priv->port); 1019 break; 1020 1021 case MLX4_STEERING_MODE_A0: 1022 break; 1023 } 1024 if (err) 1025 en_err(priv, "Failed entering multicast promisc mode\n"); 1026 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 1027 } 1028 } else { 1029 /* Disable Multicast promisc */ 1030 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1031 switch (mdev->dev->caps.steering_mode) { 1032 case MLX4_STEERING_MODE_DEVICE_MANAGED: 1033 err = mlx4_flow_steer_promisc_remove(mdev->dev, 1034 priv->port, 1035 MLX4_FS_MC_DEFAULT); 1036 break; 1037 1038 case MLX4_STEERING_MODE_B0: 1039 err = mlx4_multicast_promisc_remove(mdev->dev, 1040 priv->base_qpn, 1041 priv->port); 1042 break; 1043 1044 case MLX4_STEERING_MODE_A0: 1045 break; 1046 } 1047 if (err) 1048 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 1049 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1050 } 1051 1052 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1053 0, MLX4_MCAST_DISABLE); 1054 if (err) 1055 en_err(priv, "Failed disabling multicast filter\n"); 1056 1057 /* Flush mcast filter and init it with broadcast address */ 1058 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, 1059 1, MLX4_MCAST_CONFIG); 1060 1061 /* Update multicast list - we cache all addresses so they won't 1062 * change while HW is updated holding the command semaphor */ 1063 netif_addr_lock_bh(dev); 1064 mlx4_en_cache_mclist(dev); 1065 netif_addr_unlock_bh(dev); 1066 list_for_each_entry(mclist, &priv->mc_list, list) { 1067 mcast_addr = mlx4_mac_to_u64(mclist->addr); 1068 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 1069 mcast_addr, 0, MLX4_MCAST_CONFIG); 1070 } 1071 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1072 0, MLX4_MCAST_ENABLE); 1073 if (err) 1074 en_err(priv, "Failed enabling multicast filter\n"); 1075 1076 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list); 1077 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1078 if (mclist->action == MCLIST_REM) { 1079 /* detach this address and delete from list */ 1080 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1081 mc_list[5] = priv->port; 1082 err = mlx4_multicast_detach(mdev->dev, 1083 priv->rss_map.indir_qp, 1084 mc_list, 1085 MLX4_PROT_ETH, 1086 mclist->reg_id); 1087 if (err) 1088 en_err(priv, "Fail to detach multicast address\n"); 1089 1090 if (mclist->tunnel_reg_id) { 1091 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id); 1092 if (err) 1093 en_err(priv, "Failed to detach multicast address\n"); 1094 } 1095 1096 /* remove from list */ 1097 list_del(&mclist->list); 1098 kfree(mclist); 1099 } else if (mclist->action == MCLIST_ADD) { 1100 /* attach the address */ 1101 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1102 /* needed for B0 steering support */ 1103 mc_list[5] = priv->port; 1104 err = mlx4_multicast_attach(mdev->dev, 1105 priv->rss_map.indir_qp, 1106 mc_list, 1107 priv->port, 0, 1108 MLX4_PROT_ETH, 1109 &mclist->reg_id); 1110 if (err) 1111 en_err(priv, "Fail to attach multicast address\n"); 1112 1113 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn, 1114 &mclist->tunnel_reg_id); 1115 if (err) 1116 en_err(priv, "Failed to attach multicast address\n"); 1117 } 1118 } 1119 } 1120 } 1121 1122 static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv, 1123 struct net_device *dev, 1124 struct mlx4_en_dev *mdev) 1125 { 1126 struct netdev_hw_addr *ha; 1127 struct mlx4_mac_entry *entry; 1128 struct hlist_node *tmp; 1129 bool found; 1130 u64 mac; 1131 int err = 0; 1132 struct hlist_head *bucket; 1133 unsigned int i; 1134 int removed = 0; 1135 u32 prev_flags; 1136 1137 /* Note that we do not need to protect our mac_hash traversal with rcu, 1138 * since all modification code is protected by mdev->state_lock 1139 */ 1140 1141 /* find what to remove */ 1142 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1143 bucket = &priv->mac_hash[i]; 1144 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1145 found = false; 1146 netdev_for_each_uc_addr(ha, dev) { 1147 if (ether_addr_equal_64bits(entry->mac, 1148 ha->addr)) { 1149 found = true; 1150 break; 1151 } 1152 } 1153 1154 /* MAC address of the port is not in uc list */ 1155 if (ether_addr_equal_64bits(entry->mac, 1156 priv->current_mac)) 1157 found = true; 1158 1159 if (!found) { 1160 mac = mlx4_mac_to_u64(entry->mac); 1161 mlx4_en_uc_steer_release(priv, entry->mac, 1162 priv->base_qpn, 1163 entry->reg_id); 1164 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1165 1166 hlist_del_rcu(&entry->hlist); 1167 kfree_rcu(entry, rcu); 1168 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n", 1169 entry->mac, priv->port); 1170 ++removed; 1171 } 1172 } 1173 } 1174 1175 /* if we didn't remove anything, there is no use in trying to add 1176 * again once we are in a forced promisc mode state 1177 */ 1178 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed) 1179 return; 1180 1181 prev_flags = priv->flags; 1182 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 1183 1184 /* find what to add */ 1185 netdev_for_each_uc_addr(ha, dev) { 1186 found = false; 1187 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]]; 1188 hlist_for_each_entry(entry, bucket, hlist) { 1189 if (ether_addr_equal_64bits(entry->mac, ha->addr)) { 1190 found = true; 1191 break; 1192 } 1193 } 1194 1195 if (!found) { 1196 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1197 if (!entry) { 1198 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n", 1199 ha->addr, priv->port); 1200 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1201 break; 1202 } 1203 mac = mlx4_mac_to_u64(ha->addr); 1204 memcpy(entry->mac, ha->addr, ETH_ALEN); 1205 err = mlx4_register_mac(mdev->dev, priv->port, mac); 1206 if (err < 0) { 1207 en_err(priv, "Failed registering MAC %pM on port %d: %d\n", 1208 ha->addr, priv->port, err); 1209 kfree(entry); 1210 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1211 break; 1212 } 1213 err = mlx4_en_uc_steer_add(priv, ha->addr, 1214 &priv->base_qpn, 1215 &entry->reg_id); 1216 if (err) { 1217 en_err(priv, "Failed adding MAC %pM on port %d: %d\n", 1218 ha->addr, priv->port, err); 1219 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1220 kfree(entry); 1221 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1222 break; 1223 } else { 1224 unsigned int mac_hash; 1225 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n", 1226 ha->addr, priv->port); 1227 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX]; 1228 bucket = &priv->mac_hash[mac_hash]; 1229 hlist_add_head_rcu(&entry->hlist, bucket); 1230 } 1231 } 1232 } 1233 1234 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1235 en_warn(priv, "Forcing promiscuous mode on port:%d\n", 1236 priv->port); 1237 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1238 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n", 1239 priv->port); 1240 } 1241 } 1242 1243 static void mlx4_en_do_set_rx_mode(struct work_struct *work) 1244 { 1245 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1246 rx_mode_task); 1247 struct mlx4_en_dev *mdev = priv->mdev; 1248 struct net_device *dev = priv->dev; 1249 1250 mutex_lock(&mdev->state_lock); 1251 if (!mdev->device_up) { 1252 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n"); 1253 goto out; 1254 } 1255 if (!priv->port_up) { 1256 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n"); 1257 goto out; 1258 } 1259 1260 if (!netif_carrier_ok(dev)) { 1261 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) { 1262 if (priv->port_state.link_state) { 1263 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP; 1264 netif_carrier_on(dev); 1265 en_dbg(LINK, priv, "Link Up\n"); 1266 } 1267 } 1268 } 1269 1270 if (dev->priv_flags & IFF_UNICAST_FLT) 1271 mlx4_en_do_uc_filter(priv, dev, mdev); 1272 1273 /* Promsicuous mode: disable all filters */ 1274 if ((dev->flags & IFF_PROMISC) || 1275 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) { 1276 mlx4_en_set_promisc_mode(priv, mdev); 1277 goto out; 1278 } 1279 1280 /* Not in promiscuous mode */ 1281 if (priv->flags & MLX4_EN_FLAG_PROMISC) 1282 mlx4_en_clear_promisc_mode(priv, mdev); 1283 1284 mlx4_en_do_multicast(priv, dev, mdev); 1285 out: 1286 mutex_unlock(&mdev->state_lock); 1287 } 1288 1289 #ifdef CONFIG_NET_POLL_CONTROLLER 1290 static void mlx4_en_netpoll(struct net_device *dev) 1291 { 1292 struct mlx4_en_priv *priv = netdev_priv(dev); 1293 struct mlx4_en_cq *cq; 1294 int i; 1295 1296 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1297 cq = priv->tx_cq[TX][i]; 1298 napi_schedule(&cq->napi); 1299 } 1300 } 1301 #endif 1302 1303 static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv) 1304 { 1305 u64 reg_id; 1306 int err = 0; 1307 int *qpn = &priv->base_qpn; 1308 struct mlx4_mac_entry *entry; 1309 1310 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id); 1311 if (err) 1312 return err; 1313 1314 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn, 1315 &priv->tunnel_reg_id); 1316 if (err) 1317 goto tunnel_err; 1318 1319 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1320 if (!entry) { 1321 err = -ENOMEM; 1322 goto alloc_err; 1323 } 1324 1325 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac)); 1326 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac)); 1327 entry->reg_id = reg_id; 1328 hlist_add_head_rcu(&entry->hlist, 1329 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]); 1330 1331 return 0; 1332 1333 alloc_err: 1334 if (priv->tunnel_reg_id) 1335 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1336 1337 tunnel_err: 1338 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id); 1339 return err; 1340 } 1341 1342 static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv) 1343 { 1344 u64 mac; 1345 unsigned int i; 1346 int qpn = priv->base_qpn; 1347 struct hlist_head *bucket; 1348 struct hlist_node *tmp; 1349 struct mlx4_mac_entry *entry; 1350 1351 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1352 bucket = &priv->mac_hash[i]; 1353 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1354 mac = mlx4_mac_to_u64(entry->mac); 1355 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n", 1356 entry->mac); 1357 mlx4_en_uc_steer_release(priv, entry->mac, 1358 qpn, entry->reg_id); 1359 1360 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac); 1361 hlist_del_rcu(&entry->hlist); 1362 kfree_rcu(entry, rcu); 1363 } 1364 } 1365 1366 if (priv->tunnel_reg_id) { 1367 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1368 priv->tunnel_reg_id = 0; 1369 } 1370 } 1371 1372 static void mlx4_en_tx_timeout(struct net_device *dev) 1373 { 1374 struct mlx4_en_priv *priv = netdev_priv(dev); 1375 struct mlx4_en_dev *mdev = priv->mdev; 1376 int i; 1377 1378 if (netif_msg_timer(priv)) 1379 en_warn(priv, "Tx timeout called on port:%d\n", priv->port); 1380 1381 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1382 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][i]; 1383 1384 if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i))) 1385 continue; 1386 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n", 1387 i, tx_ring->qpn, tx_ring->sp_cqn, 1388 tx_ring->cons, tx_ring->prod); 1389 } 1390 1391 priv->port_stats.tx_timeout++; 1392 en_dbg(DRV, priv, "Scheduling watchdog\n"); 1393 queue_work(mdev->workqueue, &priv->watchdog_task); 1394 } 1395 1396 1397 static void 1398 mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) 1399 { 1400 struct mlx4_en_priv *priv = netdev_priv(dev); 1401 1402 spin_lock_bh(&priv->stats_lock); 1403 mlx4_en_fold_software_stats(dev); 1404 netdev_stats_to_stats64(stats, &dev->stats); 1405 spin_unlock_bh(&priv->stats_lock); 1406 } 1407 1408 static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) 1409 { 1410 struct mlx4_en_cq *cq; 1411 int i, t; 1412 1413 /* If we haven't received a specific coalescing setting 1414 * (module param), we set the moderation parameters as follows: 1415 * - moder_cnt is set to the number of mtu sized packets to 1416 * satisfy our coalescing target. 1417 * - moder_time is set to a fixed value. 1418 */ 1419 priv->rx_frames = MLX4_EN_RX_COAL_TARGET; 1420 priv->rx_usecs = MLX4_EN_RX_COAL_TIME; 1421 priv->tx_frames = MLX4_EN_TX_COAL_PKTS; 1422 priv->tx_usecs = MLX4_EN_TX_COAL_TIME; 1423 en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n", 1424 priv->dev->mtu, priv->rx_frames, priv->rx_usecs); 1425 1426 /* Setup cq moderation params */ 1427 for (i = 0; i < priv->rx_ring_num; i++) { 1428 cq = priv->rx_cq[i]; 1429 cq->moder_cnt = priv->rx_frames; 1430 cq->moder_time = priv->rx_usecs; 1431 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; 1432 priv->last_moder_packets[i] = 0; 1433 priv->last_moder_bytes[i] = 0; 1434 } 1435 1436 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1437 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1438 cq = priv->tx_cq[t][i]; 1439 cq->moder_cnt = priv->tx_frames; 1440 cq->moder_time = priv->tx_usecs; 1441 } 1442 } 1443 1444 /* Reset auto-moderation params */ 1445 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; 1446 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; 1447 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; 1448 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; 1449 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; 1450 priv->adaptive_rx_coal = 1; 1451 priv->last_moder_jiffies = 0; 1452 priv->last_moder_tx_packets = 0; 1453 } 1454 1455 static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) 1456 { 1457 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); 1458 u32 pkt_rate_high, pkt_rate_low; 1459 struct mlx4_en_cq *cq; 1460 unsigned long packets; 1461 unsigned long rate; 1462 unsigned long avg_pkt_size; 1463 unsigned long rx_packets; 1464 unsigned long rx_bytes; 1465 unsigned long rx_pkt_diff; 1466 int moder_time; 1467 int ring, err; 1468 1469 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) 1470 return; 1471 1472 pkt_rate_low = READ_ONCE(priv->pkt_rate_low); 1473 pkt_rate_high = READ_ONCE(priv->pkt_rate_high); 1474 1475 for (ring = 0; ring < priv->rx_ring_num; ring++) { 1476 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets); 1477 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes); 1478 1479 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring]; 1480 packets = rx_pkt_diff; 1481 rate = packets * HZ / period; 1482 avg_pkt_size = packets ? (rx_bytes - 1483 priv->last_moder_bytes[ring]) / packets : 0; 1484 1485 /* Apply auto-moderation only when packet rate 1486 * exceeds a rate that it matters */ 1487 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && 1488 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { 1489 if (rate <= pkt_rate_low) 1490 moder_time = priv->rx_usecs_low; 1491 else if (rate >= pkt_rate_high) 1492 moder_time = priv->rx_usecs_high; 1493 else 1494 moder_time = (rate - pkt_rate_low) * 1495 (priv->rx_usecs_high - priv->rx_usecs_low) / 1496 (pkt_rate_high - pkt_rate_low) + 1497 priv->rx_usecs_low; 1498 } else { 1499 moder_time = priv->rx_usecs_low; 1500 } 1501 1502 cq = priv->rx_cq[ring]; 1503 if (moder_time != priv->last_moder_time[ring] || 1504 cq->moder_cnt != priv->rx_frames) { 1505 priv->last_moder_time[ring] = moder_time; 1506 cq->moder_time = moder_time; 1507 cq->moder_cnt = priv->rx_frames; 1508 err = mlx4_en_set_cq_moder(priv, cq); 1509 if (err) 1510 en_err(priv, "Failed modifying moderation for cq:%d\n", 1511 ring); 1512 } 1513 priv->last_moder_packets[ring] = rx_packets; 1514 priv->last_moder_bytes[ring] = rx_bytes; 1515 } 1516 1517 priv->last_moder_jiffies = jiffies; 1518 } 1519 1520 static void mlx4_en_do_get_stats(struct work_struct *work) 1521 { 1522 struct delayed_work *delay = to_delayed_work(work); 1523 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1524 stats_task); 1525 struct mlx4_en_dev *mdev = priv->mdev; 1526 int err; 1527 1528 mutex_lock(&mdev->state_lock); 1529 if (mdev->device_up) { 1530 if (priv->port_up) { 1531 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); 1532 if (err) 1533 en_dbg(HW, priv, "Could not update stats\n"); 1534 1535 mlx4_en_auto_moderation(priv); 1536 } 1537 1538 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 1539 } 1540 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { 1541 mlx4_en_do_set_mac(priv, priv->current_mac); 1542 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; 1543 } 1544 mutex_unlock(&mdev->state_lock); 1545 } 1546 1547 /* mlx4_en_service_task - Run service task for tasks that needed to be done 1548 * periodically 1549 */ 1550 static void mlx4_en_service_task(struct work_struct *work) 1551 { 1552 struct delayed_work *delay = to_delayed_work(work); 1553 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1554 service_task); 1555 struct mlx4_en_dev *mdev = priv->mdev; 1556 1557 mutex_lock(&mdev->state_lock); 1558 if (mdev->device_up) { 1559 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 1560 mlx4_en_ptp_overflow_check(mdev); 1561 1562 mlx4_en_recover_from_oom(priv); 1563 queue_delayed_work(mdev->workqueue, &priv->service_task, 1564 SERVICE_TASK_DELAY); 1565 } 1566 mutex_unlock(&mdev->state_lock); 1567 } 1568 1569 static void mlx4_en_linkstate(struct work_struct *work) 1570 { 1571 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1572 linkstate_task); 1573 struct mlx4_en_dev *mdev = priv->mdev; 1574 int linkstate = priv->link_state; 1575 1576 mutex_lock(&mdev->state_lock); 1577 /* If observable port state changed set carrier state and 1578 * report to system log */ 1579 if (priv->last_link_state != linkstate) { 1580 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { 1581 en_info(priv, "Link Down\n"); 1582 netif_carrier_off(priv->dev); 1583 } else { 1584 en_info(priv, "Link Up\n"); 1585 netif_carrier_on(priv->dev); 1586 } 1587 } 1588 priv->last_link_state = linkstate; 1589 mutex_unlock(&mdev->state_lock); 1590 } 1591 1592 static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1593 { 1594 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx]; 1595 int numa_node = priv->mdev->dev->numa_node; 1596 1597 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL)) 1598 return -ENOMEM; 1599 1600 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node), 1601 ring->affinity_mask); 1602 return 0; 1603 } 1604 1605 static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1606 { 1607 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask); 1608 } 1609 1610 static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv, 1611 int tx_ring_idx) 1612 { 1613 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx]; 1614 int rr_index = tx_ring_idx; 1615 1616 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc; 1617 tx_ring->recycle_ring = priv->rx_ring[rr_index]; 1618 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n", 1619 TX_XDP, tx_ring_idx, rr_index); 1620 } 1621 1622 int mlx4_en_start_port(struct net_device *dev) 1623 { 1624 struct mlx4_en_priv *priv = netdev_priv(dev); 1625 struct mlx4_en_dev *mdev = priv->mdev; 1626 struct mlx4_en_cq *cq; 1627 struct mlx4_en_tx_ring *tx_ring; 1628 int rx_index = 0; 1629 int err = 0; 1630 int i, t; 1631 int j; 1632 u8 mc_list[16] = {0}; 1633 1634 if (priv->port_up) { 1635 en_dbg(DRV, priv, "start port called while port already up\n"); 1636 return 0; 1637 } 1638 1639 INIT_LIST_HEAD(&priv->mc_list); 1640 INIT_LIST_HEAD(&priv->curr_list); 1641 INIT_LIST_HEAD(&priv->ethtool_list); 1642 memset(&priv->ethtool_rules[0], 0, 1643 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES); 1644 1645 /* Calculate Rx buf size */ 1646 dev->mtu = min(dev->mtu, priv->max_mtu); 1647 mlx4_en_calc_rx_buf(dev); 1648 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); 1649 1650 /* Configure rx cq's and rings */ 1651 err = mlx4_en_activate_rx_rings(priv); 1652 if (err) { 1653 en_err(priv, "Failed to activate RX rings\n"); 1654 return err; 1655 } 1656 for (i = 0; i < priv->rx_ring_num; i++) { 1657 cq = priv->rx_cq[i]; 1658 1659 err = mlx4_en_init_affinity_hint(priv, i); 1660 if (err) { 1661 en_err(priv, "Failed preparing IRQ affinity hint\n"); 1662 goto cq_err; 1663 } 1664 1665 err = mlx4_en_activate_cq(priv, cq, i); 1666 if (err) { 1667 en_err(priv, "Failed activating Rx CQ\n"); 1668 mlx4_en_free_affinity_hint(priv, i); 1669 goto cq_err; 1670 } 1671 1672 for (j = 0; j < cq->size; j++) { 1673 struct mlx4_cqe *cqe = NULL; 1674 1675 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) + 1676 priv->cqe_factor; 1677 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK; 1678 } 1679 1680 err = mlx4_en_set_cq_moder(priv, cq); 1681 if (err) { 1682 en_err(priv, "Failed setting cq moderation parameters\n"); 1683 mlx4_en_deactivate_cq(priv, cq); 1684 mlx4_en_free_affinity_hint(priv, i); 1685 goto cq_err; 1686 } 1687 mlx4_en_arm_cq(priv, cq); 1688 priv->rx_ring[i]->cqn = cq->mcq.cqn; 1689 ++rx_index; 1690 } 1691 1692 /* Set qp number */ 1693 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port); 1694 err = mlx4_en_get_qp(priv); 1695 if (err) { 1696 en_err(priv, "Failed getting eth qp\n"); 1697 goto cq_err; 1698 } 1699 mdev->mac_removed[priv->port] = 0; 1700 1701 priv->counter_index = 1702 mlx4_get_default_counter_index(mdev->dev, priv->port); 1703 1704 err = mlx4_en_config_rss_steer(priv); 1705 if (err) { 1706 en_err(priv, "Failed configuring rss steering\n"); 1707 goto mac_err; 1708 } 1709 1710 err = mlx4_en_create_drop_qp(priv); 1711 if (err) 1712 goto rss_err; 1713 1714 /* Configure tx cq's and rings */ 1715 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1716 u8 num_tx_rings_p_up = t == TX ? 1717 priv->num_tx_rings_p_up : priv->tx_ring_num[t]; 1718 1719 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1720 /* Configure cq */ 1721 cq = priv->tx_cq[t][i]; 1722 err = mlx4_en_activate_cq(priv, cq, i); 1723 if (err) { 1724 en_err(priv, "Failed allocating Tx CQ\n"); 1725 goto tx_err; 1726 } 1727 err = mlx4_en_set_cq_moder(priv, cq); 1728 if (err) { 1729 en_err(priv, "Failed setting cq moderation parameters\n"); 1730 mlx4_en_deactivate_cq(priv, cq); 1731 goto tx_err; 1732 } 1733 en_dbg(DRV, priv, 1734 "Resetting index of collapsed CQ:%d to -1\n", i); 1735 cq->buf->wqe_index = cpu_to_be16(0xffff); 1736 1737 /* Configure ring */ 1738 tx_ring = priv->tx_ring[t][i]; 1739 err = mlx4_en_activate_tx_ring(priv, tx_ring, 1740 cq->mcq.cqn, 1741 i / num_tx_rings_p_up); 1742 if (err) { 1743 en_err(priv, "Failed allocating Tx ring\n"); 1744 mlx4_en_deactivate_cq(priv, cq); 1745 goto tx_err; 1746 } 1747 if (t != TX_XDP) { 1748 tx_ring->tx_queue = netdev_get_tx_queue(dev, i); 1749 tx_ring->recycle_ring = NULL; 1750 1751 /* Arm CQ for TX completions */ 1752 mlx4_en_arm_cq(priv, cq); 1753 1754 } else { 1755 mlx4_en_init_tx_xdp_ring_descs(priv, tx_ring); 1756 mlx4_en_init_recycle_ring(priv, i); 1757 /* XDP TX CQ should never be armed */ 1758 } 1759 1760 /* Set initial ownership of all Tx TXBBs to SW (1) */ 1761 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) 1762 *((u32 *)(tx_ring->buf + j)) = 0xffffffff; 1763 } 1764 } 1765 1766 /* Configure port */ 1767 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 1768 priv->rx_skb_size + ETH_FCS_LEN, 1769 priv->prof->tx_pause, 1770 priv->prof->tx_ppp, 1771 priv->prof->rx_pause, 1772 priv->prof->rx_ppp); 1773 if (err) { 1774 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 1775 priv->port, err); 1776 goto tx_err; 1777 } 1778 1779 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu); 1780 if (err) { 1781 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n", 1782 dev->mtu, priv->port, err); 1783 goto tx_err; 1784 } 1785 1786 /* Set default qp number */ 1787 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); 1788 if (err) { 1789 en_err(priv, "Failed setting default qp numbers\n"); 1790 goto tx_err; 1791 } 1792 1793 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 1794 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 1795 if (err) { 1796 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 1797 err); 1798 goto tx_err; 1799 } 1800 } 1801 1802 /* Init port */ 1803 en_dbg(HW, priv, "Initializing port\n"); 1804 err = mlx4_INIT_PORT(mdev->dev, priv->port); 1805 if (err) { 1806 en_err(priv, "Failed Initializing port\n"); 1807 goto tx_err; 1808 } 1809 1810 /* Set Unicast and VXLAN steering rules */ 1811 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 && 1812 mlx4_en_set_rss_steer_rules(priv)) 1813 mlx4_warn(mdev, "Failed setting steering rules\n"); 1814 1815 /* Attach rx QP to bradcast address */ 1816 eth_broadcast_addr(&mc_list[10]); 1817 mc_list[5] = priv->port; /* needed for B0 steering support */ 1818 if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list, 1819 priv->port, 0, MLX4_PROT_ETH, 1820 &priv->broadcast_id)) 1821 mlx4_warn(mdev, "Failed Attaching Broadcast\n"); 1822 1823 /* Must redo promiscuous mode setup. */ 1824 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); 1825 1826 /* Schedule multicast task to populate multicast list */ 1827 queue_work(mdev->workqueue, &priv->rx_mode_task); 1828 1829 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 1830 udp_tunnel_get_rx_info(dev); 1831 1832 priv->port_up = true; 1833 1834 /* Process all completions if exist to prevent 1835 * the queues freezing if they are full 1836 */ 1837 for (i = 0; i < priv->rx_ring_num; i++) { 1838 local_bh_disable(); 1839 napi_schedule(&priv->rx_cq[i]->napi); 1840 local_bh_enable(); 1841 } 1842 1843 netif_tx_start_all_queues(dev); 1844 netif_device_attach(dev); 1845 1846 return 0; 1847 1848 tx_err: 1849 if (t == MLX4_EN_NUM_TX_TYPES) { 1850 t--; 1851 i = priv->tx_ring_num[t]; 1852 } 1853 while (t >= 0) { 1854 while (i--) { 1855 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1856 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1857 } 1858 if (!t--) 1859 break; 1860 i = priv->tx_ring_num[t]; 1861 } 1862 mlx4_en_destroy_drop_qp(priv); 1863 rss_err: 1864 mlx4_en_release_rss_steer(priv); 1865 mac_err: 1866 mlx4_en_put_qp(priv); 1867 cq_err: 1868 while (rx_index--) { 1869 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]); 1870 mlx4_en_free_affinity_hint(priv, rx_index); 1871 } 1872 for (i = 0; i < priv->rx_ring_num; i++) 1873 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1874 1875 return err; /* need to close devices */ 1876 } 1877 1878 1879 void mlx4_en_stop_port(struct net_device *dev, int detach) 1880 { 1881 struct mlx4_en_priv *priv = netdev_priv(dev); 1882 struct mlx4_en_dev *mdev = priv->mdev; 1883 struct mlx4_en_mc_list *mclist, *tmp; 1884 struct ethtool_flow_id *flow, *tmp_flow; 1885 int i, t; 1886 u8 mc_list[16] = {0}; 1887 1888 if (!priv->port_up) { 1889 en_dbg(DRV, priv, "stop port called while port already down\n"); 1890 return; 1891 } 1892 1893 /* close port*/ 1894 mlx4_CLOSE_PORT(mdev->dev, priv->port); 1895 1896 /* Synchronize with tx routine */ 1897 netif_tx_lock_bh(dev); 1898 if (detach) 1899 netif_device_detach(dev); 1900 netif_tx_stop_all_queues(dev); 1901 netif_tx_unlock_bh(dev); 1902 1903 netif_tx_disable(dev); 1904 1905 spin_lock_bh(&priv->stats_lock); 1906 mlx4_en_fold_software_stats(dev); 1907 /* Set port as not active */ 1908 priv->port_up = false; 1909 spin_unlock_bh(&priv->stats_lock); 1910 1911 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 1912 1913 /* Promsicuous mode */ 1914 if (mdev->dev->caps.steering_mode == 1915 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1916 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | 1917 MLX4_EN_FLAG_MC_PROMISC); 1918 mlx4_flow_steer_promisc_remove(mdev->dev, 1919 priv->port, 1920 MLX4_FS_ALL_DEFAULT); 1921 mlx4_flow_steer_promisc_remove(mdev->dev, 1922 priv->port, 1923 MLX4_FS_MC_DEFAULT); 1924 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) { 1925 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 1926 1927 /* Disable promiscouos mode */ 1928 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, 1929 priv->port); 1930 1931 /* Disable Multicast promisc */ 1932 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1933 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, 1934 priv->port); 1935 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1936 } 1937 } 1938 1939 /* Detach All multicasts */ 1940 eth_broadcast_addr(&mc_list[10]); 1941 mc_list[5] = priv->port; /* needed for B0 steering support */ 1942 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list, 1943 MLX4_PROT_ETH, priv->broadcast_id); 1944 list_for_each_entry(mclist, &priv->curr_list, list) { 1945 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1946 mc_list[5] = priv->port; 1947 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, 1948 mc_list, MLX4_PROT_ETH, mclist->reg_id); 1949 if (mclist->tunnel_reg_id) 1950 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id); 1951 } 1952 mlx4_en_clear_list(dev); 1953 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1954 list_del(&mclist->list); 1955 kfree(mclist); 1956 } 1957 1958 /* Flush multicast filter */ 1959 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); 1960 1961 /* Remove flow steering rules for the port*/ 1962 if (mdev->dev->caps.steering_mode == 1963 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1964 ASSERT_RTNL(); 1965 list_for_each_entry_safe(flow, tmp_flow, 1966 &priv->ethtool_list, list) { 1967 mlx4_flow_detach(mdev->dev, flow->id); 1968 list_del(&flow->list); 1969 } 1970 } 1971 1972 mlx4_en_destroy_drop_qp(priv); 1973 1974 /* Free TX Rings */ 1975 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 1976 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1977 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1978 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1979 } 1980 } 1981 msleep(10); 1982 1983 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) 1984 for (i = 0; i < priv->tx_ring_num[t]; i++) 1985 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]); 1986 1987 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 1988 mlx4_en_delete_rss_steer_rules(priv); 1989 1990 /* Free RSS qps */ 1991 mlx4_en_release_rss_steer(priv); 1992 1993 /* Unregister Mac address for the port */ 1994 mlx4_en_put_qp(priv); 1995 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN)) 1996 mdev->mac_removed[priv->port] = 1; 1997 1998 /* Free RX Rings */ 1999 for (i = 0; i < priv->rx_ring_num; i++) { 2000 struct mlx4_en_cq *cq = priv->rx_cq[i]; 2001 2002 napi_synchronize(&cq->napi); 2003 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 2004 mlx4_en_deactivate_cq(priv, cq); 2005 2006 mlx4_en_free_affinity_hint(priv, i); 2007 } 2008 } 2009 2010 static void mlx4_en_restart(struct work_struct *work) 2011 { 2012 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2013 watchdog_task); 2014 struct mlx4_en_dev *mdev = priv->mdev; 2015 struct net_device *dev = priv->dev; 2016 2017 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); 2018 2019 rtnl_lock(); 2020 mutex_lock(&mdev->state_lock); 2021 if (priv->port_up) { 2022 mlx4_en_stop_port(dev, 1); 2023 if (mlx4_en_start_port(dev)) 2024 en_err(priv, "Failed restarting port %d\n", priv->port); 2025 } 2026 mutex_unlock(&mdev->state_lock); 2027 rtnl_unlock(); 2028 } 2029 2030 static void mlx4_en_clear_stats(struct net_device *dev) 2031 { 2032 struct mlx4_en_priv *priv = netdev_priv(dev); 2033 struct mlx4_en_dev *mdev = priv->mdev; 2034 struct mlx4_en_tx_ring **tx_ring; 2035 int i; 2036 2037 if (!mlx4_is_slave(mdev->dev)) 2038 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) 2039 en_dbg(HW, priv, "Failed dumping statistics\n"); 2040 2041 memset(&priv->pstats, 0, sizeof(priv->pstats)); 2042 memset(&priv->pkstats, 0, sizeof(priv->pkstats)); 2043 memset(&priv->port_stats, 0, sizeof(priv->port_stats)); 2044 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats)); 2045 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats)); 2046 memset(&priv->rx_priority_flowstats, 0, 2047 sizeof(priv->rx_priority_flowstats)); 2048 memset(&priv->tx_priority_flowstats, 0, 2049 sizeof(priv->tx_priority_flowstats)); 2050 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats)); 2051 2052 tx_ring = priv->tx_ring[TX]; 2053 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 2054 tx_ring[i]->bytes = 0; 2055 tx_ring[i]->packets = 0; 2056 tx_ring[i]->tx_csum = 0; 2057 tx_ring[i]->tx_dropped = 0; 2058 tx_ring[i]->queue_stopped = 0; 2059 tx_ring[i]->wake_queue = 0; 2060 tx_ring[i]->tso_packets = 0; 2061 tx_ring[i]->xmit_more = 0; 2062 } 2063 for (i = 0; i < priv->rx_ring_num; i++) { 2064 priv->rx_ring[i]->bytes = 0; 2065 priv->rx_ring[i]->packets = 0; 2066 priv->rx_ring[i]->csum_ok = 0; 2067 priv->rx_ring[i]->csum_none = 0; 2068 priv->rx_ring[i]->csum_complete = 0; 2069 } 2070 } 2071 2072 static int mlx4_en_open(struct net_device *dev) 2073 { 2074 struct mlx4_en_priv *priv = netdev_priv(dev); 2075 struct mlx4_en_dev *mdev = priv->mdev; 2076 int err = 0; 2077 2078 mutex_lock(&mdev->state_lock); 2079 2080 if (!mdev->device_up) { 2081 en_err(priv, "Cannot open - device down/disabled\n"); 2082 err = -EBUSY; 2083 goto out; 2084 } 2085 2086 /* Reset HW statistics and SW counters */ 2087 mlx4_en_clear_stats(dev); 2088 2089 err = mlx4_en_start_port(dev); 2090 if (err) 2091 en_err(priv, "Failed starting port:%d\n", priv->port); 2092 2093 out: 2094 mutex_unlock(&mdev->state_lock); 2095 return err; 2096 } 2097 2098 2099 static int mlx4_en_close(struct net_device *dev) 2100 { 2101 struct mlx4_en_priv *priv = netdev_priv(dev); 2102 struct mlx4_en_dev *mdev = priv->mdev; 2103 2104 en_dbg(IFDOWN, priv, "Close port called\n"); 2105 2106 mutex_lock(&mdev->state_lock); 2107 2108 mlx4_en_stop_port(dev, 0); 2109 netif_carrier_off(dev); 2110 2111 mutex_unlock(&mdev->state_lock); 2112 return 0; 2113 } 2114 2115 static void mlx4_en_free_resources(struct mlx4_en_priv *priv) 2116 { 2117 int i, t; 2118 2119 #ifdef CONFIG_RFS_ACCEL 2120 priv->dev->rx_cpu_rmap = NULL; 2121 #endif 2122 2123 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2124 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2125 if (priv->tx_ring[t] && priv->tx_ring[t][i]) 2126 mlx4_en_destroy_tx_ring(priv, 2127 &priv->tx_ring[t][i]); 2128 if (priv->tx_cq[t] && priv->tx_cq[t][i]) 2129 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2130 } 2131 kfree(priv->tx_ring[t]); 2132 kfree(priv->tx_cq[t]); 2133 } 2134 2135 for (i = 0; i < priv->rx_ring_num; i++) { 2136 if (priv->rx_ring[i]) 2137 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2138 priv->prof->rx_ring_size, priv->stride); 2139 if (priv->rx_cq[i]) 2140 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2141 } 2142 2143 } 2144 2145 static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) 2146 { 2147 struct mlx4_en_port_profile *prof = priv->prof; 2148 int i, t; 2149 int node; 2150 2151 /* Create tx Rings */ 2152 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2153 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2154 node = cpu_to_node(i % num_online_cpus()); 2155 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i], 2156 prof->tx_ring_size, i, t, node)) 2157 goto err; 2158 2159 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i], 2160 prof->tx_ring_size, 2161 TXBB_SIZE, node, i)) 2162 goto err; 2163 } 2164 } 2165 2166 /* Create rx Rings */ 2167 for (i = 0; i < priv->rx_ring_num; i++) { 2168 node = cpu_to_node(i % num_online_cpus()); 2169 if (mlx4_en_create_cq(priv, &priv->rx_cq[i], 2170 prof->rx_ring_size, i, RX, node)) 2171 goto err; 2172 2173 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], 2174 prof->rx_ring_size, priv->stride, 2175 node, i)) 2176 goto err; 2177 2178 } 2179 2180 #ifdef CONFIG_RFS_ACCEL 2181 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port); 2182 #endif 2183 2184 return 0; 2185 2186 err: 2187 en_err(priv, "Failed to allocate NIC resources\n"); 2188 for (i = 0; i < priv->rx_ring_num; i++) { 2189 if (priv->rx_ring[i]) 2190 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2191 prof->rx_ring_size, 2192 priv->stride); 2193 if (priv->rx_cq[i]) 2194 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2195 } 2196 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2197 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2198 if (priv->tx_ring[t][i]) 2199 mlx4_en_destroy_tx_ring(priv, 2200 &priv->tx_ring[t][i]); 2201 if (priv->tx_cq[t][i]) 2202 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2203 } 2204 } 2205 return -ENOMEM; 2206 } 2207 2208 2209 static int mlx4_en_copy_priv(struct mlx4_en_priv *dst, 2210 struct mlx4_en_priv *src, 2211 struct mlx4_en_port_profile *prof) 2212 { 2213 int t; 2214 2215 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config, 2216 sizeof(dst->hwtstamp_config)); 2217 dst->num_tx_rings_p_up = prof->num_tx_rings_p_up; 2218 dst->rx_ring_num = prof->rx_ring_num; 2219 dst->flags = prof->flags; 2220 dst->mdev = src->mdev; 2221 dst->port = src->port; 2222 dst->dev = src->dev; 2223 dst->prof = prof; 2224 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 2225 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 2226 2227 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2228 dst->tx_ring_num[t] = prof->tx_ring_num[t]; 2229 if (!dst->tx_ring_num[t]) 2230 continue; 2231 2232 dst->tx_ring[t] = kcalloc(MAX_TX_RINGS, 2233 sizeof(struct mlx4_en_tx_ring *), 2234 GFP_KERNEL); 2235 if (!dst->tx_ring[t]) 2236 goto err_free_tx; 2237 2238 dst->tx_cq[t] = kcalloc(MAX_TX_RINGS, 2239 sizeof(struct mlx4_en_cq *), 2240 GFP_KERNEL); 2241 if (!dst->tx_cq[t]) { 2242 kfree(dst->tx_ring[t]); 2243 goto err_free_tx; 2244 } 2245 } 2246 2247 return 0; 2248 2249 err_free_tx: 2250 while (t--) { 2251 kfree(dst->tx_ring[t]); 2252 kfree(dst->tx_cq[t]); 2253 } 2254 return -ENOMEM; 2255 } 2256 2257 static void mlx4_en_update_priv(struct mlx4_en_priv *dst, 2258 struct mlx4_en_priv *src) 2259 { 2260 int t; 2261 memcpy(dst->rx_ring, src->rx_ring, 2262 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num); 2263 memcpy(dst->rx_cq, src->rx_cq, 2264 sizeof(struct mlx4_en_cq *) * src->rx_ring_num); 2265 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config, 2266 sizeof(dst->hwtstamp_config)); 2267 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2268 dst->tx_ring_num[t] = src->tx_ring_num[t]; 2269 dst->tx_ring[t] = src->tx_ring[t]; 2270 dst->tx_cq[t] = src->tx_cq[t]; 2271 } 2272 dst->num_tx_rings_p_up = src->num_tx_rings_p_up; 2273 dst->rx_ring_num = src->rx_ring_num; 2274 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile)); 2275 } 2276 2277 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv, 2278 struct mlx4_en_priv *tmp, 2279 struct mlx4_en_port_profile *prof, 2280 bool carry_xdp_prog) 2281 { 2282 struct bpf_prog *xdp_prog; 2283 int i, t; 2284 2285 mlx4_en_copy_priv(tmp, priv, prof); 2286 2287 if (mlx4_en_alloc_resources(tmp)) { 2288 en_warn(priv, 2289 "%s: Resource allocation failed, using previous configuration\n", 2290 __func__); 2291 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2292 kfree(tmp->tx_ring[t]); 2293 kfree(tmp->tx_cq[t]); 2294 } 2295 return -ENOMEM; 2296 } 2297 2298 /* All rx_rings has the same xdp_prog. Pick the first one. */ 2299 xdp_prog = rcu_dereference_protected( 2300 priv->rx_ring[0]->xdp_prog, 2301 lockdep_is_held(&priv->mdev->state_lock)); 2302 2303 if (xdp_prog && carry_xdp_prog) { 2304 xdp_prog = bpf_prog_add(xdp_prog, tmp->rx_ring_num); 2305 if (IS_ERR(xdp_prog)) { 2306 mlx4_en_free_resources(tmp); 2307 return PTR_ERR(xdp_prog); 2308 } 2309 for (i = 0; i < tmp->rx_ring_num; i++) 2310 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog, 2311 xdp_prog); 2312 } 2313 2314 return 0; 2315 } 2316 2317 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv, 2318 struct mlx4_en_priv *tmp) 2319 { 2320 mlx4_en_free_resources(priv); 2321 mlx4_en_update_priv(priv, tmp); 2322 } 2323 2324 void mlx4_en_destroy_netdev(struct net_device *dev) 2325 { 2326 struct mlx4_en_priv *priv = netdev_priv(dev); 2327 struct mlx4_en_dev *mdev = priv->mdev; 2328 2329 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); 2330 2331 /* Unregister device - this will close the port if it was up */ 2332 if (priv->registered) { 2333 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev, 2334 priv->port)); 2335 unregister_netdev(dev); 2336 } 2337 2338 if (priv->allocated) 2339 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); 2340 2341 cancel_delayed_work(&priv->stats_task); 2342 cancel_delayed_work(&priv->service_task); 2343 /* flush any pending task for this netdev */ 2344 flush_workqueue(mdev->workqueue); 2345 2346 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 2347 mlx4_en_remove_timestamp(mdev); 2348 2349 /* Detach the netdev so tasks would not attempt to access it */ 2350 mutex_lock(&mdev->state_lock); 2351 mdev->pndev[priv->port] = NULL; 2352 mdev->upper[priv->port] = NULL; 2353 2354 #ifdef CONFIG_RFS_ACCEL 2355 mlx4_en_cleanup_filters(priv); 2356 #endif 2357 2358 mlx4_en_free_resources(priv); 2359 mutex_unlock(&mdev->state_lock); 2360 2361 free_netdev(dev); 2362 } 2363 2364 static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu) 2365 { 2366 struct mlx4_en_priv *priv = netdev_priv(dev); 2367 2368 if (mtu > MLX4_EN_MAX_XDP_MTU) { 2369 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n", 2370 mtu, MLX4_EN_MAX_XDP_MTU); 2371 return false; 2372 } 2373 2374 return true; 2375 } 2376 2377 static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) 2378 { 2379 struct mlx4_en_priv *priv = netdev_priv(dev); 2380 struct mlx4_en_dev *mdev = priv->mdev; 2381 int err = 0; 2382 2383 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", 2384 dev->mtu, new_mtu); 2385 2386 if (priv->tx_ring_num[TX_XDP] && 2387 !mlx4_en_check_xdp_mtu(dev, new_mtu)) 2388 return -EOPNOTSUPP; 2389 2390 dev->mtu = new_mtu; 2391 2392 if (netif_running(dev)) { 2393 mutex_lock(&mdev->state_lock); 2394 if (!mdev->device_up) { 2395 /* NIC is probably restarting - let watchdog task reset 2396 * the port */ 2397 en_dbg(DRV, priv, "Change MTU called with card down!?\n"); 2398 } else { 2399 mlx4_en_stop_port(dev, 1); 2400 err = mlx4_en_start_port(dev); 2401 if (err) { 2402 en_err(priv, "Failed restarting port:%d\n", 2403 priv->port); 2404 queue_work(mdev->workqueue, &priv->watchdog_task); 2405 } 2406 } 2407 mutex_unlock(&mdev->state_lock); 2408 } 2409 return 0; 2410 } 2411 2412 static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 2413 { 2414 struct mlx4_en_priv *priv = netdev_priv(dev); 2415 struct mlx4_en_dev *mdev = priv->mdev; 2416 struct hwtstamp_config config; 2417 2418 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 2419 return -EFAULT; 2420 2421 /* reserved for future extensions */ 2422 if (config.flags) 2423 return -EINVAL; 2424 2425 /* device doesn't support time stamping */ 2426 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)) 2427 return -EINVAL; 2428 2429 /* TX HW timestamp */ 2430 switch (config.tx_type) { 2431 case HWTSTAMP_TX_OFF: 2432 case HWTSTAMP_TX_ON: 2433 break; 2434 default: 2435 return -ERANGE; 2436 } 2437 2438 /* RX HW timestamp */ 2439 switch (config.rx_filter) { 2440 case HWTSTAMP_FILTER_NONE: 2441 break; 2442 case HWTSTAMP_FILTER_ALL: 2443 case HWTSTAMP_FILTER_SOME: 2444 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2445 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2446 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2447 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2448 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2449 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2450 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2451 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2452 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2453 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2454 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2455 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2456 case HWTSTAMP_FILTER_NTP_ALL: 2457 config.rx_filter = HWTSTAMP_FILTER_ALL; 2458 break; 2459 default: 2460 return -ERANGE; 2461 } 2462 2463 if (mlx4_en_reset_config(dev, config, dev->features)) { 2464 config.tx_type = HWTSTAMP_TX_OFF; 2465 config.rx_filter = HWTSTAMP_FILTER_NONE; 2466 } 2467 2468 return copy_to_user(ifr->ifr_data, &config, 2469 sizeof(config)) ? -EFAULT : 0; 2470 } 2471 2472 static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 2473 { 2474 struct mlx4_en_priv *priv = netdev_priv(dev); 2475 2476 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config, 2477 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0; 2478 } 2479 2480 static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 2481 { 2482 switch (cmd) { 2483 case SIOCSHWTSTAMP: 2484 return mlx4_en_hwtstamp_set(dev, ifr); 2485 case SIOCGHWTSTAMP: 2486 return mlx4_en_hwtstamp_get(dev, ifr); 2487 default: 2488 return -EOPNOTSUPP; 2489 } 2490 } 2491 2492 static netdev_features_t mlx4_en_fix_features(struct net_device *netdev, 2493 netdev_features_t features) 2494 { 2495 struct mlx4_en_priv *en_priv = netdev_priv(netdev); 2496 struct mlx4_en_dev *mdev = en_priv->mdev; 2497 2498 /* Since there is no support for separate RX C-TAG/S-TAG vlan accel 2499 * enable/disable make sure S-TAG flag is always in same state as 2500 * C-TAG. 2501 */ 2502 if (features & NETIF_F_HW_VLAN_CTAG_RX && 2503 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 2504 features |= NETIF_F_HW_VLAN_STAG_RX; 2505 else 2506 features &= ~NETIF_F_HW_VLAN_STAG_RX; 2507 2508 return features; 2509 } 2510 2511 static int mlx4_en_set_features(struct net_device *netdev, 2512 netdev_features_t features) 2513 { 2514 struct mlx4_en_priv *priv = netdev_priv(netdev); 2515 bool reset = false; 2516 int ret = 0; 2517 2518 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) { 2519 en_info(priv, "Turn %s RX-FCS\n", 2520 (features & NETIF_F_RXFCS) ? "ON" : "OFF"); 2521 reset = true; 2522 } 2523 2524 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) { 2525 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0; 2526 2527 en_info(priv, "Turn %s RX-ALL\n", 2528 ignore_fcs_value ? "ON" : "OFF"); 2529 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev, 2530 priv->port, ignore_fcs_value); 2531 if (ret) 2532 return ret; 2533 } 2534 2535 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 2536 en_info(priv, "Turn %s RX vlan strip offload\n", 2537 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF"); 2538 reset = true; 2539 } 2540 2541 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX)) 2542 en_info(priv, "Turn %s TX vlan strip offload\n", 2543 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF"); 2544 2545 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX)) 2546 en_info(priv, "Turn %s TX S-VLAN strip offload\n", 2547 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF"); 2548 2549 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) { 2550 en_info(priv, "Turn %s loopback\n", 2551 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF"); 2552 mlx4_en_update_loopback_state(netdev, features); 2553 } 2554 2555 if (reset) { 2556 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config, 2557 features); 2558 if (ret) 2559 return ret; 2560 } 2561 2562 return 0; 2563 } 2564 2565 static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac) 2566 { 2567 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2568 struct mlx4_en_dev *mdev = en_priv->mdev; 2569 2570 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac); 2571 } 2572 2573 static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos, 2574 __be16 vlan_proto) 2575 { 2576 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2577 struct mlx4_en_dev *mdev = en_priv->mdev; 2578 2579 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos, 2580 vlan_proto); 2581 } 2582 2583 static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate, 2584 int max_tx_rate) 2585 { 2586 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2587 struct mlx4_en_dev *mdev = en_priv->mdev; 2588 2589 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate, 2590 max_tx_rate); 2591 } 2592 2593 static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting) 2594 { 2595 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2596 struct mlx4_en_dev *mdev = en_priv->mdev; 2597 2598 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting); 2599 } 2600 2601 static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf) 2602 { 2603 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2604 struct mlx4_en_dev *mdev = en_priv->mdev; 2605 2606 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf); 2607 } 2608 2609 static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state) 2610 { 2611 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2612 struct mlx4_en_dev *mdev = en_priv->mdev; 2613 2614 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state); 2615 } 2616 2617 static int mlx4_en_get_vf_stats(struct net_device *dev, int vf, 2618 struct ifla_vf_stats *vf_stats) 2619 { 2620 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2621 struct mlx4_en_dev *mdev = en_priv->mdev; 2622 2623 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats); 2624 } 2625 2626 #define PORT_ID_BYTE_LEN 8 2627 static int mlx4_en_get_phys_port_id(struct net_device *dev, 2628 struct netdev_phys_item_id *ppid) 2629 { 2630 struct mlx4_en_priv *priv = netdev_priv(dev); 2631 struct mlx4_dev *mdev = priv->mdev->dev; 2632 int i; 2633 u64 phys_port_id = mdev->caps.phys_port_id[priv->port]; 2634 2635 if (!phys_port_id) 2636 return -EOPNOTSUPP; 2637 2638 ppid->id_len = sizeof(phys_port_id); 2639 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) { 2640 ppid->id[i] = phys_port_id & 0xff; 2641 phys_port_id >>= 8; 2642 } 2643 return 0; 2644 } 2645 2646 static void mlx4_en_add_vxlan_offloads(struct work_struct *work) 2647 { 2648 int ret; 2649 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2650 vxlan_add_task); 2651 2652 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port); 2653 if (ret) 2654 goto out; 2655 2656 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2657 VXLAN_STEER_BY_OUTER_MAC, 1); 2658 out: 2659 if (ret) { 2660 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret); 2661 return; 2662 } 2663 2664 /* set offloads */ 2665 priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2666 NETIF_F_RXCSUM | 2667 NETIF_F_TSO | NETIF_F_TSO6 | 2668 NETIF_F_GSO_UDP_TUNNEL | 2669 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2670 NETIF_F_GSO_PARTIAL; 2671 } 2672 2673 static void mlx4_en_del_vxlan_offloads(struct work_struct *work) 2674 { 2675 int ret; 2676 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2677 vxlan_del_task); 2678 /* unset offloads */ 2679 priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2680 NETIF_F_RXCSUM | 2681 NETIF_F_TSO | NETIF_F_TSO6 | 2682 NETIF_F_GSO_UDP_TUNNEL | 2683 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2684 NETIF_F_GSO_PARTIAL); 2685 2686 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2687 VXLAN_STEER_BY_OUTER_MAC, 0); 2688 if (ret) 2689 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret); 2690 2691 priv->vxlan_port = 0; 2692 } 2693 2694 static void mlx4_en_add_vxlan_port(struct net_device *dev, 2695 struct udp_tunnel_info *ti) 2696 { 2697 struct mlx4_en_priv *priv = netdev_priv(dev); 2698 __be16 port = ti->port; 2699 __be16 current_port; 2700 2701 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2702 return; 2703 2704 if (ti->sa_family != AF_INET) 2705 return; 2706 2707 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 2708 return; 2709 2710 current_port = priv->vxlan_port; 2711 if (current_port && current_port != port) { 2712 en_warn(priv, "vxlan port %d configured, can't add port %d\n", 2713 ntohs(current_port), ntohs(port)); 2714 return; 2715 } 2716 2717 priv->vxlan_port = port; 2718 queue_work(priv->mdev->workqueue, &priv->vxlan_add_task); 2719 } 2720 2721 static void mlx4_en_del_vxlan_port(struct net_device *dev, 2722 struct udp_tunnel_info *ti) 2723 { 2724 struct mlx4_en_priv *priv = netdev_priv(dev); 2725 __be16 port = ti->port; 2726 __be16 current_port; 2727 2728 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2729 return; 2730 2731 if (ti->sa_family != AF_INET) 2732 return; 2733 2734 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 2735 return; 2736 2737 current_port = priv->vxlan_port; 2738 if (current_port != port) { 2739 en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port)); 2740 return; 2741 } 2742 2743 queue_work(priv->mdev->workqueue, &priv->vxlan_del_task); 2744 } 2745 2746 static netdev_features_t mlx4_en_features_check(struct sk_buff *skb, 2747 struct net_device *dev, 2748 netdev_features_t features) 2749 { 2750 features = vlan_features_check(skb, features); 2751 features = vxlan_features_check(skb, features); 2752 2753 /* The ConnectX-3 doesn't support outer IPv6 checksums but it does 2754 * support inner IPv6 checksums and segmentation so we need to 2755 * strip that feature if this is an IPv6 encapsulated frame. 2756 */ 2757 if (skb->encapsulation && 2758 (skb->ip_summed == CHECKSUM_PARTIAL)) { 2759 struct mlx4_en_priv *priv = netdev_priv(dev); 2760 2761 if (!priv->vxlan_port || 2762 (ip_hdr(skb)->version != 4) || 2763 (udp_hdr(skb)->dest != priv->vxlan_port)) 2764 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 2765 } 2766 2767 return features; 2768 } 2769 2770 static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate) 2771 { 2772 struct mlx4_en_priv *priv = netdev_priv(dev); 2773 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index]; 2774 struct mlx4_update_qp_params params; 2775 int err; 2776 2777 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT)) 2778 return -EOPNOTSUPP; 2779 2780 /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */ 2781 if (maxrate >> 12) { 2782 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS; 2783 params.rate_val = maxrate / 1000; 2784 } else if (maxrate) { 2785 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS; 2786 params.rate_val = maxrate; 2787 } else { /* zero serves to revoke the QP rate-limitation */ 2788 params.rate_unit = 0; 2789 params.rate_val = 0; 2790 } 2791 2792 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT, 2793 ¶ms); 2794 return err; 2795 } 2796 2797 static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog) 2798 { 2799 struct mlx4_en_priv *priv = netdev_priv(dev); 2800 struct mlx4_en_dev *mdev = priv->mdev; 2801 struct mlx4_en_port_profile new_prof; 2802 struct bpf_prog *old_prog; 2803 struct mlx4_en_priv *tmp; 2804 int tx_changed = 0; 2805 int xdp_ring_num; 2806 int port_up = 0; 2807 int err; 2808 int i; 2809 2810 xdp_ring_num = prog ? priv->rx_ring_num : 0; 2811 2812 /* No need to reconfigure buffers when simply swapping the 2813 * program for a new one. 2814 */ 2815 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) { 2816 if (prog) { 2817 prog = bpf_prog_add(prog, priv->rx_ring_num - 1); 2818 if (IS_ERR(prog)) 2819 return PTR_ERR(prog); 2820 } 2821 mutex_lock(&mdev->state_lock); 2822 for (i = 0; i < priv->rx_ring_num; i++) { 2823 old_prog = rcu_dereference_protected( 2824 priv->rx_ring[i]->xdp_prog, 2825 lockdep_is_held(&mdev->state_lock)); 2826 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2827 if (old_prog) 2828 bpf_prog_put(old_prog); 2829 } 2830 mutex_unlock(&mdev->state_lock); 2831 return 0; 2832 } 2833 2834 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu)) 2835 return -EOPNOTSUPP; 2836 2837 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 2838 if (!tmp) 2839 return -ENOMEM; 2840 2841 if (prog) { 2842 prog = bpf_prog_add(prog, priv->rx_ring_num - 1); 2843 if (IS_ERR(prog)) { 2844 err = PTR_ERR(prog); 2845 goto out; 2846 } 2847 } 2848 2849 mutex_lock(&mdev->state_lock); 2850 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 2851 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num; 2852 2853 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) { 2854 tx_changed = 1; 2855 new_prof.tx_ring_num[TX] = 2856 MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up); 2857 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n"); 2858 } 2859 2860 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false); 2861 if (err) { 2862 if (prog) 2863 bpf_prog_sub(prog, priv->rx_ring_num - 1); 2864 goto unlock_out; 2865 } 2866 2867 if (priv->port_up) { 2868 port_up = 1; 2869 mlx4_en_stop_port(dev, 1); 2870 } 2871 2872 mlx4_en_safe_replace_resources(priv, tmp); 2873 if (tx_changed) 2874 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 2875 2876 for (i = 0; i < priv->rx_ring_num; i++) { 2877 old_prog = rcu_dereference_protected( 2878 priv->rx_ring[i]->xdp_prog, 2879 lockdep_is_held(&mdev->state_lock)); 2880 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2881 if (old_prog) 2882 bpf_prog_put(old_prog); 2883 } 2884 2885 if (port_up) { 2886 err = mlx4_en_start_port(dev); 2887 if (err) { 2888 en_err(priv, "Failed starting port %d for XDP change\n", 2889 priv->port); 2890 queue_work(mdev->workqueue, &priv->watchdog_task); 2891 } 2892 } 2893 2894 unlock_out: 2895 mutex_unlock(&mdev->state_lock); 2896 out: 2897 kfree(tmp); 2898 return err; 2899 } 2900 2901 static u32 mlx4_xdp_query(struct net_device *dev) 2902 { 2903 struct mlx4_en_priv *priv = netdev_priv(dev); 2904 struct mlx4_en_dev *mdev = priv->mdev; 2905 const struct bpf_prog *xdp_prog; 2906 u32 prog_id = 0; 2907 2908 if (!priv->tx_ring_num[TX_XDP]) 2909 return prog_id; 2910 2911 mutex_lock(&mdev->state_lock); 2912 xdp_prog = rcu_dereference_protected( 2913 priv->rx_ring[0]->xdp_prog, 2914 lockdep_is_held(&mdev->state_lock)); 2915 if (xdp_prog) 2916 prog_id = xdp_prog->aux->id; 2917 mutex_unlock(&mdev->state_lock); 2918 2919 return prog_id; 2920 } 2921 2922 static int mlx4_xdp(struct net_device *dev, struct netdev_bpf *xdp) 2923 { 2924 switch (xdp->command) { 2925 case XDP_SETUP_PROG: 2926 return mlx4_xdp_set(dev, xdp->prog); 2927 case XDP_QUERY_PROG: 2928 xdp->prog_id = mlx4_xdp_query(dev); 2929 return 0; 2930 default: 2931 return -EINVAL; 2932 } 2933 } 2934 2935 static const struct net_device_ops mlx4_netdev_ops = { 2936 .ndo_open = mlx4_en_open, 2937 .ndo_stop = mlx4_en_close, 2938 .ndo_start_xmit = mlx4_en_xmit, 2939 .ndo_select_queue = mlx4_en_select_queue, 2940 .ndo_get_stats64 = mlx4_en_get_stats64, 2941 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2942 .ndo_set_mac_address = mlx4_en_set_mac, 2943 .ndo_validate_addr = eth_validate_addr, 2944 .ndo_change_mtu = mlx4_en_change_mtu, 2945 .ndo_do_ioctl = mlx4_en_ioctl, 2946 .ndo_tx_timeout = mlx4_en_tx_timeout, 2947 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2948 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2949 #ifdef CONFIG_NET_POLL_CONTROLLER 2950 .ndo_poll_controller = mlx4_en_netpoll, 2951 #endif 2952 .ndo_set_features = mlx4_en_set_features, 2953 .ndo_fix_features = mlx4_en_fix_features, 2954 .ndo_setup_tc = __mlx4_en_setup_tc, 2955 #ifdef CONFIG_RFS_ACCEL 2956 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2957 #endif 2958 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2959 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port, 2960 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port, 2961 .ndo_features_check = mlx4_en_features_check, 2962 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2963 .ndo_bpf = mlx4_xdp, 2964 }; 2965 2966 static const struct net_device_ops mlx4_netdev_ops_master = { 2967 .ndo_open = mlx4_en_open, 2968 .ndo_stop = mlx4_en_close, 2969 .ndo_start_xmit = mlx4_en_xmit, 2970 .ndo_select_queue = mlx4_en_select_queue, 2971 .ndo_get_stats64 = mlx4_en_get_stats64, 2972 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2973 .ndo_set_mac_address = mlx4_en_set_mac, 2974 .ndo_validate_addr = eth_validate_addr, 2975 .ndo_change_mtu = mlx4_en_change_mtu, 2976 .ndo_tx_timeout = mlx4_en_tx_timeout, 2977 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2978 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2979 .ndo_set_vf_mac = mlx4_en_set_vf_mac, 2980 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan, 2981 .ndo_set_vf_rate = mlx4_en_set_vf_rate, 2982 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk, 2983 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state, 2984 .ndo_get_vf_stats = mlx4_en_get_vf_stats, 2985 .ndo_get_vf_config = mlx4_en_get_vf_config, 2986 #ifdef CONFIG_NET_POLL_CONTROLLER 2987 .ndo_poll_controller = mlx4_en_netpoll, 2988 #endif 2989 .ndo_set_features = mlx4_en_set_features, 2990 .ndo_fix_features = mlx4_en_fix_features, 2991 .ndo_setup_tc = __mlx4_en_setup_tc, 2992 #ifdef CONFIG_RFS_ACCEL 2993 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2994 #endif 2995 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2996 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port, 2997 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port, 2998 .ndo_features_check = mlx4_en_features_check, 2999 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 3000 .ndo_bpf = mlx4_xdp, 3001 }; 3002 3003 struct mlx4_en_bond { 3004 struct work_struct work; 3005 struct mlx4_en_priv *priv; 3006 int is_bonded; 3007 struct mlx4_port_map port_map; 3008 }; 3009 3010 static void mlx4_en_bond_work(struct work_struct *work) 3011 { 3012 struct mlx4_en_bond *bond = container_of(work, 3013 struct mlx4_en_bond, 3014 work); 3015 int err = 0; 3016 struct mlx4_dev *dev = bond->priv->mdev->dev; 3017 3018 if (bond->is_bonded) { 3019 if (!mlx4_is_bonded(dev)) { 3020 err = mlx4_bond(dev); 3021 if (err) 3022 en_err(bond->priv, "Fail to bond device\n"); 3023 } 3024 if (!err) { 3025 err = mlx4_port_map_set(dev, &bond->port_map); 3026 if (err) 3027 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n", 3028 bond->port_map.port1, 3029 bond->port_map.port2, 3030 err); 3031 } 3032 } else if (mlx4_is_bonded(dev)) { 3033 err = mlx4_unbond(dev); 3034 if (err) 3035 en_err(bond->priv, "Fail to unbond device\n"); 3036 } 3037 dev_put(bond->priv->dev); 3038 kfree(bond); 3039 } 3040 3041 static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded, 3042 u8 v2p_p1, u8 v2p_p2) 3043 { 3044 struct mlx4_en_bond *bond = NULL; 3045 3046 bond = kzalloc(sizeof(*bond), GFP_ATOMIC); 3047 if (!bond) 3048 return -ENOMEM; 3049 3050 INIT_WORK(&bond->work, mlx4_en_bond_work); 3051 bond->priv = priv; 3052 bond->is_bonded = is_bonded; 3053 bond->port_map.port1 = v2p_p1; 3054 bond->port_map.port2 = v2p_p2; 3055 dev_hold(priv->dev); 3056 queue_work(priv->mdev->workqueue, &bond->work); 3057 return 0; 3058 } 3059 3060 int mlx4_en_netdev_event(struct notifier_block *this, 3061 unsigned long event, void *ptr) 3062 { 3063 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 3064 u8 port = 0; 3065 struct mlx4_en_dev *mdev; 3066 struct mlx4_dev *dev; 3067 int i, num_eth_ports = 0; 3068 bool do_bond = true; 3069 struct mlx4_en_priv *priv; 3070 u8 v2p_port1 = 0; 3071 u8 v2p_port2 = 0; 3072 3073 if (!net_eq(dev_net(ndev), &init_net)) 3074 return NOTIFY_DONE; 3075 3076 mdev = container_of(this, struct mlx4_en_dev, nb); 3077 dev = mdev->dev; 3078 3079 /* Go into this mode only when two network devices set on two ports 3080 * of the same mlx4 device are slaves of the same bonding master 3081 */ 3082 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { 3083 ++num_eth_ports; 3084 if (!port && (mdev->pndev[i] == ndev)) 3085 port = i; 3086 mdev->upper[i] = mdev->pndev[i] ? 3087 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL; 3088 /* condition not met: network device is a slave */ 3089 if (!mdev->upper[i]) 3090 do_bond = false; 3091 if (num_eth_ports < 2) 3092 continue; 3093 /* condition not met: same master */ 3094 if (mdev->upper[i] != mdev->upper[i-1]) 3095 do_bond = false; 3096 } 3097 /* condition not met: 2 salves */ 3098 do_bond = (num_eth_ports == 2) ? do_bond : false; 3099 3100 /* handle only events that come with enough info */ 3101 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port) 3102 return NOTIFY_DONE; 3103 3104 priv = netdev_priv(ndev); 3105 if (do_bond) { 3106 struct netdev_notifier_bonding_info *notifier_info = ptr; 3107 struct netdev_bonding_info *bonding_info = 3108 ¬ifier_info->bonding_info; 3109 3110 /* required mode 1, 2 or 4 */ 3111 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) && 3112 (bonding_info->master.bond_mode != BOND_MODE_XOR) && 3113 (bonding_info->master.bond_mode != BOND_MODE_8023AD)) 3114 do_bond = false; 3115 3116 /* require exactly 2 slaves */ 3117 if (bonding_info->master.num_slaves != 2) 3118 do_bond = false; 3119 3120 /* calc v2p */ 3121 if (do_bond) { 3122 if (bonding_info->master.bond_mode == 3123 BOND_MODE_ACTIVEBACKUP) { 3124 /* in active-backup mode virtual ports are 3125 * mapped to the physical port of the active 3126 * slave */ 3127 if (bonding_info->slave.state == 3128 BOND_STATE_BACKUP) { 3129 if (port == 1) { 3130 v2p_port1 = 2; 3131 v2p_port2 = 2; 3132 } else { 3133 v2p_port1 = 1; 3134 v2p_port2 = 1; 3135 } 3136 } else { /* BOND_STATE_ACTIVE */ 3137 if (port == 1) { 3138 v2p_port1 = 1; 3139 v2p_port2 = 1; 3140 } else { 3141 v2p_port1 = 2; 3142 v2p_port2 = 2; 3143 } 3144 } 3145 } else { /* Active-Active */ 3146 /* in active-active mode a virtual port is 3147 * mapped to the native physical port if and only 3148 * if the physical port is up */ 3149 __s8 link = bonding_info->slave.link; 3150 3151 if (port == 1) 3152 v2p_port2 = 2; 3153 else 3154 v2p_port1 = 1; 3155 if ((link == BOND_LINK_UP) || 3156 (link == BOND_LINK_FAIL)) { 3157 if (port == 1) 3158 v2p_port1 = 1; 3159 else 3160 v2p_port2 = 2; 3161 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */ 3162 if (port == 1) 3163 v2p_port1 = 2; 3164 else 3165 v2p_port2 = 1; 3166 } 3167 } 3168 } 3169 } 3170 3171 mlx4_en_queue_bond_work(priv, do_bond, 3172 v2p_port1, v2p_port2); 3173 3174 return NOTIFY_DONE; 3175 } 3176 3177 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev, 3178 struct mlx4_en_stats_bitmap *stats_bitmap, 3179 u8 rx_ppp, u8 rx_pause, 3180 u8 tx_ppp, u8 tx_pause) 3181 { 3182 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS; 3183 3184 if (!mlx4_is_slave(dev) && 3185 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) { 3186 mutex_lock(&stats_bitmap->mutex); 3187 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS); 3188 3189 if (rx_ppp) 3190 bitmap_set(stats_bitmap->bitmap, last_i, 3191 NUM_FLOW_PRIORITY_STATS_RX); 3192 last_i += NUM_FLOW_PRIORITY_STATS_RX; 3193 3194 if (rx_pause && !(rx_ppp)) 3195 bitmap_set(stats_bitmap->bitmap, last_i, 3196 NUM_FLOW_STATS_RX); 3197 last_i += NUM_FLOW_STATS_RX; 3198 3199 if (tx_ppp) 3200 bitmap_set(stats_bitmap->bitmap, last_i, 3201 NUM_FLOW_PRIORITY_STATS_TX); 3202 last_i += NUM_FLOW_PRIORITY_STATS_TX; 3203 3204 if (tx_pause && !(tx_ppp)) 3205 bitmap_set(stats_bitmap->bitmap, last_i, 3206 NUM_FLOW_STATS_TX); 3207 last_i += NUM_FLOW_STATS_TX; 3208 3209 mutex_unlock(&stats_bitmap->mutex); 3210 } 3211 } 3212 3213 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev, 3214 struct mlx4_en_stats_bitmap *stats_bitmap, 3215 u8 rx_ppp, u8 rx_pause, 3216 u8 tx_ppp, u8 tx_pause) 3217 { 3218 int last_i = 0; 3219 3220 mutex_init(&stats_bitmap->mutex); 3221 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS); 3222 3223 if (mlx4_is_slave(dev)) { 3224 bitmap_set(stats_bitmap->bitmap, last_i + 3225 MLX4_FIND_NETDEV_STAT(rx_packets), 1); 3226 bitmap_set(stats_bitmap->bitmap, last_i + 3227 MLX4_FIND_NETDEV_STAT(tx_packets), 1); 3228 bitmap_set(stats_bitmap->bitmap, last_i + 3229 MLX4_FIND_NETDEV_STAT(rx_bytes), 1); 3230 bitmap_set(stats_bitmap->bitmap, last_i + 3231 MLX4_FIND_NETDEV_STAT(tx_bytes), 1); 3232 bitmap_set(stats_bitmap->bitmap, last_i + 3233 MLX4_FIND_NETDEV_STAT(rx_dropped), 1); 3234 bitmap_set(stats_bitmap->bitmap, last_i + 3235 MLX4_FIND_NETDEV_STAT(tx_dropped), 1); 3236 } else { 3237 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS); 3238 } 3239 last_i += NUM_MAIN_STATS; 3240 3241 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS); 3242 last_i += NUM_PORT_STATS; 3243 3244 if (mlx4_is_master(dev)) 3245 bitmap_set(stats_bitmap->bitmap, last_i, 3246 NUM_PF_STATS); 3247 last_i += NUM_PF_STATS; 3248 3249 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap, 3250 rx_ppp, rx_pause, 3251 tx_ppp, tx_pause); 3252 last_i += NUM_FLOW_STATS; 3253 3254 if (!mlx4_is_slave(dev)) 3255 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS); 3256 last_i += NUM_PKT_STATS; 3257 3258 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS); 3259 last_i += NUM_XDP_STATS; 3260 3261 if (!mlx4_is_slave(dev)) 3262 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PHY_STATS); 3263 last_i += NUM_PHY_STATS; 3264 } 3265 3266 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 3267 struct mlx4_en_port_profile *prof) 3268 { 3269 struct net_device *dev; 3270 struct mlx4_en_priv *priv; 3271 int i, t; 3272 int err; 3273 3274 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv), 3275 MAX_TX_RINGS, MAX_RX_RINGS); 3276 if (dev == NULL) 3277 return -ENOMEM; 3278 3279 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]); 3280 netif_set_real_num_rx_queues(dev, prof->rx_ring_num); 3281 3282 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev); 3283 dev->dev_port = port - 1; 3284 3285 /* 3286 * Initialize driver private data 3287 */ 3288 3289 priv = netdev_priv(dev); 3290 memset(priv, 0, sizeof(struct mlx4_en_priv)); 3291 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 3292 spin_lock_init(&priv->stats_lock); 3293 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode); 3294 INIT_WORK(&priv->watchdog_task, mlx4_en_restart); 3295 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); 3296 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); 3297 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task); 3298 INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads); 3299 INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads); 3300 #ifdef CONFIG_RFS_ACCEL 3301 INIT_LIST_HEAD(&priv->filters); 3302 spin_lock_init(&priv->filters_lock); 3303 #endif 3304 3305 priv->dev = dev; 3306 priv->mdev = mdev; 3307 priv->ddev = &mdev->pdev->dev; 3308 priv->prof = prof; 3309 priv->port = port; 3310 priv->port_up = false; 3311 priv->flags = prof->flags; 3312 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME; 3313 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | 3314 MLX4_WQE_CTRL_SOLICITED); 3315 priv->num_tx_rings_p_up = mdev->profile.max_num_tx_rings_p_up; 3316 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK; 3317 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key)); 3318 3319 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 3320 priv->tx_ring_num[t] = prof->tx_ring_num[t]; 3321 if (!priv->tx_ring_num[t]) 3322 continue; 3323 3324 priv->tx_ring[t] = kcalloc(MAX_TX_RINGS, 3325 sizeof(struct mlx4_en_tx_ring *), 3326 GFP_KERNEL); 3327 if (!priv->tx_ring[t]) { 3328 err = -ENOMEM; 3329 goto out; 3330 } 3331 priv->tx_cq[t] = kcalloc(MAX_TX_RINGS, 3332 sizeof(struct mlx4_en_cq *), 3333 GFP_KERNEL); 3334 if (!priv->tx_cq[t]) { 3335 err = -ENOMEM; 3336 goto out; 3337 } 3338 } 3339 priv->rx_ring_num = prof->rx_ring_num; 3340 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0; 3341 priv->cqe_size = mdev->dev->caps.cqe_size; 3342 priv->mac_index = -1; 3343 priv->msg_enable = MLX4_EN_MSG_LEVEL; 3344 #ifdef CONFIG_MLX4_EN_DCB 3345 if (!mlx4_is_slave(priv->mdev->dev)) { 3346 u8 prio; 3347 3348 for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) { 3349 priv->ets.prio_tc[prio] = prio; 3350 priv->ets.tc_tsa[prio] = IEEE_8021QAZ_TSA_VENDOR; 3351 } 3352 3353 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST | 3354 DCB_CAP_DCBX_VER_IEEE; 3355 priv->flags |= MLX4_EN_DCB_ENABLED; 3356 priv->cee_config.pfc_state = false; 3357 3358 for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++) 3359 priv->cee_config.dcb_pfc[i] = pfc_disabled; 3360 3361 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) { 3362 dev->dcbnl_ops = &mlx4_en_dcbnl_ops; 3363 } else { 3364 en_info(priv, "enabling only PFC DCB ops\n"); 3365 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops; 3366 } 3367 } 3368 #endif 3369 3370 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) 3371 INIT_HLIST_HEAD(&priv->mac_hash[i]); 3372 3373 /* Query for default mac and max mtu */ 3374 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; 3375 3376 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] & 3377 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP) 3378 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP; 3379 3380 /* Set default MAC */ 3381 dev->addr_len = ETH_ALEN; 3382 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]); 3383 if (!is_valid_ether_addr(dev->dev_addr)) { 3384 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n", 3385 priv->port, dev->dev_addr); 3386 err = -EINVAL; 3387 goto out; 3388 } else if (mlx4_is_slave(priv->mdev->dev) && 3389 (priv->mdev->dev->port_random_macs & 1 << priv->port)) { 3390 /* Random MAC was assigned in mlx4_slave_cap 3391 * in mlx4_core module 3392 */ 3393 dev->addr_assign_type |= NET_ADDR_RANDOM; 3394 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr); 3395 } 3396 3397 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac)); 3398 3399 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 3400 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 3401 err = mlx4_en_alloc_resources(priv); 3402 if (err) 3403 goto out; 3404 3405 /* Initialize time stamping config */ 3406 priv->hwtstamp_config.flags = 0; 3407 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF; 3408 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; 3409 3410 /* Allocate page for receive rings */ 3411 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, 3412 MLX4_EN_PAGE_SIZE); 3413 if (err) { 3414 en_err(priv, "Failed to allocate page for rx qps\n"); 3415 goto out; 3416 } 3417 priv->allocated = 1; 3418 3419 /* 3420 * Initialize netdev entry points 3421 */ 3422 if (mlx4_is_master(priv->mdev->dev)) 3423 dev->netdev_ops = &mlx4_netdev_ops_master; 3424 else 3425 dev->netdev_ops = &mlx4_netdev_ops; 3426 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; 3427 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 3428 netif_set_real_num_rx_queues(dev, priv->rx_ring_num); 3429 3430 dev->ethtool_ops = &mlx4_en_ethtool_ops; 3431 3432 /* 3433 * Set driver features 3434 */ 3435 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 3436 if (mdev->LSO_support) 3437 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6; 3438 3439 dev->vlan_features = dev->hw_features; 3440 3441 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH; 3442 dev->features = dev->hw_features | NETIF_F_HIGHDMA | 3443 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 3444 NETIF_F_HW_VLAN_CTAG_FILTER; 3445 dev->hw_features |= NETIF_F_LOOPBACK | 3446 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 3447 3448 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) { 3449 dev->features |= NETIF_F_HW_VLAN_STAG_RX | 3450 NETIF_F_HW_VLAN_STAG_FILTER; 3451 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX; 3452 } 3453 3454 if (mlx4_is_slave(mdev->dev)) { 3455 bool vlan_offload_disabled; 3456 int phv; 3457 3458 err = get_phv_bit(mdev->dev, port, &phv); 3459 if (!err && phv) { 3460 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3461 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV; 3462 } 3463 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port, 3464 &vlan_offload_disabled); 3465 if (!err && vlan_offload_disabled) { 3466 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3467 NETIF_F_HW_VLAN_CTAG_RX | 3468 NETIF_F_HW_VLAN_STAG_TX | 3469 NETIF_F_HW_VLAN_STAG_RX); 3470 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3471 NETIF_F_HW_VLAN_CTAG_RX | 3472 NETIF_F_HW_VLAN_STAG_TX | 3473 NETIF_F_HW_VLAN_STAG_RX); 3474 } 3475 } else { 3476 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN && 3477 !(mdev->dev->caps.flags2 & 3478 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 3479 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3480 } 3481 3482 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) 3483 dev->hw_features |= NETIF_F_RXFCS; 3484 3485 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS) 3486 dev->hw_features |= NETIF_F_RXALL; 3487 3488 if (mdev->dev->caps.steering_mode == 3489 MLX4_STEERING_MODE_DEVICE_MANAGED && 3490 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC) 3491 dev->hw_features |= NETIF_F_NTUPLE; 3492 3493 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 3494 dev->priv_flags |= IFF_UNICAST_FLT; 3495 3496 /* Setting a default hash function value */ 3497 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) { 3498 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3499 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) { 3500 priv->rss_hash_fn = ETH_RSS_HASH_XOR; 3501 } else { 3502 en_warn(priv, 3503 "No RSS hash capabilities exposed, using Toeplitz\n"); 3504 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3505 } 3506 3507 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3508 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | 3509 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3510 NETIF_F_GSO_PARTIAL; 3511 dev->features |= NETIF_F_GSO_UDP_TUNNEL | 3512 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3513 NETIF_F_GSO_PARTIAL; 3514 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM; 3515 } 3516 3517 /* MTU range: 46 - hw-specific max */ 3518 dev->min_mtu = MLX4_EN_MIN_MTU; 3519 dev->max_mtu = priv->max_mtu; 3520 3521 mdev->pndev[port] = dev; 3522 mdev->upper[port] = NULL; 3523 3524 netif_carrier_off(dev); 3525 mlx4_en_set_default_moderation(priv); 3526 3527 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]); 3528 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num); 3529 3530 mlx4_en_update_loopback_state(priv->dev, priv->dev->features); 3531 3532 /* Configure port */ 3533 mlx4_en_calc_rx_buf(dev); 3534 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 3535 priv->rx_skb_size + ETH_FCS_LEN, 3536 prof->tx_pause, prof->tx_ppp, 3537 prof->rx_pause, prof->rx_ppp); 3538 if (err) { 3539 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 3540 priv->port, err); 3541 goto out; 3542 } 3543 3544 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3545 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 3546 if (err) { 3547 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 3548 err); 3549 goto out; 3550 } 3551 } 3552 3553 /* Init port */ 3554 en_warn(priv, "Initializing port\n"); 3555 err = mlx4_INIT_PORT(mdev->dev, priv->port); 3556 if (err) { 3557 en_err(priv, "Failed Initializing port\n"); 3558 goto out; 3559 } 3560 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 3561 3562 /* Initialize time stamp mechanism */ 3563 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 3564 mlx4_en_init_timestamp(mdev); 3565 3566 queue_delayed_work(mdev->workqueue, &priv->service_task, 3567 SERVICE_TASK_DELAY); 3568 3569 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap, 3570 mdev->profile.prof[priv->port].rx_ppp, 3571 mdev->profile.prof[priv->port].rx_pause, 3572 mdev->profile.prof[priv->port].tx_ppp, 3573 mdev->profile.prof[priv->port].tx_pause); 3574 3575 err = register_netdev(dev); 3576 if (err) { 3577 en_err(priv, "Netdev registration failed for port %d\n", port); 3578 goto out; 3579 } 3580 3581 priv->registered = 1; 3582 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port), 3583 dev); 3584 3585 return 0; 3586 3587 out: 3588 mlx4_en_destroy_netdev(dev); 3589 return err; 3590 } 3591 3592 int mlx4_en_reset_config(struct net_device *dev, 3593 struct hwtstamp_config ts_config, 3594 netdev_features_t features) 3595 { 3596 struct mlx4_en_priv *priv = netdev_priv(dev); 3597 struct mlx4_en_dev *mdev = priv->mdev; 3598 struct mlx4_en_port_profile new_prof; 3599 struct mlx4_en_priv *tmp; 3600 int port_up = 0; 3601 int err = 0; 3602 3603 if (priv->hwtstamp_config.tx_type == ts_config.tx_type && 3604 priv->hwtstamp_config.rx_filter == ts_config.rx_filter && 3605 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3606 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) 3607 return 0; /* Nothing to change */ 3608 3609 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3610 (features & NETIF_F_HW_VLAN_CTAG_RX) && 3611 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) { 3612 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n"); 3613 return -EINVAL; 3614 } 3615 3616 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 3617 if (!tmp) 3618 return -ENOMEM; 3619 3620 mutex_lock(&mdev->state_lock); 3621 3622 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 3623 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config)); 3624 3625 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true); 3626 if (err) 3627 goto out; 3628 3629 if (priv->port_up) { 3630 port_up = 1; 3631 mlx4_en_stop_port(dev, 1); 3632 } 3633 3634 mlx4_en_safe_replace_resources(priv, tmp); 3635 3636 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 3637 if (features & NETIF_F_HW_VLAN_CTAG_RX) 3638 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3639 else 3640 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3641 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) { 3642 /* RX time-stamping is OFF, update the RX vlan offload 3643 * to the latest wanted state 3644 */ 3645 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX) 3646 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3647 else 3648 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3649 } 3650 3651 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) { 3652 if (features & NETIF_F_RXFCS) 3653 dev->features |= NETIF_F_RXFCS; 3654 else 3655 dev->features &= ~NETIF_F_RXFCS; 3656 } 3657 3658 /* RX vlan offload and RX time-stamping can't co-exist ! 3659 * Regardless of the caller's choice, 3660 * Turn Off RX vlan offload in case of time-stamping is ON 3661 */ 3662 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) { 3663 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX) 3664 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n"); 3665 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3666 } 3667 3668 if (port_up) { 3669 err = mlx4_en_start_port(dev); 3670 if (err) 3671 en_err(priv, "Failed starting port\n"); 3672 } 3673 3674 out: 3675 mutex_unlock(&mdev->state_lock); 3676 kfree(tmp); 3677 if (!err) 3678 netdev_features_change(dev); 3679 return err; 3680 } 3681