1 /* 2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 * 32 */ 33 34 #include <linux/bpf.h> 35 #include <linux/etherdevice.h> 36 #include <linux/tcp.h> 37 #include <linux/if_vlan.h> 38 #include <linux/delay.h> 39 #include <linux/slab.h> 40 #include <linux/hash.h> 41 #include <net/ip.h> 42 #include <net/busy_poll.h> 43 #include <net/vxlan.h> 44 #include <net/devlink.h> 45 46 #include <linux/mlx4/driver.h> 47 #include <linux/mlx4/device.h> 48 #include <linux/mlx4/cmd.h> 49 #include <linux/mlx4/cq.h> 50 51 #include "mlx4_en.h" 52 #include "en_port.h" 53 54 #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \ 55 XDP_PACKET_HEADROOM)) 56 57 int mlx4_en_setup_tc(struct net_device *dev, u8 up) 58 { 59 struct mlx4_en_priv *priv = netdev_priv(dev); 60 int i; 61 unsigned int offset = 0; 62 63 if (up && up != MLX4_EN_NUM_UP) 64 return -EINVAL; 65 66 netdev_set_num_tc(dev, up); 67 68 /* Partition Tx queues evenly amongst UP's */ 69 for (i = 0; i < up; i++) { 70 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset); 71 offset += priv->num_tx_rings_p_up; 72 } 73 74 #ifdef CONFIG_MLX4_EN_DCB 75 if (!mlx4_is_slave(priv->mdev->dev)) { 76 if (up) { 77 if (priv->dcbx_cap) 78 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED; 79 } else { 80 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED; 81 priv->cee_config.pfc_state = false; 82 } 83 } 84 #endif /* CONFIG_MLX4_EN_DCB */ 85 86 return 0; 87 } 88 89 static int __mlx4_en_setup_tc(struct net_device *dev, u32 handle, __be16 proto, 90 struct tc_to_netdev *tc) 91 { 92 if (tc->type != TC_SETUP_MQPRIO) 93 return -EINVAL; 94 95 tc->mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 96 97 return mlx4_en_setup_tc(dev, tc->mqprio->num_tc); 98 } 99 100 #ifdef CONFIG_RFS_ACCEL 101 102 struct mlx4_en_filter { 103 struct list_head next; 104 struct work_struct work; 105 106 u8 ip_proto; 107 __be32 src_ip; 108 __be32 dst_ip; 109 __be16 src_port; 110 __be16 dst_port; 111 112 int rxq_index; 113 struct mlx4_en_priv *priv; 114 u32 flow_id; /* RFS infrastructure id */ 115 int id; /* mlx4_en driver id */ 116 u64 reg_id; /* Flow steering API id */ 117 u8 activated; /* Used to prevent expiry before filter 118 * is attached 119 */ 120 struct hlist_node filter_chain; 121 }; 122 123 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv); 124 125 static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto) 126 { 127 switch (ip_proto) { 128 case IPPROTO_UDP: 129 return MLX4_NET_TRANS_RULE_ID_UDP; 130 case IPPROTO_TCP: 131 return MLX4_NET_TRANS_RULE_ID_TCP; 132 default: 133 return MLX4_NET_TRANS_RULE_NUM; 134 } 135 }; 136 137 /* Must not acquire state_lock, as its corresponding work_sync 138 * is done under it. 139 */ 140 static void mlx4_en_filter_work(struct work_struct *work) 141 { 142 struct mlx4_en_filter *filter = container_of(work, 143 struct mlx4_en_filter, 144 work); 145 struct mlx4_en_priv *priv = filter->priv; 146 struct mlx4_spec_list spec_tcp_udp = { 147 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto), 148 { 149 .tcp_udp = { 150 .dst_port = filter->dst_port, 151 .dst_port_msk = (__force __be16)-1, 152 .src_port = filter->src_port, 153 .src_port_msk = (__force __be16)-1, 154 }, 155 }, 156 }; 157 struct mlx4_spec_list spec_ip = { 158 .id = MLX4_NET_TRANS_RULE_ID_IPV4, 159 { 160 .ipv4 = { 161 .dst_ip = filter->dst_ip, 162 .dst_ip_msk = (__force __be32)-1, 163 .src_ip = filter->src_ip, 164 .src_ip_msk = (__force __be32)-1, 165 }, 166 }, 167 }; 168 struct mlx4_spec_list spec_eth = { 169 .id = MLX4_NET_TRANS_RULE_ID_ETH, 170 }; 171 struct mlx4_net_trans_rule rule = { 172 .list = LIST_HEAD_INIT(rule.list), 173 .queue_mode = MLX4_NET_TRANS_Q_LIFO, 174 .exclusive = 1, 175 .allow_loopback = 1, 176 .promisc_mode = MLX4_FS_REGULAR, 177 .port = priv->port, 178 .priority = MLX4_DOMAIN_RFS, 179 }; 180 int rc; 181 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 182 183 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) { 184 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n", 185 filter->ip_proto); 186 goto ignore; 187 } 188 list_add_tail(&spec_eth.list, &rule.list); 189 list_add_tail(&spec_ip.list, &rule.list); 190 list_add_tail(&spec_tcp_udp.list, &rule.list); 191 192 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn; 193 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN); 194 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 195 196 filter->activated = 0; 197 198 if (filter->reg_id) { 199 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 200 if (rc && rc != -ENOENT) 201 en_err(priv, "Error detaching flow. rc = %d\n", rc); 202 } 203 204 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); 205 if (rc) 206 en_err(priv, "Error attaching flow. err = %d\n", rc); 207 208 ignore: 209 mlx4_en_filter_rfs_expire(priv); 210 211 filter->activated = 1; 212 } 213 214 static inline struct hlist_head * 215 filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 216 __be16 src_port, __be16 dst_port) 217 { 218 unsigned long l; 219 int bucket_idx; 220 221 l = (__force unsigned long)src_port | 222 ((__force unsigned long)dst_port << 2); 223 l ^= (__force unsigned long)(src_ip ^ dst_ip); 224 225 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT); 226 227 return &priv->filter_hash[bucket_idx]; 228 } 229 230 static struct mlx4_en_filter * 231 mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip, 232 __be32 dst_ip, u8 ip_proto, __be16 src_port, 233 __be16 dst_port, u32 flow_id) 234 { 235 struct mlx4_en_filter *filter = NULL; 236 237 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC); 238 if (!filter) 239 return NULL; 240 241 filter->priv = priv; 242 filter->rxq_index = rxq_index; 243 INIT_WORK(&filter->work, mlx4_en_filter_work); 244 245 filter->src_ip = src_ip; 246 filter->dst_ip = dst_ip; 247 filter->ip_proto = ip_proto; 248 filter->src_port = src_port; 249 filter->dst_port = dst_port; 250 251 filter->flow_id = flow_id; 252 253 filter->id = priv->last_filter_id++ % RPS_NO_FILTER; 254 255 list_add_tail(&filter->next, &priv->filters); 256 hlist_add_head(&filter->filter_chain, 257 filter_hash_bucket(priv, src_ip, dst_ip, src_port, 258 dst_port)); 259 260 return filter; 261 } 262 263 static void mlx4_en_filter_free(struct mlx4_en_filter *filter) 264 { 265 struct mlx4_en_priv *priv = filter->priv; 266 int rc; 267 268 list_del(&filter->next); 269 270 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 271 if (rc && rc != -ENOENT) 272 en_err(priv, "Error detaching flow. rc = %d\n", rc); 273 274 kfree(filter); 275 } 276 277 static inline struct mlx4_en_filter * 278 mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 279 u8 ip_proto, __be16 src_port, __be16 dst_port) 280 { 281 struct mlx4_en_filter *filter; 282 struct mlx4_en_filter *ret = NULL; 283 284 hlist_for_each_entry(filter, 285 filter_hash_bucket(priv, src_ip, dst_ip, 286 src_port, dst_port), 287 filter_chain) { 288 if (filter->src_ip == src_ip && 289 filter->dst_ip == dst_ip && 290 filter->ip_proto == ip_proto && 291 filter->src_port == src_port && 292 filter->dst_port == dst_port) { 293 ret = filter; 294 break; 295 } 296 } 297 298 return ret; 299 } 300 301 static int 302 mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, 303 u16 rxq_index, u32 flow_id) 304 { 305 struct mlx4_en_priv *priv = netdev_priv(net_dev); 306 struct mlx4_en_filter *filter; 307 const struct iphdr *ip; 308 const __be16 *ports; 309 u8 ip_proto; 310 __be32 src_ip; 311 __be32 dst_ip; 312 __be16 src_port; 313 __be16 dst_port; 314 int nhoff = skb_network_offset(skb); 315 int ret = 0; 316 317 if (skb->protocol != htons(ETH_P_IP)) 318 return -EPROTONOSUPPORT; 319 320 ip = (const struct iphdr *)(skb->data + nhoff); 321 if (ip_is_fragment(ip)) 322 return -EPROTONOSUPPORT; 323 324 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP)) 325 return -EPROTONOSUPPORT; 326 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl); 327 328 ip_proto = ip->protocol; 329 src_ip = ip->saddr; 330 dst_ip = ip->daddr; 331 src_port = ports[0]; 332 dst_port = ports[1]; 333 334 spin_lock_bh(&priv->filters_lock); 335 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto, 336 src_port, dst_port); 337 if (filter) { 338 if (filter->rxq_index == rxq_index) 339 goto out; 340 341 filter->rxq_index = rxq_index; 342 } else { 343 filter = mlx4_en_filter_alloc(priv, rxq_index, 344 src_ip, dst_ip, ip_proto, 345 src_port, dst_port, flow_id); 346 if (!filter) { 347 ret = -ENOMEM; 348 goto err; 349 } 350 } 351 352 queue_work(priv->mdev->workqueue, &filter->work); 353 354 out: 355 ret = filter->id; 356 err: 357 spin_unlock_bh(&priv->filters_lock); 358 359 return ret; 360 } 361 362 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv) 363 { 364 struct mlx4_en_filter *filter, *tmp; 365 LIST_HEAD(del_list); 366 367 spin_lock_bh(&priv->filters_lock); 368 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 369 list_move(&filter->next, &del_list); 370 hlist_del(&filter->filter_chain); 371 } 372 spin_unlock_bh(&priv->filters_lock); 373 374 list_for_each_entry_safe(filter, tmp, &del_list, next) { 375 cancel_work_sync(&filter->work); 376 mlx4_en_filter_free(filter); 377 } 378 } 379 380 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv) 381 { 382 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL; 383 LIST_HEAD(del_list); 384 int i = 0; 385 386 spin_lock_bh(&priv->filters_lock); 387 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 388 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA) 389 break; 390 391 if (filter->activated && 392 !work_pending(&filter->work) && 393 rps_may_expire_flow(priv->dev, 394 filter->rxq_index, filter->flow_id, 395 filter->id)) { 396 list_move(&filter->next, &del_list); 397 hlist_del(&filter->filter_chain); 398 } else 399 last_filter = filter; 400 401 i++; 402 } 403 404 if (last_filter && (&last_filter->next != priv->filters.next)) 405 list_move(&priv->filters, &last_filter->next); 406 407 spin_unlock_bh(&priv->filters_lock); 408 409 list_for_each_entry_safe(filter, tmp, &del_list, next) 410 mlx4_en_filter_free(filter); 411 } 412 #endif 413 414 static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, 415 __be16 proto, u16 vid) 416 { 417 struct mlx4_en_priv *priv = netdev_priv(dev); 418 struct mlx4_en_dev *mdev = priv->mdev; 419 int err; 420 int idx; 421 422 en_dbg(HW, priv, "adding VLAN:%d\n", vid); 423 424 set_bit(vid, priv->active_vlans); 425 426 /* Add VID to port VLAN filter */ 427 mutex_lock(&mdev->state_lock); 428 if (mdev->device_up && priv->port_up) { 429 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 430 if (err) { 431 en_err(priv, "Failed configuring VLAN filter\n"); 432 goto out; 433 } 434 } 435 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx); 436 if (err) 437 en_dbg(HW, priv, "Failed adding vlan %d\n", vid); 438 439 out: 440 mutex_unlock(&mdev->state_lock); 441 return err; 442 } 443 444 static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, 445 __be16 proto, u16 vid) 446 { 447 struct mlx4_en_priv *priv = netdev_priv(dev); 448 struct mlx4_en_dev *mdev = priv->mdev; 449 int err = 0; 450 451 en_dbg(HW, priv, "Killing VID:%d\n", vid); 452 453 clear_bit(vid, priv->active_vlans); 454 455 /* Remove VID from port VLAN filter */ 456 mutex_lock(&mdev->state_lock); 457 mlx4_unregister_vlan(mdev->dev, priv->port, vid); 458 459 if (mdev->device_up && priv->port_up) { 460 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 461 if (err) 462 en_err(priv, "Failed configuring VLAN filter\n"); 463 } 464 mutex_unlock(&mdev->state_lock); 465 466 return err; 467 } 468 469 static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac) 470 { 471 int i; 472 for (i = ETH_ALEN - 1; i >= 0; --i) { 473 dst_mac[i] = src_mac & 0xff; 474 src_mac >>= 8; 475 } 476 memset(&dst_mac[ETH_ALEN], 0, 2); 477 } 478 479 480 static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr, 481 int qpn, u64 *reg_id) 482 { 483 int err; 484 485 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 486 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 487 return 0; /* do nothing */ 488 489 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn, 490 MLX4_DOMAIN_NIC, reg_id); 491 if (err) { 492 en_err(priv, "failed to add vxlan steering rule, err %d\n", err); 493 return err; 494 } 495 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id); 496 return 0; 497 } 498 499 500 static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv, 501 unsigned char *mac, int *qpn, u64 *reg_id) 502 { 503 struct mlx4_en_dev *mdev = priv->mdev; 504 struct mlx4_dev *dev = mdev->dev; 505 int err; 506 507 switch (dev->caps.steering_mode) { 508 case MLX4_STEERING_MODE_B0: { 509 struct mlx4_qp qp; 510 u8 gid[16] = {0}; 511 512 qp.qpn = *qpn; 513 memcpy(&gid[10], mac, ETH_ALEN); 514 gid[5] = priv->port; 515 516 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH); 517 break; 518 } 519 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 520 struct mlx4_spec_list spec_eth = { {NULL} }; 521 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 522 523 struct mlx4_net_trans_rule rule = { 524 .queue_mode = MLX4_NET_TRANS_Q_FIFO, 525 .exclusive = 0, 526 .allow_loopback = 1, 527 .promisc_mode = MLX4_FS_REGULAR, 528 .priority = MLX4_DOMAIN_NIC, 529 }; 530 531 rule.port = priv->port; 532 rule.qpn = *qpn; 533 INIT_LIST_HEAD(&rule.list); 534 535 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH; 536 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN); 537 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 538 list_add_tail(&spec_eth.list, &rule.list); 539 540 err = mlx4_flow_attach(dev, &rule, reg_id); 541 break; 542 } 543 default: 544 return -EINVAL; 545 } 546 if (err) 547 en_warn(priv, "Failed Attaching Unicast\n"); 548 549 return err; 550 } 551 552 static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv, 553 unsigned char *mac, int qpn, u64 reg_id) 554 { 555 struct mlx4_en_dev *mdev = priv->mdev; 556 struct mlx4_dev *dev = mdev->dev; 557 558 switch (dev->caps.steering_mode) { 559 case MLX4_STEERING_MODE_B0: { 560 struct mlx4_qp qp; 561 u8 gid[16] = {0}; 562 563 qp.qpn = qpn; 564 memcpy(&gid[10], mac, ETH_ALEN); 565 gid[5] = priv->port; 566 567 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH); 568 break; 569 } 570 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 571 mlx4_flow_detach(dev, reg_id); 572 break; 573 } 574 default: 575 en_err(priv, "Invalid steering mode.\n"); 576 } 577 } 578 579 static int mlx4_en_get_qp(struct mlx4_en_priv *priv) 580 { 581 struct mlx4_en_dev *mdev = priv->mdev; 582 struct mlx4_dev *dev = mdev->dev; 583 int index = 0; 584 int err = 0; 585 int *qpn = &priv->base_qpn; 586 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr); 587 588 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n", 589 priv->dev->dev_addr); 590 index = mlx4_register_mac(dev, priv->port, mac); 591 if (index < 0) { 592 err = index; 593 en_err(priv, "Failed adding MAC: %pM\n", 594 priv->dev->dev_addr); 595 return err; 596 } 597 598 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 599 int base_qpn = mlx4_get_base_qpn(dev, priv->port); 600 *qpn = base_qpn + index; 601 return 0; 602 } 603 604 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP); 605 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn); 606 if (err) { 607 en_err(priv, "Failed to reserve qp for mac registration\n"); 608 mlx4_unregister_mac(dev, priv->port, mac); 609 return err; 610 } 611 612 return 0; 613 } 614 615 static void mlx4_en_put_qp(struct mlx4_en_priv *priv) 616 { 617 struct mlx4_en_dev *mdev = priv->mdev; 618 struct mlx4_dev *dev = mdev->dev; 619 int qpn = priv->base_qpn; 620 621 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 622 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr); 623 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", 624 priv->dev->dev_addr); 625 mlx4_unregister_mac(dev, priv->port, mac); 626 } else { 627 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n", 628 priv->port, qpn); 629 mlx4_qp_release_range(dev, qpn, 1); 630 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 631 } 632 } 633 634 static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn, 635 unsigned char *new_mac, unsigned char *prev_mac) 636 { 637 struct mlx4_en_dev *mdev = priv->mdev; 638 struct mlx4_dev *dev = mdev->dev; 639 int err = 0; 640 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac); 641 642 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { 643 struct hlist_head *bucket; 644 unsigned int mac_hash; 645 struct mlx4_mac_entry *entry; 646 struct hlist_node *tmp; 647 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac); 648 649 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]]; 650 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 651 if (ether_addr_equal_64bits(entry->mac, prev_mac)) { 652 mlx4_en_uc_steer_release(priv, entry->mac, 653 qpn, entry->reg_id); 654 mlx4_unregister_mac(dev, priv->port, 655 prev_mac_u64); 656 hlist_del_rcu(&entry->hlist); 657 synchronize_rcu(); 658 memcpy(entry->mac, new_mac, ETH_ALEN); 659 entry->reg_id = 0; 660 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX]; 661 hlist_add_head_rcu(&entry->hlist, 662 &priv->mac_hash[mac_hash]); 663 mlx4_register_mac(dev, priv->port, new_mac_u64); 664 err = mlx4_en_uc_steer_add(priv, new_mac, 665 &qpn, 666 &entry->reg_id); 667 if (err) 668 return err; 669 if (priv->tunnel_reg_id) { 670 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 671 priv->tunnel_reg_id = 0; 672 } 673 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn, 674 &priv->tunnel_reg_id); 675 return err; 676 } 677 } 678 return -EINVAL; 679 } 680 681 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64); 682 } 683 684 static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv, 685 unsigned char new_mac[ETH_ALEN + 2]) 686 { 687 int err = 0; 688 689 if (priv->port_up) { 690 /* Remove old MAC and insert the new one */ 691 err = mlx4_en_replace_mac(priv, priv->base_qpn, 692 new_mac, priv->current_mac); 693 if (err) 694 en_err(priv, "Failed changing HW MAC address\n"); 695 } else 696 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n"); 697 698 if (!err) 699 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac)); 700 701 return err; 702 } 703 704 static int mlx4_en_set_mac(struct net_device *dev, void *addr) 705 { 706 struct mlx4_en_priv *priv = netdev_priv(dev); 707 struct mlx4_en_dev *mdev = priv->mdev; 708 struct sockaddr *saddr = addr; 709 unsigned char new_mac[ETH_ALEN + 2]; 710 int err; 711 712 if (!is_valid_ether_addr(saddr->sa_data)) 713 return -EADDRNOTAVAIL; 714 715 mutex_lock(&mdev->state_lock); 716 memcpy(new_mac, saddr->sa_data, ETH_ALEN); 717 err = mlx4_en_do_set_mac(priv, new_mac); 718 if (!err) 719 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); 720 mutex_unlock(&mdev->state_lock); 721 722 return err; 723 } 724 725 static void mlx4_en_clear_list(struct net_device *dev) 726 { 727 struct mlx4_en_priv *priv = netdev_priv(dev); 728 struct mlx4_en_mc_list *tmp, *mc_to_del; 729 730 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) { 731 list_del(&mc_to_del->list); 732 kfree(mc_to_del); 733 } 734 } 735 736 static void mlx4_en_cache_mclist(struct net_device *dev) 737 { 738 struct mlx4_en_priv *priv = netdev_priv(dev); 739 struct netdev_hw_addr *ha; 740 struct mlx4_en_mc_list *tmp; 741 742 mlx4_en_clear_list(dev); 743 netdev_for_each_mc_addr(ha, dev) { 744 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC); 745 if (!tmp) { 746 mlx4_en_clear_list(dev); 747 return; 748 } 749 memcpy(tmp->addr, ha->addr, ETH_ALEN); 750 list_add_tail(&tmp->list, &priv->mc_list); 751 } 752 } 753 754 static void update_mclist_flags(struct mlx4_en_priv *priv, 755 struct list_head *dst, 756 struct list_head *src) 757 { 758 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc; 759 bool found; 760 761 /* Find all the entries that should be removed from dst, 762 * These are the entries that are not found in src 763 */ 764 list_for_each_entry(dst_tmp, dst, list) { 765 found = false; 766 list_for_each_entry(src_tmp, src, list) { 767 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 768 found = true; 769 break; 770 } 771 } 772 if (!found) 773 dst_tmp->action = MCLIST_REM; 774 } 775 776 /* Add entries that exist in src but not in dst 777 * mark them as need to add 778 */ 779 list_for_each_entry(src_tmp, src, list) { 780 found = false; 781 list_for_each_entry(dst_tmp, dst, list) { 782 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 783 dst_tmp->action = MCLIST_NONE; 784 found = true; 785 break; 786 } 787 } 788 if (!found) { 789 new_mc = kmemdup(src_tmp, 790 sizeof(struct mlx4_en_mc_list), 791 GFP_KERNEL); 792 if (!new_mc) 793 return; 794 795 new_mc->action = MCLIST_ADD; 796 list_add_tail(&new_mc->list, dst); 797 } 798 } 799 } 800 801 static void mlx4_en_set_rx_mode(struct net_device *dev) 802 { 803 struct mlx4_en_priv *priv = netdev_priv(dev); 804 805 if (!priv->port_up) 806 return; 807 808 queue_work(priv->mdev->workqueue, &priv->rx_mode_task); 809 } 810 811 static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv, 812 struct mlx4_en_dev *mdev) 813 { 814 int err = 0; 815 816 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { 817 if (netif_msg_rx_status(priv)) 818 en_warn(priv, "Entering promiscuous mode\n"); 819 priv->flags |= MLX4_EN_FLAG_PROMISC; 820 821 /* Enable promiscouos mode */ 822 switch (mdev->dev->caps.steering_mode) { 823 case MLX4_STEERING_MODE_DEVICE_MANAGED: 824 err = mlx4_flow_steer_promisc_add(mdev->dev, 825 priv->port, 826 priv->base_qpn, 827 MLX4_FS_ALL_DEFAULT); 828 if (err) 829 en_err(priv, "Failed enabling promiscuous mode\n"); 830 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 831 break; 832 833 case MLX4_STEERING_MODE_B0: 834 err = mlx4_unicast_promisc_add(mdev->dev, 835 priv->base_qpn, 836 priv->port); 837 if (err) 838 en_err(priv, "Failed enabling unicast promiscuous mode\n"); 839 840 /* Add the default qp number as multicast 841 * promisc 842 */ 843 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 844 err = mlx4_multicast_promisc_add(mdev->dev, 845 priv->base_qpn, 846 priv->port); 847 if (err) 848 en_err(priv, "Failed enabling multicast promiscuous mode\n"); 849 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 850 } 851 break; 852 853 case MLX4_STEERING_MODE_A0: 854 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 855 priv->port, 856 priv->base_qpn, 857 1); 858 if (err) 859 en_err(priv, "Failed enabling promiscuous mode\n"); 860 break; 861 } 862 863 /* Disable port multicast filter (unconditionally) */ 864 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 865 0, MLX4_MCAST_DISABLE); 866 if (err) 867 en_err(priv, "Failed disabling multicast filter\n"); 868 } 869 } 870 871 static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv, 872 struct mlx4_en_dev *mdev) 873 { 874 int err = 0; 875 876 if (netif_msg_rx_status(priv)) 877 en_warn(priv, "Leaving promiscuous mode\n"); 878 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 879 880 /* Disable promiscouos mode */ 881 switch (mdev->dev->caps.steering_mode) { 882 case MLX4_STEERING_MODE_DEVICE_MANAGED: 883 err = mlx4_flow_steer_promisc_remove(mdev->dev, 884 priv->port, 885 MLX4_FS_ALL_DEFAULT); 886 if (err) 887 en_err(priv, "Failed disabling promiscuous mode\n"); 888 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 889 break; 890 891 case MLX4_STEERING_MODE_B0: 892 err = mlx4_unicast_promisc_remove(mdev->dev, 893 priv->base_qpn, 894 priv->port); 895 if (err) 896 en_err(priv, "Failed disabling unicast promiscuous mode\n"); 897 /* Disable Multicast promisc */ 898 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 899 err = mlx4_multicast_promisc_remove(mdev->dev, 900 priv->base_qpn, 901 priv->port); 902 if (err) 903 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 904 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 905 } 906 break; 907 908 case MLX4_STEERING_MODE_A0: 909 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 910 priv->port, 911 priv->base_qpn, 0); 912 if (err) 913 en_err(priv, "Failed disabling promiscuous mode\n"); 914 break; 915 } 916 } 917 918 static void mlx4_en_do_multicast(struct mlx4_en_priv *priv, 919 struct net_device *dev, 920 struct mlx4_en_dev *mdev) 921 { 922 struct mlx4_en_mc_list *mclist, *tmp; 923 u64 mcast_addr = 0; 924 u8 mc_list[16] = {0}; 925 int err = 0; 926 927 /* Enable/disable the multicast filter according to IFF_ALLMULTI */ 928 if (dev->flags & IFF_ALLMULTI) { 929 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 930 0, MLX4_MCAST_DISABLE); 931 if (err) 932 en_err(priv, "Failed disabling multicast filter\n"); 933 934 /* Add the default qp number as multicast promisc */ 935 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 936 switch (mdev->dev->caps.steering_mode) { 937 case MLX4_STEERING_MODE_DEVICE_MANAGED: 938 err = mlx4_flow_steer_promisc_add(mdev->dev, 939 priv->port, 940 priv->base_qpn, 941 MLX4_FS_MC_DEFAULT); 942 break; 943 944 case MLX4_STEERING_MODE_B0: 945 err = mlx4_multicast_promisc_add(mdev->dev, 946 priv->base_qpn, 947 priv->port); 948 break; 949 950 case MLX4_STEERING_MODE_A0: 951 break; 952 } 953 if (err) 954 en_err(priv, "Failed entering multicast promisc mode\n"); 955 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 956 } 957 } else { 958 /* Disable Multicast promisc */ 959 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 960 switch (mdev->dev->caps.steering_mode) { 961 case MLX4_STEERING_MODE_DEVICE_MANAGED: 962 err = mlx4_flow_steer_promisc_remove(mdev->dev, 963 priv->port, 964 MLX4_FS_MC_DEFAULT); 965 break; 966 967 case MLX4_STEERING_MODE_B0: 968 err = mlx4_multicast_promisc_remove(mdev->dev, 969 priv->base_qpn, 970 priv->port); 971 break; 972 973 case MLX4_STEERING_MODE_A0: 974 break; 975 } 976 if (err) 977 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 978 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 979 } 980 981 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 982 0, MLX4_MCAST_DISABLE); 983 if (err) 984 en_err(priv, "Failed disabling multicast filter\n"); 985 986 /* Flush mcast filter and init it with broadcast address */ 987 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, 988 1, MLX4_MCAST_CONFIG); 989 990 /* Update multicast list - we cache all addresses so they won't 991 * change while HW is updated holding the command semaphor */ 992 netif_addr_lock_bh(dev); 993 mlx4_en_cache_mclist(dev); 994 netif_addr_unlock_bh(dev); 995 list_for_each_entry(mclist, &priv->mc_list, list) { 996 mcast_addr = mlx4_mac_to_u64(mclist->addr); 997 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 998 mcast_addr, 0, MLX4_MCAST_CONFIG); 999 } 1000 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1001 0, MLX4_MCAST_ENABLE); 1002 if (err) 1003 en_err(priv, "Failed enabling multicast filter\n"); 1004 1005 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list); 1006 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1007 if (mclist->action == MCLIST_REM) { 1008 /* detach this address and delete from list */ 1009 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1010 mc_list[5] = priv->port; 1011 err = mlx4_multicast_detach(mdev->dev, 1012 &priv->rss_map.indir_qp, 1013 mc_list, 1014 MLX4_PROT_ETH, 1015 mclist->reg_id); 1016 if (err) 1017 en_err(priv, "Fail to detach multicast address\n"); 1018 1019 if (mclist->tunnel_reg_id) { 1020 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id); 1021 if (err) 1022 en_err(priv, "Failed to detach multicast address\n"); 1023 } 1024 1025 /* remove from list */ 1026 list_del(&mclist->list); 1027 kfree(mclist); 1028 } else if (mclist->action == MCLIST_ADD) { 1029 /* attach the address */ 1030 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1031 /* needed for B0 steering support */ 1032 mc_list[5] = priv->port; 1033 err = mlx4_multicast_attach(mdev->dev, 1034 &priv->rss_map.indir_qp, 1035 mc_list, 1036 priv->port, 0, 1037 MLX4_PROT_ETH, 1038 &mclist->reg_id); 1039 if (err) 1040 en_err(priv, "Fail to attach multicast address\n"); 1041 1042 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn, 1043 &mclist->tunnel_reg_id); 1044 if (err) 1045 en_err(priv, "Failed to attach multicast address\n"); 1046 } 1047 } 1048 } 1049 } 1050 1051 static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv, 1052 struct net_device *dev, 1053 struct mlx4_en_dev *mdev) 1054 { 1055 struct netdev_hw_addr *ha; 1056 struct mlx4_mac_entry *entry; 1057 struct hlist_node *tmp; 1058 bool found; 1059 u64 mac; 1060 int err = 0; 1061 struct hlist_head *bucket; 1062 unsigned int i; 1063 int removed = 0; 1064 u32 prev_flags; 1065 1066 /* Note that we do not need to protect our mac_hash traversal with rcu, 1067 * since all modification code is protected by mdev->state_lock 1068 */ 1069 1070 /* find what to remove */ 1071 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1072 bucket = &priv->mac_hash[i]; 1073 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1074 found = false; 1075 netdev_for_each_uc_addr(ha, dev) { 1076 if (ether_addr_equal_64bits(entry->mac, 1077 ha->addr)) { 1078 found = true; 1079 break; 1080 } 1081 } 1082 1083 /* MAC address of the port is not in uc list */ 1084 if (ether_addr_equal_64bits(entry->mac, 1085 priv->current_mac)) 1086 found = true; 1087 1088 if (!found) { 1089 mac = mlx4_mac_to_u64(entry->mac); 1090 mlx4_en_uc_steer_release(priv, entry->mac, 1091 priv->base_qpn, 1092 entry->reg_id); 1093 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1094 1095 hlist_del_rcu(&entry->hlist); 1096 kfree_rcu(entry, rcu); 1097 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n", 1098 entry->mac, priv->port); 1099 ++removed; 1100 } 1101 } 1102 } 1103 1104 /* if we didn't remove anything, there is no use in trying to add 1105 * again once we are in a forced promisc mode state 1106 */ 1107 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed) 1108 return; 1109 1110 prev_flags = priv->flags; 1111 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 1112 1113 /* find what to add */ 1114 netdev_for_each_uc_addr(ha, dev) { 1115 found = false; 1116 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]]; 1117 hlist_for_each_entry(entry, bucket, hlist) { 1118 if (ether_addr_equal_64bits(entry->mac, ha->addr)) { 1119 found = true; 1120 break; 1121 } 1122 } 1123 1124 if (!found) { 1125 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1126 if (!entry) { 1127 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n", 1128 ha->addr, priv->port); 1129 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1130 break; 1131 } 1132 mac = mlx4_mac_to_u64(ha->addr); 1133 memcpy(entry->mac, ha->addr, ETH_ALEN); 1134 err = mlx4_register_mac(mdev->dev, priv->port, mac); 1135 if (err < 0) { 1136 en_err(priv, "Failed registering MAC %pM on port %d: %d\n", 1137 ha->addr, priv->port, err); 1138 kfree(entry); 1139 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1140 break; 1141 } 1142 err = mlx4_en_uc_steer_add(priv, ha->addr, 1143 &priv->base_qpn, 1144 &entry->reg_id); 1145 if (err) { 1146 en_err(priv, "Failed adding MAC %pM on port %d: %d\n", 1147 ha->addr, priv->port, err); 1148 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1149 kfree(entry); 1150 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1151 break; 1152 } else { 1153 unsigned int mac_hash; 1154 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n", 1155 ha->addr, priv->port); 1156 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX]; 1157 bucket = &priv->mac_hash[mac_hash]; 1158 hlist_add_head_rcu(&entry->hlist, bucket); 1159 } 1160 } 1161 } 1162 1163 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1164 en_warn(priv, "Forcing promiscuous mode on port:%d\n", 1165 priv->port); 1166 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1167 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n", 1168 priv->port); 1169 } 1170 } 1171 1172 static void mlx4_en_do_set_rx_mode(struct work_struct *work) 1173 { 1174 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1175 rx_mode_task); 1176 struct mlx4_en_dev *mdev = priv->mdev; 1177 struct net_device *dev = priv->dev; 1178 1179 mutex_lock(&mdev->state_lock); 1180 if (!mdev->device_up) { 1181 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n"); 1182 goto out; 1183 } 1184 if (!priv->port_up) { 1185 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n"); 1186 goto out; 1187 } 1188 1189 if (!netif_carrier_ok(dev)) { 1190 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) { 1191 if (priv->port_state.link_state) { 1192 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP; 1193 netif_carrier_on(dev); 1194 en_dbg(LINK, priv, "Link Up\n"); 1195 } 1196 } 1197 } 1198 1199 if (dev->priv_flags & IFF_UNICAST_FLT) 1200 mlx4_en_do_uc_filter(priv, dev, mdev); 1201 1202 /* Promsicuous mode: disable all filters */ 1203 if ((dev->flags & IFF_PROMISC) || 1204 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) { 1205 mlx4_en_set_promisc_mode(priv, mdev); 1206 goto out; 1207 } 1208 1209 /* Not in promiscuous mode */ 1210 if (priv->flags & MLX4_EN_FLAG_PROMISC) 1211 mlx4_en_clear_promisc_mode(priv, mdev); 1212 1213 mlx4_en_do_multicast(priv, dev, mdev); 1214 out: 1215 mutex_unlock(&mdev->state_lock); 1216 } 1217 1218 #ifdef CONFIG_NET_POLL_CONTROLLER 1219 static void mlx4_en_netpoll(struct net_device *dev) 1220 { 1221 struct mlx4_en_priv *priv = netdev_priv(dev); 1222 struct mlx4_en_cq *cq; 1223 int i; 1224 1225 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1226 cq = priv->tx_cq[TX][i]; 1227 napi_schedule(&cq->napi); 1228 } 1229 } 1230 #endif 1231 1232 static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv) 1233 { 1234 u64 reg_id; 1235 int err = 0; 1236 int *qpn = &priv->base_qpn; 1237 struct mlx4_mac_entry *entry; 1238 1239 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id); 1240 if (err) 1241 return err; 1242 1243 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn, 1244 &priv->tunnel_reg_id); 1245 if (err) 1246 goto tunnel_err; 1247 1248 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1249 if (!entry) { 1250 err = -ENOMEM; 1251 goto alloc_err; 1252 } 1253 1254 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac)); 1255 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac)); 1256 entry->reg_id = reg_id; 1257 hlist_add_head_rcu(&entry->hlist, 1258 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]); 1259 1260 return 0; 1261 1262 alloc_err: 1263 if (priv->tunnel_reg_id) 1264 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1265 1266 tunnel_err: 1267 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id); 1268 return err; 1269 } 1270 1271 static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv) 1272 { 1273 u64 mac; 1274 unsigned int i; 1275 int qpn = priv->base_qpn; 1276 struct hlist_head *bucket; 1277 struct hlist_node *tmp; 1278 struct mlx4_mac_entry *entry; 1279 1280 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1281 bucket = &priv->mac_hash[i]; 1282 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1283 mac = mlx4_mac_to_u64(entry->mac); 1284 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n", 1285 entry->mac); 1286 mlx4_en_uc_steer_release(priv, entry->mac, 1287 qpn, entry->reg_id); 1288 1289 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac); 1290 hlist_del_rcu(&entry->hlist); 1291 kfree_rcu(entry, rcu); 1292 } 1293 } 1294 1295 if (priv->tunnel_reg_id) { 1296 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1297 priv->tunnel_reg_id = 0; 1298 } 1299 } 1300 1301 static void mlx4_en_tx_timeout(struct net_device *dev) 1302 { 1303 struct mlx4_en_priv *priv = netdev_priv(dev); 1304 struct mlx4_en_dev *mdev = priv->mdev; 1305 int i; 1306 1307 if (netif_msg_timer(priv)) 1308 en_warn(priv, "Tx timeout called on port:%d\n", priv->port); 1309 1310 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1311 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][i]; 1312 1313 if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i))) 1314 continue; 1315 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n", 1316 i, tx_ring->qpn, tx_ring->sp_cqn, 1317 tx_ring->cons, tx_ring->prod); 1318 } 1319 1320 priv->port_stats.tx_timeout++; 1321 en_dbg(DRV, priv, "Scheduling watchdog\n"); 1322 queue_work(mdev->workqueue, &priv->watchdog_task); 1323 } 1324 1325 1326 static void 1327 mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) 1328 { 1329 struct mlx4_en_priv *priv = netdev_priv(dev); 1330 1331 spin_lock_bh(&priv->stats_lock); 1332 mlx4_en_fold_software_stats(dev); 1333 netdev_stats_to_stats64(stats, &dev->stats); 1334 spin_unlock_bh(&priv->stats_lock); 1335 } 1336 1337 static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) 1338 { 1339 struct mlx4_en_cq *cq; 1340 int i, t; 1341 1342 /* If we haven't received a specific coalescing setting 1343 * (module param), we set the moderation parameters as follows: 1344 * - moder_cnt is set to the number of mtu sized packets to 1345 * satisfy our coalescing target. 1346 * - moder_time is set to a fixed value. 1347 */ 1348 priv->rx_frames = MLX4_EN_RX_COAL_TARGET; 1349 priv->rx_usecs = MLX4_EN_RX_COAL_TIME; 1350 priv->tx_frames = MLX4_EN_TX_COAL_PKTS; 1351 priv->tx_usecs = MLX4_EN_TX_COAL_TIME; 1352 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n", 1353 priv->dev->mtu, priv->rx_frames, priv->rx_usecs); 1354 1355 /* Setup cq moderation params */ 1356 for (i = 0; i < priv->rx_ring_num; i++) { 1357 cq = priv->rx_cq[i]; 1358 cq->moder_cnt = priv->rx_frames; 1359 cq->moder_time = priv->rx_usecs; 1360 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; 1361 priv->last_moder_packets[i] = 0; 1362 priv->last_moder_bytes[i] = 0; 1363 } 1364 1365 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1366 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1367 cq = priv->tx_cq[t][i]; 1368 cq->moder_cnt = priv->tx_frames; 1369 cq->moder_time = priv->tx_usecs; 1370 } 1371 } 1372 1373 /* Reset auto-moderation params */ 1374 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; 1375 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; 1376 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; 1377 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; 1378 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; 1379 priv->adaptive_rx_coal = 1; 1380 priv->last_moder_jiffies = 0; 1381 priv->last_moder_tx_packets = 0; 1382 } 1383 1384 static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) 1385 { 1386 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); 1387 u32 pkt_rate_high, pkt_rate_low; 1388 struct mlx4_en_cq *cq; 1389 unsigned long packets; 1390 unsigned long rate; 1391 unsigned long avg_pkt_size; 1392 unsigned long rx_packets; 1393 unsigned long rx_bytes; 1394 unsigned long rx_pkt_diff; 1395 int moder_time; 1396 int ring, err; 1397 1398 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) 1399 return; 1400 1401 pkt_rate_low = READ_ONCE(priv->pkt_rate_low); 1402 pkt_rate_high = READ_ONCE(priv->pkt_rate_high); 1403 1404 for (ring = 0; ring < priv->rx_ring_num; ring++) { 1405 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets); 1406 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes); 1407 1408 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring]; 1409 packets = rx_pkt_diff; 1410 rate = packets * HZ / period; 1411 avg_pkt_size = packets ? (rx_bytes - 1412 priv->last_moder_bytes[ring]) / packets : 0; 1413 1414 /* Apply auto-moderation only when packet rate 1415 * exceeds a rate that it matters */ 1416 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && 1417 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { 1418 if (rate <= pkt_rate_low) 1419 moder_time = priv->rx_usecs_low; 1420 else if (rate >= pkt_rate_high) 1421 moder_time = priv->rx_usecs_high; 1422 else 1423 moder_time = (rate - pkt_rate_low) * 1424 (priv->rx_usecs_high - priv->rx_usecs_low) / 1425 (pkt_rate_high - pkt_rate_low) + 1426 priv->rx_usecs_low; 1427 } else { 1428 moder_time = priv->rx_usecs_low; 1429 } 1430 1431 cq = priv->rx_cq[ring]; 1432 if (moder_time != priv->last_moder_time[ring] || 1433 cq->moder_cnt != priv->rx_frames) { 1434 priv->last_moder_time[ring] = moder_time; 1435 cq->moder_time = moder_time; 1436 cq->moder_cnt = priv->rx_frames; 1437 err = mlx4_en_set_cq_moder(priv, cq); 1438 if (err) 1439 en_err(priv, "Failed modifying moderation for cq:%d\n", 1440 ring); 1441 } 1442 priv->last_moder_packets[ring] = rx_packets; 1443 priv->last_moder_bytes[ring] = rx_bytes; 1444 } 1445 1446 priv->last_moder_jiffies = jiffies; 1447 } 1448 1449 static void mlx4_en_do_get_stats(struct work_struct *work) 1450 { 1451 struct delayed_work *delay = to_delayed_work(work); 1452 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1453 stats_task); 1454 struct mlx4_en_dev *mdev = priv->mdev; 1455 int err; 1456 1457 mutex_lock(&mdev->state_lock); 1458 if (mdev->device_up) { 1459 if (priv->port_up) { 1460 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); 1461 if (err) 1462 en_dbg(HW, priv, "Could not update stats\n"); 1463 1464 mlx4_en_auto_moderation(priv); 1465 } 1466 1467 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 1468 } 1469 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { 1470 mlx4_en_do_set_mac(priv, priv->current_mac); 1471 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; 1472 } 1473 mutex_unlock(&mdev->state_lock); 1474 } 1475 1476 /* mlx4_en_service_task - Run service task for tasks that needed to be done 1477 * periodically 1478 */ 1479 static void mlx4_en_service_task(struct work_struct *work) 1480 { 1481 struct delayed_work *delay = to_delayed_work(work); 1482 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1483 service_task); 1484 struct mlx4_en_dev *mdev = priv->mdev; 1485 1486 mutex_lock(&mdev->state_lock); 1487 if (mdev->device_up) { 1488 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 1489 mlx4_en_ptp_overflow_check(mdev); 1490 1491 mlx4_en_recover_from_oom(priv); 1492 queue_delayed_work(mdev->workqueue, &priv->service_task, 1493 SERVICE_TASK_DELAY); 1494 } 1495 mutex_unlock(&mdev->state_lock); 1496 } 1497 1498 static void mlx4_en_linkstate(struct work_struct *work) 1499 { 1500 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1501 linkstate_task); 1502 struct mlx4_en_dev *mdev = priv->mdev; 1503 int linkstate = priv->link_state; 1504 1505 mutex_lock(&mdev->state_lock); 1506 /* If observable port state changed set carrier state and 1507 * report to system log */ 1508 if (priv->last_link_state != linkstate) { 1509 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { 1510 en_info(priv, "Link Down\n"); 1511 netif_carrier_off(priv->dev); 1512 } else { 1513 en_info(priv, "Link Up\n"); 1514 netif_carrier_on(priv->dev); 1515 } 1516 } 1517 priv->last_link_state = linkstate; 1518 mutex_unlock(&mdev->state_lock); 1519 } 1520 1521 static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1522 { 1523 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx]; 1524 int numa_node = priv->mdev->dev->numa_node; 1525 1526 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL)) 1527 return -ENOMEM; 1528 1529 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node), 1530 ring->affinity_mask); 1531 return 0; 1532 } 1533 1534 static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1535 { 1536 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask); 1537 } 1538 1539 static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv, 1540 int tx_ring_idx) 1541 { 1542 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx]; 1543 int rr_index = tx_ring_idx; 1544 1545 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc; 1546 tx_ring->recycle_ring = priv->rx_ring[rr_index]; 1547 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n", 1548 TX_XDP, tx_ring_idx, rr_index); 1549 } 1550 1551 int mlx4_en_start_port(struct net_device *dev) 1552 { 1553 struct mlx4_en_priv *priv = netdev_priv(dev); 1554 struct mlx4_en_dev *mdev = priv->mdev; 1555 struct mlx4_en_cq *cq; 1556 struct mlx4_en_tx_ring *tx_ring; 1557 int rx_index = 0; 1558 int err = 0; 1559 int i, t; 1560 int j; 1561 u8 mc_list[16] = {0}; 1562 1563 if (priv->port_up) { 1564 en_dbg(DRV, priv, "start port called while port already up\n"); 1565 return 0; 1566 } 1567 1568 INIT_LIST_HEAD(&priv->mc_list); 1569 INIT_LIST_HEAD(&priv->curr_list); 1570 INIT_LIST_HEAD(&priv->ethtool_list); 1571 memset(&priv->ethtool_rules[0], 0, 1572 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES); 1573 1574 /* Calculate Rx buf size */ 1575 dev->mtu = min(dev->mtu, priv->max_mtu); 1576 mlx4_en_calc_rx_buf(dev); 1577 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); 1578 1579 /* Configure rx cq's and rings */ 1580 err = mlx4_en_activate_rx_rings(priv); 1581 if (err) { 1582 en_err(priv, "Failed to activate RX rings\n"); 1583 return err; 1584 } 1585 for (i = 0; i < priv->rx_ring_num; i++) { 1586 cq = priv->rx_cq[i]; 1587 1588 err = mlx4_en_init_affinity_hint(priv, i); 1589 if (err) { 1590 en_err(priv, "Failed preparing IRQ affinity hint\n"); 1591 goto cq_err; 1592 } 1593 1594 err = mlx4_en_activate_cq(priv, cq, i); 1595 if (err) { 1596 en_err(priv, "Failed activating Rx CQ\n"); 1597 mlx4_en_free_affinity_hint(priv, i); 1598 goto cq_err; 1599 } 1600 1601 for (j = 0; j < cq->size; j++) { 1602 struct mlx4_cqe *cqe = NULL; 1603 1604 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) + 1605 priv->cqe_factor; 1606 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK; 1607 } 1608 1609 err = mlx4_en_set_cq_moder(priv, cq); 1610 if (err) { 1611 en_err(priv, "Failed setting cq moderation parameters\n"); 1612 mlx4_en_deactivate_cq(priv, cq); 1613 mlx4_en_free_affinity_hint(priv, i); 1614 goto cq_err; 1615 } 1616 mlx4_en_arm_cq(priv, cq); 1617 priv->rx_ring[i]->cqn = cq->mcq.cqn; 1618 ++rx_index; 1619 } 1620 1621 /* Set qp number */ 1622 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port); 1623 err = mlx4_en_get_qp(priv); 1624 if (err) { 1625 en_err(priv, "Failed getting eth qp\n"); 1626 goto cq_err; 1627 } 1628 mdev->mac_removed[priv->port] = 0; 1629 1630 priv->counter_index = 1631 mlx4_get_default_counter_index(mdev->dev, priv->port); 1632 1633 err = mlx4_en_config_rss_steer(priv); 1634 if (err) { 1635 en_err(priv, "Failed configuring rss steering\n"); 1636 goto mac_err; 1637 } 1638 1639 err = mlx4_en_create_drop_qp(priv); 1640 if (err) 1641 goto rss_err; 1642 1643 /* Configure tx cq's and rings */ 1644 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1645 u8 num_tx_rings_p_up = t == TX ? 1646 priv->num_tx_rings_p_up : priv->tx_ring_num[t]; 1647 1648 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1649 /* Configure cq */ 1650 cq = priv->tx_cq[t][i]; 1651 err = mlx4_en_activate_cq(priv, cq, i); 1652 if (err) { 1653 en_err(priv, "Failed allocating Tx CQ\n"); 1654 goto tx_err; 1655 } 1656 err = mlx4_en_set_cq_moder(priv, cq); 1657 if (err) { 1658 en_err(priv, "Failed setting cq moderation parameters\n"); 1659 mlx4_en_deactivate_cq(priv, cq); 1660 goto tx_err; 1661 } 1662 en_dbg(DRV, priv, 1663 "Resetting index of collapsed CQ:%d to -1\n", i); 1664 cq->buf->wqe_index = cpu_to_be16(0xffff); 1665 1666 /* Configure ring */ 1667 tx_ring = priv->tx_ring[t][i]; 1668 err = mlx4_en_activate_tx_ring(priv, tx_ring, 1669 cq->mcq.cqn, 1670 i / num_tx_rings_p_up); 1671 if (err) { 1672 en_err(priv, "Failed allocating Tx ring\n"); 1673 mlx4_en_deactivate_cq(priv, cq); 1674 goto tx_err; 1675 } 1676 if (t != TX_XDP) { 1677 tx_ring->tx_queue = netdev_get_tx_queue(dev, i); 1678 tx_ring->recycle_ring = NULL; 1679 } else { 1680 mlx4_en_init_recycle_ring(priv, i); 1681 } 1682 1683 /* Arm CQ for TX completions */ 1684 mlx4_en_arm_cq(priv, cq); 1685 1686 /* Set initial ownership of all Tx TXBBs to SW (1) */ 1687 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) 1688 *((u32 *)(tx_ring->buf + j)) = 0xffffffff; 1689 } 1690 } 1691 1692 /* Configure port */ 1693 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 1694 priv->rx_skb_size + ETH_FCS_LEN, 1695 priv->prof->tx_pause, 1696 priv->prof->tx_ppp, 1697 priv->prof->rx_pause, 1698 priv->prof->rx_ppp); 1699 if (err) { 1700 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 1701 priv->port, err); 1702 goto tx_err; 1703 } 1704 1705 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu); 1706 if (err) { 1707 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n", 1708 dev->mtu, priv->port, err); 1709 goto tx_err; 1710 } 1711 1712 /* Set default qp number */ 1713 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); 1714 if (err) { 1715 en_err(priv, "Failed setting default qp numbers\n"); 1716 goto tx_err; 1717 } 1718 1719 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 1720 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 1721 if (err) { 1722 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 1723 err); 1724 goto tx_err; 1725 } 1726 } 1727 1728 /* Init port */ 1729 en_dbg(HW, priv, "Initializing port\n"); 1730 err = mlx4_INIT_PORT(mdev->dev, priv->port); 1731 if (err) { 1732 en_err(priv, "Failed Initializing port\n"); 1733 goto tx_err; 1734 } 1735 1736 /* Set Unicast and VXLAN steering rules */ 1737 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 && 1738 mlx4_en_set_rss_steer_rules(priv)) 1739 mlx4_warn(mdev, "Failed setting steering rules\n"); 1740 1741 /* Attach rx QP to bradcast address */ 1742 eth_broadcast_addr(&mc_list[10]); 1743 mc_list[5] = priv->port; /* needed for B0 steering support */ 1744 if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list, 1745 priv->port, 0, MLX4_PROT_ETH, 1746 &priv->broadcast_id)) 1747 mlx4_warn(mdev, "Failed Attaching Broadcast\n"); 1748 1749 /* Must redo promiscuous mode setup. */ 1750 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); 1751 1752 /* Schedule multicast task to populate multicast list */ 1753 queue_work(mdev->workqueue, &priv->rx_mode_task); 1754 1755 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 1756 udp_tunnel_get_rx_info(dev); 1757 1758 priv->port_up = true; 1759 1760 /* Process all completions if exist to prevent 1761 * the queues freezing if they are full 1762 */ 1763 for (i = 0; i < priv->rx_ring_num; i++) { 1764 local_bh_disable(); 1765 napi_schedule(&priv->rx_cq[i]->napi); 1766 local_bh_enable(); 1767 } 1768 1769 netif_tx_start_all_queues(dev); 1770 netif_device_attach(dev); 1771 1772 return 0; 1773 1774 tx_err: 1775 if (t == MLX4_EN_NUM_TX_TYPES) { 1776 t--; 1777 i = priv->tx_ring_num[t]; 1778 } 1779 while (t >= 0) { 1780 while (i--) { 1781 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1782 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1783 } 1784 if (!t--) 1785 break; 1786 i = priv->tx_ring_num[t]; 1787 } 1788 mlx4_en_destroy_drop_qp(priv); 1789 rss_err: 1790 mlx4_en_release_rss_steer(priv); 1791 mac_err: 1792 mlx4_en_put_qp(priv); 1793 cq_err: 1794 while (rx_index--) { 1795 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]); 1796 mlx4_en_free_affinity_hint(priv, rx_index); 1797 } 1798 for (i = 0; i < priv->rx_ring_num; i++) 1799 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1800 1801 return err; /* need to close devices */ 1802 } 1803 1804 1805 void mlx4_en_stop_port(struct net_device *dev, int detach) 1806 { 1807 struct mlx4_en_priv *priv = netdev_priv(dev); 1808 struct mlx4_en_dev *mdev = priv->mdev; 1809 struct mlx4_en_mc_list *mclist, *tmp; 1810 struct ethtool_flow_id *flow, *tmp_flow; 1811 int i, t; 1812 u8 mc_list[16] = {0}; 1813 1814 if (!priv->port_up) { 1815 en_dbg(DRV, priv, "stop port called while port already down\n"); 1816 return; 1817 } 1818 1819 /* close port*/ 1820 mlx4_CLOSE_PORT(mdev->dev, priv->port); 1821 1822 /* Synchronize with tx routine */ 1823 netif_tx_lock_bh(dev); 1824 if (detach) 1825 netif_device_detach(dev); 1826 netif_tx_stop_all_queues(dev); 1827 netif_tx_unlock_bh(dev); 1828 1829 netif_tx_disable(dev); 1830 1831 spin_lock_bh(&priv->stats_lock); 1832 mlx4_en_fold_software_stats(dev); 1833 /* Set port as not active */ 1834 priv->port_up = false; 1835 spin_unlock_bh(&priv->stats_lock); 1836 1837 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 1838 1839 /* Promsicuous mode */ 1840 if (mdev->dev->caps.steering_mode == 1841 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1842 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | 1843 MLX4_EN_FLAG_MC_PROMISC); 1844 mlx4_flow_steer_promisc_remove(mdev->dev, 1845 priv->port, 1846 MLX4_FS_ALL_DEFAULT); 1847 mlx4_flow_steer_promisc_remove(mdev->dev, 1848 priv->port, 1849 MLX4_FS_MC_DEFAULT); 1850 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) { 1851 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 1852 1853 /* Disable promiscouos mode */ 1854 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, 1855 priv->port); 1856 1857 /* Disable Multicast promisc */ 1858 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1859 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, 1860 priv->port); 1861 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1862 } 1863 } 1864 1865 /* Detach All multicasts */ 1866 eth_broadcast_addr(&mc_list[10]); 1867 mc_list[5] = priv->port; /* needed for B0 steering support */ 1868 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list, 1869 MLX4_PROT_ETH, priv->broadcast_id); 1870 list_for_each_entry(mclist, &priv->curr_list, list) { 1871 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1872 mc_list[5] = priv->port; 1873 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, 1874 mc_list, MLX4_PROT_ETH, mclist->reg_id); 1875 if (mclist->tunnel_reg_id) 1876 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id); 1877 } 1878 mlx4_en_clear_list(dev); 1879 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1880 list_del(&mclist->list); 1881 kfree(mclist); 1882 } 1883 1884 /* Flush multicast filter */ 1885 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); 1886 1887 /* Remove flow steering rules for the port*/ 1888 if (mdev->dev->caps.steering_mode == 1889 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1890 ASSERT_RTNL(); 1891 list_for_each_entry_safe(flow, tmp_flow, 1892 &priv->ethtool_list, list) { 1893 mlx4_flow_detach(mdev->dev, flow->id); 1894 list_del(&flow->list); 1895 } 1896 } 1897 1898 mlx4_en_destroy_drop_qp(priv); 1899 1900 /* Free TX Rings */ 1901 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 1902 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1903 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1904 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1905 } 1906 } 1907 msleep(10); 1908 1909 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) 1910 for (i = 0; i < priv->tx_ring_num[t]; i++) 1911 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]); 1912 1913 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 1914 mlx4_en_delete_rss_steer_rules(priv); 1915 1916 /* Free RSS qps */ 1917 mlx4_en_release_rss_steer(priv); 1918 1919 /* Unregister Mac address for the port */ 1920 mlx4_en_put_qp(priv); 1921 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN)) 1922 mdev->mac_removed[priv->port] = 1; 1923 1924 /* Free RX Rings */ 1925 for (i = 0; i < priv->rx_ring_num; i++) { 1926 struct mlx4_en_cq *cq = priv->rx_cq[i]; 1927 1928 napi_synchronize(&cq->napi); 1929 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1930 mlx4_en_deactivate_cq(priv, cq); 1931 1932 mlx4_en_free_affinity_hint(priv, i); 1933 } 1934 } 1935 1936 static void mlx4_en_restart(struct work_struct *work) 1937 { 1938 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1939 watchdog_task); 1940 struct mlx4_en_dev *mdev = priv->mdev; 1941 struct net_device *dev = priv->dev; 1942 1943 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); 1944 1945 rtnl_lock(); 1946 mutex_lock(&mdev->state_lock); 1947 if (priv->port_up) { 1948 mlx4_en_stop_port(dev, 1); 1949 if (mlx4_en_start_port(dev)) 1950 en_err(priv, "Failed restarting port %d\n", priv->port); 1951 } 1952 mutex_unlock(&mdev->state_lock); 1953 rtnl_unlock(); 1954 } 1955 1956 static void mlx4_en_clear_stats(struct net_device *dev) 1957 { 1958 struct mlx4_en_priv *priv = netdev_priv(dev); 1959 struct mlx4_en_dev *mdev = priv->mdev; 1960 struct mlx4_en_tx_ring **tx_ring; 1961 int i; 1962 1963 if (!mlx4_is_slave(mdev->dev)) 1964 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) 1965 en_dbg(HW, priv, "Failed dumping statistics\n"); 1966 1967 memset(&priv->pstats, 0, sizeof(priv->pstats)); 1968 memset(&priv->pkstats, 0, sizeof(priv->pkstats)); 1969 memset(&priv->port_stats, 0, sizeof(priv->port_stats)); 1970 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats)); 1971 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats)); 1972 memset(&priv->rx_priority_flowstats, 0, 1973 sizeof(priv->rx_priority_flowstats)); 1974 memset(&priv->tx_priority_flowstats, 0, 1975 sizeof(priv->tx_priority_flowstats)); 1976 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats)); 1977 1978 tx_ring = priv->tx_ring[TX]; 1979 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1980 tx_ring[i]->bytes = 0; 1981 tx_ring[i]->packets = 0; 1982 tx_ring[i]->tx_csum = 0; 1983 tx_ring[i]->tx_dropped = 0; 1984 tx_ring[i]->queue_stopped = 0; 1985 tx_ring[i]->wake_queue = 0; 1986 tx_ring[i]->tso_packets = 0; 1987 tx_ring[i]->xmit_more = 0; 1988 } 1989 for (i = 0; i < priv->rx_ring_num; i++) { 1990 priv->rx_ring[i]->bytes = 0; 1991 priv->rx_ring[i]->packets = 0; 1992 priv->rx_ring[i]->csum_ok = 0; 1993 priv->rx_ring[i]->csum_none = 0; 1994 priv->rx_ring[i]->csum_complete = 0; 1995 } 1996 } 1997 1998 static int mlx4_en_open(struct net_device *dev) 1999 { 2000 struct mlx4_en_priv *priv = netdev_priv(dev); 2001 struct mlx4_en_dev *mdev = priv->mdev; 2002 int err = 0; 2003 2004 mutex_lock(&mdev->state_lock); 2005 2006 if (!mdev->device_up) { 2007 en_err(priv, "Cannot open - device down/disabled\n"); 2008 err = -EBUSY; 2009 goto out; 2010 } 2011 2012 /* Reset HW statistics and SW counters */ 2013 mlx4_en_clear_stats(dev); 2014 2015 err = mlx4_en_start_port(dev); 2016 if (err) 2017 en_err(priv, "Failed starting port:%d\n", priv->port); 2018 2019 out: 2020 mutex_unlock(&mdev->state_lock); 2021 return err; 2022 } 2023 2024 2025 static int mlx4_en_close(struct net_device *dev) 2026 { 2027 struct mlx4_en_priv *priv = netdev_priv(dev); 2028 struct mlx4_en_dev *mdev = priv->mdev; 2029 2030 en_dbg(IFDOWN, priv, "Close port called\n"); 2031 2032 mutex_lock(&mdev->state_lock); 2033 2034 mlx4_en_stop_port(dev, 0); 2035 netif_carrier_off(dev); 2036 2037 mutex_unlock(&mdev->state_lock); 2038 return 0; 2039 } 2040 2041 static void mlx4_en_free_resources(struct mlx4_en_priv *priv) 2042 { 2043 int i, t; 2044 2045 #ifdef CONFIG_RFS_ACCEL 2046 priv->dev->rx_cpu_rmap = NULL; 2047 #endif 2048 2049 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2050 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2051 if (priv->tx_ring[t] && priv->tx_ring[t][i]) 2052 mlx4_en_destroy_tx_ring(priv, 2053 &priv->tx_ring[t][i]); 2054 if (priv->tx_cq[t] && priv->tx_cq[t][i]) 2055 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2056 } 2057 kfree(priv->tx_ring[t]); 2058 kfree(priv->tx_cq[t]); 2059 } 2060 2061 for (i = 0; i < priv->rx_ring_num; i++) { 2062 if (priv->rx_ring[i]) 2063 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2064 priv->prof->rx_ring_size, priv->stride); 2065 if (priv->rx_cq[i]) 2066 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2067 } 2068 2069 } 2070 2071 static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) 2072 { 2073 struct mlx4_en_port_profile *prof = priv->prof; 2074 int i, t; 2075 int node; 2076 2077 /* Create tx Rings */ 2078 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2079 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2080 node = cpu_to_node(i % num_online_cpus()); 2081 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i], 2082 prof->tx_ring_size, i, t, node)) 2083 goto err; 2084 2085 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i], 2086 prof->tx_ring_size, 2087 TXBB_SIZE, node, i)) 2088 goto err; 2089 } 2090 } 2091 2092 /* Create rx Rings */ 2093 for (i = 0; i < priv->rx_ring_num; i++) { 2094 node = cpu_to_node(i % num_online_cpus()); 2095 if (mlx4_en_create_cq(priv, &priv->rx_cq[i], 2096 prof->rx_ring_size, i, RX, node)) 2097 goto err; 2098 2099 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], 2100 prof->rx_ring_size, priv->stride, 2101 node)) 2102 goto err; 2103 } 2104 2105 #ifdef CONFIG_RFS_ACCEL 2106 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port); 2107 #endif 2108 2109 return 0; 2110 2111 err: 2112 en_err(priv, "Failed to allocate NIC resources\n"); 2113 for (i = 0; i < priv->rx_ring_num; i++) { 2114 if (priv->rx_ring[i]) 2115 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2116 prof->rx_ring_size, 2117 priv->stride); 2118 if (priv->rx_cq[i]) 2119 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2120 } 2121 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2122 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2123 if (priv->tx_ring[t][i]) 2124 mlx4_en_destroy_tx_ring(priv, 2125 &priv->tx_ring[t][i]); 2126 if (priv->tx_cq[t][i]) 2127 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2128 } 2129 } 2130 return -ENOMEM; 2131 } 2132 2133 2134 static int mlx4_en_copy_priv(struct mlx4_en_priv *dst, 2135 struct mlx4_en_priv *src, 2136 struct mlx4_en_port_profile *prof) 2137 { 2138 int t; 2139 2140 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config, 2141 sizeof(dst->hwtstamp_config)); 2142 dst->num_tx_rings_p_up = src->mdev->profile.num_tx_rings_p_up; 2143 dst->rx_ring_num = prof->rx_ring_num; 2144 dst->flags = prof->flags; 2145 dst->mdev = src->mdev; 2146 dst->port = src->port; 2147 dst->dev = src->dev; 2148 dst->prof = prof; 2149 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 2150 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 2151 2152 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2153 dst->tx_ring_num[t] = prof->tx_ring_num[t]; 2154 if (!dst->tx_ring_num[t]) 2155 continue; 2156 2157 dst->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) * 2158 MAX_TX_RINGS, GFP_KERNEL); 2159 if (!dst->tx_ring[t]) 2160 goto err_free_tx; 2161 2162 dst->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) * 2163 MAX_TX_RINGS, GFP_KERNEL); 2164 if (!dst->tx_cq[t]) { 2165 kfree(dst->tx_ring[t]); 2166 goto err_free_tx; 2167 } 2168 } 2169 2170 return 0; 2171 2172 err_free_tx: 2173 while (t--) { 2174 kfree(dst->tx_ring[t]); 2175 kfree(dst->tx_cq[t]); 2176 } 2177 return -ENOMEM; 2178 } 2179 2180 static void mlx4_en_update_priv(struct mlx4_en_priv *dst, 2181 struct mlx4_en_priv *src) 2182 { 2183 int t; 2184 memcpy(dst->rx_ring, src->rx_ring, 2185 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num); 2186 memcpy(dst->rx_cq, src->rx_cq, 2187 sizeof(struct mlx4_en_cq *) * src->rx_ring_num); 2188 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config, 2189 sizeof(dst->hwtstamp_config)); 2190 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2191 dst->tx_ring_num[t] = src->tx_ring_num[t]; 2192 dst->tx_ring[t] = src->tx_ring[t]; 2193 dst->tx_cq[t] = src->tx_cq[t]; 2194 } 2195 dst->rx_ring_num = src->rx_ring_num; 2196 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile)); 2197 } 2198 2199 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv, 2200 struct mlx4_en_priv *tmp, 2201 struct mlx4_en_port_profile *prof, 2202 bool carry_xdp_prog) 2203 { 2204 struct bpf_prog *xdp_prog; 2205 int i, t; 2206 2207 mlx4_en_copy_priv(tmp, priv, prof); 2208 2209 if (mlx4_en_alloc_resources(tmp)) { 2210 en_warn(priv, 2211 "%s: Resource allocation failed, using previous configuration\n", 2212 __func__); 2213 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2214 kfree(tmp->tx_ring[t]); 2215 kfree(tmp->tx_cq[t]); 2216 } 2217 return -ENOMEM; 2218 } 2219 2220 /* All rx_rings has the same xdp_prog. Pick the first one. */ 2221 xdp_prog = rcu_dereference_protected( 2222 priv->rx_ring[0]->xdp_prog, 2223 lockdep_is_held(&priv->mdev->state_lock)); 2224 2225 if (xdp_prog && carry_xdp_prog) { 2226 xdp_prog = bpf_prog_add(xdp_prog, tmp->rx_ring_num); 2227 if (IS_ERR(xdp_prog)) { 2228 mlx4_en_free_resources(tmp); 2229 return PTR_ERR(xdp_prog); 2230 } 2231 for (i = 0; i < tmp->rx_ring_num; i++) 2232 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog, 2233 xdp_prog); 2234 } 2235 2236 return 0; 2237 } 2238 2239 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv, 2240 struct mlx4_en_priv *tmp) 2241 { 2242 mlx4_en_free_resources(priv); 2243 mlx4_en_update_priv(priv, tmp); 2244 } 2245 2246 void mlx4_en_destroy_netdev(struct net_device *dev) 2247 { 2248 struct mlx4_en_priv *priv = netdev_priv(dev); 2249 struct mlx4_en_dev *mdev = priv->mdev; 2250 2251 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); 2252 2253 /* Unregister device - this will close the port if it was up */ 2254 if (priv->registered) { 2255 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev, 2256 priv->port)); 2257 unregister_netdev(dev); 2258 } 2259 2260 if (priv->allocated) 2261 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); 2262 2263 cancel_delayed_work(&priv->stats_task); 2264 cancel_delayed_work(&priv->service_task); 2265 /* flush any pending task for this netdev */ 2266 flush_workqueue(mdev->workqueue); 2267 2268 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 2269 mlx4_en_remove_timestamp(mdev); 2270 2271 /* Detach the netdev so tasks would not attempt to access it */ 2272 mutex_lock(&mdev->state_lock); 2273 mdev->pndev[priv->port] = NULL; 2274 mdev->upper[priv->port] = NULL; 2275 2276 #ifdef CONFIG_RFS_ACCEL 2277 mlx4_en_cleanup_filters(priv); 2278 #endif 2279 2280 mlx4_en_free_resources(priv); 2281 mutex_unlock(&mdev->state_lock); 2282 2283 free_netdev(dev); 2284 } 2285 2286 static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu) 2287 { 2288 struct mlx4_en_priv *priv = netdev_priv(dev); 2289 2290 if (mtu > MLX4_EN_MAX_XDP_MTU) { 2291 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n", 2292 mtu, MLX4_EN_MAX_XDP_MTU); 2293 return false; 2294 } 2295 2296 return true; 2297 } 2298 2299 static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) 2300 { 2301 struct mlx4_en_priv *priv = netdev_priv(dev); 2302 struct mlx4_en_dev *mdev = priv->mdev; 2303 int err = 0; 2304 2305 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", 2306 dev->mtu, new_mtu); 2307 2308 if (priv->tx_ring_num[TX_XDP] && 2309 !mlx4_en_check_xdp_mtu(dev, new_mtu)) 2310 return -EOPNOTSUPP; 2311 2312 dev->mtu = new_mtu; 2313 2314 if (netif_running(dev)) { 2315 mutex_lock(&mdev->state_lock); 2316 if (!mdev->device_up) { 2317 /* NIC is probably restarting - let watchdog task reset 2318 * the port */ 2319 en_dbg(DRV, priv, "Change MTU called with card down!?\n"); 2320 } else { 2321 mlx4_en_stop_port(dev, 1); 2322 err = mlx4_en_start_port(dev); 2323 if (err) { 2324 en_err(priv, "Failed restarting port:%d\n", 2325 priv->port); 2326 queue_work(mdev->workqueue, &priv->watchdog_task); 2327 } 2328 } 2329 mutex_unlock(&mdev->state_lock); 2330 } 2331 return 0; 2332 } 2333 2334 static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 2335 { 2336 struct mlx4_en_priv *priv = netdev_priv(dev); 2337 struct mlx4_en_dev *mdev = priv->mdev; 2338 struct hwtstamp_config config; 2339 2340 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 2341 return -EFAULT; 2342 2343 /* reserved for future extensions */ 2344 if (config.flags) 2345 return -EINVAL; 2346 2347 /* device doesn't support time stamping */ 2348 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)) 2349 return -EINVAL; 2350 2351 /* TX HW timestamp */ 2352 switch (config.tx_type) { 2353 case HWTSTAMP_TX_OFF: 2354 case HWTSTAMP_TX_ON: 2355 break; 2356 default: 2357 return -ERANGE; 2358 } 2359 2360 /* RX HW timestamp */ 2361 switch (config.rx_filter) { 2362 case HWTSTAMP_FILTER_NONE: 2363 break; 2364 case HWTSTAMP_FILTER_ALL: 2365 case HWTSTAMP_FILTER_SOME: 2366 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2367 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2368 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2369 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2370 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2371 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2372 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2373 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2374 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2375 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2376 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2377 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2378 config.rx_filter = HWTSTAMP_FILTER_ALL; 2379 break; 2380 default: 2381 return -ERANGE; 2382 } 2383 2384 if (mlx4_en_reset_config(dev, config, dev->features)) { 2385 config.tx_type = HWTSTAMP_TX_OFF; 2386 config.rx_filter = HWTSTAMP_FILTER_NONE; 2387 } 2388 2389 return copy_to_user(ifr->ifr_data, &config, 2390 sizeof(config)) ? -EFAULT : 0; 2391 } 2392 2393 static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 2394 { 2395 struct mlx4_en_priv *priv = netdev_priv(dev); 2396 2397 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config, 2398 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0; 2399 } 2400 2401 static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 2402 { 2403 switch (cmd) { 2404 case SIOCSHWTSTAMP: 2405 return mlx4_en_hwtstamp_set(dev, ifr); 2406 case SIOCGHWTSTAMP: 2407 return mlx4_en_hwtstamp_get(dev, ifr); 2408 default: 2409 return -EOPNOTSUPP; 2410 } 2411 } 2412 2413 static netdev_features_t mlx4_en_fix_features(struct net_device *netdev, 2414 netdev_features_t features) 2415 { 2416 struct mlx4_en_priv *en_priv = netdev_priv(netdev); 2417 struct mlx4_en_dev *mdev = en_priv->mdev; 2418 2419 /* Since there is no support for separate RX C-TAG/S-TAG vlan accel 2420 * enable/disable make sure S-TAG flag is always in same state as 2421 * C-TAG. 2422 */ 2423 if (features & NETIF_F_HW_VLAN_CTAG_RX && 2424 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 2425 features |= NETIF_F_HW_VLAN_STAG_RX; 2426 else 2427 features &= ~NETIF_F_HW_VLAN_STAG_RX; 2428 2429 return features; 2430 } 2431 2432 static int mlx4_en_set_features(struct net_device *netdev, 2433 netdev_features_t features) 2434 { 2435 struct mlx4_en_priv *priv = netdev_priv(netdev); 2436 bool reset = false; 2437 int ret = 0; 2438 2439 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) { 2440 en_info(priv, "Turn %s RX-FCS\n", 2441 (features & NETIF_F_RXFCS) ? "ON" : "OFF"); 2442 reset = true; 2443 } 2444 2445 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) { 2446 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0; 2447 2448 en_info(priv, "Turn %s RX-ALL\n", 2449 ignore_fcs_value ? "ON" : "OFF"); 2450 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev, 2451 priv->port, ignore_fcs_value); 2452 if (ret) 2453 return ret; 2454 } 2455 2456 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 2457 en_info(priv, "Turn %s RX vlan strip offload\n", 2458 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF"); 2459 reset = true; 2460 } 2461 2462 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX)) 2463 en_info(priv, "Turn %s TX vlan strip offload\n", 2464 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF"); 2465 2466 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX)) 2467 en_info(priv, "Turn %s TX S-VLAN strip offload\n", 2468 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF"); 2469 2470 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) { 2471 en_info(priv, "Turn %s loopback\n", 2472 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF"); 2473 mlx4_en_update_loopback_state(netdev, features); 2474 } 2475 2476 if (reset) { 2477 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config, 2478 features); 2479 if (ret) 2480 return ret; 2481 } 2482 2483 return 0; 2484 } 2485 2486 static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac) 2487 { 2488 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2489 struct mlx4_en_dev *mdev = en_priv->mdev; 2490 2491 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac); 2492 } 2493 2494 static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos, 2495 __be16 vlan_proto) 2496 { 2497 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2498 struct mlx4_en_dev *mdev = en_priv->mdev; 2499 2500 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos, 2501 vlan_proto); 2502 } 2503 2504 static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate, 2505 int max_tx_rate) 2506 { 2507 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2508 struct mlx4_en_dev *mdev = en_priv->mdev; 2509 2510 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate, 2511 max_tx_rate); 2512 } 2513 2514 static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting) 2515 { 2516 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2517 struct mlx4_en_dev *mdev = en_priv->mdev; 2518 2519 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting); 2520 } 2521 2522 static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf) 2523 { 2524 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2525 struct mlx4_en_dev *mdev = en_priv->mdev; 2526 2527 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf); 2528 } 2529 2530 static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state) 2531 { 2532 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2533 struct mlx4_en_dev *mdev = en_priv->mdev; 2534 2535 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state); 2536 } 2537 2538 static int mlx4_en_get_vf_stats(struct net_device *dev, int vf, 2539 struct ifla_vf_stats *vf_stats) 2540 { 2541 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2542 struct mlx4_en_dev *mdev = en_priv->mdev; 2543 2544 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats); 2545 } 2546 2547 #define PORT_ID_BYTE_LEN 8 2548 static int mlx4_en_get_phys_port_id(struct net_device *dev, 2549 struct netdev_phys_item_id *ppid) 2550 { 2551 struct mlx4_en_priv *priv = netdev_priv(dev); 2552 struct mlx4_dev *mdev = priv->mdev->dev; 2553 int i; 2554 u64 phys_port_id = mdev->caps.phys_port_id[priv->port]; 2555 2556 if (!phys_port_id) 2557 return -EOPNOTSUPP; 2558 2559 ppid->id_len = sizeof(phys_port_id); 2560 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) { 2561 ppid->id[i] = phys_port_id & 0xff; 2562 phys_port_id >>= 8; 2563 } 2564 return 0; 2565 } 2566 2567 static void mlx4_en_add_vxlan_offloads(struct work_struct *work) 2568 { 2569 int ret; 2570 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2571 vxlan_add_task); 2572 2573 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port); 2574 if (ret) 2575 goto out; 2576 2577 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2578 VXLAN_STEER_BY_OUTER_MAC, 1); 2579 out: 2580 if (ret) { 2581 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret); 2582 return; 2583 } 2584 2585 /* set offloads */ 2586 priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2587 NETIF_F_RXCSUM | 2588 NETIF_F_TSO | NETIF_F_TSO6 | 2589 NETIF_F_GSO_UDP_TUNNEL | 2590 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2591 NETIF_F_GSO_PARTIAL; 2592 } 2593 2594 static void mlx4_en_del_vxlan_offloads(struct work_struct *work) 2595 { 2596 int ret; 2597 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2598 vxlan_del_task); 2599 /* unset offloads */ 2600 priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2601 NETIF_F_RXCSUM | 2602 NETIF_F_TSO | NETIF_F_TSO6 | 2603 NETIF_F_GSO_UDP_TUNNEL | 2604 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2605 NETIF_F_GSO_PARTIAL); 2606 2607 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2608 VXLAN_STEER_BY_OUTER_MAC, 0); 2609 if (ret) 2610 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret); 2611 2612 priv->vxlan_port = 0; 2613 } 2614 2615 static void mlx4_en_add_vxlan_port(struct net_device *dev, 2616 struct udp_tunnel_info *ti) 2617 { 2618 struct mlx4_en_priv *priv = netdev_priv(dev); 2619 __be16 port = ti->port; 2620 __be16 current_port; 2621 2622 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2623 return; 2624 2625 if (ti->sa_family != AF_INET) 2626 return; 2627 2628 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 2629 return; 2630 2631 current_port = priv->vxlan_port; 2632 if (current_port && current_port != port) { 2633 en_warn(priv, "vxlan port %d configured, can't add port %d\n", 2634 ntohs(current_port), ntohs(port)); 2635 return; 2636 } 2637 2638 priv->vxlan_port = port; 2639 queue_work(priv->mdev->workqueue, &priv->vxlan_add_task); 2640 } 2641 2642 static void mlx4_en_del_vxlan_port(struct net_device *dev, 2643 struct udp_tunnel_info *ti) 2644 { 2645 struct mlx4_en_priv *priv = netdev_priv(dev); 2646 __be16 port = ti->port; 2647 __be16 current_port; 2648 2649 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2650 return; 2651 2652 if (ti->sa_family != AF_INET) 2653 return; 2654 2655 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 2656 return; 2657 2658 current_port = priv->vxlan_port; 2659 if (current_port != port) { 2660 en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port)); 2661 return; 2662 } 2663 2664 queue_work(priv->mdev->workqueue, &priv->vxlan_del_task); 2665 } 2666 2667 static netdev_features_t mlx4_en_features_check(struct sk_buff *skb, 2668 struct net_device *dev, 2669 netdev_features_t features) 2670 { 2671 features = vlan_features_check(skb, features); 2672 features = vxlan_features_check(skb, features); 2673 2674 /* The ConnectX-3 doesn't support outer IPv6 checksums but it does 2675 * support inner IPv6 checksums and segmentation so we need to 2676 * strip that feature if this is an IPv6 encapsulated frame. 2677 */ 2678 if (skb->encapsulation && 2679 (skb->ip_summed == CHECKSUM_PARTIAL)) { 2680 struct mlx4_en_priv *priv = netdev_priv(dev); 2681 2682 if (!priv->vxlan_port || 2683 (ip_hdr(skb)->version != 4) || 2684 (udp_hdr(skb)->dest != priv->vxlan_port)) 2685 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 2686 } 2687 2688 return features; 2689 } 2690 2691 static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate) 2692 { 2693 struct mlx4_en_priv *priv = netdev_priv(dev); 2694 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index]; 2695 struct mlx4_update_qp_params params; 2696 int err; 2697 2698 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT)) 2699 return -EOPNOTSUPP; 2700 2701 /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */ 2702 if (maxrate >> 12) { 2703 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS; 2704 params.rate_val = maxrate / 1000; 2705 } else if (maxrate) { 2706 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS; 2707 params.rate_val = maxrate; 2708 } else { /* zero serves to revoke the QP rate-limitation */ 2709 params.rate_unit = 0; 2710 params.rate_val = 0; 2711 } 2712 2713 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT, 2714 ¶ms); 2715 return err; 2716 } 2717 2718 static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog) 2719 { 2720 struct mlx4_en_priv *priv = netdev_priv(dev); 2721 struct mlx4_en_dev *mdev = priv->mdev; 2722 struct mlx4_en_port_profile new_prof; 2723 struct bpf_prog *old_prog; 2724 struct mlx4_en_priv *tmp; 2725 int tx_changed = 0; 2726 int xdp_ring_num; 2727 int port_up = 0; 2728 int err; 2729 int i; 2730 2731 xdp_ring_num = prog ? priv->rx_ring_num : 0; 2732 2733 /* No need to reconfigure buffers when simply swapping the 2734 * program for a new one. 2735 */ 2736 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) { 2737 if (prog) { 2738 prog = bpf_prog_add(prog, priv->rx_ring_num - 1); 2739 if (IS_ERR(prog)) 2740 return PTR_ERR(prog); 2741 } 2742 mutex_lock(&mdev->state_lock); 2743 for (i = 0; i < priv->rx_ring_num; i++) { 2744 old_prog = rcu_dereference_protected( 2745 priv->rx_ring[i]->xdp_prog, 2746 lockdep_is_held(&mdev->state_lock)); 2747 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2748 if (old_prog) 2749 bpf_prog_put(old_prog); 2750 } 2751 mutex_unlock(&mdev->state_lock); 2752 return 0; 2753 } 2754 2755 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu)) 2756 return -EOPNOTSUPP; 2757 2758 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 2759 if (!tmp) 2760 return -ENOMEM; 2761 2762 if (prog) { 2763 prog = bpf_prog_add(prog, priv->rx_ring_num - 1); 2764 if (IS_ERR(prog)) { 2765 err = PTR_ERR(prog); 2766 goto out; 2767 } 2768 } 2769 2770 mutex_lock(&mdev->state_lock); 2771 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 2772 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num; 2773 2774 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) { 2775 tx_changed = 1; 2776 new_prof.tx_ring_num[TX] = 2777 MAX_TX_RINGS - ALIGN(xdp_ring_num, MLX4_EN_NUM_UP); 2778 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n"); 2779 } 2780 2781 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false); 2782 if (err) { 2783 if (prog) 2784 bpf_prog_sub(prog, priv->rx_ring_num - 1); 2785 goto unlock_out; 2786 } 2787 2788 if (priv->port_up) { 2789 port_up = 1; 2790 mlx4_en_stop_port(dev, 1); 2791 } 2792 2793 mlx4_en_safe_replace_resources(priv, tmp); 2794 if (tx_changed) 2795 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 2796 2797 for (i = 0; i < priv->rx_ring_num; i++) { 2798 old_prog = rcu_dereference_protected( 2799 priv->rx_ring[i]->xdp_prog, 2800 lockdep_is_held(&mdev->state_lock)); 2801 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2802 if (old_prog) 2803 bpf_prog_put(old_prog); 2804 } 2805 2806 if (port_up) { 2807 err = mlx4_en_start_port(dev); 2808 if (err) { 2809 en_err(priv, "Failed starting port %d for XDP change\n", 2810 priv->port); 2811 queue_work(mdev->workqueue, &priv->watchdog_task); 2812 } 2813 } 2814 2815 unlock_out: 2816 mutex_unlock(&mdev->state_lock); 2817 out: 2818 kfree(tmp); 2819 return err; 2820 } 2821 2822 static bool mlx4_xdp_attached(struct net_device *dev) 2823 { 2824 struct mlx4_en_priv *priv = netdev_priv(dev); 2825 2826 return !!priv->tx_ring_num[TX_XDP]; 2827 } 2828 2829 static int mlx4_xdp(struct net_device *dev, struct netdev_xdp *xdp) 2830 { 2831 switch (xdp->command) { 2832 case XDP_SETUP_PROG: 2833 return mlx4_xdp_set(dev, xdp->prog); 2834 case XDP_QUERY_PROG: 2835 xdp->prog_attached = mlx4_xdp_attached(dev); 2836 return 0; 2837 default: 2838 return -EINVAL; 2839 } 2840 } 2841 2842 static const struct net_device_ops mlx4_netdev_ops = { 2843 .ndo_open = mlx4_en_open, 2844 .ndo_stop = mlx4_en_close, 2845 .ndo_start_xmit = mlx4_en_xmit, 2846 .ndo_select_queue = mlx4_en_select_queue, 2847 .ndo_get_stats64 = mlx4_en_get_stats64, 2848 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2849 .ndo_set_mac_address = mlx4_en_set_mac, 2850 .ndo_validate_addr = eth_validate_addr, 2851 .ndo_change_mtu = mlx4_en_change_mtu, 2852 .ndo_do_ioctl = mlx4_en_ioctl, 2853 .ndo_tx_timeout = mlx4_en_tx_timeout, 2854 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2855 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2856 #ifdef CONFIG_NET_POLL_CONTROLLER 2857 .ndo_poll_controller = mlx4_en_netpoll, 2858 #endif 2859 .ndo_set_features = mlx4_en_set_features, 2860 .ndo_fix_features = mlx4_en_fix_features, 2861 .ndo_setup_tc = __mlx4_en_setup_tc, 2862 #ifdef CONFIG_RFS_ACCEL 2863 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2864 #endif 2865 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2866 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port, 2867 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port, 2868 .ndo_features_check = mlx4_en_features_check, 2869 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2870 .ndo_xdp = mlx4_xdp, 2871 }; 2872 2873 static const struct net_device_ops mlx4_netdev_ops_master = { 2874 .ndo_open = mlx4_en_open, 2875 .ndo_stop = mlx4_en_close, 2876 .ndo_start_xmit = mlx4_en_xmit, 2877 .ndo_select_queue = mlx4_en_select_queue, 2878 .ndo_get_stats64 = mlx4_en_get_stats64, 2879 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2880 .ndo_set_mac_address = mlx4_en_set_mac, 2881 .ndo_validate_addr = eth_validate_addr, 2882 .ndo_change_mtu = mlx4_en_change_mtu, 2883 .ndo_tx_timeout = mlx4_en_tx_timeout, 2884 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2885 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2886 .ndo_set_vf_mac = mlx4_en_set_vf_mac, 2887 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan, 2888 .ndo_set_vf_rate = mlx4_en_set_vf_rate, 2889 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk, 2890 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state, 2891 .ndo_get_vf_stats = mlx4_en_get_vf_stats, 2892 .ndo_get_vf_config = mlx4_en_get_vf_config, 2893 #ifdef CONFIG_NET_POLL_CONTROLLER 2894 .ndo_poll_controller = mlx4_en_netpoll, 2895 #endif 2896 .ndo_set_features = mlx4_en_set_features, 2897 .ndo_fix_features = mlx4_en_fix_features, 2898 .ndo_setup_tc = __mlx4_en_setup_tc, 2899 #ifdef CONFIG_RFS_ACCEL 2900 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2901 #endif 2902 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2903 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port, 2904 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port, 2905 .ndo_features_check = mlx4_en_features_check, 2906 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2907 .ndo_xdp = mlx4_xdp, 2908 }; 2909 2910 struct mlx4_en_bond { 2911 struct work_struct work; 2912 struct mlx4_en_priv *priv; 2913 int is_bonded; 2914 struct mlx4_port_map port_map; 2915 }; 2916 2917 static void mlx4_en_bond_work(struct work_struct *work) 2918 { 2919 struct mlx4_en_bond *bond = container_of(work, 2920 struct mlx4_en_bond, 2921 work); 2922 int err = 0; 2923 struct mlx4_dev *dev = bond->priv->mdev->dev; 2924 2925 if (bond->is_bonded) { 2926 if (!mlx4_is_bonded(dev)) { 2927 err = mlx4_bond(dev); 2928 if (err) 2929 en_err(bond->priv, "Fail to bond device\n"); 2930 } 2931 if (!err) { 2932 err = mlx4_port_map_set(dev, &bond->port_map); 2933 if (err) 2934 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n", 2935 bond->port_map.port1, 2936 bond->port_map.port2, 2937 err); 2938 } 2939 } else if (mlx4_is_bonded(dev)) { 2940 err = mlx4_unbond(dev); 2941 if (err) 2942 en_err(bond->priv, "Fail to unbond device\n"); 2943 } 2944 dev_put(bond->priv->dev); 2945 kfree(bond); 2946 } 2947 2948 static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded, 2949 u8 v2p_p1, u8 v2p_p2) 2950 { 2951 struct mlx4_en_bond *bond = NULL; 2952 2953 bond = kzalloc(sizeof(*bond), GFP_ATOMIC); 2954 if (!bond) 2955 return -ENOMEM; 2956 2957 INIT_WORK(&bond->work, mlx4_en_bond_work); 2958 bond->priv = priv; 2959 bond->is_bonded = is_bonded; 2960 bond->port_map.port1 = v2p_p1; 2961 bond->port_map.port2 = v2p_p2; 2962 dev_hold(priv->dev); 2963 queue_work(priv->mdev->workqueue, &bond->work); 2964 return 0; 2965 } 2966 2967 int mlx4_en_netdev_event(struct notifier_block *this, 2968 unsigned long event, void *ptr) 2969 { 2970 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 2971 u8 port = 0; 2972 struct mlx4_en_dev *mdev; 2973 struct mlx4_dev *dev; 2974 int i, num_eth_ports = 0; 2975 bool do_bond = true; 2976 struct mlx4_en_priv *priv; 2977 u8 v2p_port1 = 0; 2978 u8 v2p_port2 = 0; 2979 2980 if (!net_eq(dev_net(ndev), &init_net)) 2981 return NOTIFY_DONE; 2982 2983 mdev = container_of(this, struct mlx4_en_dev, nb); 2984 dev = mdev->dev; 2985 2986 /* Go into this mode only when two network devices set on two ports 2987 * of the same mlx4 device are slaves of the same bonding master 2988 */ 2989 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { 2990 ++num_eth_ports; 2991 if (!port && (mdev->pndev[i] == ndev)) 2992 port = i; 2993 mdev->upper[i] = mdev->pndev[i] ? 2994 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL; 2995 /* condition not met: network device is a slave */ 2996 if (!mdev->upper[i]) 2997 do_bond = false; 2998 if (num_eth_ports < 2) 2999 continue; 3000 /* condition not met: same master */ 3001 if (mdev->upper[i] != mdev->upper[i-1]) 3002 do_bond = false; 3003 } 3004 /* condition not met: 2 salves */ 3005 do_bond = (num_eth_ports == 2) ? do_bond : false; 3006 3007 /* handle only events that come with enough info */ 3008 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port) 3009 return NOTIFY_DONE; 3010 3011 priv = netdev_priv(ndev); 3012 if (do_bond) { 3013 struct netdev_notifier_bonding_info *notifier_info = ptr; 3014 struct netdev_bonding_info *bonding_info = 3015 ¬ifier_info->bonding_info; 3016 3017 /* required mode 1, 2 or 4 */ 3018 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) && 3019 (bonding_info->master.bond_mode != BOND_MODE_XOR) && 3020 (bonding_info->master.bond_mode != BOND_MODE_8023AD)) 3021 do_bond = false; 3022 3023 /* require exactly 2 slaves */ 3024 if (bonding_info->master.num_slaves != 2) 3025 do_bond = false; 3026 3027 /* calc v2p */ 3028 if (do_bond) { 3029 if (bonding_info->master.bond_mode == 3030 BOND_MODE_ACTIVEBACKUP) { 3031 /* in active-backup mode virtual ports are 3032 * mapped to the physical port of the active 3033 * slave */ 3034 if (bonding_info->slave.state == 3035 BOND_STATE_BACKUP) { 3036 if (port == 1) { 3037 v2p_port1 = 2; 3038 v2p_port2 = 2; 3039 } else { 3040 v2p_port1 = 1; 3041 v2p_port2 = 1; 3042 } 3043 } else { /* BOND_STATE_ACTIVE */ 3044 if (port == 1) { 3045 v2p_port1 = 1; 3046 v2p_port2 = 1; 3047 } else { 3048 v2p_port1 = 2; 3049 v2p_port2 = 2; 3050 } 3051 } 3052 } else { /* Active-Active */ 3053 /* in active-active mode a virtual port is 3054 * mapped to the native physical port if and only 3055 * if the physical port is up */ 3056 __s8 link = bonding_info->slave.link; 3057 3058 if (port == 1) 3059 v2p_port2 = 2; 3060 else 3061 v2p_port1 = 1; 3062 if ((link == BOND_LINK_UP) || 3063 (link == BOND_LINK_FAIL)) { 3064 if (port == 1) 3065 v2p_port1 = 1; 3066 else 3067 v2p_port2 = 2; 3068 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */ 3069 if (port == 1) 3070 v2p_port1 = 2; 3071 else 3072 v2p_port2 = 1; 3073 } 3074 } 3075 } 3076 } 3077 3078 mlx4_en_queue_bond_work(priv, do_bond, 3079 v2p_port1, v2p_port2); 3080 3081 return NOTIFY_DONE; 3082 } 3083 3084 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev, 3085 struct mlx4_en_stats_bitmap *stats_bitmap, 3086 u8 rx_ppp, u8 rx_pause, 3087 u8 tx_ppp, u8 tx_pause) 3088 { 3089 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS; 3090 3091 if (!mlx4_is_slave(dev) && 3092 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) { 3093 mutex_lock(&stats_bitmap->mutex); 3094 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS); 3095 3096 if (rx_ppp) 3097 bitmap_set(stats_bitmap->bitmap, last_i, 3098 NUM_FLOW_PRIORITY_STATS_RX); 3099 last_i += NUM_FLOW_PRIORITY_STATS_RX; 3100 3101 if (rx_pause && !(rx_ppp)) 3102 bitmap_set(stats_bitmap->bitmap, last_i, 3103 NUM_FLOW_STATS_RX); 3104 last_i += NUM_FLOW_STATS_RX; 3105 3106 if (tx_ppp) 3107 bitmap_set(stats_bitmap->bitmap, last_i, 3108 NUM_FLOW_PRIORITY_STATS_TX); 3109 last_i += NUM_FLOW_PRIORITY_STATS_TX; 3110 3111 if (tx_pause && !(tx_ppp)) 3112 bitmap_set(stats_bitmap->bitmap, last_i, 3113 NUM_FLOW_STATS_TX); 3114 last_i += NUM_FLOW_STATS_TX; 3115 3116 mutex_unlock(&stats_bitmap->mutex); 3117 } 3118 } 3119 3120 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev, 3121 struct mlx4_en_stats_bitmap *stats_bitmap, 3122 u8 rx_ppp, u8 rx_pause, 3123 u8 tx_ppp, u8 tx_pause) 3124 { 3125 int last_i = 0; 3126 3127 mutex_init(&stats_bitmap->mutex); 3128 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS); 3129 3130 if (mlx4_is_slave(dev)) { 3131 bitmap_set(stats_bitmap->bitmap, last_i + 3132 MLX4_FIND_NETDEV_STAT(rx_packets), 1); 3133 bitmap_set(stats_bitmap->bitmap, last_i + 3134 MLX4_FIND_NETDEV_STAT(tx_packets), 1); 3135 bitmap_set(stats_bitmap->bitmap, last_i + 3136 MLX4_FIND_NETDEV_STAT(rx_bytes), 1); 3137 bitmap_set(stats_bitmap->bitmap, last_i + 3138 MLX4_FIND_NETDEV_STAT(tx_bytes), 1); 3139 bitmap_set(stats_bitmap->bitmap, last_i + 3140 MLX4_FIND_NETDEV_STAT(rx_dropped), 1); 3141 bitmap_set(stats_bitmap->bitmap, last_i + 3142 MLX4_FIND_NETDEV_STAT(tx_dropped), 1); 3143 } else { 3144 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS); 3145 } 3146 last_i += NUM_MAIN_STATS; 3147 3148 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS); 3149 last_i += NUM_PORT_STATS; 3150 3151 if (mlx4_is_master(dev)) 3152 bitmap_set(stats_bitmap->bitmap, last_i, 3153 NUM_PF_STATS); 3154 last_i += NUM_PF_STATS; 3155 3156 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap, 3157 rx_ppp, rx_pause, 3158 tx_ppp, tx_pause); 3159 last_i += NUM_FLOW_STATS; 3160 3161 if (!mlx4_is_slave(dev)) 3162 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS); 3163 last_i += NUM_PKT_STATS; 3164 3165 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS); 3166 last_i += NUM_XDP_STATS; 3167 } 3168 3169 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 3170 struct mlx4_en_port_profile *prof) 3171 { 3172 struct net_device *dev; 3173 struct mlx4_en_priv *priv; 3174 int i, t; 3175 int err; 3176 3177 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv), 3178 MAX_TX_RINGS, MAX_RX_RINGS); 3179 if (dev == NULL) 3180 return -ENOMEM; 3181 3182 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]); 3183 netif_set_real_num_rx_queues(dev, prof->rx_ring_num); 3184 3185 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev); 3186 dev->dev_port = port - 1; 3187 3188 /* 3189 * Initialize driver private data 3190 */ 3191 3192 priv = netdev_priv(dev); 3193 memset(priv, 0, sizeof(struct mlx4_en_priv)); 3194 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 3195 spin_lock_init(&priv->stats_lock); 3196 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode); 3197 INIT_WORK(&priv->watchdog_task, mlx4_en_restart); 3198 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); 3199 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); 3200 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task); 3201 INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads); 3202 INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads); 3203 #ifdef CONFIG_RFS_ACCEL 3204 INIT_LIST_HEAD(&priv->filters); 3205 spin_lock_init(&priv->filters_lock); 3206 #endif 3207 3208 priv->dev = dev; 3209 priv->mdev = mdev; 3210 priv->ddev = &mdev->pdev->dev; 3211 priv->prof = prof; 3212 priv->port = port; 3213 priv->port_up = false; 3214 priv->flags = prof->flags; 3215 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME; 3216 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | 3217 MLX4_WQE_CTRL_SOLICITED); 3218 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up; 3219 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK; 3220 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key)); 3221 3222 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 3223 priv->tx_ring_num[t] = prof->tx_ring_num[t]; 3224 if (!priv->tx_ring_num[t]) 3225 continue; 3226 3227 priv->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) * 3228 MAX_TX_RINGS, GFP_KERNEL); 3229 if (!priv->tx_ring[t]) { 3230 err = -ENOMEM; 3231 goto err_free_tx; 3232 } 3233 priv->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) * 3234 MAX_TX_RINGS, GFP_KERNEL); 3235 if (!priv->tx_cq[t]) { 3236 kfree(priv->tx_ring[t]); 3237 err = -ENOMEM; 3238 goto out; 3239 } 3240 } 3241 priv->rx_ring_num = prof->rx_ring_num; 3242 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0; 3243 priv->cqe_size = mdev->dev->caps.cqe_size; 3244 priv->mac_index = -1; 3245 priv->msg_enable = MLX4_EN_MSG_LEVEL; 3246 #ifdef CONFIG_MLX4_EN_DCB 3247 if (!mlx4_is_slave(priv->mdev->dev)) { 3248 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST | 3249 DCB_CAP_DCBX_VER_IEEE; 3250 priv->flags |= MLX4_EN_DCB_ENABLED; 3251 priv->cee_config.pfc_state = false; 3252 3253 for (i = 0; i < MLX4_EN_NUM_UP; i++) 3254 priv->cee_config.dcb_pfc[i] = pfc_disabled; 3255 3256 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) { 3257 dev->dcbnl_ops = &mlx4_en_dcbnl_ops; 3258 } else { 3259 en_info(priv, "enabling only PFC DCB ops\n"); 3260 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops; 3261 } 3262 } 3263 #endif 3264 3265 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) 3266 INIT_HLIST_HEAD(&priv->mac_hash[i]); 3267 3268 /* Query for default mac and max mtu */ 3269 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; 3270 3271 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] & 3272 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP) 3273 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP; 3274 3275 /* Set default MAC */ 3276 dev->addr_len = ETH_ALEN; 3277 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]); 3278 if (!is_valid_ether_addr(dev->dev_addr)) { 3279 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n", 3280 priv->port, dev->dev_addr); 3281 err = -EINVAL; 3282 goto out; 3283 } else if (mlx4_is_slave(priv->mdev->dev) && 3284 (priv->mdev->dev->port_random_macs & 1 << priv->port)) { 3285 /* Random MAC was assigned in mlx4_slave_cap 3286 * in mlx4_core module 3287 */ 3288 dev->addr_assign_type |= NET_ADDR_RANDOM; 3289 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr); 3290 } 3291 3292 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac)); 3293 3294 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 3295 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 3296 err = mlx4_en_alloc_resources(priv); 3297 if (err) 3298 goto out; 3299 3300 /* Initialize time stamping config */ 3301 priv->hwtstamp_config.flags = 0; 3302 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF; 3303 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; 3304 3305 /* Allocate page for receive rings */ 3306 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, 3307 MLX4_EN_PAGE_SIZE); 3308 if (err) { 3309 en_err(priv, "Failed to allocate page for rx qps\n"); 3310 goto out; 3311 } 3312 priv->allocated = 1; 3313 3314 /* 3315 * Initialize netdev entry points 3316 */ 3317 if (mlx4_is_master(priv->mdev->dev)) 3318 dev->netdev_ops = &mlx4_netdev_ops_master; 3319 else 3320 dev->netdev_ops = &mlx4_netdev_ops; 3321 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; 3322 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 3323 netif_set_real_num_rx_queues(dev, priv->rx_ring_num); 3324 3325 dev->ethtool_ops = &mlx4_en_ethtool_ops; 3326 3327 /* 3328 * Set driver features 3329 */ 3330 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 3331 if (mdev->LSO_support) 3332 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6; 3333 3334 dev->vlan_features = dev->hw_features; 3335 3336 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH; 3337 dev->features = dev->hw_features | NETIF_F_HIGHDMA | 3338 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 3339 NETIF_F_HW_VLAN_CTAG_FILTER; 3340 dev->hw_features |= NETIF_F_LOOPBACK | 3341 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 3342 3343 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) { 3344 dev->features |= NETIF_F_HW_VLAN_STAG_RX | 3345 NETIF_F_HW_VLAN_STAG_FILTER; 3346 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX; 3347 } 3348 3349 if (mlx4_is_slave(mdev->dev)) { 3350 bool vlan_offload_disabled; 3351 int phv; 3352 3353 err = get_phv_bit(mdev->dev, port, &phv); 3354 if (!err && phv) { 3355 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3356 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV; 3357 } 3358 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port, 3359 &vlan_offload_disabled); 3360 if (!err && vlan_offload_disabled) { 3361 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3362 NETIF_F_HW_VLAN_CTAG_RX | 3363 NETIF_F_HW_VLAN_STAG_TX | 3364 NETIF_F_HW_VLAN_STAG_RX); 3365 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3366 NETIF_F_HW_VLAN_CTAG_RX | 3367 NETIF_F_HW_VLAN_STAG_TX | 3368 NETIF_F_HW_VLAN_STAG_RX); 3369 } 3370 } else { 3371 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN && 3372 !(mdev->dev->caps.flags2 & 3373 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 3374 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3375 } 3376 3377 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) 3378 dev->hw_features |= NETIF_F_RXFCS; 3379 3380 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS) 3381 dev->hw_features |= NETIF_F_RXALL; 3382 3383 if (mdev->dev->caps.steering_mode == 3384 MLX4_STEERING_MODE_DEVICE_MANAGED && 3385 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC) 3386 dev->hw_features |= NETIF_F_NTUPLE; 3387 3388 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 3389 dev->priv_flags |= IFF_UNICAST_FLT; 3390 3391 /* Setting a default hash function value */ 3392 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) { 3393 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3394 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) { 3395 priv->rss_hash_fn = ETH_RSS_HASH_XOR; 3396 } else { 3397 en_warn(priv, 3398 "No RSS hash capabilities exposed, using Toeplitz\n"); 3399 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3400 } 3401 3402 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3403 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | 3404 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3405 NETIF_F_GSO_PARTIAL; 3406 dev->features |= NETIF_F_GSO_UDP_TUNNEL | 3407 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3408 NETIF_F_GSO_PARTIAL; 3409 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM; 3410 } 3411 3412 /* MTU range: 46 - hw-specific max */ 3413 dev->min_mtu = MLX4_EN_MIN_MTU; 3414 dev->max_mtu = priv->max_mtu; 3415 3416 mdev->pndev[port] = dev; 3417 mdev->upper[port] = NULL; 3418 3419 netif_carrier_off(dev); 3420 mlx4_en_set_default_moderation(priv); 3421 3422 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]); 3423 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num); 3424 3425 mlx4_en_update_loopback_state(priv->dev, priv->dev->features); 3426 3427 /* Configure port */ 3428 mlx4_en_calc_rx_buf(dev); 3429 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 3430 priv->rx_skb_size + ETH_FCS_LEN, 3431 prof->tx_pause, prof->tx_ppp, 3432 prof->rx_pause, prof->rx_ppp); 3433 if (err) { 3434 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 3435 priv->port, err); 3436 goto out; 3437 } 3438 3439 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3440 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 3441 if (err) { 3442 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 3443 err); 3444 goto out; 3445 } 3446 } 3447 3448 /* Init port */ 3449 en_warn(priv, "Initializing port\n"); 3450 err = mlx4_INIT_PORT(mdev->dev, priv->port); 3451 if (err) { 3452 en_err(priv, "Failed Initializing port\n"); 3453 goto out; 3454 } 3455 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 3456 3457 /* Initialize time stamp mechanism */ 3458 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 3459 mlx4_en_init_timestamp(mdev); 3460 3461 queue_delayed_work(mdev->workqueue, &priv->service_task, 3462 SERVICE_TASK_DELAY); 3463 3464 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap, 3465 mdev->profile.prof[priv->port].rx_ppp, 3466 mdev->profile.prof[priv->port].rx_pause, 3467 mdev->profile.prof[priv->port].tx_ppp, 3468 mdev->profile.prof[priv->port].tx_pause); 3469 3470 err = register_netdev(dev); 3471 if (err) { 3472 en_err(priv, "Netdev registration failed for port %d\n", port); 3473 goto out; 3474 } 3475 3476 priv->registered = 1; 3477 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port), 3478 dev); 3479 3480 return 0; 3481 3482 err_free_tx: 3483 while (t--) { 3484 kfree(priv->tx_ring[t]); 3485 kfree(priv->tx_cq[t]); 3486 } 3487 out: 3488 mlx4_en_destroy_netdev(dev); 3489 return err; 3490 } 3491 3492 int mlx4_en_reset_config(struct net_device *dev, 3493 struct hwtstamp_config ts_config, 3494 netdev_features_t features) 3495 { 3496 struct mlx4_en_priv *priv = netdev_priv(dev); 3497 struct mlx4_en_dev *mdev = priv->mdev; 3498 struct mlx4_en_port_profile new_prof; 3499 struct mlx4_en_priv *tmp; 3500 int port_up = 0; 3501 int err = 0; 3502 3503 if (priv->hwtstamp_config.tx_type == ts_config.tx_type && 3504 priv->hwtstamp_config.rx_filter == ts_config.rx_filter && 3505 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3506 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) 3507 return 0; /* Nothing to change */ 3508 3509 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3510 (features & NETIF_F_HW_VLAN_CTAG_RX) && 3511 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) { 3512 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n"); 3513 return -EINVAL; 3514 } 3515 3516 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 3517 if (!tmp) 3518 return -ENOMEM; 3519 3520 mutex_lock(&mdev->state_lock); 3521 3522 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 3523 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config)); 3524 3525 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true); 3526 if (err) 3527 goto out; 3528 3529 if (priv->port_up) { 3530 port_up = 1; 3531 mlx4_en_stop_port(dev, 1); 3532 } 3533 3534 en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n", 3535 ts_config.rx_filter, 3536 !!(features & NETIF_F_HW_VLAN_CTAG_RX)); 3537 3538 mlx4_en_safe_replace_resources(priv, tmp); 3539 3540 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 3541 if (features & NETIF_F_HW_VLAN_CTAG_RX) 3542 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3543 else 3544 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3545 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) { 3546 /* RX time-stamping is OFF, update the RX vlan offload 3547 * to the latest wanted state 3548 */ 3549 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX) 3550 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3551 else 3552 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3553 } 3554 3555 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) { 3556 if (features & NETIF_F_RXFCS) 3557 dev->features |= NETIF_F_RXFCS; 3558 else 3559 dev->features &= ~NETIF_F_RXFCS; 3560 } 3561 3562 /* RX vlan offload and RX time-stamping can't co-exist ! 3563 * Regardless of the caller's choice, 3564 * Turn Off RX vlan offload in case of time-stamping is ON 3565 */ 3566 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) { 3567 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX) 3568 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n"); 3569 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3570 } 3571 3572 if (port_up) { 3573 err = mlx4_en_start_port(dev); 3574 if (err) 3575 en_err(priv, "Failed starting port\n"); 3576 } 3577 3578 out: 3579 mutex_unlock(&mdev->state_lock); 3580 kfree(tmp); 3581 if (!err) 3582 netdev_features_change(dev); 3583 return err; 3584 } 3585