1 /* 2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 * 32 */ 33 34 #include <linux/bpf.h> 35 #include <linux/etherdevice.h> 36 #include <linux/tcp.h> 37 #include <linux/if_vlan.h> 38 #include <linux/delay.h> 39 #include <linux/slab.h> 40 #include <linux/hash.h> 41 #include <net/ip.h> 42 #include <net/busy_poll.h> 43 #include <net/vxlan.h> 44 #include <net/devlink.h> 45 46 #include <linux/mlx4/driver.h> 47 #include <linux/mlx4/device.h> 48 #include <linux/mlx4/cmd.h> 49 #include <linux/mlx4/cq.h> 50 51 #include "mlx4_en.h" 52 #include "en_port.h" 53 54 #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \ 55 XDP_PACKET_HEADROOM)) 56 57 int mlx4_en_setup_tc(struct net_device *dev, u8 up) 58 { 59 struct mlx4_en_priv *priv = netdev_priv(dev); 60 int i; 61 unsigned int offset = 0; 62 63 if (up && up != MLX4_EN_NUM_UP_HIGH) 64 return -EINVAL; 65 66 netdev_set_num_tc(dev, up); 67 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 68 /* Partition Tx queues evenly amongst UP's */ 69 for (i = 0; i < up; i++) { 70 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset); 71 offset += priv->num_tx_rings_p_up; 72 } 73 74 #ifdef CONFIG_MLX4_EN_DCB 75 if (!mlx4_is_slave(priv->mdev->dev)) { 76 if (up) { 77 if (priv->dcbx_cap) 78 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED; 79 } else { 80 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED; 81 priv->cee_config.pfc_state = false; 82 } 83 } 84 #endif /* CONFIG_MLX4_EN_DCB */ 85 86 return 0; 87 } 88 89 int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc) 90 { 91 struct mlx4_en_priv *priv = netdev_priv(dev); 92 struct mlx4_en_dev *mdev = priv->mdev; 93 struct mlx4_en_port_profile new_prof; 94 struct mlx4_en_priv *tmp; 95 int port_up = 0; 96 int err = 0; 97 98 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 99 if (!tmp) 100 return -ENOMEM; 101 102 mutex_lock(&mdev->state_lock); 103 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 104 new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW : 105 MLX4_EN_NUM_UP_HIGH; 106 new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up * 107 new_prof.num_up; 108 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true); 109 if (err) 110 goto out; 111 112 if (priv->port_up) { 113 port_up = 1; 114 mlx4_en_stop_port(dev, 1); 115 } 116 117 mlx4_en_safe_replace_resources(priv, tmp); 118 if (port_up) { 119 err = mlx4_en_start_port(dev); 120 if (err) { 121 en_err(priv, "Failed starting port for setup TC\n"); 122 goto out; 123 } 124 } 125 126 err = mlx4_en_setup_tc(dev, tc); 127 out: 128 mutex_unlock(&mdev->state_lock); 129 kfree(tmp); 130 return err; 131 } 132 133 static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type, 134 void *type_data) 135 { 136 struct tc_mqprio_qopt *mqprio = type_data; 137 138 if (type != TC_SETUP_QDISC_MQPRIO) 139 return -EOPNOTSUPP; 140 141 if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH) 142 return -EINVAL; 143 144 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 145 146 return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc); 147 } 148 149 #ifdef CONFIG_RFS_ACCEL 150 151 struct mlx4_en_filter { 152 struct list_head next; 153 struct work_struct work; 154 155 u8 ip_proto; 156 __be32 src_ip; 157 __be32 dst_ip; 158 __be16 src_port; 159 __be16 dst_port; 160 161 int rxq_index; 162 struct mlx4_en_priv *priv; 163 u32 flow_id; /* RFS infrastructure id */ 164 int id; /* mlx4_en driver id */ 165 u64 reg_id; /* Flow steering API id */ 166 u8 activated; /* Used to prevent expiry before filter 167 * is attached 168 */ 169 struct hlist_node filter_chain; 170 }; 171 172 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv); 173 174 static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto) 175 { 176 switch (ip_proto) { 177 case IPPROTO_UDP: 178 return MLX4_NET_TRANS_RULE_ID_UDP; 179 case IPPROTO_TCP: 180 return MLX4_NET_TRANS_RULE_ID_TCP; 181 default: 182 return MLX4_NET_TRANS_RULE_NUM; 183 } 184 }; 185 186 /* Must not acquire state_lock, as its corresponding work_sync 187 * is done under it. 188 */ 189 static void mlx4_en_filter_work(struct work_struct *work) 190 { 191 struct mlx4_en_filter *filter = container_of(work, 192 struct mlx4_en_filter, 193 work); 194 struct mlx4_en_priv *priv = filter->priv; 195 struct mlx4_spec_list spec_tcp_udp = { 196 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto), 197 { 198 .tcp_udp = { 199 .dst_port = filter->dst_port, 200 .dst_port_msk = (__force __be16)-1, 201 .src_port = filter->src_port, 202 .src_port_msk = (__force __be16)-1, 203 }, 204 }, 205 }; 206 struct mlx4_spec_list spec_ip = { 207 .id = MLX4_NET_TRANS_RULE_ID_IPV4, 208 { 209 .ipv4 = { 210 .dst_ip = filter->dst_ip, 211 .dst_ip_msk = (__force __be32)-1, 212 .src_ip = filter->src_ip, 213 .src_ip_msk = (__force __be32)-1, 214 }, 215 }, 216 }; 217 struct mlx4_spec_list spec_eth = { 218 .id = MLX4_NET_TRANS_RULE_ID_ETH, 219 }; 220 struct mlx4_net_trans_rule rule = { 221 .list = LIST_HEAD_INIT(rule.list), 222 .queue_mode = MLX4_NET_TRANS_Q_LIFO, 223 .exclusive = 1, 224 .allow_loopback = 1, 225 .promisc_mode = MLX4_FS_REGULAR, 226 .port = priv->port, 227 .priority = MLX4_DOMAIN_RFS, 228 }; 229 int rc; 230 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 231 232 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) { 233 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n", 234 filter->ip_proto); 235 goto ignore; 236 } 237 list_add_tail(&spec_eth.list, &rule.list); 238 list_add_tail(&spec_ip.list, &rule.list); 239 list_add_tail(&spec_tcp_udp.list, &rule.list); 240 241 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn; 242 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN); 243 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 244 245 filter->activated = 0; 246 247 if (filter->reg_id) { 248 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 249 if (rc && rc != -ENOENT) 250 en_err(priv, "Error detaching flow. rc = %d\n", rc); 251 } 252 253 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); 254 if (rc) 255 en_err(priv, "Error attaching flow. err = %d\n", rc); 256 257 ignore: 258 mlx4_en_filter_rfs_expire(priv); 259 260 filter->activated = 1; 261 } 262 263 static inline struct hlist_head * 264 filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 265 __be16 src_port, __be16 dst_port) 266 { 267 unsigned long l; 268 int bucket_idx; 269 270 l = (__force unsigned long)src_port | 271 ((__force unsigned long)dst_port << 2); 272 l ^= (__force unsigned long)(src_ip ^ dst_ip); 273 274 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT); 275 276 return &priv->filter_hash[bucket_idx]; 277 } 278 279 static struct mlx4_en_filter * 280 mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip, 281 __be32 dst_ip, u8 ip_proto, __be16 src_port, 282 __be16 dst_port, u32 flow_id) 283 { 284 struct mlx4_en_filter *filter = NULL; 285 286 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC); 287 if (!filter) 288 return NULL; 289 290 filter->priv = priv; 291 filter->rxq_index = rxq_index; 292 INIT_WORK(&filter->work, mlx4_en_filter_work); 293 294 filter->src_ip = src_ip; 295 filter->dst_ip = dst_ip; 296 filter->ip_proto = ip_proto; 297 filter->src_port = src_port; 298 filter->dst_port = dst_port; 299 300 filter->flow_id = flow_id; 301 302 filter->id = priv->last_filter_id++ % RPS_NO_FILTER; 303 304 list_add_tail(&filter->next, &priv->filters); 305 hlist_add_head(&filter->filter_chain, 306 filter_hash_bucket(priv, src_ip, dst_ip, src_port, 307 dst_port)); 308 309 return filter; 310 } 311 312 static void mlx4_en_filter_free(struct mlx4_en_filter *filter) 313 { 314 struct mlx4_en_priv *priv = filter->priv; 315 int rc; 316 317 list_del(&filter->next); 318 319 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 320 if (rc && rc != -ENOENT) 321 en_err(priv, "Error detaching flow. rc = %d\n", rc); 322 323 kfree(filter); 324 } 325 326 static inline struct mlx4_en_filter * 327 mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 328 u8 ip_proto, __be16 src_port, __be16 dst_port) 329 { 330 struct mlx4_en_filter *filter; 331 struct mlx4_en_filter *ret = NULL; 332 333 hlist_for_each_entry(filter, 334 filter_hash_bucket(priv, src_ip, dst_ip, 335 src_port, dst_port), 336 filter_chain) { 337 if (filter->src_ip == src_ip && 338 filter->dst_ip == dst_ip && 339 filter->ip_proto == ip_proto && 340 filter->src_port == src_port && 341 filter->dst_port == dst_port) { 342 ret = filter; 343 break; 344 } 345 } 346 347 return ret; 348 } 349 350 static int 351 mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, 352 u16 rxq_index, u32 flow_id) 353 { 354 struct mlx4_en_priv *priv = netdev_priv(net_dev); 355 struct mlx4_en_filter *filter; 356 const struct iphdr *ip; 357 const __be16 *ports; 358 u8 ip_proto; 359 __be32 src_ip; 360 __be32 dst_ip; 361 __be16 src_port; 362 __be16 dst_port; 363 int nhoff = skb_network_offset(skb); 364 int ret = 0; 365 366 if (skb->protocol != htons(ETH_P_IP)) 367 return -EPROTONOSUPPORT; 368 369 ip = (const struct iphdr *)(skb->data + nhoff); 370 if (ip_is_fragment(ip)) 371 return -EPROTONOSUPPORT; 372 373 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP)) 374 return -EPROTONOSUPPORT; 375 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl); 376 377 ip_proto = ip->protocol; 378 src_ip = ip->saddr; 379 dst_ip = ip->daddr; 380 src_port = ports[0]; 381 dst_port = ports[1]; 382 383 spin_lock_bh(&priv->filters_lock); 384 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto, 385 src_port, dst_port); 386 if (filter) { 387 if (filter->rxq_index == rxq_index) 388 goto out; 389 390 filter->rxq_index = rxq_index; 391 } else { 392 filter = mlx4_en_filter_alloc(priv, rxq_index, 393 src_ip, dst_ip, ip_proto, 394 src_port, dst_port, flow_id); 395 if (!filter) { 396 ret = -ENOMEM; 397 goto err; 398 } 399 } 400 401 queue_work(priv->mdev->workqueue, &filter->work); 402 403 out: 404 ret = filter->id; 405 err: 406 spin_unlock_bh(&priv->filters_lock); 407 408 return ret; 409 } 410 411 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv) 412 { 413 struct mlx4_en_filter *filter, *tmp; 414 LIST_HEAD(del_list); 415 416 spin_lock_bh(&priv->filters_lock); 417 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 418 list_move(&filter->next, &del_list); 419 hlist_del(&filter->filter_chain); 420 } 421 spin_unlock_bh(&priv->filters_lock); 422 423 list_for_each_entry_safe(filter, tmp, &del_list, next) { 424 cancel_work_sync(&filter->work); 425 mlx4_en_filter_free(filter); 426 } 427 } 428 429 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv) 430 { 431 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL; 432 LIST_HEAD(del_list); 433 int i = 0; 434 435 spin_lock_bh(&priv->filters_lock); 436 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 437 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA) 438 break; 439 440 if (filter->activated && 441 !work_pending(&filter->work) && 442 rps_may_expire_flow(priv->dev, 443 filter->rxq_index, filter->flow_id, 444 filter->id)) { 445 list_move(&filter->next, &del_list); 446 hlist_del(&filter->filter_chain); 447 } else 448 last_filter = filter; 449 450 i++; 451 } 452 453 if (last_filter && (&last_filter->next != priv->filters.next)) 454 list_move(&priv->filters, &last_filter->next); 455 456 spin_unlock_bh(&priv->filters_lock); 457 458 list_for_each_entry_safe(filter, tmp, &del_list, next) 459 mlx4_en_filter_free(filter); 460 } 461 #endif 462 463 static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, 464 __be16 proto, u16 vid) 465 { 466 struct mlx4_en_priv *priv = netdev_priv(dev); 467 struct mlx4_en_dev *mdev = priv->mdev; 468 int err; 469 int idx; 470 471 en_dbg(HW, priv, "adding VLAN:%d\n", vid); 472 473 set_bit(vid, priv->active_vlans); 474 475 /* Add VID to port VLAN filter */ 476 mutex_lock(&mdev->state_lock); 477 if (mdev->device_up && priv->port_up) { 478 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 479 if (err) { 480 en_err(priv, "Failed configuring VLAN filter\n"); 481 goto out; 482 } 483 } 484 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx); 485 if (err) 486 en_dbg(HW, priv, "Failed adding vlan %d\n", vid); 487 488 out: 489 mutex_unlock(&mdev->state_lock); 490 return err; 491 } 492 493 static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, 494 __be16 proto, u16 vid) 495 { 496 struct mlx4_en_priv *priv = netdev_priv(dev); 497 struct mlx4_en_dev *mdev = priv->mdev; 498 int err = 0; 499 500 en_dbg(HW, priv, "Killing VID:%d\n", vid); 501 502 clear_bit(vid, priv->active_vlans); 503 504 /* Remove VID from port VLAN filter */ 505 mutex_lock(&mdev->state_lock); 506 mlx4_unregister_vlan(mdev->dev, priv->port, vid); 507 508 if (mdev->device_up && priv->port_up) { 509 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 510 if (err) 511 en_err(priv, "Failed configuring VLAN filter\n"); 512 } 513 mutex_unlock(&mdev->state_lock); 514 515 return err; 516 } 517 518 static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac) 519 { 520 int i; 521 for (i = ETH_ALEN - 1; i >= 0; --i) { 522 dst_mac[i] = src_mac & 0xff; 523 src_mac >>= 8; 524 } 525 memset(&dst_mac[ETH_ALEN], 0, 2); 526 } 527 528 529 static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr, 530 int qpn, u64 *reg_id) 531 { 532 int err; 533 534 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 535 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 536 return 0; /* do nothing */ 537 538 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn, 539 MLX4_DOMAIN_NIC, reg_id); 540 if (err) { 541 en_err(priv, "failed to add vxlan steering rule, err %d\n", err); 542 return err; 543 } 544 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id); 545 return 0; 546 } 547 548 549 static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv, 550 unsigned char *mac, int *qpn, u64 *reg_id) 551 { 552 struct mlx4_en_dev *mdev = priv->mdev; 553 struct mlx4_dev *dev = mdev->dev; 554 int err; 555 556 switch (dev->caps.steering_mode) { 557 case MLX4_STEERING_MODE_B0: { 558 struct mlx4_qp qp; 559 u8 gid[16] = {0}; 560 561 qp.qpn = *qpn; 562 memcpy(&gid[10], mac, ETH_ALEN); 563 gid[5] = priv->port; 564 565 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH); 566 break; 567 } 568 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 569 struct mlx4_spec_list spec_eth = { {NULL} }; 570 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 571 572 struct mlx4_net_trans_rule rule = { 573 .queue_mode = MLX4_NET_TRANS_Q_FIFO, 574 .exclusive = 0, 575 .allow_loopback = 1, 576 .promisc_mode = MLX4_FS_REGULAR, 577 .priority = MLX4_DOMAIN_NIC, 578 }; 579 580 rule.port = priv->port; 581 rule.qpn = *qpn; 582 INIT_LIST_HEAD(&rule.list); 583 584 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH; 585 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN); 586 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 587 list_add_tail(&spec_eth.list, &rule.list); 588 589 err = mlx4_flow_attach(dev, &rule, reg_id); 590 break; 591 } 592 default: 593 return -EINVAL; 594 } 595 if (err) 596 en_warn(priv, "Failed Attaching Unicast\n"); 597 598 return err; 599 } 600 601 static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv, 602 unsigned char *mac, int qpn, u64 reg_id) 603 { 604 struct mlx4_en_dev *mdev = priv->mdev; 605 struct mlx4_dev *dev = mdev->dev; 606 607 switch (dev->caps.steering_mode) { 608 case MLX4_STEERING_MODE_B0: { 609 struct mlx4_qp qp; 610 u8 gid[16] = {0}; 611 612 qp.qpn = qpn; 613 memcpy(&gid[10], mac, ETH_ALEN); 614 gid[5] = priv->port; 615 616 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH); 617 break; 618 } 619 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 620 mlx4_flow_detach(dev, reg_id); 621 break; 622 } 623 default: 624 en_err(priv, "Invalid steering mode.\n"); 625 } 626 } 627 628 static int mlx4_en_get_qp(struct mlx4_en_priv *priv) 629 { 630 struct mlx4_en_dev *mdev = priv->mdev; 631 struct mlx4_dev *dev = mdev->dev; 632 int index = 0; 633 int err = 0; 634 int *qpn = &priv->base_qpn; 635 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr); 636 637 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n", 638 priv->dev->dev_addr); 639 index = mlx4_register_mac(dev, priv->port, mac); 640 if (index < 0) { 641 err = index; 642 en_err(priv, "Failed adding MAC: %pM\n", 643 priv->dev->dev_addr); 644 return err; 645 } 646 647 en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode); 648 649 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 650 int base_qpn = mlx4_get_base_qpn(dev, priv->port); 651 *qpn = base_qpn + index; 652 return 0; 653 } 654 655 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP, 656 MLX4_RES_USAGE_DRIVER); 657 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn); 658 if (err) { 659 en_err(priv, "Failed to reserve qp for mac registration\n"); 660 mlx4_unregister_mac(dev, priv->port, mac); 661 return err; 662 } 663 664 return 0; 665 } 666 667 static void mlx4_en_put_qp(struct mlx4_en_priv *priv) 668 { 669 struct mlx4_en_dev *mdev = priv->mdev; 670 struct mlx4_dev *dev = mdev->dev; 671 int qpn = priv->base_qpn; 672 673 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 674 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr); 675 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", 676 priv->dev->dev_addr); 677 mlx4_unregister_mac(dev, priv->port, mac); 678 } else { 679 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n", 680 priv->port, qpn); 681 mlx4_qp_release_range(dev, qpn, 1); 682 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 683 } 684 } 685 686 static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn, 687 unsigned char *new_mac, unsigned char *prev_mac) 688 { 689 struct mlx4_en_dev *mdev = priv->mdev; 690 struct mlx4_dev *dev = mdev->dev; 691 int err = 0; 692 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac); 693 694 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { 695 struct hlist_head *bucket; 696 unsigned int mac_hash; 697 struct mlx4_mac_entry *entry; 698 struct hlist_node *tmp; 699 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac); 700 701 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]]; 702 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 703 if (ether_addr_equal_64bits(entry->mac, prev_mac)) { 704 mlx4_en_uc_steer_release(priv, entry->mac, 705 qpn, entry->reg_id); 706 mlx4_unregister_mac(dev, priv->port, 707 prev_mac_u64); 708 hlist_del_rcu(&entry->hlist); 709 synchronize_rcu(); 710 memcpy(entry->mac, new_mac, ETH_ALEN); 711 entry->reg_id = 0; 712 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX]; 713 hlist_add_head_rcu(&entry->hlist, 714 &priv->mac_hash[mac_hash]); 715 mlx4_register_mac(dev, priv->port, new_mac_u64); 716 err = mlx4_en_uc_steer_add(priv, new_mac, 717 &qpn, 718 &entry->reg_id); 719 if (err) 720 return err; 721 if (priv->tunnel_reg_id) { 722 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 723 priv->tunnel_reg_id = 0; 724 } 725 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn, 726 &priv->tunnel_reg_id); 727 return err; 728 } 729 } 730 return -EINVAL; 731 } 732 733 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64); 734 } 735 736 static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv, 737 unsigned char new_mac[ETH_ALEN + 2]) 738 { 739 struct mlx4_en_dev *mdev = priv->mdev; 740 int err; 741 742 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN)) 743 return; 744 745 err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac); 746 if (err) 747 en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n", 748 new_mac, priv->port, err); 749 } 750 751 static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv, 752 unsigned char new_mac[ETH_ALEN + 2]) 753 { 754 int err = 0; 755 756 if (priv->port_up) { 757 /* Remove old MAC and insert the new one */ 758 err = mlx4_en_replace_mac(priv, priv->base_qpn, 759 new_mac, priv->current_mac); 760 if (err) 761 en_err(priv, "Failed changing HW MAC address\n"); 762 } else 763 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n"); 764 765 if (!err) 766 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac)); 767 768 return err; 769 } 770 771 static int mlx4_en_set_mac(struct net_device *dev, void *addr) 772 { 773 struct mlx4_en_priv *priv = netdev_priv(dev); 774 struct mlx4_en_dev *mdev = priv->mdev; 775 struct sockaddr *saddr = addr; 776 unsigned char new_mac[ETH_ALEN + 2]; 777 int err; 778 779 if (!is_valid_ether_addr(saddr->sa_data)) 780 return -EADDRNOTAVAIL; 781 782 mutex_lock(&mdev->state_lock); 783 memcpy(new_mac, saddr->sa_data, ETH_ALEN); 784 err = mlx4_en_do_set_mac(priv, new_mac); 785 if (err) 786 goto out; 787 788 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); 789 mlx4_en_update_user_mac(priv, new_mac); 790 out: 791 mutex_unlock(&mdev->state_lock); 792 793 return err; 794 } 795 796 static void mlx4_en_clear_list(struct net_device *dev) 797 { 798 struct mlx4_en_priv *priv = netdev_priv(dev); 799 struct mlx4_en_mc_list *tmp, *mc_to_del; 800 801 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) { 802 list_del(&mc_to_del->list); 803 kfree(mc_to_del); 804 } 805 } 806 807 static void mlx4_en_cache_mclist(struct net_device *dev) 808 { 809 struct mlx4_en_priv *priv = netdev_priv(dev); 810 struct netdev_hw_addr *ha; 811 struct mlx4_en_mc_list *tmp; 812 813 mlx4_en_clear_list(dev); 814 netdev_for_each_mc_addr(ha, dev) { 815 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC); 816 if (!tmp) { 817 mlx4_en_clear_list(dev); 818 return; 819 } 820 memcpy(tmp->addr, ha->addr, ETH_ALEN); 821 list_add_tail(&tmp->list, &priv->mc_list); 822 } 823 } 824 825 static void update_mclist_flags(struct mlx4_en_priv *priv, 826 struct list_head *dst, 827 struct list_head *src) 828 { 829 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc; 830 bool found; 831 832 /* Find all the entries that should be removed from dst, 833 * These are the entries that are not found in src 834 */ 835 list_for_each_entry(dst_tmp, dst, list) { 836 found = false; 837 list_for_each_entry(src_tmp, src, list) { 838 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 839 found = true; 840 break; 841 } 842 } 843 if (!found) 844 dst_tmp->action = MCLIST_REM; 845 } 846 847 /* Add entries that exist in src but not in dst 848 * mark them as need to add 849 */ 850 list_for_each_entry(src_tmp, src, list) { 851 found = false; 852 list_for_each_entry(dst_tmp, dst, list) { 853 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 854 dst_tmp->action = MCLIST_NONE; 855 found = true; 856 break; 857 } 858 } 859 if (!found) { 860 new_mc = kmemdup(src_tmp, 861 sizeof(struct mlx4_en_mc_list), 862 GFP_KERNEL); 863 if (!new_mc) 864 return; 865 866 new_mc->action = MCLIST_ADD; 867 list_add_tail(&new_mc->list, dst); 868 } 869 } 870 } 871 872 static void mlx4_en_set_rx_mode(struct net_device *dev) 873 { 874 struct mlx4_en_priv *priv = netdev_priv(dev); 875 876 if (!priv->port_up) 877 return; 878 879 queue_work(priv->mdev->workqueue, &priv->rx_mode_task); 880 } 881 882 static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv, 883 struct mlx4_en_dev *mdev) 884 { 885 int err = 0; 886 887 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { 888 if (netif_msg_rx_status(priv)) 889 en_warn(priv, "Entering promiscuous mode\n"); 890 priv->flags |= MLX4_EN_FLAG_PROMISC; 891 892 /* Enable promiscouos mode */ 893 switch (mdev->dev->caps.steering_mode) { 894 case MLX4_STEERING_MODE_DEVICE_MANAGED: 895 err = mlx4_flow_steer_promisc_add(mdev->dev, 896 priv->port, 897 priv->base_qpn, 898 MLX4_FS_ALL_DEFAULT); 899 if (err) 900 en_err(priv, "Failed enabling promiscuous mode\n"); 901 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 902 break; 903 904 case MLX4_STEERING_MODE_B0: 905 err = mlx4_unicast_promisc_add(mdev->dev, 906 priv->base_qpn, 907 priv->port); 908 if (err) 909 en_err(priv, "Failed enabling unicast promiscuous mode\n"); 910 911 /* Add the default qp number as multicast 912 * promisc 913 */ 914 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 915 err = mlx4_multicast_promisc_add(mdev->dev, 916 priv->base_qpn, 917 priv->port); 918 if (err) 919 en_err(priv, "Failed enabling multicast promiscuous mode\n"); 920 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 921 } 922 break; 923 924 case MLX4_STEERING_MODE_A0: 925 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 926 priv->port, 927 priv->base_qpn, 928 1); 929 if (err) 930 en_err(priv, "Failed enabling promiscuous mode\n"); 931 break; 932 } 933 934 /* Disable port multicast filter (unconditionally) */ 935 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 936 0, MLX4_MCAST_DISABLE); 937 if (err) 938 en_err(priv, "Failed disabling multicast filter\n"); 939 } 940 } 941 942 static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv, 943 struct mlx4_en_dev *mdev) 944 { 945 int err = 0; 946 947 if (netif_msg_rx_status(priv)) 948 en_warn(priv, "Leaving promiscuous mode\n"); 949 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 950 951 /* Disable promiscouos mode */ 952 switch (mdev->dev->caps.steering_mode) { 953 case MLX4_STEERING_MODE_DEVICE_MANAGED: 954 err = mlx4_flow_steer_promisc_remove(mdev->dev, 955 priv->port, 956 MLX4_FS_ALL_DEFAULT); 957 if (err) 958 en_err(priv, "Failed disabling promiscuous mode\n"); 959 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 960 break; 961 962 case MLX4_STEERING_MODE_B0: 963 err = mlx4_unicast_promisc_remove(mdev->dev, 964 priv->base_qpn, 965 priv->port); 966 if (err) 967 en_err(priv, "Failed disabling unicast promiscuous mode\n"); 968 /* Disable Multicast promisc */ 969 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 970 err = mlx4_multicast_promisc_remove(mdev->dev, 971 priv->base_qpn, 972 priv->port); 973 if (err) 974 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 975 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 976 } 977 break; 978 979 case MLX4_STEERING_MODE_A0: 980 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 981 priv->port, 982 priv->base_qpn, 0); 983 if (err) 984 en_err(priv, "Failed disabling promiscuous mode\n"); 985 break; 986 } 987 } 988 989 static void mlx4_en_do_multicast(struct mlx4_en_priv *priv, 990 struct net_device *dev, 991 struct mlx4_en_dev *mdev) 992 { 993 struct mlx4_en_mc_list *mclist, *tmp; 994 u64 mcast_addr = 0; 995 u8 mc_list[16] = {0}; 996 int err = 0; 997 998 /* Enable/disable the multicast filter according to IFF_ALLMULTI */ 999 if (dev->flags & IFF_ALLMULTI) { 1000 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1001 0, MLX4_MCAST_DISABLE); 1002 if (err) 1003 en_err(priv, "Failed disabling multicast filter\n"); 1004 1005 /* Add the default qp number as multicast promisc */ 1006 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 1007 switch (mdev->dev->caps.steering_mode) { 1008 case MLX4_STEERING_MODE_DEVICE_MANAGED: 1009 err = mlx4_flow_steer_promisc_add(mdev->dev, 1010 priv->port, 1011 priv->base_qpn, 1012 MLX4_FS_MC_DEFAULT); 1013 break; 1014 1015 case MLX4_STEERING_MODE_B0: 1016 err = mlx4_multicast_promisc_add(mdev->dev, 1017 priv->base_qpn, 1018 priv->port); 1019 break; 1020 1021 case MLX4_STEERING_MODE_A0: 1022 break; 1023 } 1024 if (err) 1025 en_err(priv, "Failed entering multicast promisc mode\n"); 1026 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 1027 } 1028 } else { 1029 /* Disable Multicast promisc */ 1030 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1031 switch (mdev->dev->caps.steering_mode) { 1032 case MLX4_STEERING_MODE_DEVICE_MANAGED: 1033 err = mlx4_flow_steer_promisc_remove(mdev->dev, 1034 priv->port, 1035 MLX4_FS_MC_DEFAULT); 1036 break; 1037 1038 case MLX4_STEERING_MODE_B0: 1039 err = mlx4_multicast_promisc_remove(mdev->dev, 1040 priv->base_qpn, 1041 priv->port); 1042 break; 1043 1044 case MLX4_STEERING_MODE_A0: 1045 break; 1046 } 1047 if (err) 1048 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 1049 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1050 } 1051 1052 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1053 0, MLX4_MCAST_DISABLE); 1054 if (err) 1055 en_err(priv, "Failed disabling multicast filter\n"); 1056 1057 /* Flush mcast filter and init it with broadcast address */ 1058 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, 1059 1, MLX4_MCAST_CONFIG); 1060 1061 /* Update multicast list - we cache all addresses so they won't 1062 * change while HW is updated holding the command semaphor */ 1063 netif_addr_lock_bh(dev); 1064 mlx4_en_cache_mclist(dev); 1065 netif_addr_unlock_bh(dev); 1066 list_for_each_entry(mclist, &priv->mc_list, list) { 1067 mcast_addr = mlx4_mac_to_u64(mclist->addr); 1068 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 1069 mcast_addr, 0, MLX4_MCAST_CONFIG); 1070 } 1071 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1072 0, MLX4_MCAST_ENABLE); 1073 if (err) 1074 en_err(priv, "Failed enabling multicast filter\n"); 1075 1076 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list); 1077 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1078 if (mclist->action == MCLIST_REM) { 1079 /* detach this address and delete from list */ 1080 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1081 mc_list[5] = priv->port; 1082 err = mlx4_multicast_detach(mdev->dev, 1083 priv->rss_map.indir_qp, 1084 mc_list, 1085 MLX4_PROT_ETH, 1086 mclist->reg_id); 1087 if (err) 1088 en_err(priv, "Fail to detach multicast address\n"); 1089 1090 if (mclist->tunnel_reg_id) { 1091 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id); 1092 if (err) 1093 en_err(priv, "Failed to detach multicast address\n"); 1094 } 1095 1096 /* remove from list */ 1097 list_del(&mclist->list); 1098 kfree(mclist); 1099 } else if (mclist->action == MCLIST_ADD) { 1100 /* attach the address */ 1101 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1102 /* needed for B0 steering support */ 1103 mc_list[5] = priv->port; 1104 err = mlx4_multicast_attach(mdev->dev, 1105 priv->rss_map.indir_qp, 1106 mc_list, 1107 priv->port, 0, 1108 MLX4_PROT_ETH, 1109 &mclist->reg_id); 1110 if (err) 1111 en_err(priv, "Fail to attach multicast address\n"); 1112 1113 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn, 1114 &mclist->tunnel_reg_id); 1115 if (err) 1116 en_err(priv, "Failed to attach multicast address\n"); 1117 } 1118 } 1119 } 1120 } 1121 1122 static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv, 1123 struct net_device *dev, 1124 struct mlx4_en_dev *mdev) 1125 { 1126 struct netdev_hw_addr *ha; 1127 struct mlx4_mac_entry *entry; 1128 struct hlist_node *tmp; 1129 bool found; 1130 u64 mac; 1131 int err = 0; 1132 struct hlist_head *bucket; 1133 unsigned int i; 1134 int removed = 0; 1135 u32 prev_flags; 1136 1137 /* Note that we do not need to protect our mac_hash traversal with rcu, 1138 * since all modification code is protected by mdev->state_lock 1139 */ 1140 1141 /* find what to remove */ 1142 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1143 bucket = &priv->mac_hash[i]; 1144 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1145 found = false; 1146 netdev_for_each_uc_addr(ha, dev) { 1147 if (ether_addr_equal_64bits(entry->mac, 1148 ha->addr)) { 1149 found = true; 1150 break; 1151 } 1152 } 1153 1154 /* MAC address of the port is not in uc list */ 1155 if (ether_addr_equal_64bits(entry->mac, 1156 priv->current_mac)) 1157 found = true; 1158 1159 if (!found) { 1160 mac = mlx4_mac_to_u64(entry->mac); 1161 mlx4_en_uc_steer_release(priv, entry->mac, 1162 priv->base_qpn, 1163 entry->reg_id); 1164 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1165 1166 hlist_del_rcu(&entry->hlist); 1167 kfree_rcu(entry, rcu); 1168 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n", 1169 entry->mac, priv->port); 1170 ++removed; 1171 } 1172 } 1173 } 1174 1175 /* if we didn't remove anything, there is no use in trying to add 1176 * again once we are in a forced promisc mode state 1177 */ 1178 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed) 1179 return; 1180 1181 prev_flags = priv->flags; 1182 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 1183 1184 /* find what to add */ 1185 netdev_for_each_uc_addr(ha, dev) { 1186 found = false; 1187 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]]; 1188 hlist_for_each_entry(entry, bucket, hlist) { 1189 if (ether_addr_equal_64bits(entry->mac, ha->addr)) { 1190 found = true; 1191 break; 1192 } 1193 } 1194 1195 if (!found) { 1196 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1197 if (!entry) { 1198 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n", 1199 ha->addr, priv->port); 1200 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1201 break; 1202 } 1203 mac = mlx4_mac_to_u64(ha->addr); 1204 memcpy(entry->mac, ha->addr, ETH_ALEN); 1205 err = mlx4_register_mac(mdev->dev, priv->port, mac); 1206 if (err < 0) { 1207 en_err(priv, "Failed registering MAC %pM on port %d: %d\n", 1208 ha->addr, priv->port, err); 1209 kfree(entry); 1210 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1211 break; 1212 } 1213 err = mlx4_en_uc_steer_add(priv, ha->addr, 1214 &priv->base_qpn, 1215 &entry->reg_id); 1216 if (err) { 1217 en_err(priv, "Failed adding MAC %pM on port %d: %d\n", 1218 ha->addr, priv->port, err); 1219 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1220 kfree(entry); 1221 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1222 break; 1223 } else { 1224 unsigned int mac_hash; 1225 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n", 1226 ha->addr, priv->port); 1227 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX]; 1228 bucket = &priv->mac_hash[mac_hash]; 1229 hlist_add_head_rcu(&entry->hlist, bucket); 1230 } 1231 } 1232 } 1233 1234 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1235 en_warn(priv, "Forcing promiscuous mode on port:%d\n", 1236 priv->port); 1237 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1238 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n", 1239 priv->port); 1240 } 1241 } 1242 1243 static void mlx4_en_do_set_rx_mode(struct work_struct *work) 1244 { 1245 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1246 rx_mode_task); 1247 struct mlx4_en_dev *mdev = priv->mdev; 1248 struct net_device *dev = priv->dev; 1249 1250 mutex_lock(&mdev->state_lock); 1251 if (!mdev->device_up) { 1252 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n"); 1253 goto out; 1254 } 1255 if (!priv->port_up) { 1256 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n"); 1257 goto out; 1258 } 1259 1260 if (!netif_carrier_ok(dev)) { 1261 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) { 1262 if (priv->port_state.link_state) { 1263 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP; 1264 netif_carrier_on(dev); 1265 en_dbg(LINK, priv, "Link Up\n"); 1266 } 1267 } 1268 } 1269 1270 if (dev->priv_flags & IFF_UNICAST_FLT) 1271 mlx4_en_do_uc_filter(priv, dev, mdev); 1272 1273 /* Promsicuous mode: disable all filters */ 1274 if ((dev->flags & IFF_PROMISC) || 1275 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) { 1276 mlx4_en_set_promisc_mode(priv, mdev); 1277 goto out; 1278 } 1279 1280 /* Not in promiscuous mode */ 1281 if (priv->flags & MLX4_EN_FLAG_PROMISC) 1282 mlx4_en_clear_promisc_mode(priv, mdev); 1283 1284 mlx4_en_do_multicast(priv, dev, mdev); 1285 out: 1286 mutex_unlock(&mdev->state_lock); 1287 } 1288 1289 static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv) 1290 { 1291 u64 reg_id; 1292 int err = 0; 1293 int *qpn = &priv->base_qpn; 1294 struct mlx4_mac_entry *entry; 1295 1296 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id); 1297 if (err) 1298 return err; 1299 1300 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn, 1301 &priv->tunnel_reg_id); 1302 if (err) 1303 goto tunnel_err; 1304 1305 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1306 if (!entry) { 1307 err = -ENOMEM; 1308 goto alloc_err; 1309 } 1310 1311 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac)); 1312 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac)); 1313 entry->reg_id = reg_id; 1314 hlist_add_head_rcu(&entry->hlist, 1315 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]); 1316 1317 return 0; 1318 1319 alloc_err: 1320 if (priv->tunnel_reg_id) 1321 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1322 1323 tunnel_err: 1324 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id); 1325 return err; 1326 } 1327 1328 static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv) 1329 { 1330 u64 mac; 1331 unsigned int i; 1332 int qpn = priv->base_qpn; 1333 struct hlist_head *bucket; 1334 struct hlist_node *tmp; 1335 struct mlx4_mac_entry *entry; 1336 1337 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1338 bucket = &priv->mac_hash[i]; 1339 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1340 mac = mlx4_mac_to_u64(entry->mac); 1341 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n", 1342 entry->mac); 1343 mlx4_en_uc_steer_release(priv, entry->mac, 1344 qpn, entry->reg_id); 1345 1346 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac); 1347 hlist_del_rcu(&entry->hlist); 1348 kfree_rcu(entry, rcu); 1349 } 1350 } 1351 1352 if (priv->tunnel_reg_id) { 1353 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1354 priv->tunnel_reg_id = 0; 1355 } 1356 } 1357 1358 static void mlx4_en_tx_timeout(struct net_device *dev) 1359 { 1360 struct mlx4_en_priv *priv = netdev_priv(dev); 1361 struct mlx4_en_dev *mdev = priv->mdev; 1362 int i; 1363 1364 if (netif_msg_timer(priv)) 1365 en_warn(priv, "Tx timeout called on port:%d\n", priv->port); 1366 1367 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1368 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][i]; 1369 1370 if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i))) 1371 continue; 1372 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n", 1373 i, tx_ring->qpn, tx_ring->sp_cqn, 1374 tx_ring->cons, tx_ring->prod); 1375 } 1376 1377 priv->port_stats.tx_timeout++; 1378 en_dbg(DRV, priv, "Scheduling watchdog\n"); 1379 queue_work(mdev->workqueue, &priv->watchdog_task); 1380 } 1381 1382 1383 static void 1384 mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) 1385 { 1386 struct mlx4_en_priv *priv = netdev_priv(dev); 1387 1388 spin_lock_bh(&priv->stats_lock); 1389 mlx4_en_fold_software_stats(dev); 1390 netdev_stats_to_stats64(stats, &dev->stats); 1391 spin_unlock_bh(&priv->stats_lock); 1392 } 1393 1394 static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) 1395 { 1396 struct mlx4_en_cq *cq; 1397 int i, t; 1398 1399 /* If we haven't received a specific coalescing setting 1400 * (module param), we set the moderation parameters as follows: 1401 * - moder_cnt is set to the number of mtu sized packets to 1402 * satisfy our coalescing target. 1403 * - moder_time is set to a fixed value. 1404 */ 1405 priv->rx_frames = MLX4_EN_RX_COAL_TARGET; 1406 priv->rx_usecs = MLX4_EN_RX_COAL_TIME; 1407 priv->tx_frames = MLX4_EN_TX_COAL_PKTS; 1408 priv->tx_usecs = MLX4_EN_TX_COAL_TIME; 1409 en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n", 1410 priv->dev->mtu, priv->rx_frames, priv->rx_usecs); 1411 1412 /* Setup cq moderation params */ 1413 for (i = 0; i < priv->rx_ring_num; i++) { 1414 cq = priv->rx_cq[i]; 1415 cq->moder_cnt = priv->rx_frames; 1416 cq->moder_time = priv->rx_usecs; 1417 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; 1418 priv->last_moder_packets[i] = 0; 1419 priv->last_moder_bytes[i] = 0; 1420 } 1421 1422 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1423 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1424 cq = priv->tx_cq[t][i]; 1425 cq->moder_cnt = priv->tx_frames; 1426 cq->moder_time = priv->tx_usecs; 1427 } 1428 } 1429 1430 /* Reset auto-moderation params */ 1431 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; 1432 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; 1433 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; 1434 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; 1435 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; 1436 priv->adaptive_rx_coal = 1; 1437 priv->last_moder_jiffies = 0; 1438 priv->last_moder_tx_packets = 0; 1439 } 1440 1441 static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) 1442 { 1443 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); 1444 u32 pkt_rate_high, pkt_rate_low; 1445 struct mlx4_en_cq *cq; 1446 unsigned long packets; 1447 unsigned long rate; 1448 unsigned long avg_pkt_size; 1449 unsigned long rx_packets; 1450 unsigned long rx_bytes; 1451 unsigned long rx_pkt_diff; 1452 int moder_time; 1453 int ring, err; 1454 1455 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) 1456 return; 1457 1458 pkt_rate_low = READ_ONCE(priv->pkt_rate_low); 1459 pkt_rate_high = READ_ONCE(priv->pkt_rate_high); 1460 1461 for (ring = 0; ring < priv->rx_ring_num; ring++) { 1462 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets); 1463 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes); 1464 1465 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring]; 1466 packets = rx_pkt_diff; 1467 rate = packets * HZ / period; 1468 avg_pkt_size = packets ? (rx_bytes - 1469 priv->last_moder_bytes[ring]) / packets : 0; 1470 1471 /* Apply auto-moderation only when packet rate 1472 * exceeds a rate that it matters */ 1473 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && 1474 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { 1475 if (rate <= pkt_rate_low) 1476 moder_time = priv->rx_usecs_low; 1477 else if (rate >= pkt_rate_high) 1478 moder_time = priv->rx_usecs_high; 1479 else 1480 moder_time = (rate - pkt_rate_low) * 1481 (priv->rx_usecs_high - priv->rx_usecs_low) / 1482 (pkt_rate_high - pkt_rate_low) + 1483 priv->rx_usecs_low; 1484 } else { 1485 moder_time = priv->rx_usecs_low; 1486 } 1487 1488 cq = priv->rx_cq[ring]; 1489 if (moder_time != priv->last_moder_time[ring] || 1490 cq->moder_cnt != priv->rx_frames) { 1491 priv->last_moder_time[ring] = moder_time; 1492 cq->moder_time = moder_time; 1493 cq->moder_cnt = priv->rx_frames; 1494 err = mlx4_en_set_cq_moder(priv, cq); 1495 if (err) 1496 en_err(priv, "Failed modifying moderation for cq:%d\n", 1497 ring); 1498 } 1499 priv->last_moder_packets[ring] = rx_packets; 1500 priv->last_moder_bytes[ring] = rx_bytes; 1501 } 1502 1503 priv->last_moder_jiffies = jiffies; 1504 } 1505 1506 static void mlx4_en_do_get_stats(struct work_struct *work) 1507 { 1508 struct delayed_work *delay = to_delayed_work(work); 1509 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1510 stats_task); 1511 struct mlx4_en_dev *mdev = priv->mdev; 1512 int err; 1513 1514 mutex_lock(&mdev->state_lock); 1515 if (mdev->device_up) { 1516 if (priv->port_up) { 1517 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); 1518 if (err) 1519 en_dbg(HW, priv, "Could not update stats\n"); 1520 1521 mlx4_en_auto_moderation(priv); 1522 } 1523 1524 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 1525 } 1526 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { 1527 mlx4_en_do_set_mac(priv, priv->current_mac); 1528 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; 1529 } 1530 mutex_unlock(&mdev->state_lock); 1531 } 1532 1533 /* mlx4_en_service_task - Run service task for tasks that needed to be done 1534 * periodically 1535 */ 1536 static void mlx4_en_service_task(struct work_struct *work) 1537 { 1538 struct delayed_work *delay = to_delayed_work(work); 1539 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1540 service_task); 1541 struct mlx4_en_dev *mdev = priv->mdev; 1542 1543 mutex_lock(&mdev->state_lock); 1544 if (mdev->device_up) { 1545 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 1546 mlx4_en_ptp_overflow_check(mdev); 1547 1548 mlx4_en_recover_from_oom(priv); 1549 queue_delayed_work(mdev->workqueue, &priv->service_task, 1550 SERVICE_TASK_DELAY); 1551 } 1552 mutex_unlock(&mdev->state_lock); 1553 } 1554 1555 static void mlx4_en_linkstate(struct work_struct *work) 1556 { 1557 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1558 linkstate_task); 1559 struct mlx4_en_dev *mdev = priv->mdev; 1560 int linkstate = priv->link_state; 1561 1562 mutex_lock(&mdev->state_lock); 1563 /* If observable port state changed set carrier state and 1564 * report to system log */ 1565 if (priv->last_link_state != linkstate) { 1566 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { 1567 en_info(priv, "Link Down\n"); 1568 netif_carrier_off(priv->dev); 1569 } else { 1570 en_info(priv, "Link Up\n"); 1571 netif_carrier_on(priv->dev); 1572 } 1573 } 1574 priv->last_link_state = linkstate; 1575 mutex_unlock(&mdev->state_lock); 1576 } 1577 1578 static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1579 { 1580 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx]; 1581 int numa_node = priv->mdev->dev->numa_node; 1582 1583 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL)) 1584 return -ENOMEM; 1585 1586 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node), 1587 ring->affinity_mask); 1588 return 0; 1589 } 1590 1591 static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1592 { 1593 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask); 1594 } 1595 1596 static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv, 1597 int tx_ring_idx) 1598 { 1599 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx]; 1600 int rr_index = tx_ring_idx; 1601 1602 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc; 1603 tx_ring->recycle_ring = priv->rx_ring[rr_index]; 1604 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n", 1605 TX_XDP, tx_ring_idx, rr_index); 1606 } 1607 1608 int mlx4_en_start_port(struct net_device *dev) 1609 { 1610 struct mlx4_en_priv *priv = netdev_priv(dev); 1611 struct mlx4_en_dev *mdev = priv->mdev; 1612 struct mlx4_en_cq *cq; 1613 struct mlx4_en_tx_ring *tx_ring; 1614 int rx_index = 0; 1615 int err = 0; 1616 int i, t; 1617 int j; 1618 u8 mc_list[16] = {0}; 1619 1620 if (priv->port_up) { 1621 en_dbg(DRV, priv, "start port called while port already up\n"); 1622 return 0; 1623 } 1624 1625 INIT_LIST_HEAD(&priv->mc_list); 1626 INIT_LIST_HEAD(&priv->curr_list); 1627 INIT_LIST_HEAD(&priv->ethtool_list); 1628 memset(&priv->ethtool_rules[0], 0, 1629 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES); 1630 1631 /* Calculate Rx buf size */ 1632 dev->mtu = min(dev->mtu, priv->max_mtu); 1633 mlx4_en_calc_rx_buf(dev); 1634 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); 1635 1636 /* Configure rx cq's and rings */ 1637 err = mlx4_en_activate_rx_rings(priv); 1638 if (err) { 1639 en_err(priv, "Failed to activate RX rings\n"); 1640 return err; 1641 } 1642 for (i = 0; i < priv->rx_ring_num; i++) { 1643 cq = priv->rx_cq[i]; 1644 1645 err = mlx4_en_init_affinity_hint(priv, i); 1646 if (err) { 1647 en_err(priv, "Failed preparing IRQ affinity hint\n"); 1648 goto cq_err; 1649 } 1650 1651 err = mlx4_en_activate_cq(priv, cq, i); 1652 if (err) { 1653 en_err(priv, "Failed activating Rx CQ\n"); 1654 mlx4_en_free_affinity_hint(priv, i); 1655 goto cq_err; 1656 } 1657 1658 for (j = 0; j < cq->size; j++) { 1659 struct mlx4_cqe *cqe = NULL; 1660 1661 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) + 1662 priv->cqe_factor; 1663 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK; 1664 } 1665 1666 err = mlx4_en_set_cq_moder(priv, cq); 1667 if (err) { 1668 en_err(priv, "Failed setting cq moderation parameters\n"); 1669 mlx4_en_deactivate_cq(priv, cq); 1670 mlx4_en_free_affinity_hint(priv, i); 1671 goto cq_err; 1672 } 1673 mlx4_en_arm_cq(priv, cq); 1674 priv->rx_ring[i]->cqn = cq->mcq.cqn; 1675 ++rx_index; 1676 } 1677 1678 /* Set qp number */ 1679 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port); 1680 err = mlx4_en_get_qp(priv); 1681 if (err) { 1682 en_err(priv, "Failed getting eth qp\n"); 1683 goto cq_err; 1684 } 1685 mdev->mac_removed[priv->port] = 0; 1686 1687 priv->counter_index = 1688 mlx4_get_default_counter_index(mdev->dev, priv->port); 1689 1690 err = mlx4_en_config_rss_steer(priv); 1691 if (err) { 1692 en_err(priv, "Failed configuring rss steering\n"); 1693 goto mac_err; 1694 } 1695 1696 err = mlx4_en_create_drop_qp(priv); 1697 if (err) 1698 goto rss_err; 1699 1700 /* Configure tx cq's and rings */ 1701 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1702 u8 num_tx_rings_p_up = t == TX ? 1703 priv->num_tx_rings_p_up : priv->tx_ring_num[t]; 1704 1705 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1706 /* Configure cq */ 1707 cq = priv->tx_cq[t][i]; 1708 err = mlx4_en_activate_cq(priv, cq, i); 1709 if (err) { 1710 en_err(priv, "Failed allocating Tx CQ\n"); 1711 goto tx_err; 1712 } 1713 err = mlx4_en_set_cq_moder(priv, cq); 1714 if (err) { 1715 en_err(priv, "Failed setting cq moderation parameters\n"); 1716 mlx4_en_deactivate_cq(priv, cq); 1717 goto tx_err; 1718 } 1719 en_dbg(DRV, priv, 1720 "Resetting index of collapsed CQ:%d to -1\n", i); 1721 cq->buf->wqe_index = cpu_to_be16(0xffff); 1722 1723 /* Configure ring */ 1724 tx_ring = priv->tx_ring[t][i]; 1725 err = mlx4_en_activate_tx_ring(priv, tx_ring, 1726 cq->mcq.cqn, 1727 i / num_tx_rings_p_up); 1728 if (err) { 1729 en_err(priv, "Failed allocating Tx ring\n"); 1730 mlx4_en_deactivate_cq(priv, cq); 1731 goto tx_err; 1732 } 1733 if (t != TX_XDP) { 1734 tx_ring->tx_queue = netdev_get_tx_queue(dev, i); 1735 tx_ring->recycle_ring = NULL; 1736 1737 /* Arm CQ for TX completions */ 1738 mlx4_en_arm_cq(priv, cq); 1739 1740 } else { 1741 mlx4_en_init_tx_xdp_ring_descs(priv, tx_ring); 1742 mlx4_en_init_recycle_ring(priv, i); 1743 /* XDP TX CQ should never be armed */ 1744 } 1745 1746 /* Set initial ownership of all Tx TXBBs to SW (1) */ 1747 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) 1748 *((u32 *)(tx_ring->buf + j)) = 0xffffffff; 1749 } 1750 } 1751 1752 /* Configure port */ 1753 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 1754 priv->rx_skb_size + ETH_FCS_LEN, 1755 priv->prof->tx_pause, 1756 priv->prof->tx_ppp, 1757 priv->prof->rx_pause, 1758 priv->prof->rx_ppp); 1759 if (err) { 1760 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 1761 priv->port, err); 1762 goto tx_err; 1763 } 1764 1765 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu); 1766 if (err) { 1767 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n", 1768 dev->mtu, priv->port, err); 1769 goto tx_err; 1770 } 1771 1772 /* Set default qp number */ 1773 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); 1774 if (err) { 1775 en_err(priv, "Failed setting default qp numbers\n"); 1776 goto tx_err; 1777 } 1778 1779 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 1780 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 1781 if (err) { 1782 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 1783 err); 1784 goto tx_err; 1785 } 1786 } 1787 1788 /* Init port */ 1789 en_dbg(HW, priv, "Initializing port\n"); 1790 err = mlx4_INIT_PORT(mdev->dev, priv->port); 1791 if (err) { 1792 en_err(priv, "Failed Initializing port\n"); 1793 goto tx_err; 1794 } 1795 1796 /* Set Unicast and VXLAN steering rules */ 1797 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 && 1798 mlx4_en_set_rss_steer_rules(priv)) 1799 mlx4_warn(mdev, "Failed setting steering rules\n"); 1800 1801 /* Attach rx QP to bradcast address */ 1802 eth_broadcast_addr(&mc_list[10]); 1803 mc_list[5] = priv->port; /* needed for B0 steering support */ 1804 if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list, 1805 priv->port, 0, MLX4_PROT_ETH, 1806 &priv->broadcast_id)) 1807 mlx4_warn(mdev, "Failed Attaching Broadcast\n"); 1808 1809 /* Must redo promiscuous mode setup. */ 1810 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); 1811 1812 /* Schedule multicast task to populate multicast list */ 1813 queue_work(mdev->workqueue, &priv->rx_mode_task); 1814 1815 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 1816 udp_tunnel_get_rx_info(dev); 1817 1818 priv->port_up = true; 1819 1820 /* Process all completions if exist to prevent 1821 * the queues freezing if they are full 1822 */ 1823 for (i = 0; i < priv->rx_ring_num; i++) { 1824 local_bh_disable(); 1825 napi_schedule(&priv->rx_cq[i]->napi); 1826 local_bh_enable(); 1827 } 1828 1829 netif_tx_start_all_queues(dev); 1830 netif_device_attach(dev); 1831 1832 return 0; 1833 1834 tx_err: 1835 if (t == MLX4_EN_NUM_TX_TYPES) { 1836 t--; 1837 i = priv->tx_ring_num[t]; 1838 } 1839 while (t >= 0) { 1840 while (i--) { 1841 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1842 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1843 } 1844 if (!t--) 1845 break; 1846 i = priv->tx_ring_num[t]; 1847 } 1848 mlx4_en_destroy_drop_qp(priv); 1849 rss_err: 1850 mlx4_en_release_rss_steer(priv); 1851 mac_err: 1852 mlx4_en_put_qp(priv); 1853 cq_err: 1854 while (rx_index--) { 1855 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]); 1856 mlx4_en_free_affinity_hint(priv, rx_index); 1857 } 1858 for (i = 0; i < priv->rx_ring_num; i++) 1859 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1860 1861 return err; /* need to close devices */ 1862 } 1863 1864 1865 void mlx4_en_stop_port(struct net_device *dev, int detach) 1866 { 1867 struct mlx4_en_priv *priv = netdev_priv(dev); 1868 struct mlx4_en_dev *mdev = priv->mdev; 1869 struct mlx4_en_mc_list *mclist, *tmp; 1870 struct ethtool_flow_id *flow, *tmp_flow; 1871 int i, t; 1872 u8 mc_list[16] = {0}; 1873 1874 if (!priv->port_up) { 1875 en_dbg(DRV, priv, "stop port called while port already down\n"); 1876 return; 1877 } 1878 1879 /* close port*/ 1880 mlx4_CLOSE_PORT(mdev->dev, priv->port); 1881 1882 /* Synchronize with tx routine */ 1883 netif_tx_lock_bh(dev); 1884 if (detach) 1885 netif_device_detach(dev); 1886 netif_tx_stop_all_queues(dev); 1887 netif_tx_unlock_bh(dev); 1888 1889 netif_tx_disable(dev); 1890 1891 spin_lock_bh(&priv->stats_lock); 1892 mlx4_en_fold_software_stats(dev); 1893 /* Set port as not active */ 1894 priv->port_up = false; 1895 spin_unlock_bh(&priv->stats_lock); 1896 1897 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 1898 1899 /* Promsicuous mode */ 1900 if (mdev->dev->caps.steering_mode == 1901 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1902 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | 1903 MLX4_EN_FLAG_MC_PROMISC); 1904 mlx4_flow_steer_promisc_remove(mdev->dev, 1905 priv->port, 1906 MLX4_FS_ALL_DEFAULT); 1907 mlx4_flow_steer_promisc_remove(mdev->dev, 1908 priv->port, 1909 MLX4_FS_MC_DEFAULT); 1910 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) { 1911 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 1912 1913 /* Disable promiscouos mode */ 1914 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, 1915 priv->port); 1916 1917 /* Disable Multicast promisc */ 1918 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1919 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, 1920 priv->port); 1921 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1922 } 1923 } 1924 1925 /* Detach All multicasts */ 1926 eth_broadcast_addr(&mc_list[10]); 1927 mc_list[5] = priv->port; /* needed for B0 steering support */ 1928 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list, 1929 MLX4_PROT_ETH, priv->broadcast_id); 1930 list_for_each_entry(mclist, &priv->curr_list, list) { 1931 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1932 mc_list[5] = priv->port; 1933 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, 1934 mc_list, MLX4_PROT_ETH, mclist->reg_id); 1935 if (mclist->tunnel_reg_id) 1936 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id); 1937 } 1938 mlx4_en_clear_list(dev); 1939 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1940 list_del(&mclist->list); 1941 kfree(mclist); 1942 } 1943 1944 /* Flush multicast filter */ 1945 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); 1946 1947 /* Remove flow steering rules for the port*/ 1948 if (mdev->dev->caps.steering_mode == 1949 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1950 ASSERT_RTNL(); 1951 list_for_each_entry_safe(flow, tmp_flow, 1952 &priv->ethtool_list, list) { 1953 mlx4_flow_detach(mdev->dev, flow->id); 1954 list_del(&flow->list); 1955 } 1956 } 1957 1958 mlx4_en_destroy_drop_qp(priv); 1959 1960 /* Free TX Rings */ 1961 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 1962 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1963 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1964 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1965 } 1966 } 1967 msleep(10); 1968 1969 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) 1970 for (i = 0; i < priv->tx_ring_num[t]; i++) 1971 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]); 1972 1973 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 1974 mlx4_en_delete_rss_steer_rules(priv); 1975 1976 /* Free RSS qps */ 1977 mlx4_en_release_rss_steer(priv); 1978 1979 /* Unregister Mac address for the port */ 1980 mlx4_en_put_qp(priv); 1981 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN)) 1982 mdev->mac_removed[priv->port] = 1; 1983 1984 /* Free RX Rings */ 1985 for (i = 0; i < priv->rx_ring_num; i++) { 1986 struct mlx4_en_cq *cq = priv->rx_cq[i]; 1987 1988 napi_synchronize(&cq->napi); 1989 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1990 mlx4_en_deactivate_cq(priv, cq); 1991 1992 mlx4_en_free_affinity_hint(priv, i); 1993 } 1994 } 1995 1996 static void mlx4_en_restart(struct work_struct *work) 1997 { 1998 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1999 watchdog_task); 2000 struct mlx4_en_dev *mdev = priv->mdev; 2001 struct net_device *dev = priv->dev; 2002 2003 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); 2004 2005 rtnl_lock(); 2006 mutex_lock(&mdev->state_lock); 2007 if (priv->port_up) { 2008 mlx4_en_stop_port(dev, 1); 2009 if (mlx4_en_start_port(dev)) 2010 en_err(priv, "Failed restarting port %d\n", priv->port); 2011 } 2012 mutex_unlock(&mdev->state_lock); 2013 rtnl_unlock(); 2014 } 2015 2016 static void mlx4_en_clear_stats(struct net_device *dev) 2017 { 2018 struct mlx4_en_priv *priv = netdev_priv(dev); 2019 struct mlx4_en_dev *mdev = priv->mdev; 2020 struct mlx4_en_tx_ring **tx_ring; 2021 int i; 2022 2023 if (!mlx4_is_slave(mdev->dev)) 2024 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) 2025 en_dbg(HW, priv, "Failed dumping statistics\n"); 2026 2027 memset(&priv->pstats, 0, sizeof(priv->pstats)); 2028 memset(&priv->pkstats, 0, sizeof(priv->pkstats)); 2029 memset(&priv->port_stats, 0, sizeof(priv->port_stats)); 2030 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats)); 2031 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats)); 2032 memset(&priv->rx_priority_flowstats, 0, 2033 sizeof(priv->rx_priority_flowstats)); 2034 memset(&priv->tx_priority_flowstats, 0, 2035 sizeof(priv->tx_priority_flowstats)); 2036 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats)); 2037 2038 tx_ring = priv->tx_ring[TX]; 2039 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 2040 tx_ring[i]->bytes = 0; 2041 tx_ring[i]->packets = 0; 2042 tx_ring[i]->tx_csum = 0; 2043 tx_ring[i]->tx_dropped = 0; 2044 tx_ring[i]->queue_stopped = 0; 2045 tx_ring[i]->wake_queue = 0; 2046 tx_ring[i]->tso_packets = 0; 2047 tx_ring[i]->xmit_more = 0; 2048 } 2049 for (i = 0; i < priv->rx_ring_num; i++) { 2050 priv->rx_ring[i]->bytes = 0; 2051 priv->rx_ring[i]->packets = 0; 2052 priv->rx_ring[i]->csum_ok = 0; 2053 priv->rx_ring[i]->csum_none = 0; 2054 priv->rx_ring[i]->csum_complete = 0; 2055 } 2056 } 2057 2058 static int mlx4_en_open(struct net_device *dev) 2059 { 2060 struct mlx4_en_priv *priv = netdev_priv(dev); 2061 struct mlx4_en_dev *mdev = priv->mdev; 2062 int err = 0; 2063 2064 mutex_lock(&mdev->state_lock); 2065 2066 if (!mdev->device_up) { 2067 en_err(priv, "Cannot open - device down/disabled\n"); 2068 err = -EBUSY; 2069 goto out; 2070 } 2071 2072 /* Reset HW statistics and SW counters */ 2073 mlx4_en_clear_stats(dev); 2074 2075 err = mlx4_en_start_port(dev); 2076 if (err) 2077 en_err(priv, "Failed starting port:%d\n", priv->port); 2078 2079 out: 2080 mutex_unlock(&mdev->state_lock); 2081 return err; 2082 } 2083 2084 2085 static int mlx4_en_close(struct net_device *dev) 2086 { 2087 struct mlx4_en_priv *priv = netdev_priv(dev); 2088 struct mlx4_en_dev *mdev = priv->mdev; 2089 2090 en_dbg(IFDOWN, priv, "Close port called\n"); 2091 2092 mutex_lock(&mdev->state_lock); 2093 2094 mlx4_en_stop_port(dev, 0); 2095 netif_carrier_off(dev); 2096 2097 mutex_unlock(&mdev->state_lock); 2098 return 0; 2099 } 2100 2101 static void mlx4_en_free_resources(struct mlx4_en_priv *priv) 2102 { 2103 int i, t; 2104 2105 #ifdef CONFIG_RFS_ACCEL 2106 priv->dev->rx_cpu_rmap = NULL; 2107 #endif 2108 2109 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2110 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2111 if (priv->tx_ring[t] && priv->tx_ring[t][i]) 2112 mlx4_en_destroy_tx_ring(priv, 2113 &priv->tx_ring[t][i]); 2114 if (priv->tx_cq[t] && priv->tx_cq[t][i]) 2115 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2116 } 2117 kfree(priv->tx_ring[t]); 2118 kfree(priv->tx_cq[t]); 2119 } 2120 2121 for (i = 0; i < priv->rx_ring_num; i++) { 2122 if (priv->rx_ring[i]) 2123 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2124 priv->prof->rx_ring_size, priv->stride); 2125 if (priv->rx_cq[i]) 2126 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2127 } 2128 2129 } 2130 2131 static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) 2132 { 2133 struct mlx4_en_port_profile *prof = priv->prof; 2134 int i, t; 2135 int node; 2136 2137 /* Create tx Rings */ 2138 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2139 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2140 node = cpu_to_node(i % num_online_cpus()); 2141 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i], 2142 prof->tx_ring_size, i, t, node)) 2143 goto err; 2144 2145 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i], 2146 prof->tx_ring_size, 2147 TXBB_SIZE, node, i)) 2148 goto err; 2149 } 2150 } 2151 2152 /* Create rx Rings */ 2153 for (i = 0; i < priv->rx_ring_num; i++) { 2154 node = cpu_to_node(i % num_online_cpus()); 2155 if (mlx4_en_create_cq(priv, &priv->rx_cq[i], 2156 prof->rx_ring_size, i, RX, node)) 2157 goto err; 2158 2159 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], 2160 prof->rx_ring_size, priv->stride, 2161 node, i)) 2162 goto err; 2163 2164 } 2165 2166 #ifdef CONFIG_RFS_ACCEL 2167 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port); 2168 #endif 2169 2170 return 0; 2171 2172 err: 2173 en_err(priv, "Failed to allocate NIC resources\n"); 2174 for (i = 0; i < priv->rx_ring_num; i++) { 2175 if (priv->rx_ring[i]) 2176 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2177 prof->rx_ring_size, 2178 priv->stride); 2179 if (priv->rx_cq[i]) 2180 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2181 } 2182 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2183 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2184 if (priv->tx_ring[t][i]) 2185 mlx4_en_destroy_tx_ring(priv, 2186 &priv->tx_ring[t][i]); 2187 if (priv->tx_cq[t][i]) 2188 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2189 } 2190 } 2191 return -ENOMEM; 2192 } 2193 2194 2195 static int mlx4_en_copy_priv(struct mlx4_en_priv *dst, 2196 struct mlx4_en_priv *src, 2197 struct mlx4_en_port_profile *prof) 2198 { 2199 int t; 2200 2201 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config, 2202 sizeof(dst->hwtstamp_config)); 2203 dst->num_tx_rings_p_up = prof->num_tx_rings_p_up; 2204 dst->rx_ring_num = prof->rx_ring_num; 2205 dst->flags = prof->flags; 2206 dst->mdev = src->mdev; 2207 dst->port = src->port; 2208 dst->dev = src->dev; 2209 dst->prof = prof; 2210 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 2211 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 2212 2213 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2214 dst->tx_ring_num[t] = prof->tx_ring_num[t]; 2215 if (!dst->tx_ring_num[t]) 2216 continue; 2217 2218 dst->tx_ring[t] = kcalloc(MAX_TX_RINGS, 2219 sizeof(struct mlx4_en_tx_ring *), 2220 GFP_KERNEL); 2221 if (!dst->tx_ring[t]) 2222 goto err_free_tx; 2223 2224 dst->tx_cq[t] = kcalloc(MAX_TX_RINGS, 2225 sizeof(struct mlx4_en_cq *), 2226 GFP_KERNEL); 2227 if (!dst->tx_cq[t]) { 2228 kfree(dst->tx_ring[t]); 2229 goto err_free_tx; 2230 } 2231 } 2232 2233 return 0; 2234 2235 err_free_tx: 2236 while (t--) { 2237 kfree(dst->tx_ring[t]); 2238 kfree(dst->tx_cq[t]); 2239 } 2240 return -ENOMEM; 2241 } 2242 2243 static void mlx4_en_update_priv(struct mlx4_en_priv *dst, 2244 struct mlx4_en_priv *src) 2245 { 2246 int t; 2247 memcpy(dst->rx_ring, src->rx_ring, 2248 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num); 2249 memcpy(dst->rx_cq, src->rx_cq, 2250 sizeof(struct mlx4_en_cq *) * src->rx_ring_num); 2251 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config, 2252 sizeof(dst->hwtstamp_config)); 2253 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2254 dst->tx_ring_num[t] = src->tx_ring_num[t]; 2255 dst->tx_ring[t] = src->tx_ring[t]; 2256 dst->tx_cq[t] = src->tx_cq[t]; 2257 } 2258 dst->num_tx_rings_p_up = src->num_tx_rings_p_up; 2259 dst->rx_ring_num = src->rx_ring_num; 2260 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile)); 2261 } 2262 2263 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv, 2264 struct mlx4_en_priv *tmp, 2265 struct mlx4_en_port_profile *prof, 2266 bool carry_xdp_prog) 2267 { 2268 struct bpf_prog *xdp_prog; 2269 int i, t; 2270 2271 mlx4_en_copy_priv(tmp, priv, prof); 2272 2273 if (mlx4_en_alloc_resources(tmp)) { 2274 en_warn(priv, 2275 "%s: Resource allocation failed, using previous configuration\n", 2276 __func__); 2277 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2278 kfree(tmp->tx_ring[t]); 2279 kfree(tmp->tx_cq[t]); 2280 } 2281 return -ENOMEM; 2282 } 2283 2284 /* All rx_rings has the same xdp_prog. Pick the first one. */ 2285 xdp_prog = rcu_dereference_protected( 2286 priv->rx_ring[0]->xdp_prog, 2287 lockdep_is_held(&priv->mdev->state_lock)); 2288 2289 if (xdp_prog && carry_xdp_prog) { 2290 xdp_prog = bpf_prog_add(xdp_prog, tmp->rx_ring_num); 2291 if (IS_ERR(xdp_prog)) { 2292 mlx4_en_free_resources(tmp); 2293 return PTR_ERR(xdp_prog); 2294 } 2295 for (i = 0; i < tmp->rx_ring_num; i++) 2296 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog, 2297 xdp_prog); 2298 } 2299 2300 return 0; 2301 } 2302 2303 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv, 2304 struct mlx4_en_priv *tmp) 2305 { 2306 mlx4_en_free_resources(priv); 2307 mlx4_en_update_priv(priv, tmp); 2308 } 2309 2310 void mlx4_en_destroy_netdev(struct net_device *dev) 2311 { 2312 struct mlx4_en_priv *priv = netdev_priv(dev); 2313 struct mlx4_en_dev *mdev = priv->mdev; 2314 2315 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); 2316 2317 /* Unregister device - this will close the port if it was up */ 2318 if (priv->registered) { 2319 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev, 2320 priv->port)); 2321 unregister_netdev(dev); 2322 } 2323 2324 if (priv->allocated) 2325 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); 2326 2327 cancel_delayed_work(&priv->stats_task); 2328 cancel_delayed_work(&priv->service_task); 2329 /* flush any pending task for this netdev */ 2330 flush_workqueue(mdev->workqueue); 2331 2332 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 2333 mlx4_en_remove_timestamp(mdev); 2334 2335 /* Detach the netdev so tasks would not attempt to access it */ 2336 mutex_lock(&mdev->state_lock); 2337 mdev->pndev[priv->port] = NULL; 2338 mdev->upper[priv->port] = NULL; 2339 2340 #ifdef CONFIG_RFS_ACCEL 2341 mlx4_en_cleanup_filters(priv); 2342 #endif 2343 2344 mlx4_en_free_resources(priv); 2345 mutex_unlock(&mdev->state_lock); 2346 2347 free_netdev(dev); 2348 } 2349 2350 static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu) 2351 { 2352 struct mlx4_en_priv *priv = netdev_priv(dev); 2353 2354 if (mtu > MLX4_EN_MAX_XDP_MTU) { 2355 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n", 2356 mtu, MLX4_EN_MAX_XDP_MTU); 2357 return false; 2358 } 2359 2360 return true; 2361 } 2362 2363 static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) 2364 { 2365 struct mlx4_en_priv *priv = netdev_priv(dev); 2366 struct mlx4_en_dev *mdev = priv->mdev; 2367 int err = 0; 2368 2369 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", 2370 dev->mtu, new_mtu); 2371 2372 if (priv->tx_ring_num[TX_XDP] && 2373 !mlx4_en_check_xdp_mtu(dev, new_mtu)) 2374 return -EOPNOTSUPP; 2375 2376 dev->mtu = new_mtu; 2377 2378 if (netif_running(dev)) { 2379 mutex_lock(&mdev->state_lock); 2380 if (!mdev->device_up) { 2381 /* NIC is probably restarting - let watchdog task reset 2382 * the port */ 2383 en_dbg(DRV, priv, "Change MTU called with card down!?\n"); 2384 } else { 2385 mlx4_en_stop_port(dev, 1); 2386 err = mlx4_en_start_port(dev); 2387 if (err) { 2388 en_err(priv, "Failed restarting port:%d\n", 2389 priv->port); 2390 queue_work(mdev->workqueue, &priv->watchdog_task); 2391 } 2392 } 2393 mutex_unlock(&mdev->state_lock); 2394 } 2395 return 0; 2396 } 2397 2398 static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 2399 { 2400 struct mlx4_en_priv *priv = netdev_priv(dev); 2401 struct mlx4_en_dev *mdev = priv->mdev; 2402 struct hwtstamp_config config; 2403 2404 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 2405 return -EFAULT; 2406 2407 /* reserved for future extensions */ 2408 if (config.flags) 2409 return -EINVAL; 2410 2411 /* device doesn't support time stamping */ 2412 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)) 2413 return -EINVAL; 2414 2415 /* TX HW timestamp */ 2416 switch (config.tx_type) { 2417 case HWTSTAMP_TX_OFF: 2418 case HWTSTAMP_TX_ON: 2419 break; 2420 default: 2421 return -ERANGE; 2422 } 2423 2424 /* RX HW timestamp */ 2425 switch (config.rx_filter) { 2426 case HWTSTAMP_FILTER_NONE: 2427 break; 2428 case HWTSTAMP_FILTER_ALL: 2429 case HWTSTAMP_FILTER_SOME: 2430 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2431 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2432 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2433 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2434 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2435 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2436 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2437 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2438 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2439 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2440 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2441 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2442 case HWTSTAMP_FILTER_NTP_ALL: 2443 config.rx_filter = HWTSTAMP_FILTER_ALL; 2444 break; 2445 default: 2446 return -ERANGE; 2447 } 2448 2449 if (mlx4_en_reset_config(dev, config, dev->features)) { 2450 config.tx_type = HWTSTAMP_TX_OFF; 2451 config.rx_filter = HWTSTAMP_FILTER_NONE; 2452 } 2453 2454 return copy_to_user(ifr->ifr_data, &config, 2455 sizeof(config)) ? -EFAULT : 0; 2456 } 2457 2458 static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 2459 { 2460 struct mlx4_en_priv *priv = netdev_priv(dev); 2461 2462 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config, 2463 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0; 2464 } 2465 2466 static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 2467 { 2468 switch (cmd) { 2469 case SIOCSHWTSTAMP: 2470 return mlx4_en_hwtstamp_set(dev, ifr); 2471 case SIOCGHWTSTAMP: 2472 return mlx4_en_hwtstamp_get(dev, ifr); 2473 default: 2474 return -EOPNOTSUPP; 2475 } 2476 } 2477 2478 static netdev_features_t mlx4_en_fix_features(struct net_device *netdev, 2479 netdev_features_t features) 2480 { 2481 struct mlx4_en_priv *en_priv = netdev_priv(netdev); 2482 struct mlx4_en_dev *mdev = en_priv->mdev; 2483 2484 /* Since there is no support for separate RX C-TAG/S-TAG vlan accel 2485 * enable/disable make sure S-TAG flag is always in same state as 2486 * C-TAG. 2487 */ 2488 if (features & NETIF_F_HW_VLAN_CTAG_RX && 2489 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 2490 features |= NETIF_F_HW_VLAN_STAG_RX; 2491 else 2492 features &= ~NETIF_F_HW_VLAN_STAG_RX; 2493 2494 return features; 2495 } 2496 2497 static int mlx4_en_set_features(struct net_device *netdev, 2498 netdev_features_t features) 2499 { 2500 struct mlx4_en_priv *priv = netdev_priv(netdev); 2501 bool reset = false; 2502 int ret = 0; 2503 2504 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) { 2505 en_info(priv, "Turn %s RX-FCS\n", 2506 (features & NETIF_F_RXFCS) ? "ON" : "OFF"); 2507 reset = true; 2508 } 2509 2510 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) { 2511 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0; 2512 2513 en_info(priv, "Turn %s RX-ALL\n", 2514 ignore_fcs_value ? "ON" : "OFF"); 2515 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev, 2516 priv->port, ignore_fcs_value); 2517 if (ret) 2518 return ret; 2519 } 2520 2521 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 2522 en_info(priv, "Turn %s RX vlan strip offload\n", 2523 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF"); 2524 reset = true; 2525 } 2526 2527 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX)) 2528 en_info(priv, "Turn %s TX vlan strip offload\n", 2529 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF"); 2530 2531 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX)) 2532 en_info(priv, "Turn %s TX S-VLAN strip offload\n", 2533 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF"); 2534 2535 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) { 2536 en_info(priv, "Turn %s loopback\n", 2537 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF"); 2538 mlx4_en_update_loopback_state(netdev, features); 2539 } 2540 2541 if (reset) { 2542 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config, 2543 features); 2544 if (ret) 2545 return ret; 2546 } 2547 2548 return 0; 2549 } 2550 2551 static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac) 2552 { 2553 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2554 struct mlx4_en_dev *mdev = en_priv->mdev; 2555 2556 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac); 2557 } 2558 2559 static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos, 2560 __be16 vlan_proto) 2561 { 2562 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2563 struct mlx4_en_dev *mdev = en_priv->mdev; 2564 2565 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos, 2566 vlan_proto); 2567 } 2568 2569 static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate, 2570 int max_tx_rate) 2571 { 2572 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2573 struct mlx4_en_dev *mdev = en_priv->mdev; 2574 2575 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate, 2576 max_tx_rate); 2577 } 2578 2579 static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting) 2580 { 2581 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2582 struct mlx4_en_dev *mdev = en_priv->mdev; 2583 2584 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting); 2585 } 2586 2587 static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf) 2588 { 2589 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2590 struct mlx4_en_dev *mdev = en_priv->mdev; 2591 2592 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf); 2593 } 2594 2595 static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state) 2596 { 2597 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2598 struct mlx4_en_dev *mdev = en_priv->mdev; 2599 2600 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state); 2601 } 2602 2603 static int mlx4_en_get_vf_stats(struct net_device *dev, int vf, 2604 struct ifla_vf_stats *vf_stats) 2605 { 2606 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2607 struct mlx4_en_dev *mdev = en_priv->mdev; 2608 2609 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats); 2610 } 2611 2612 #define PORT_ID_BYTE_LEN 8 2613 static int mlx4_en_get_phys_port_id(struct net_device *dev, 2614 struct netdev_phys_item_id *ppid) 2615 { 2616 struct mlx4_en_priv *priv = netdev_priv(dev); 2617 struct mlx4_dev *mdev = priv->mdev->dev; 2618 int i; 2619 u64 phys_port_id = mdev->caps.phys_port_id[priv->port]; 2620 2621 if (!phys_port_id) 2622 return -EOPNOTSUPP; 2623 2624 ppid->id_len = sizeof(phys_port_id); 2625 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) { 2626 ppid->id[i] = phys_port_id & 0xff; 2627 phys_port_id >>= 8; 2628 } 2629 return 0; 2630 } 2631 2632 static void mlx4_en_add_vxlan_offloads(struct work_struct *work) 2633 { 2634 int ret; 2635 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2636 vxlan_add_task); 2637 2638 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port); 2639 if (ret) 2640 goto out; 2641 2642 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2643 VXLAN_STEER_BY_OUTER_MAC, 1); 2644 out: 2645 if (ret) { 2646 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret); 2647 return; 2648 } 2649 2650 /* set offloads */ 2651 priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2652 NETIF_F_RXCSUM | 2653 NETIF_F_TSO | NETIF_F_TSO6 | 2654 NETIF_F_GSO_UDP_TUNNEL | 2655 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2656 NETIF_F_GSO_PARTIAL; 2657 } 2658 2659 static void mlx4_en_del_vxlan_offloads(struct work_struct *work) 2660 { 2661 int ret; 2662 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2663 vxlan_del_task); 2664 /* unset offloads */ 2665 priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2666 NETIF_F_RXCSUM | 2667 NETIF_F_TSO | NETIF_F_TSO6 | 2668 NETIF_F_GSO_UDP_TUNNEL | 2669 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2670 NETIF_F_GSO_PARTIAL); 2671 2672 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2673 VXLAN_STEER_BY_OUTER_MAC, 0); 2674 if (ret) 2675 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret); 2676 2677 priv->vxlan_port = 0; 2678 } 2679 2680 static void mlx4_en_add_vxlan_port(struct net_device *dev, 2681 struct udp_tunnel_info *ti) 2682 { 2683 struct mlx4_en_priv *priv = netdev_priv(dev); 2684 __be16 port = ti->port; 2685 __be16 current_port; 2686 2687 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2688 return; 2689 2690 if (ti->sa_family != AF_INET) 2691 return; 2692 2693 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 2694 return; 2695 2696 current_port = priv->vxlan_port; 2697 if (current_port && current_port != port) { 2698 en_warn(priv, "vxlan port %d configured, can't add port %d\n", 2699 ntohs(current_port), ntohs(port)); 2700 return; 2701 } 2702 2703 priv->vxlan_port = port; 2704 queue_work(priv->mdev->workqueue, &priv->vxlan_add_task); 2705 } 2706 2707 static void mlx4_en_del_vxlan_port(struct net_device *dev, 2708 struct udp_tunnel_info *ti) 2709 { 2710 struct mlx4_en_priv *priv = netdev_priv(dev); 2711 __be16 port = ti->port; 2712 __be16 current_port; 2713 2714 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2715 return; 2716 2717 if (ti->sa_family != AF_INET) 2718 return; 2719 2720 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 2721 return; 2722 2723 current_port = priv->vxlan_port; 2724 if (current_port != port) { 2725 en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port)); 2726 return; 2727 } 2728 2729 queue_work(priv->mdev->workqueue, &priv->vxlan_del_task); 2730 } 2731 2732 static netdev_features_t mlx4_en_features_check(struct sk_buff *skb, 2733 struct net_device *dev, 2734 netdev_features_t features) 2735 { 2736 features = vlan_features_check(skb, features); 2737 features = vxlan_features_check(skb, features); 2738 2739 /* The ConnectX-3 doesn't support outer IPv6 checksums but it does 2740 * support inner IPv6 checksums and segmentation so we need to 2741 * strip that feature if this is an IPv6 encapsulated frame. 2742 */ 2743 if (skb->encapsulation && 2744 (skb->ip_summed == CHECKSUM_PARTIAL)) { 2745 struct mlx4_en_priv *priv = netdev_priv(dev); 2746 2747 if (!priv->vxlan_port || 2748 (ip_hdr(skb)->version != 4) || 2749 (udp_hdr(skb)->dest != priv->vxlan_port)) 2750 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 2751 } 2752 2753 return features; 2754 } 2755 2756 static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate) 2757 { 2758 struct mlx4_en_priv *priv = netdev_priv(dev); 2759 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index]; 2760 struct mlx4_update_qp_params params; 2761 int err; 2762 2763 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT)) 2764 return -EOPNOTSUPP; 2765 2766 /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */ 2767 if (maxrate >> 12) { 2768 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS; 2769 params.rate_val = maxrate / 1000; 2770 } else if (maxrate) { 2771 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS; 2772 params.rate_val = maxrate; 2773 } else { /* zero serves to revoke the QP rate-limitation */ 2774 params.rate_unit = 0; 2775 params.rate_val = 0; 2776 } 2777 2778 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT, 2779 ¶ms); 2780 return err; 2781 } 2782 2783 static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog) 2784 { 2785 struct mlx4_en_priv *priv = netdev_priv(dev); 2786 struct mlx4_en_dev *mdev = priv->mdev; 2787 struct mlx4_en_port_profile new_prof; 2788 struct bpf_prog *old_prog; 2789 struct mlx4_en_priv *tmp; 2790 int tx_changed = 0; 2791 int xdp_ring_num; 2792 int port_up = 0; 2793 int err; 2794 int i; 2795 2796 xdp_ring_num = prog ? priv->rx_ring_num : 0; 2797 2798 /* No need to reconfigure buffers when simply swapping the 2799 * program for a new one. 2800 */ 2801 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) { 2802 if (prog) { 2803 prog = bpf_prog_add(prog, priv->rx_ring_num - 1); 2804 if (IS_ERR(prog)) 2805 return PTR_ERR(prog); 2806 } 2807 mutex_lock(&mdev->state_lock); 2808 for (i = 0; i < priv->rx_ring_num; i++) { 2809 old_prog = rcu_dereference_protected( 2810 priv->rx_ring[i]->xdp_prog, 2811 lockdep_is_held(&mdev->state_lock)); 2812 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2813 if (old_prog) 2814 bpf_prog_put(old_prog); 2815 } 2816 mutex_unlock(&mdev->state_lock); 2817 return 0; 2818 } 2819 2820 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu)) 2821 return -EOPNOTSUPP; 2822 2823 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 2824 if (!tmp) 2825 return -ENOMEM; 2826 2827 if (prog) { 2828 prog = bpf_prog_add(prog, priv->rx_ring_num - 1); 2829 if (IS_ERR(prog)) { 2830 err = PTR_ERR(prog); 2831 goto out; 2832 } 2833 } 2834 2835 mutex_lock(&mdev->state_lock); 2836 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 2837 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num; 2838 2839 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) { 2840 tx_changed = 1; 2841 new_prof.tx_ring_num[TX] = 2842 MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up); 2843 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n"); 2844 } 2845 2846 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false); 2847 if (err) { 2848 if (prog) 2849 bpf_prog_sub(prog, priv->rx_ring_num - 1); 2850 goto unlock_out; 2851 } 2852 2853 if (priv->port_up) { 2854 port_up = 1; 2855 mlx4_en_stop_port(dev, 1); 2856 } 2857 2858 mlx4_en_safe_replace_resources(priv, tmp); 2859 if (tx_changed) 2860 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 2861 2862 for (i = 0; i < priv->rx_ring_num; i++) { 2863 old_prog = rcu_dereference_protected( 2864 priv->rx_ring[i]->xdp_prog, 2865 lockdep_is_held(&mdev->state_lock)); 2866 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2867 if (old_prog) 2868 bpf_prog_put(old_prog); 2869 } 2870 2871 if (port_up) { 2872 err = mlx4_en_start_port(dev); 2873 if (err) { 2874 en_err(priv, "Failed starting port %d for XDP change\n", 2875 priv->port); 2876 queue_work(mdev->workqueue, &priv->watchdog_task); 2877 } 2878 } 2879 2880 unlock_out: 2881 mutex_unlock(&mdev->state_lock); 2882 out: 2883 kfree(tmp); 2884 return err; 2885 } 2886 2887 static u32 mlx4_xdp_query(struct net_device *dev) 2888 { 2889 struct mlx4_en_priv *priv = netdev_priv(dev); 2890 struct mlx4_en_dev *mdev = priv->mdev; 2891 const struct bpf_prog *xdp_prog; 2892 u32 prog_id = 0; 2893 2894 if (!priv->tx_ring_num[TX_XDP]) 2895 return prog_id; 2896 2897 mutex_lock(&mdev->state_lock); 2898 xdp_prog = rcu_dereference_protected( 2899 priv->rx_ring[0]->xdp_prog, 2900 lockdep_is_held(&mdev->state_lock)); 2901 if (xdp_prog) 2902 prog_id = xdp_prog->aux->id; 2903 mutex_unlock(&mdev->state_lock); 2904 2905 return prog_id; 2906 } 2907 2908 static int mlx4_xdp(struct net_device *dev, struct netdev_bpf *xdp) 2909 { 2910 switch (xdp->command) { 2911 case XDP_SETUP_PROG: 2912 return mlx4_xdp_set(dev, xdp->prog); 2913 case XDP_QUERY_PROG: 2914 xdp->prog_id = mlx4_xdp_query(dev); 2915 return 0; 2916 default: 2917 return -EINVAL; 2918 } 2919 } 2920 2921 static const struct net_device_ops mlx4_netdev_ops = { 2922 .ndo_open = mlx4_en_open, 2923 .ndo_stop = mlx4_en_close, 2924 .ndo_start_xmit = mlx4_en_xmit, 2925 .ndo_select_queue = mlx4_en_select_queue, 2926 .ndo_get_stats64 = mlx4_en_get_stats64, 2927 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2928 .ndo_set_mac_address = mlx4_en_set_mac, 2929 .ndo_validate_addr = eth_validate_addr, 2930 .ndo_change_mtu = mlx4_en_change_mtu, 2931 .ndo_do_ioctl = mlx4_en_ioctl, 2932 .ndo_tx_timeout = mlx4_en_tx_timeout, 2933 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2934 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2935 .ndo_set_features = mlx4_en_set_features, 2936 .ndo_fix_features = mlx4_en_fix_features, 2937 .ndo_setup_tc = __mlx4_en_setup_tc, 2938 #ifdef CONFIG_RFS_ACCEL 2939 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2940 #endif 2941 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2942 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port, 2943 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port, 2944 .ndo_features_check = mlx4_en_features_check, 2945 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2946 .ndo_bpf = mlx4_xdp, 2947 }; 2948 2949 static const struct net_device_ops mlx4_netdev_ops_master = { 2950 .ndo_open = mlx4_en_open, 2951 .ndo_stop = mlx4_en_close, 2952 .ndo_start_xmit = mlx4_en_xmit, 2953 .ndo_select_queue = mlx4_en_select_queue, 2954 .ndo_get_stats64 = mlx4_en_get_stats64, 2955 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2956 .ndo_set_mac_address = mlx4_en_set_mac, 2957 .ndo_validate_addr = eth_validate_addr, 2958 .ndo_change_mtu = mlx4_en_change_mtu, 2959 .ndo_tx_timeout = mlx4_en_tx_timeout, 2960 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2961 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2962 .ndo_set_vf_mac = mlx4_en_set_vf_mac, 2963 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan, 2964 .ndo_set_vf_rate = mlx4_en_set_vf_rate, 2965 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk, 2966 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state, 2967 .ndo_get_vf_stats = mlx4_en_get_vf_stats, 2968 .ndo_get_vf_config = mlx4_en_get_vf_config, 2969 .ndo_set_features = mlx4_en_set_features, 2970 .ndo_fix_features = mlx4_en_fix_features, 2971 .ndo_setup_tc = __mlx4_en_setup_tc, 2972 #ifdef CONFIG_RFS_ACCEL 2973 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2974 #endif 2975 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2976 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port, 2977 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port, 2978 .ndo_features_check = mlx4_en_features_check, 2979 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2980 .ndo_bpf = mlx4_xdp, 2981 }; 2982 2983 struct mlx4_en_bond { 2984 struct work_struct work; 2985 struct mlx4_en_priv *priv; 2986 int is_bonded; 2987 struct mlx4_port_map port_map; 2988 }; 2989 2990 static void mlx4_en_bond_work(struct work_struct *work) 2991 { 2992 struct mlx4_en_bond *bond = container_of(work, 2993 struct mlx4_en_bond, 2994 work); 2995 int err = 0; 2996 struct mlx4_dev *dev = bond->priv->mdev->dev; 2997 2998 if (bond->is_bonded) { 2999 if (!mlx4_is_bonded(dev)) { 3000 err = mlx4_bond(dev); 3001 if (err) 3002 en_err(bond->priv, "Fail to bond device\n"); 3003 } 3004 if (!err) { 3005 err = mlx4_port_map_set(dev, &bond->port_map); 3006 if (err) 3007 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n", 3008 bond->port_map.port1, 3009 bond->port_map.port2, 3010 err); 3011 } 3012 } else if (mlx4_is_bonded(dev)) { 3013 err = mlx4_unbond(dev); 3014 if (err) 3015 en_err(bond->priv, "Fail to unbond device\n"); 3016 } 3017 dev_put(bond->priv->dev); 3018 kfree(bond); 3019 } 3020 3021 static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded, 3022 u8 v2p_p1, u8 v2p_p2) 3023 { 3024 struct mlx4_en_bond *bond = NULL; 3025 3026 bond = kzalloc(sizeof(*bond), GFP_ATOMIC); 3027 if (!bond) 3028 return -ENOMEM; 3029 3030 INIT_WORK(&bond->work, mlx4_en_bond_work); 3031 bond->priv = priv; 3032 bond->is_bonded = is_bonded; 3033 bond->port_map.port1 = v2p_p1; 3034 bond->port_map.port2 = v2p_p2; 3035 dev_hold(priv->dev); 3036 queue_work(priv->mdev->workqueue, &bond->work); 3037 return 0; 3038 } 3039 3040 int mlx4_en_netdev_event(struct notifier_block *this, 3041 unsigned long event, void *ptr) 3042 { 3043 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 3044 u8 port = 0; 3045 struct mlx4_en_dev *mdev; 3046 struct mlx4_dev *dev; 3047 int i, num_eth_ports = 0; 3048 bool do_bond = true; 3049 struct mlx4_en_priv *priv; 3050 u8 v2p_port1 = 0; 3051 u8 v2p_port2 = 0; 3052 3053 if (!net_eq(dev_net(ndev), &init_net)) 3054 return NOTIFY_DONE; 3055 3056 mdev = container_of(this, struct mlx4_en_dev, nb); 3057 dev = mdev->dev; 3058 3059 /* Go into this mode only when two network devices set on two ports 3060 * of the same mlx4 device are slaves of the same bonding master 3061 */ 3062 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { 3063 ++num_eth_ports; 3064 if (!port && (mdev->pndev[i] == ndev)) 3065 port = i; 3066 mdev->upper[i] = mdev->pndev[i] ? 3067 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL; 3068 /* condition not met: network device is a slave */ 3069 if (!mdev->upper[i]) 3070 do_bond = false; 3071 if (num_eth_ports < 2) 3072 continue; 3073 /* condition not met: same master */ 3074 if (mdev->upper[i] != mdev->upper[i-1]) 3075 do_bond = false; 3076 } 3077 /* condition not met: 2 salves */ 3078 do_bond = (num_eth_ports == 2) ? do_bond : false; 3079 3080 /* handle only events that come with enough info */ 3081 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port) 3082 return NOTIFY_DONE; 3083 3084 priv = netdev_priv(ndev); 3085 if (do_bond) { 3086 struct netdev_notifier_bonding_info *notifier_info = ptr; 3087 struct netdev_bonding_info *bonding_info = 3088 ¬ifier_info->bonding_info; 3089 3090 /* required mode 1, 2 or 4 */ 3091 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) && 3092 (bonding_info->master.bond_mode != BOND_MODE_XOR) && 3093 (bonding_info->master.bond_mode != BOND_MODE_8023AD)) 3094 do_bond = false; 3095 3096 /* require exactly 2 slaves */ 3097 if (bonding_info->master.num_slaves != 2) 3098 do_bond = false; 3099 3100 /* calc v2p */ 3101 if (do_bond) { 3102 if (bonding_info->master.bond_mode == 3103 BOND_MODE_ACTIVEBACKUP) { 3104 /* in active-backup mode virtual ports are 3105 * mapped to the physical port of the active 3106 * slave */ 3107 if (bonding_info->slave.state == 3108 BOND_STATE_BACKUP) { 3109 if (port == 1) { 3110 v2p_port1 = 2; 3111 v2p_port2 = 2; 3112 } else { 3113 v2p_port1 = 1; 3114 v2p_port2 = 1; 3115 } 3116 } else { /* BOND_STATE_ACTIVE */ 3117 if (port == 1) { 3118 v2p_port1 = 1; 3119 v2p_port2 = 1; 3120 } else { 3121 v2p_port1 = 2; 3122 v2p_port2 = 2; 3123 } 3124 } 3125 } else { /* Active-Active */ 3126 /* in active-active mode a virtual port is 3127 * mapped to the native physical port if and only 3128 * if the physical port is up */ 3129 __s8 link = bonding_info->slave.link; 3130 3131 if (port == 1) 3132 v2p_port2 = 2; 3133 else 3134 v2p_port1 = 1; 3135 if ((link == BOND_LINK_UP) || 3136 (link == BOND_LINK_FAIL)) { 3137 if (port == 1) 3138 v2p_port1 = 1; 3139 else 3140 v2p_port2 = 2; 3141 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */ 3142 if (port == 1) 3143 v2p_port1 = 2; 3144 else 3145 v2p_port2 = 1; 3146 } 3147 } 3148 } 3149 } 3150 3151 mlx4_en_queue_bond_work(priv, do_bond, 3152 v2p_port1, v2p_port2); 3153 3154 return NOTIFY_DONE; 3155 } 3156 3157 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev, 3158 struct mlx4_en_stats_bitmap *stats_bitmap, 3159 u8 rx_ppp, u8 rx_pause, 3160 u8 tx_ppp, u8 tx_pause) 3161 { 3162 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS; 3163 3164 if (!mlx4_is_slave(dev) && 3165 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) { 3166 mutex_lock(&stats_bitmap->mutex); 3167 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS); 3168 3169 if (rx_ppp) 3170 bitmap_set(stats_bitmap->bitmap, last_i, 3171 NUM_FLOW_PRIORITY_STATS_RX); 3172 last_i += NUM_FLOW_PRIORITY_STATS_RX; 3173 3174 if (rx_pause && !(rx_ppp)) 3175 bitmap_set(stats_bitmap->bitmap, last_i, 3176 NUM_FLOW_STATS_RX); 3177 last_i += NUM_FLOW_STATS_RX; 3178 3179 if (tx_ppp) 3180 bitmap_set(stats_bitmap->bitmap, last_i, 3181 NUM_FLOW_PRIORITY_STATS_TX); 3182 last_i += NUM_FLOW_PRIORITY_STATS_TX; 3183 3184 if (tx_pause && !(tx_ppp)) 3185 bitmap_set(stats_bitmap->bitmap, last_i, 3186 NUM_FLOW_STATS_TX); 3187 last_i += NUM_FLOW_STATS_TX; 3188 3189 mutex_unlock(&stats_bitmap->mutex); 3190 } 3191 } 3192 3193 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev, 3194 struct mlx4_en_stats_bitmap *stats_bitmap, 3195 u8 rx_ppp, u8 rx_pause, 3196 u8 tx_ppp, u8 tx_pause) 3197 { 3198 int last_i = 0; 3199 3200 mutex_init(&stats_bitmap->mutex); 3201 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS); 3202 3203 if (mlx4_is_slave(dev)) { 3204 bitmap_set(stats_bitmap->bitmap, last_i + 3205 MLX4_FIND_NETDEV_STAT(rx_packets), 1); 3206 bitmap_set(stats_bitmap->bitmap, last_i + 3207 MLX4_FIND_NETDEV_STAT(tx_packets), 1); 3208 bitmap_set(stats_bitmap->bitmap, last_i + 3209 MLX4_FIND_NETDEV_STAT(rx_bytes), 1); 3210 bitmap_set(stats_bitmap->bitmap, last_i + 3211 MLX4_FIND_NETDEV_STAT(tx_bytes), 1); 3212 bitmap_set(stats_bitmap->bitmap, last_i + 3213 MLX4_FIND_NETDEV_STAT(rx_dropped), 1); 3214 bitmap_set(stats_bitmap->bitmap, last_i + 3215 MLX4_FIND_NETDEV_STAT(tx_dropped), 1); 3216 } else { 3217 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS); 3218 } 3219 last_i += NUM_MAIN_STATS; 3220 3221 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS); 3222 last_i += NUM_PORT_STATS; 3223 3224 if (mlx4_is_master(dev)) 3225 bitmap_set(stats_bitmap->bitmap, last_i, 3226 NUM_PF_STATS); 3227 last_i += NUM_PF_STATS; 3228 3229 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap, 3230 rx_ppp, rx_pause, 3231 tx_ppp, tx_pause); 3232 last_i += NUM_FLOW_STATS; 3233 3234 if (!mlx4_is_slave(dev)) 3235 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS); 3236 last_i += NUM_PKT_STATS; 3237 3238 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS); 3239 last_i += NUM_XDP_STATS; 3240 3241 if (!mlx4_is_slave(dev)) 3242 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PHY_STATS); 3243 last_i += NUM_PHY_STATS; 3244 } 3245 3246 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 3247 struct mlx4_en_port_profile *prof) 3248 { 3249 struct net_device *dev; 3250 struct mlx4_en_priv *priv; 3251 int i, t; 3252 int err; 3253 3254 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv), 3255 MAX_TX_RINGS, MAX_RX_RINGS); 3256 if (dev == NULL) 3257 return -ENOMEM; 3258 3259 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]); 3260 netif_set_real_num_rx_queues(dev, prof->rx_ring_num); 3261 3262 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev); 3263 dev->dev_port = port - 1; 3264 3265 /* 3266 * Initialize driver private data 3267 */ 3268 3269 priv = netdev_priv(dev); 3270 memset(priv, 0, sizeof(struct mlx4_en_priv)); 3271 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 3272 spin_lock_init(&priv->stats_lock); 3273 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode); 3274 INIT_WORK(&priv->watchdog_task, mlx4_en_restart); 3275 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); 3276 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); 3277 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task); 3278 INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads); 3279 INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads); 3280 #ifdef CONFIG_RFS_ACCEL 3281 INIT_LIST_HEAD(&priv->filters); 3282 spin_lock_init(&priv->filters_lock); 3283 #endif 3284 3285 priv->dev = dev; 3286 priv->mdev = mdev; 3287 priv->ddev = &mdev->pdev->dev; 3288 priv->prof = prof; 3289 priv->port = port; 3290 priv->port_up = false; 3291 priv->flags = prof->flags; 3292 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME; 3293 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | 3294 MLX4_WQE_CTRL_SOLICITED); 3295 priv->num_tx_rings_p_up = mdev->profile.max_num_tx_rings_p_up; 3296 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK; 3297 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key)); 3298 3299 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 3300 priv->tx_ring_num[t] = prof->tx_ring_num[t]; 3301 if (!priv->tx_ring_num[t]) 3302 continue; 3303 3304 priv->tx_ring[t] = kcalloc(MAX_TX_RINGS, 3305 sizeof(struct mlx4_en_tx_ring *), 3306 GFP_KERNEL); 3307 if (!priv->tx_ring[t]) { 3308 err = -ENOMEM; 3309 goto out; 3310 } 3311 priv->tx_cq[t] = kcalloc(MAX_TX_RINGS, 3312 sizeof(struct mlx4_en_cq *), 3313 GFP_KERNEL); 3314 if (!priv->tx_cq[t]) { 3315 err = -ENOMEM; 3316 goto out; 3317 } 3318 } 3319 priv->rx_ring_num = prof->rx_ring_num; 3320 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0; 3321 priv->cqe_size = mdev->dev->caps.cqe_size; 3322 priv->mac_index = -1; 3323 priv->msg_enable = MLX4_EN_MSG_LEVEL; 3324 #ifdef CONFIG_MLX4_EN_DCB 3325 if (!mlx4_is_slave(priv->mdev->dev)) { 3326 u8 prio; 3327 3328 for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) { 3329 priv->ets.prio_tc[prio] = prio; 3330 priv->ets.tc_tsa[prio] = IEEE_8021QAZ_TSA_VENDOR; 3331 } 3332 3333 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST | 3334 DCB_CAP_DCBX_VER_IEEE; 3335 priv->flags |= MLX4_EN_DCB_ENABLED; 3336 priv->cee_config.pfc_state = false; 3337 3338 for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++) 3339 priv->cee_config.dcb_pfc[i] = pfc_disabled; 3340 3341 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) { 3342 dev->dcbnl_ops = &mlx4_en_dcbnl_ops; 3343 } else { 3344 en_info(priv, "enabling only PFC DCB ops\n"); 3345 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops; 3346 } 3347 } 3348 #endif 3349 3350 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) 3351 INIT_HLIST_HEAD(&priv->mac_hash[i]); 3352 3353 /* Query for default mac and max mtu */ 3354 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; 3355 3356 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] & 3357 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP) 3358 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP; 3359 3360 /* Set default MAC */ 3361 dev->addr_len = ETH_ALEN; 3362 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]); 3363 if (!is_valid_ether_addr(dev->dev_addr)) { 3364 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n", 3365 priv->port, dev->dev_addr); 3366 err = -EINVAL; 3367 goto out; 3368 } else if (mlx4_is_slave(priv->mdev->dev) && 3369 (priv->mdev->dev->port_random_macs & 1 << priv->port)) { 3370 /* Random MAC was assigned in mlx4_slave_cap 3371 * in mlx4_core module 3372 */ 3373 dev->addr_assign_type |= NET_ADDR_RANDOM; 3374 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr); 3375 } 3376 3377 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac)); 3378 3379 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 3380 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 3381 err = mlx4_en_alloc_resources(priv); 3382 if (err) 3383 goto out; 3384 3385 /* Initialize time stamping config */ 3386 priv->hwtstamp_config.flags = 0; 3387 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF; 3388 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; 3389 3390 /* Allocate page for receive rings */ 3391 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, 3392 MLX4_EN_PAGE_SIZE); 3393 if (err) { 3394 en_err(priv, "Failed to allocate page for rx qps\n"); 3395 goto out; 3396 } 3397 priv->allocated = 1; 3398 3399 /* 3400 * Initialize netdev entry points 3401 */ 3402 if (mlx4_is_master(priv->mdev->dev)) 3403 dev->netdev_ops = &mlx4_netdev_ops_master; 3404 else 3405 dev->netdev_ops = &mlx4_netdev_ops; 3406 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; 3407 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 3408 netif_set_real_num_rx_queues(dev, priv->rx_ring_num); 3409 3410 dev->ethtool_ops = &mlx4_en_ethtool_ops; 3411 3412 /* 3413 * Set driver features 3414 */ 3415 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 3416 if (mdev->LSO_support) 3417 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6; 3418 3419 dev->vlan_features = dev->hw_features; 3420 3421 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH; 3422 dev->features = dev->hw_features | NETIF_F_HIGHDMA | 3423 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 3424 NETIF_F_HW_VLAN_CTAG_FILTER; 3425 dev->hw_features |= NETIF_F_LOOPBACK | 3426 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 3427 3428 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) { 3429 dev->features |= NETIF_F_HW_VLAN_STAG_RX | 3430 NETIF_F_HW_VLAN_STAG_FILTER; 3431 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX; 3432 } 3433 3434 if (mlx4_is_slave(mdev->dev)) { 3435 bool vlan_offload_disabled; 3436 int phv; 3437 3438 err = get_phv_bit(mdev->dev, port, &phv); 3439 if (!err && phv) { 3440 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3441 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV; 3442 } 3443 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port, 3444 &vlan_offload_disabled); 3445 if (!err && vlan_offload_disabled) { 3446 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3447 NETIF_F_HW_VLAN_CTAG_RX | 3448 NETIF_F_HW_VLAN_STAG_TX | 3449 NETIF_F_HW_VLAN_STAG_RX); 3450 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3451 NETIF_F_HW_VLAN_CTAG_RX | 3452 NETIF_F_HW_VLAN_STAG_TX | 3453 NETIF_F_HW_VLAN_STAG_RX); 3454 } 3455 } else { 3456 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN && 3457 !(mdev->dev->caps.flags2 & 3458 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 3459 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3460 } 3461 3462 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) 3463 dev->hw_features |= NETIF_F_RXFCS; 3464 3465 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS) 3466 dev->hw_features |= NETIF_F_RXALL; 3467 3468 if (mdev->dev->caps.steering_mode == 3469 MLX4_STEERING_MODE_DEVICE_MANAGED && 3470 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC) 3471 dev->hw_features |= NETIF_F_NTUPLE; 3472 3473 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 3474 dev->priv_flags |= IFF_UNICAST_FLT; 3475 3476 /* Setting a default hash function value */ 3477 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) { 3478 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3479 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) { 3480 priv->rss_hash_fn = ETH_RSS_HASH_XOR; 3481 } else { 3482 en_warn(priv, 3483 "No RSS hash capabilities exposed, using Toeplitz\n"); 3484 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3485 } 3486 3487 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3488 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | 3489 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3490 NETIF_F_GSO_PARTIAL; 3491 dev->features |= NETIF_F_GSO_UDP_TUNNEL | 3492 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3493 NETIF_F_GSO_PARTIAL; 3494 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM; 3495 } 3496 3497 /* MTU range: 46 - hw-specific max */ 3498 dev->min_mtu = MLX4_EN_MIN_MTU; 3499 dev->max_mtu = priv->max_mtu; 3500 3501 mdev->pndev[port] = dev; 3502 mdev->upper[port] = NULL; 3503 3504 netif_carrier_off(dev); 3505 mlx4_en_set_default_moderation(priv); 3506 3507 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]); 3508 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num); 3509 3510 mlx4_en_update_loopback_state(priv->dev, priv->dev->features); 3511 3512 /* Configure port */ 3513 mlx4_en_calc_rx_buf(dev); 3514 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 3515 priv->rx_skb_size + ETH_FCS_LEN, 3516 prof->tx_pause, prof->tx_ppp, 3517 prof->rx_pause, prof->rx_ppp); 3518 if (err) { 3519 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 3520 priv->port, err); 3521 goto out; 3522 } 3523 3524 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3525 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 3526 if (err) { 3527 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 3528 err); 3529 goto out; 3530 } 3531 } 3532 3533 /* Init port */ 3534 en_warn(priv, "Initializing port\n"); 3535 err = mlx4_INIT_PORT(mdev->dev, priv->port); 3536 if (err) { 3537 en_err(priv, "Failed Initializing port\n"); 3538 goto out; 3539 } 3540 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 3541 3542 /* Initialize time stamp mechanism */ 3543 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 3544 mlx4_en_init_timestamp(mdev); 3545 3546 queue_delayed_work(mdev->workqueue, &priv->service_task, 3547 SERVICE_TASK_DELAY); 3548 3549 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap, 3550 mdev->profile.prof[priv->port].rx_ppp, 3551 mdev->profile.prof[priv->port].rx_pause, 3552 mdev->profile.prof[priv->port].tx_ppp, 3553 mdev->profile.prof[priv->port].tx_pause); 3554 3555 err = register_netdev(dev); 3556 if (err) { 3557 en_err(priv, "Netdev registration failed for port %d\n", port); 3558 goto out; 3559 } 3560 3561 priv->registered = 1; 3562 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port), 3563 dev); 3564 3565 return 0; 3566 3567 out: 3568 mlx4_en_destroy_netdev(dev); 3569 return err; 3570 } 3571 3572 int mlx4_en_reset_config(struct net_device *dev, 3573 struct hwtstamp_config ts_config, 3574 netdev_features_t features) 3575 { 3576 struct mlx4_en_priv *priv = netdev_priv(dev); 3577 struct mlx4_en_dev *mdev = priv->mdev; 3578 struct mlx4_en_port_profile new_prof; 3579 struct mlx4_en_priv *tmp; 3580 int port_up = 0; 3581 int err = 0; 3582 3583 if (priv->hwtstamp_config.tx_type == ts_config.tx_type && 3584 priv->hwtstamp_config.rx_filter == ts_config.rx_filter && 3585 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3586 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) 3587 return 0; /* Nothing to change */ 3588 3589 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3590 (features & NETIF_F_HW_VLAN_CTAG_RX) && 3591 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) { 3592 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n"); 3593 return -EINVAL; 3594 } 3595 3596 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 3597 if (!tmp) 3598 return -ENOMEM; 3599 3600 mutex_lock(&mdev->state_lock); 3601 3602 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 3603 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config)); 3604 3605 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true); 3606 if (err) 3607 goto out; 3608 3609 if (priv->port_up) { 3610 port_up = 1; 3611 mlx4_en_stop_port(dev, 1); 3612 } 3613 3614 mlx4_en_safe_replace_resources(priv, tmp); 3615 3616 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 3617 if (features & NETIF_F_HW_VLAN_CTAG_RX) 3618 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3619 else 3620 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3621 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) { 3622 /* RX time-stamping is OFF, update the RX vlan offload 3623 * to the latest wanted state 3624 */ 3625 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX) 3626 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3627 else 3628 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3629 } 3630 3631 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) { 3632 if (features & NETIF_F_RXFCS) 3633 dev->features |= NETIF_F_RXFCS; 3634 else 3635 dev->features &= ~NETIF_F_RXFCS; 3636 } 3637 3638 /* RX vlan offload and RX time-stamping can't co-exist ! 3639 * Regardless of the caller's choice, 3640 * Turn Off RX vlan offload in case of time-stamping is ON 3641 */ 3642 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) { 3643 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX) 3644 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n"); 3645 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3646 } 3647 3648 if (port_up) { 3649 err = mlx4_en_start_port(dev); 3650 if (err) 3651 en_err(priv, "Failed starting port\n"); 3652 } 3653 3654 out: 3655 mutex_unlock(&mdev->state_lock); 3656 kfree(tmp); 3657 if (!err) 3658 netdev_features_change(dev); 3659 return err; 3660 } 3661