1 /* 2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 * 32 */ 33 34 #include <linux/bpf.h> 35 #include <linux/etherdevice.h> 36 #include <linux/tcp.h> 37 #include <linux/if_vlan.h> 38 #include <linux/delay.h> 39 #include <linux/slab.h> 40 #include <linux/hash.h> 41 #include <net/ip.h> 42 #include <net/busy_poll.h> 43 #include <net/vxlan.h> 44 #include <net/devlink.h> 45 46 #include <linux/mlx4/driver.h> 47 #include <linux/mlx4/device.h> 48 #include <linux/mlx4/cmd.h> 49 #include <linux/mlx4/cq.h> 50 51 #include "mlx4_en.h" 52 #include "en_port.h" 53 54 #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \ 55 XDP_PACKET_HEADROOM)) 56 57 int mlx4_en_setup_tc(struct net_device *dev, u8 up) 58 { 59 struct mlx4_en_priv *priv = netdev_priv(dev); 60 int i; 61 unsigned int offset = 0; 62 63 if (up && up != MLX4_EN_NUM_UP_HIGH) 64 return -EINVAL; 65 66 netdev_set_num_tc(dev, up); 67 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 68 /* Partition Tx queues evenly amongst UP's */ 69 for (i = 0; i < up; i++) { 70 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset); 71 offset += priv->num_tx_rings_p_up; 72 } 73 74 #ifdef CONFIG_MLX4_EN_DCB 75 if (!mlx4_is_slave(priv->mdev->dev)) { 76 if (up) { 77 if (priv->dcbx_cap) 78 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED; 79 } else { 80 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED; 81 priv->cee_config.pfc_state = false; 82 } 83 } 84 #endif /* CONFIG_MLX4_EN_DCB */ 85 86 return 0; 87 } 88 89 int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc) 90 { 91 struct mlx4_en_priv *priv = netdev_priv(dev); 92 struct mlx4_en_dev *mdev = priv->mdev; 93 struct mlx4_en_port_profile new_prof; 94 struct mlx4_en_priv *tmp; 95 int port_up = 0; 96 int err = 0; 97 98 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 99 if (!tmp) 100 return -ENOMEM; 101 102 mutex_lock(&mdev->state_lock); 103 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 104 new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW : 105 MLX4_EN_NUM_UP_HIGH; 106 new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up * 107 new_prof.num_up; 108 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true); 109 if (err) 110 goto out; 111 112 if (priv->port_up) { 113 port_up = 1; 114 mlx4_en_stop_port(dev, 1); 115 } 116 117 mlx4_en_safe_replace_resources(priv, tmp); 118 if (port_up) { 119 err = mlx4_en_start_port(dev); 120 if (err) { 121 en_err(priv, "Failed starting port for setup TC\n"); 122 goto out; 123 } 124 } 125 126 err = mlx4_en_setup_tc(dev, tc); 127 out: 128 mutex_unlock(&mdev->state_lock); 129 kfree(tmp); 130 return err; 131 } 132 133 static int __mlx4_en_setup_tc(struct net_device *dev, u32 handle, 134 u32 chain_index, __be16 proto, 135 struct tc_to_netdev *tc) 136 { 137 if (tc->type != TC_SETUP_MQPRIO) 138 return -EINVAL; 139 140 if (tc->mqprio->num_tc && tc->mqprio->num_tc != MLX4_EN_NUM_UP_HIGH) 141 return -EINVAL; 142 143 tc->mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 144 145 return mlx4_en_alloc_tx_queue_per_tc(dev, tc->mqprio->num_tc); 146 } 147 148 #ifdef CONFIG_RFS_ACCEL 149 150 struct mlx4_en_filter { 151 struct list_head next; 152 struct work_struct work; 153 154 u8 ip_proto; 155 __be32 src_ip; 156 __be32 dst_ip; 157 __be16 src_port; 158 __be16 dst_port; 159 160 int rxq_index; 161 struct mlx4_en_priv *priv; 162 u32 flow_id; /* RFS infrastructure id */ 163 int id; /* mlx4_en driver id */ 164 u64 reg_id; /* Flow steering API id */ 165 u8 activated; /* Used to prevent expiry before filter 166 * is attached 167 */ 168 struct hlist_node filter_chain; 169 }; 170 171 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv); 172 173 static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto) 174 { 175 switch (ip_proto) { 176 case IPPROTO_UDP: 177 return MLX4_NET_TRANS_RULE_ID_UDP; 178 case IPPROTO_TCP: 179 return MLX4_NET_TRANS_RULE_ID_TCP; 180 default: 181 return MLX4_NET_TRANS_RULE_NUM; 182 } 183 }; 184 185 /* Must not acquire state_lock, as its corresponding work_sync 186 * is done under it. 187 */ 188 static void mlx4_en_filter_work(struct work_struct *work) 189 { 190 struct mlx4_en_filter *filter = container_of(work, 191 struct mlx4_en_filter, 192 work); 193 struct mlx4_en_priv *priv = filter->priv; 194 struct mlx4_spec_list spec_tcp_udp = { 195 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto), 196 { 197 .tcp_udp = { 198 .dst_port = filter->dst_port, 199 .dst_port_msk = (__force __be16)-1, 200 .src_port = filter->src_port, 201 .src_port_msk = (__force __be16)-1, 202 }, 203 }, 204 }; 205 struct mlx4_spec_list spec_ip = { 206 .id = MLX4_NET_TRANS_RULE_ID_IPV4, 207 { 208 .ipv4 = { 209 .dst_ip = filter->dst_ip, 210 .dst_ip_msk = (__force __be32)-1, 211 .src_ip = filter->src_ip, 212 .src_ip_msk = (__force __be32)-1, 213 }, 214 }, 215 }; 216 struct mlx4_spec_list spec_eth = { 217 .id = MLX4_NET_TRANS_RULE_ID_ETH, 218 }; 219 struct mlx4_net_trans_rule rule = { 220 .list = LIST_HEAD_INIT(rule.list), 221 .queue_mode = MLX4_NET_TRANS_Q_LIFO, 222 .exclusive = 1, 223 .allow_loopback = 1, 224 .promisc_mode = MLX4_FS_REGULAR, 225 .port = priv->port, 226 .priority = MLX4_DOMAIN_RFS, 227 }; 228 int rc; 229 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 230 231 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) { 232 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n", 233 filter->ip_proto); 234 goto ignore; 235 } 236 list_add_tail(&spec_eth.list, &rule.list); 237 list_add_tail(&spec_ip.list, &rule.list); 238 list_add_tail(&spec_tcp_udp.list, &rule.list); 239 240 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn; 241 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN); 242 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 243 244 filter->activated = 0; 245 246 if (filter->reg_id) { 247 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 248 if (rc && rc != -ENOENT) 249 en_err(priv, "Error detaching flow. rc = %d\n", rc); 250 } 251 252 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); 253 if (rc) 254 en_err(priv, "Error attaching flow. err = %d\n", rc); 255 256 ignore: 257 mlx4_en_filter_rfs_expire(priv); 258 259 filter->activated = 1; 260 } 261 262 static inline struct hlist_head * 263 filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 264 __be16 src_port, __be16 dst_port) 265 { 266 unsigned long l; 267 int bucket_idx; 268 269 l = (__force unsigned long)src_port | 270 ((__force unsigned long)dst_port << 2); 271 l ^= (__force unsigned long)(src_ip ^ dst_ip); 272 273 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT); 274 275 return &priv->filter_hash[bucket_idx]; 276 } 277 278 static struct mlx4_en_filter * 279 mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip, 280 __be32 dst_ip, u8 ip_proto, __be16 src_port, 281 __be16 dst_port, u32 flow_id) 282 { 283 struct mlx4_en_filter *filter = NULL; 284 285 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC); 286 if (!filter) 287 return NULL; 288 289 filter->priv = priv; 290 filter->rxq_index = rxq_index; 291 INIT_WORK(&filter->work, mlx4_en_filter_work); 292 293 filter->src_ip = src_ip; 294 filter->dst_ip = dst_ip; 295 filter->ip_proto = ip_proto; 296 filter->src_port = src_port; 297 filter->dst_port = dst_port; 298 299 filter->flow_id = flow_id; 300 301 filter->id = priv->last_filter_id++ % RPS_NO_FILTER; 302 303 list_add_tail(&filter->next, &priv->filters); 304 hlist_add_head(&filter->filter_chain, 305 filter_hash_bucket(priv, src_ip, dst_ip, src_port, 306 dst_port)); 307 308 return filter; 309 } 310 311 static void mlx4_en_filter_free(struct mlx4_en_filter *filter) 312 { 313 struct mlx4_en_priv *priv = filter->priv; 314 int rc; 315 316 list_del(&filter->next); 317 318 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 319 if (rc && rc != -ENOENT) 320 en_err(priv, "Error detaching flow. rc = %d\n", rc); 321 322 kfree(filter); 323 } 324 325 static inline struct mlx4_en_filter * 326 mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 327 u8 ip_proto, __be16 src_port, __be16 dst_port) 328 { 329 struct mlx4_en_filter *filter; 330 struct mlx4_en_filter *ret = NULL; 331 332 hlist_for_each_entry(filter, 333 filter_hash_bucket(priv, src_ip, dst_ip, 334 src_port, dst_port), 335 filter_chain) { 336 if (filter->src_ip == src_ip && 337 filter->dst_ip == dst_ip && 338 filter->ip_proto == ip_proto && 339 filter->src_port == src_port && 340 filter->dst_port == dst_port) { 341 ret = filter; 342 break; 343 } 344 } 345 346 return ret; 347 } 348 349 static int 350 mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, 351 u16 rxq_index, u32 flow_id) 352 { 353 struct mlx4_en_priv *priv = netdev_priv(net_dev); 354 struct mlx4_en_filter *filter; 355 const struct iphdr *ip; 356 const __be16 *ports; 357 u8 ip_proto; 358 __be32 src_ip; 359 __be32 dst_ip; 360 __be16 src_port; 361 __be16 dst_port; 362 int nhoff = skb_network_offset(skb); 363 int ret = 0; 364 365 if (skb->protocol != htons(ETH_P_IP)) 366 return -EPROTONOSUPPORT; 367 368 ip = (const struct iphdr *)(skb->data + nhoff); 369 if (ip_is_fragment(ip)) 370 return -EPROTONOSUPPORT; 371 372 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP)) 373 return -EPROTONOSUPPORT; 374 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl); 375 376 ip_proto = ip->protocol; 377 src_ip = ip->saddr; 378 dst_ip = ip->daddr; 379 src_port = ports[0]; 380 dst_port = ports[1]; 381 382 spin_lock_bh(&priv->filters_lock); 383 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto, 384 src_port, dst_port); 385 if (filter) { 386 if (filter->rxq_index == rxq_index) 387 goto out; 388 389 filter->rxq_index = rxq_index; 390 } else { 391 filter = mlx4_en_filter_alloc(priv, rxq_index, 392 src_ip, dst_ip, ip_proto, 393 src_port, dst_port, flow_id); 394 if (!filter) { 395 ret = -ENOMEM; 396 goto err; 397 } 398 } 399 400 queue_work(priv->mdev->workqueue, &filter->work); 401 402 out: 403 ret = filter->id; 404 err: 405 spin_unlock_bh(&priv->filters_lock); 406 407 return ret; 408 } 409 410 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv) 411 { 412 struct mlx4_en_filter *filter, *tmp; 413 LIST_HEAD(del_list); 414 415 spin_lock_bh(&priv->filters_lock); 416 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 417 list_move(&filter->next, &del_list); 418 hlist_del(&filter->filter_chain); 419 } 420 spin_unlock_bh(&priv->filters_lock); 421 422 list_for_each_entry_safe(filter, tmp, &del_list, next) { 423 cancel_work_sync(&filter->work); 424 mlx4_en_filter_free(filter); 425 } 426 } 427 428 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv) 429 { 430 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL; 431 LIST_HEAD(del_list); 432 int i = 0; 433 434 spin_lock_bh(&priv->filters_lock); 435 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 436 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA) 437 break; 438 439 if (filter->activated && 440 !work_pending(&filter->work) && 441 rps_may_expire_flow(priv->dev, 442 filter->rxq_index, filter->flow_id, 443 filter->id)) { 444 list_move(&filter->next, &del_list); 445 hlist_del(&filter->filter_chain); 446 } else 447 last_filter = filter; 448 449 i++; 450 } 451 452 if (last_filter && (&last_filter->next != priv->filters.next)) 453 list_move(&priv->filters, &last_filter->next); 454 455 spin_unlock_bh(&priv->filters_lock); 456 457 list_for_each_entry_safe(filter, tmp, &del_list, next) 458 mlx4_en_filter_free(filter); 459 } 460 #endif 461 462 static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, 463 __be16 proto, u16 vid) 464 { 465 struct mlx4_en_priv *priv = netdev_priv(dev); 466 struct mlx4_en_dev *mdev = priv->mdev; 467 int err; 468 int idx; 469 470 en_dbg(HW, priv, "adding VLAN:%d\n", vid); 471 472 set_bit(vid, priv->active_vlans); 473 474 /* Add VID to port VLAN filter */ 475 mutex_lock(&mdev->state_lock); 476 if (mdev->device_up && priv->port_up) { 477 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 478 if (err) { 479 en_err(priv, "Failed configuring VLAN filter\n"); 480 goto out; 481 } 482 } 483 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx); 484 if (err) 485 en_dbg(HW, priv, "Failed adding vlan %d\n", vid); 486 487 out: 488 mutex_unlock(&mdev->state_lock); 489 return err; 490 } 491 492 static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, 493 __be16 proto, u16 vid) 494 { 495 struct mlx4_en_priv *priv = netdev_priv(dev); 496 struct mlx4_en_dev *mdev = priv->mdev; 497 int err = 0; 498 499 en_dbg(HW, priv, "Killing VID:%d\n", vid); 500 501 clear_bit(vid, priv->active_vlans); 502 503 /* Remove VID from port VLAN filter */ 504 mutex_lock(&mdev->state_lock); 505 mlx4_unregister_vlan(mdev->dev, priv->port, vid); 506 507 if (mdev->device_up && priv->port_up) { 508 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 509 if (err) 510 en_err(priv, "Failed configuring VLAN filter\n"); 511 } 512 mutex_unlock(&mdev->state_lock); 513 514 return err; 515 } 516 517 static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac) 518 { 519 int i; 520 for (i = ETH_ALEN - 1; i >= 0; --i) { 521 dst_mac[i] = src_mac & 0xff; 522 src_mac >>= 8; 523 } 524 memset(&dst_mac[ETH_ALEN], 0, 2); 525 } 526 527 528 static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr, 529 int qpn, u64 *reg_id) 530 { 531 int err; 532 533 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 534 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 535 return 0; /* do nothing */ 536 537 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn, 538 MLX4_DOMAIN_NIC, reg_id); 539 if (err) { 540 en_err(priv, "failed to add vxlan steering rule, err %d\n", err); 541 return err; 542 } 543 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id); 544 return 0; 545 } 546 547 548 static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv, 549 unsigned char *mac, int *qpn, u64 *reg_id) 550 { 551 struct mlx4_en_dev *mdev = priv->mdev; 552 struct mlx4_dev *dev = mdev->dev; 553 int err; 554 555 switch (dev->caps.steering_mode) { 556 case MLX4_STEERING_MODE_B0: { 557 struct mlx4_qp qp; 558 u8 gid[16] = {0}; 559 560 qp.qpn = *qpn; 561 memcpy(&gid[10], mac, ETH_ALEN); 562 gid[5] = priv->port; 563 564 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH); 565 break; 566 } 567 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 568 struct mlx4_spec_list spec_eth = { {NULL} }; 569 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 570 571 struct mlx4_net_trans_rule rule = { 572 .queue_mode = MLX4_NET_TRANS_Q_FIFO, 573 .exclusive = 0, 574 .allow_loopback = 1, 575 .promisc_mode = MLX4_FS_REGULAR, 576 .priority = MLX4_DOMAIN_NIC, 577 }; 578 579 rule.port = priv->port; 580 rule.qpn = *qpn; 581 INIT_LIST_HEAD(&rule.list); 582 583 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH; 584 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN); 585 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 586 list_add_tail(&spec_eth.list, &rule.list); 587 588 err = mlx4_flow_attach(dev, &rule, reg_id); 589 break; 590 } 591 default: 592 return -EINVAL; 593 } 594 if (err) 595 en_warn(priv, "Failed Attaching Unicast\n"); 596 597 return err; 598 } 599 600 static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv, 601 unsigned char *mac, int qpn, u64 reg_id) 602 { 603 struct mlx4_en_dev *mdev = priv->mdev; 604 struct mlx4_dev *dev = mdev->dev; 605 606 switch (dev->caps.steering_mode) { 607 case MLX4_STEERING_MODE_B0: { 608 struct mlx4_qp qp; 609 u8 gid[16] = {0}; 610 611 qp.qpn = qpn; 612 memcpy(&gid[10], mac, ETH_ALEN); 613 gid[5] = priv->port; 614 615 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH); 616 break; 617 } 618 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 619 mlx4_flow_detach(dev, reg_id); 620 break; 621 } 622 default: 623 en_err(priv, "Invalid steering mode.\n"); 624 } 625 } 626 627 static int mlx4_en_get_qp(struct mlx4_en_priv *priv) 628 { 629 struct mlx4_en_dev *mdev = priv->mdev; 630 struct mlx4_dev *dev = mdev->dev; 631 int index = 0; 632 int err = 0; 633 int *qpn = &priv->base_qpn; 634 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr); 635 636 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n", 637 priv->dev->dev_addr); 638 index = mlx4_register_mac(dev, priv->port, mac); 639 if (index < 0) { 640 err = index; 641 en_err(priv, "Failed adding MAC: %pM\n", 642 priv->dev->dev_addr); 643 return err; 644 } 645 646 en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode); 647 648 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 649 int base_qpn = mlx4_get_base_qpn(dev, priv->port); 650 *qpn = base_qpn + index; 651 return 0; 652 } 653 654 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP); 655 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn); 656 if (err) { 657 en_err(priv, "Failed to reserve qp for mac registration\n"); 658 mlx4_unregister_mac(dev, priv->port, mac); 659 return err; 660 } 661 662 return 0; 663 } 664 665 static void mlx4_en_put_qp(struct mlx4_en_priv *priv) 666 { 667 struct mlx4_en_dev *mdev = priv->mdev; 668 struct mlx4_dev *dev = mdev->dev; 669 int qpn = priv->base_qpn; 670 671 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 672 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr); 673 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", 674 priv->dev->dev_addr); 675 mlx4_unregister_mac(dev, priv->port, mac); 676 } else { 677 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n", 678 priv->port, qpn); 679 mlx4_qp_release_range(dev, qpn, 1); 680 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 681 } 682 } 683 684 static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn, 685 unsigned char *new_mac, unsigned char *prev_mac) 686 { 687 struct mlx4_en_dev *mdev = priv->mdev; 688 struct mlx4_dev *dev = mdev->dev; 689 int err = 0; 690 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac); 691 692 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { 693 struct hlist_head *bucket; 694 unsigned int mac_hash; 695 struct mlx4_mac_entry *entry; 696 struct hlist_node *tmp; 697 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac); 698 699 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]]; 700 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 701 if (ether_addr_equal_64bits(entry->mac, prev_mac)) { 702 mlx4_en_uc_steer_release(priv, entry->mac, 703 qpn, entry->reg_id); 704 mlx4_unregister_mac(dev, priv->port, 705 prev_mac_u64); 706 hlist_del_rcu(&entry->hlist); 707 synchronize_rcu(); 708 memcpy(entry->mac, new_mac, ETH_ALEN); 709 entry->reg_id = 0; 710 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX]; 711 hlist_add_head_rcu(&entry->hlist, 712 &priv->mac_hash[mac_hash]); 713 mlx4_register_mac(dev, priv->port, new_mac_u64); 714 err = mlx4_en_uc_steer_add(priv, new_mac, 715 &qpn, 716 &entry->reg_id); 717 if (err) 718 return err; 719 if (priv->tunnel_reg_id) { 720 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 721 priv->tunnel_reg_id = 0; 722 } 723 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn, 724 &priv->tunnel_reg_id); 725 return err; 726 } 727 } 728 return -EINVAL; 729 } 730 731 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64); 732 } 733 734 static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv, 735 unsigned char new_mac[ETH_ALEN + 2]) 736 { 737 int err = 0; 738 739 if (priv->port_up) { 740 /* Remove old MAC and insert the new one */ 741 err = mlx4_en_replace_mac(priv, priv->base_qpn, 742 new_mac, priv->current_mac); 743 if (err) 744 en_err(priv, "Failed changing HW MAC address\n"); 745 } else 746 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n"); 747 748 if (!err) 749 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac)); 750 751 return err; 752 } 753 754 static int mlx4_en_set_mac(struct net_device *dev, void *addr) 755 { 756 struct mlx4_en_priv *priv = netdev_priv(dev); 757 struct mlx4_en_dev *mdev = priv->mdev; 758 struct sockaddr *saddr = addr; 759 unsigned char new_mac[ETH_ALEN + 2]; 760 int err; 761 762 if (!is_valid_ether_addr(saddr->sa_data)) 763 return -EADDRNOTAVAIL; 764 765 mutex_lock(&mdev->state_lock); 766 memcpy(new_mac, saddr->sa_data, ETH_ALEN); 767 err = mlx4_en_do_set_mac(priv, new_mac); 768 if (!err) 769 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); 770 mutex_unlock(&mdev->state_lock); 771 772 return err; 773 } 774 775 static void mlx4_en_clear_list(struct net_device *dev) 776 { 777 struct mlx4_en_priv *priv = netdev_priv(dev); 778 struct mlx4_en_mc_list *tmp, *mc_to_del; 779 780 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) { 781 list_del(&mc_to_del->list); 782 kfree(mc_to_del); 783 } 784 } 785 786 static void mlx4_en_cache_mclist(struct net_device *dev) 787 { 788 struct mlx4_en_priv *priv = netdev_priv(dev); 789 struct netdev_hw_addr *ha; 790 struct mlx4_en_mc_list *tmp; 791 792 mlx4_en_clear_list(dev); 793 netdev_for_each_mc_addr(ha, dev) { 794 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC); 795 if (!tmp) { 796 mlx4_en_clear_list(dev); 797 return; 798 } 799 memcpy(tmp->addr, ha->addr, ETH_ALEN); 800 list_add_tail(&tmp->list, &priv->mc_list); 801 } 802 } 803 804 static void update_mclist_flags(struct mlx4_en_priv *priv, 805 struct list_head *dst, 806 struct list_head *src) 807 { 808 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc; 809 bool found; 810 811 /* Find all the entries that should be removed from dst, 812 * These are the entries that are not found in src 813 */ 814 list_for_each_entry(dst_tmp, dst, list) { 815 found = false; 816 list_for_each_entry(src_tmp, src, list) { 817 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 818 found = true; 819 break; 820 } 821 } 822 if (!found) 823 dst_tmp->action = MCLIST_REM; 824 } 825 826 /* Add entries that exist in src but not in dst 827 * mark them as need to add 828 */ 829 list_for_each_entry(src_tmp, src, list) { 830 found = false; 831 list_for_each_entry(dst_tmp, dst, list) { 832 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 833 dst_tmp->action = MCLIST_NONE; 834 found = true; 835 break; 836 } 837 } 838 if (!found) { 839 new_mc = kmemdup(src_tmp, 840 sizeof(struct mlx4_en_mc_list), 841 GFP_KERNEL); 842 if (!new_mc) 843 return; 844 845 new_mc->action = MCLIST_ADD; 846 list_add_tail(&new_mc->list, dst); 847 } 848 } 849 } 850 851 static void mlx4_en_set_rx_mode(struct net_device *dev) 852 { 853 struct mlx4_en_priv *priv = netdev_priv(dev); 854 855 if (!priv->port_up) 856 return; 857 858 queue_work(priv->mdev->workqueue, &priv->rx_mode_task); 859 } 860 861 static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv, 862 struct mlx4_en_dev *mdev) 863 { 864 int err = 0; 865 866 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { 867 if (netif_msg_rx_status(priv)) 868 en_warn(priv, "Entering promiscuous mode\n"); 869 priv->flags |= MLX4_EN_FLAG_PROMISC; 870 871 /* Enable promiscouos mode */ 872 switch (mdev->dev->caps.steering_mode) { 873 case MLX4_STEERING_MODE_DEVICE_MANAGED: 874 err = mlx4_flow_steer_promisc_add(mdev->dev, 875 priv->port, 876 priv->base_qpn, 877 MLX4_FS_ALL_DEFAULT); 878 if (err) 879 en_err(priv, "Failed enabling promiscuous mode\n"); 880 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 881 break; 882 883 case MLX4_STEERING_MODE_B0: 884 err = mlx4_unicast_promisc_add(mdev->dev, 885 priv->base_qpn, 886 priv->port); 887 if (err) 888 en_err(priv, "Failed enabling unicast promiscuous mode\n"); 889 890 /* Add the default qp number as multicast 891 * promisc 892 */ 893 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 894 err = mlx4_multicast_promisc_add(mdev->dev, 895 priv->base_qpn, 896 priv->port); 897 if (err) 898 en_err(priv, "Failed enabling multicast promiscuous mode\n"); 899 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 900 } 901 break; 902 903 case MLX4_STEERING_MODE_A0: 904 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 905 priv->port, 906 priv->base_qpn, 907 1); 908 if (err) 909 en_err(priv, "Failed enabling promiscuous mode\n"); 910 break; 911 } 912 913 /* Disable port multicast filter (unconditionally) */ 914 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 915 0, MLX4_MCAST_DISABLE); 916 if (err) 917 en_err(priv, "Failed disabling multicast filter\n"); 918 } 919 } 920 921 static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv, 922 struct mlx4_en_dev *mdev) 923 { 924 int err = 0; 925 926 if (netif_msg_rx_status(priv)) 927 en_warn(priv, "Leaving promiscuous mode\n"); 928 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 929 930 /* Disable promiscouos mode */ 931 switch (mdev->dev->caps.steering_mode) { 932 case MLX4_STEERING_MODE_DEVICE_MANAGED: 933 err = mlx4_flow_steer_promisc_remove(mdev->dev, 934 priv->port, 935 MLX4_FS_ALL_DEFAULT); 936 if (err) 937 en_err(priv, "Failed disabling promiscuous mode\n"); 938 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 939 break; 940 941 case MLX4_STEERING_MODE_B0: 942 err = mlx4_unicast_promisc_remove(mdev->dev, 943 priv->base_qpn, 944 priv->port); 945 if (err) 946 en_err(priv, "Failed disabling unicast promiscuous mode\n"); 947 /* Disable Multicast promisc */ 948 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 949 err = mlx4_multicast_promisc_remove(mdev->dev, 950 priv->base_qpn, 951 priv->port); 952 if (err) 953 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 954 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 955 } 956 break; 957 958 case MLX4_STEERING_MODE_A0: 959 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 960 priv->port, 961 priv->base_qpn, 0); 962 if (err) 963 en_err(priv, "Failed disabling promiscuous mode\n"); 964 break; 965 } 966 } 967 968 static void mlx4_en_do_multicast(struct mlx4_en_priv *priv, 969 struct net_device *dev, 970 struct mlx4_en_dev *mdev) 971 { 972 struct mlx4_en_mc_list *mclist, *tmp; 973 u64 mcast_addr = 0; 974 u8 mc_list[16] = {0}; 975 int err = 0; 976 977 /* Enable/disable the multicast filter according to IFF_ALLMULTI */ 978 if (dev->flags & IFF_ALLMULTI) { 979 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 980 0, MLX4_MCAST_DISABLE); 981 if (err) 982 en_err(priv, "Failed disabling multicast filter\n"); 983 984 /* Add the default qp number as multicast promisc */ 985 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 986 switch (mdev->dev->caps.steering_mode) { 987 case MLX4_STEERING_MODE_DEVICE_MANAGED: 988 err = mlx4_flow_steer_promisc_add(mdev->dev, 989 priv->port, 990 priv->base_qpn, 991 MLX4_FS_MC_DEFAULT); 992 break; 993 994 case MLX4_STEERING_MODE_B0: 995 err = mlx4_multicast_promisc_add(mdev->dev, 996 priv->base_qpn, 997 priv->port); 998 break; 999 1000 case MLX4_STEERING_MODE_A0: 1001 break; 1002 } 1003 if (err) 1004 en_err(priv, "Failed entering multicast promisc mode\n"); 1005 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 1006 } 1007 } else { 1008 /* Disable Multicast promisc */ 1009 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1010 switch (mdev->dev->caps.steering_mode) { 1011 case MLX4_STEERING_MODE_DEVICE_MANAGED: 1012 err = mlx4_flow_steer_promisc_remove(mdev->dev, 1013 priv->port, 1014 MLX4_FS_MC_DEFAULT); 1015 break; 1016 1017 case MLX4_STEERING_MODE_B0: 1018 err = mlx4_multicast_promisc_remove(mdev->dev, 1019 priv->base_qpn, 1020 priv->port); 1021 break; 1022 1023 case MLX4_STEERING_MODE_A0: 1024 break; 1025 } 1026 if (err) 1027 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 1028 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1029 } 1030 1031 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1032 0, MLX4_MCAST_DISABLE); 1033 if (err) 1034 en_err(priv, "Failed disabling multicast filter\n"); 1035 1036 /* Flush mcast filter and init it with broadcast address */ 1037 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, 1038 1, MLX4_MCAST_CONFIG); 1039 1040 /* Update multicast list - we cache all addresses so they won't 1041 * change while HW is updated holding the command semaphor */ 1042 netif_addr_lock_bh(dev); 1043 mlx4_en_cache_mclist(dev); 1044 netif_addr_unlock_bh(dev); 1045 list_for_each_entry(mclist, &priv->mc_list, list) { 1046 mcast_addr = mlx4_mac_to_u64(mclist->addr); 1047 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 1048 mcast_addr, 0, MLX4_MCAST_CONFIG); 1049 } 1050 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1051 0, MLX4_MCAST_ENABLE); 1052 if (err) 1053 en_err(priv, "Failed enabling multicast filter\n"); 1054 1055 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list); 1056 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1057 if (mclist->action == MCLIST_REM) { 1058 /* detach this address and delete from list */ 1059 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1060 mc_list[5] = priv->port; 1061 err = mlx4_multicast_detach(mdev->dev, 1062 priv->rss_map.indir_qp, 1063 mc_list, 1064 MLX4_PROT_ETH, 1065 mclist->reg_id); 1066 if (err) 1067 en_err(priv, "Fail to detach multicast address\n"); 1068 1069 if (mclist->tunnel_reg_id) { 1070 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id); 1071 if (err) 1072 en_err(priv, "Failed to detach multicast address\n"); 1073 } 1074 1075 /* remove from list */ 1076 list_del(&mclist->list); 1077 kfree(mclist); 1078 } else if (mclist->action == MCLIST_ADD) { 1079 /* attach the address */ 1080 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1081 /* needed for B0 steering support */ 1082 mc_list[5] = priv->port; 1083 err = mlx4_multicast_attach(mdev->dev, 1084 priv->rss_map.indir_qp, 1085 mc_list, 1086 priv->port, 0, 1087 MLX4_PROT_ETH, 1088 &mclist->reg_id); 1089 if (err) 1090 en_err(priv, "Fail to attach multicast address\n"); 1091 1092 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn, 1093 &mclist->tunnel_reg_id); 1094 if (err) 1095 en_err(priv, "Failed to attach multicast address\n"); 1096 } 1097 } 1098 } 1099 } 1100 1101 static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv, 1102 struct net_device *dev, 1103 struct mlx4_en_dev *mdev) 1104 { 1105 struct netdev_hw_addr *ha; 1106 struct mlx4_mac_entry *entry; 1107 struct hlist_node *tmp; 1108 bool found; 1109 u64 mac; 1110 int err = 0; 1111 struct hlist_head *bucket; 1112 unsigned int i; 1113 int removed = 0; 1114 u32 prev_flags; 1115 1116 /* Note that we do not need to protect our mac_hash traversal with rcu, 1117 * since all modification code is protected by mdev->state_lock 1118 */ 1119 1120 /* find what to remove */ 1121 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1122 bucket = &priv->mac_hash[i]; 1123 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1124 found = false; 1125 netdev_for_each_uc_addr(ha, dev) { 1126 if (ether_addr_equal_64bits(entry->mac, 1127 ha->addr)) { 1128 found = true; 1129 break; 1130 } 1131 } 1132 1133 /* MAC address of the port is not in uc list */ 1134 if (ether_addr_equal_64bits(entry->mac, 1135 priv->current_mac)) 1136 found = true; 1137 1138 if (!found) { 1139 mac = mlx4_mac_to_u64(entry->mac); 1140 mlx4_en_uc_steer_release(priv, entry->mac, 1141 priv->base_qpn, 1142 entry->reg_id); 1143 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1144 1145 hlist_del_rcu(&entry->hlist); 1146 kfree_rcu(entry, rcu); 1147 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n", 1148 entry->mac, priv->port); 1149 ++removed; 1150 } 1151 } 1152 } 1153 1154 /* if we didn't remove anything, there is no use in trying to add 1155 * again once we are in a forced promisc mode state 1156 */ 1157 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed) 1158 return; 1159 1160 prev_flags = priv->flags; 1161 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 1162 1163 /* find what to add */ 1164 netdev_for_each_uc_addr(ha, dev) { 1165 found = false; 1166 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]]; 1167 hlist_for_each_entry(entry, bucket, hlist) { 1168 if (ether_addr_equal_64bits(entry->mac, ha->addr)) { 1169 found = true; 1170 break; 1171 } 1172 } 1173 1174 if (!found) { 1175 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1176 if (!entry) { 1177 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n", 1178 ha->addr, priv->port); 1179 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1180 break; 1181 } 1182 mac = mlx4_mac_to_u64(ha->addr); 1183 memcpy(entry->mac, ha->addr, ETH_ALEN); 1184 err = mlx4_register_mac(mdev->dev, priv->port, mac); 1185 if (err < 0) { 1186 en_err(priv, "Failed registering MAC %pM on port %d: %d\n", 1187 ha->addr, priv->port, err); 1188 kfree(entry); 1189 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1190 break; 1191 } 1192 err = mlx4_en_uc_steer_add(priv, ha->addr, 1193 &priv->base_qpn, 1194 &entry->reg_id); 1195 if (err) { 1196 en_err(priv, "Failed adding MAC %pM on port %d: %d\n", 1197 ha->addr, priv->port, err); 1198 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1199 kfree(entry); 1200 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1201 break; 1202 } else { 1203 unsigned int mac_hash; 1204 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n", 1205 ha->addr, priv->port); 1206 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX]; 1207 bucket = &priv->mac_hash[mac_hash]; 1208 hlist_add_head_rcu(&entry->hlist, bucket); 1209 } 1210 } 1211 } 1212 1213 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1214 en_warn(priv, "Forcing promiscuous mode on port:%d\n", 1215 priv->port); 1216 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1217 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n", 1218 priv->port); 1219 } 1220 } 1221 1222 static void mlx4_en_do_set_rx_mode(struct work_struct *work) 1223 { 1224 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1225 rx_mode_task); 1226 struct mlx4_en_dev *mdev = priv->mdev; 1227 struct net_device *dev = priv->dev; 1228 1229 mutex_lock(&mdev->state_lock); 1230 if (!mdev->device_up) { 1231 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n"); 1232 goto out; 1233 } 1234 if (!priv->port_up) { 1235 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n"); 1236 goto out; 1237 } 1238 1239 if (!netif_carrier_ok(dev)) { 1240 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) { 1241 if (priv->port_state.link_state) { 1242 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP; 1243 netif_carrier_on(dev); 1244 en_dbg(LINK, priv, "Link Up\n"); 1245 } 1246 } 1247 } 1248 1249 if (dev->priv_flags & IFF_UNICAST_FLT) 1250 mlx4_en_do_uc_filter(priv, dev, mdev); 1251 1252 /* Promsicuous mode: disable all filters */ 1253 if ((dev->flags & IFF_PROMISC) || 1254 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) { 1255 mlx4_en_set_promisc_mode(priv, mdev); 1256 goto out; 1257 } 1258 1259 /* Not in promiscuous mode */ 1260 if (priv->flags & MLX4_EN_FLAG_PROMISC) 1261 mlx4_en_clear_promisc_mode(priv, mdev); 1262 1263 mlx4_en_do_multicast(priv, dev, mdev); 1264 out: 1265 mutex_unlock(&mdev->state_lock); 1266 } 1267 1268 #ifdef CONFIG_NET_POLL_CONTROLLER 1269 static void mlx4_en_netpoll(struct net_device *dev) 1270 { 1271 struct mlx4_en_priv *priv = netdev_priv(dev); 1272 struct mlx4_en_cq *cq; 1273 int i; 1274 1275 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1276 cq = priv->tx_cq[TX][i]; 1277 napi_schedule(&cq->napi); 1278 } 1279 } 1280 #endif 1281 1282 static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv) 1283 { 1284 u64 reg_id; 1285 int err = 0; 1286 int *qpn = &priv->base_qpn; 1287 struct mlx4_mac_entry *entry; 1288 1289 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id); 1290 if (err) 1291 return err; 1292 1293 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn, 1294 &priv->tunnel_reg_id); 1295 if (err) 1296 goto tunnel_err; 1297 1298 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1299 if (!entry) { 1300 err = -ENOMEM; 1301 goto alloc_err; 1302 } 1303 1304 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac)); 1305 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac)); 1306 entry->reg_id = reg_id; 1307 hlist_add_head_rcu(&entry->hlist, 1308 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]); 1309 1310 return 0; 1311 1312 alloc_err: 1313 if (priv->tunnel_reg_id) 1314 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1315 1316 tunnel_err: 1317 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id); 1318 return err; 1319 } 1320 1321 static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv) 1322 { 1323 u64 mac; 1324 unsigned int i; 1325 int qpn = priv->base_qpn; 1326 struct hlist_head *bucket; 1327 struct hlist_node *tmp; 1328 struct mlx4_mac_entry *entry; 1329 1330 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1331 bucket = &priv->mac_hash[i]; 1332 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1333 mac = mlx4_mac_to_u64(entry->mac); 1334 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n", 1335 entry->mac); 1336 mlx4_en_uc_steer_release(priv, entry->mac, 1337 qpn, entry->reg_id); 1338 1339 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac); 1340 hlist_del_rcu(&entry->hlist); 1341 kfree_rcu(entry, rcu); 1342 } 1343 } 1344 1345 if (priv->tunnel_reg_id) { 1346 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1347 priv->tunnel_reg_id = 0; 1348 } 1349 } 1350 1351 static void mlx4_en_tx_timeout(struct net_device *dev) 1352 { 1353 struct mlx4_en_priv *priv = netdev_priv(dev); 1354 struct mlx4_en_dev *mdev = priv->mdev; 1355 int i; 1356 1357 if (netif_msg_timer(priv)) 1358 en_warn(priv, "Tx timeout called on port:%d\n", priv->port); 1359 1360 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1361 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][i]; 1362 1363 if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i))) 1364 continue; 1365 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n", 1366 i, tx_ring->qpn, tx_ring->sp_cqn, 1367 tx_ring->cons, tx_ring->prod); 1368 } 1369 1370 priv->port_stats.tx_timeout++; 1371 en_dbg(DRV, priv, "Scheduling watchdog\n"); 1372 queue_work(mdev->workqueue, &priv->watchdog_task); 1373 } 1374 1375 1376 static void 1377 mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) 1378 { 1379 struct mlx4_en_priv *priv = netdev_priv(dev); 1380 1381 spin_lock_bh(&priv->stats_lock); 1382 mlx4_en_fold_software_stats(dev); 1383 netdev_stats_to_stats64(stats, &dev->stats); 1384 spin_unlock_bh(&priv->stats_lock); 1385 } 1386 1387 static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) 1388 { 1389 struct mlx4_en_cq *cq; 1390 int i, t; 1391 1392 /* If we haven't received a specific coalescing setting 1393 * (module param), we set the moderation parameters as follows: 1394 * - moder_cnt is set to the number of mtu sized packets to 1395 * satisfy our coalescing target. 1396 * - moder_time is set to a fixed value. 1397 */ 1398 priv->rx_frames = MLX4_EN_RX_COAL_TARGET; 1399 priv->rx_usecs = MLX4_EN_RX_COAL_TIME; 1400 priv->tx_frames = MLX4_EN_TX_COAL_PKTS; 1401 priv->tx_usecs = MLX4_EN_TX_COAL_TIME; 1402 en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n", 1403 priv->dev->mtu, priv->rx_frames, priv->rx_usecs); 1404 1405 /* Setup cq moderation params */ 1406 for (i = 0; i < priv->rx_ring_num; i++) { 1407 cq = priv->rx_cq[i]; 1408 cq->moder_cnt = priv->rx_frames; 1409 cq->moder_time = priv->rx_usecs; 1410 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; 1411 priv->last_moder_packets[i] = 0; 1412 priv->last_moder_bytes[i] = 0; 1413 } 1414 1415 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1416 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1417 cq = priv->tx_cq[t][i]; 1418 cq->moder_cnt = priv->tx_frames; 1419 cq->moder_time = priv->tx_usecs; 1420 } 1421 } 1422 1423 /* Reset auto-moderation params */ 1424 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; 1425 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; 1426 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; 1427 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; 1428 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; 1429 priv->adaptive_rx_coal = 1; 1430 priv->last_moder_jiffies = 0; 1431 priv->last_moder_tx_packets = 0; 1432 } 1433 1434 static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) 1435 { 1436 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); 1437 u32 pkt_rate_high, pkt_rate_low; 1438 struct mlx4_en_cq *cq; 1439 unsigned long packets; 1440 unsigned long rate; 1441 unsigned long avg_pkt_size; 1442 unsigned long rx_packets; 1443 unsigned long rx_bytes; 1444 unsigned long rx_pkt_diff; 1445 int moder_time; 1446 int ring, err; 1447 1448 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) 1449 return; 1450 1451 pkt_rate_low = READ_ONCE(priv->pkt_rate_low); 1452 pkt_rate_high = READ_ONCE(priv->pkt_rate_high); 1453 1454 for (ring = 0; ring < priv->rx_ring_num; ring++) { 1455 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets); 1456 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes); 1457 1458 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring]; 1459 packets = rx_pkt_diff; 1460 rate = packets * HZ / period; 1461 avg_pkt_size = packets ? (rx_bytes - 1462 priv->last_moder_bytes[ring]) / packets : 0; 1463 1464 /* Apply auto-moderation only when packet rate 1465 * exceeds a rate that it matters */ 1466 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && 1467 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { 1468 if (rate <= pkt_rate_low) 1469 moder_time = priv->rx_usecs_low; 1470 else if (rate >= pkt_rate_high) 1471 moder_time = priv->rx_usecs_high; 1472 else 1473 moder_time = (rate - pkt_rate_low) * 1474 (priv->rx_usecs_high - priv->rx_usecs_low) / 1475 (pkt_rate_high - pkt_rate_low) + 1476 priv->rx_usecs_low; 1477 } else { 1478 moder_time = priv->rx_usecs_low; 1479 } 1480 1481 cq = priv->rx_cq[ring]; 1482 if (moder_time != priv->last_moder_time[ring] || 1483 cq->moder_cnt != priv->rx_frames) { 1484 priv->last_moder_time[ring] = moder_time; 1485 cq->moder_time = moder_time; 1486 cq->moder_cnt = priv->rx_frames; 1487 err = mlx4_en_set_cq_moder(priv, cq); 1488 if (err) 1489 en_err(priv, "Failed modifying moderation for cq:%d\n", 1490 ring); 1491 } 1492 priv->last_moder_packets[ring] = rx_packets; 1493 priv->last_moder_bytes[ring] = rx_bytes; 1494 } 1495 1496 priv->last_moder_jiffies = jiffies; 1497 } 1498 1499 static void mlx4_en_do_get_stats(struct work_struct *work) 1500 { 1501 struct delayed_work *delay = to_delayed_work(work); 1502 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1503 stats_task); 1504 struct mlx4_en_dev *mdev = priv->mdev; 1505 int err; 1506 1507 mutex_lock(&mdev->state_lock); 1508 if (mdev->device_up) { 1509 if (priv->port_up) { 1510 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); 1511 if (err) 1512 en_dbg(HW, priv, "Could not update stats\n"); 1513 1514 mlx4_en_auto_moderation(priv); 1515 } 1516 1517 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 1518 } 1519 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { 1520 mlx4_en_do_set_mac(priv, priv->current_mac); 1521 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; 1522 } 1523 mutex_unlock(&mdev->state_lock); 1524 } 1525 1526 /* mlx4_en_service_task - Run service task for tasks that needed to be done 1527 * periodically 1528 */ 1529 static void mlx4_en_service_task(struct work_struct *work) 1530 { 1531 struct delayed_work *delay = to_delayed_work(work); 1532 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1533 service_task); 1534 struct mlx4_en_dev *mdev = priv->mdev; 1535 1536 mutex_lock(&mdev->state_lock); 1537 if (mdev->device_up) { 1538 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 1539 mlx4_en_ptp_overflow_check(mdev); 1540 1541 mlx4_en_recover_from_oom(priv); 1542 queue_delayed_work(mdev->workqueue, &priv->service_task, 1543 SERVICE_TASK_DELAY); 1544 } 1545 mutex_unlock(&mdev->state_lock); 1546 } 1547 1548 static void mlx4_en_linkstate(struct work_struct *work) 1549 { 1550 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1551 linkstate_task); 1552 struct mlx4_en_dev *mdev = priv->mdev; 1553 int linkstate = priv->link_state; 1554 1555 mutex_lock(&mdev->state_lock); 1556 /* If observable port state changed set carrier state and 1557 * report to system log */ 1558 if (priv->last_link_state != linkstate) { 1559 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { 1560 en_info(priv, "Link Down\n"); 1561 netif_carrier_off(priv->dev); 1562 } else { 1563 en_info(priv, "Link Up\n"); 1564 netif_carrier_on(priv->dev); 1565 } 1566 } 1567 priv->last_link_state = linkstate; 1568 mutex_unlock(&mdev->state_lock); 1569 } 1570 1571 static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1572 { 1573 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx]; 1574 int numa_node = priv->mdev->dev->numa_node; 1575 1576 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL)) 1577 return -ENOMEM; 1578 1579 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node), 1580 ring->affinity_mask); 1581 return 0; 1582 } 1583 1584 static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1585 { 1586 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask); 1587 } 1588 1589 static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv, 1590 int tx_ring_idx) 1591 { 1592 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx]; 1593 int rr_index = tx_ring_idx; 1594 1595 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc; 1596 tx_ring->recycle_ring = priv->rx_ring[rr_index]; 1597 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n", 1598 TX_XDP, tx_ring_idx, rr_index); 1599 } 1600 1601 int mlx4_en_start_port(struct net_device *dev) 1602 { 1603 struct mlx4_en_priv *priv = netdev_priv(dev); 1604 struct mlx4_en_dev *mdev = priv->mdev; 1605 struct mlx4_en_cq *cq; 1606 struct mlx4_en_tx_ring *tx_ring; 1607 int rx_index = 0; 1608 int err = 0; 1609 int i, t; 1610 int j; 1611 u8 mc_list[16] = {0}; 1612 1613 if (priv->port_up) { 1614 en_dbg(DRV, priv, "start port called while port already up\n"); 1615 return 0; 1616 } 1617 1618 INIT_LIST_HEAD(&priv->mc_list); 1619 INIT_LIST_HEAD(&priv->curr_list); 1620 INIT_LIST_HEAD(&priv->ethtool_list); 1621 memset(&priv->ethtool_rules[0], 0, 1622 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES); 1623 1624 /* Calculate Rx buf size */ 1625 dev->mtu = min(dev->mtu, priv->max_mtu); 1626 mlx4_en_calc_rx_buf(dev); 1627 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); 1628 1629 /* Configure rx cq's and rings */ 1630 err = mlx4_en_activate_rx_rings(priv); 1631 if (err) { 1632 en_err(priv, "Failed to activate RX rings\n"); 1633 return err; 1634 } 1635 for (i = 0; i < priv->rx_ring_num; i++) { 1636 cq = priv->rx_cq[i]; 1637 1638 err = mlx4_en_init_affinity_hint(priv, i); 1639 if (err) { 1640 en_err(priv, "Failed preparing IRQ affinity hint\n"); 1641 goto cq_err; 1642 } 1643 1644 err = mlx4_en_activate_cq(priv, cq, i); 1645 if (err) { 1646 en_err(priv, "Failed activating Rx CQ\n"); 1647 mlx4_en_free_affinity_hint(priv, i); 1648 goto cq_err; 1649 } 1650 1651 for (j = 0; j < cq->size; j++) { 1652 struct mlx4_cqe *cqe = NULL; 1653 1654 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) + 1655 priv->cqe_factor; 1656 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK; 1657 } 1658 1659 err = mlx4_en_set_cq_moder(priv, cq); 1660 if (err) { 1661 en_err(priv, "Failed setting cq moderation parameters\n"); 1662 mlx4_en_deactivate_cq(priv, cq); 1663 mlx4_en_free_affinity_hint(priv, i); 1664 goto cq_err; 1665 } 1666 mlx4_en_arm_cq(priv, cq); 1667 priv->rx_ring[i]->cqn = cq->mcq.cqn; 1668 ++rx_index; 1669 } 1670 1671 /* Set qp number */ 1672 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port); 1673 err = mlx4_en_get_qp(priv); 1674 if (err) { 1675 en_err(priv, "Failed getting eth qp\n"); 1676 goto cq_err; 1677 } 1678 mdev->mac_removed[priv->port] = 0; 1679 1680 priv->counter_index = 1681 mlx4_get_default_counter_index(mdev->dev, priv->port); 1682 1683 err = mlx4_en_config_rss_steer(priv); 1684 if (err) { 1685 en_err(priv, "Failed configuring rss steering\n"); 1686 goto mac_err; 1687 } 1688 1689 err = mlx4_en_create_drop_qp(priv); 1690 if (err) 1691 goto rss_err; 1692 1693 /* Configure tx cq's and rings */ 1694 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1695 u8 num_tx_rings_p_up = t == TX ? 1696 priv->num_tx_rings_p_up : priv->tx_ring_num[t]; 1697 1698 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1699 /* Configure cq */ 1700 cq = priv->tx_cq[t][i]; 1701 err = mlx4_en_activate_cq(priv, cq, i); 1702 if (err) { 1703 en_err(priv, "Failed allocating Tx CQ\n"); 1704 goto tx_err; 1705 } 1706 err = mlx4_en_set_cq_moder(priv, cq); 1707 if (err) { 1708 en_err(priv, "Failed setting cq moderation parameters\n"); 1709 mlx4_en_deactivate_cq(priv, cq); 1710 goto tx_err; 1711 } 1712 en_dbg(DRV, priv, 1713 "Resetting index of collapsed CQ:%d to -1\n", i); 1714 cq->buf->wqe_index = cpu_to_be16(0xffff); 1715 1716 /* Configure ring */ 1717 tx_ring = priv->tx_ring[t][i]; 1718 err = mlx4_en_activate_tx_ring(priv, tx_ring, 1719 cq->mcq.cqn, 1720 i / num_tx_rings_p_up); 1721 if (err) { 1722 en_err(priv, "Failed allocating Tx ring\n"); 1723 mlx4_en_deactivate_cq(priv, cq); 1724 goto tx_err; 1725 } 1726 if (t != TX_XDP) { 1727 tx_ring->tx_queue = netdev_get_tx_queue(dev, i); 1728 tx_ring->recycle_ring = NULL; 1729 1730 /* Arm CQ for TX completions */ 1731 mlx4_en_arm_cq(priv, cq); 1732 1733 } else { 1734 mlx4_en_init_recycle_ring(priv, i); 1735 /* XDP TX CQ should never be armed */ 1736 } 1737 1738 /* Set initial ownership of all Tx TXBBs to SW (1) */ 1739 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) 1740 *((u32 *)(tx_ring->buf + j)) = 0xffffffff; 1741 } 1742 } 1743 1744 /* Configure port */ 1745 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 1746 priv->rx_skb_size + ETH_FCS_LEN, 1747 priv->prof->tx_pause, 1748 priv->prof->tx_ppp, 1749 priv->prof->rx_pause, 1750 priv->prof->rx_ppp); 1751 if (err) { 1752 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 1753 priv->port, err); 1754 goto tx_err; 1755 } 1756 1757 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu); 1758 if (err) { 1759 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n", 1760 dev->mtu, priv->port, err); 1761 goto tx_err; 1762 } 1763 1764 /* Set default qp number */ 1765 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); 1766 if (err) { 1767 en_err(priv, "Failed setting default qp numbers\n"); 1768 goto tx_err; 1769 } 1770 1771 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 1772 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 1773 if (err) { 1774 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 1775 err); 1776 goto tx_err; 1777 } 1778 } 1779 1780 /* Init port */ 1781 en_dbg(HW, priv, "Initializing port\n"); 1782 err = mlx4_INIT_PORT(mdev->dev, priv->port); 1783 if (err) { 1784 en_err(priv, "Failed Initializing port\n"); 1785 goto tx_err; 1786 } 1787 1788 /* Set Unicast and VXLAN steering rules */ 1789 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 && 1790 mlx4_en_set_rss_steer_rules(priv)) 1791 mlx4_warn(mdev, "Failed setting steering rules\n"); 1792 1793 /* Attach rx QP to bradcast address */ 1794 eth_broadcast_addr(&mc_list[10]); 1795 mc_list[5] = priv->port; /* needed for B0 steering support */ 1796 if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list, 1797 priv->port, 0, MLX4_PROT_ETH, 1798 &priv->broadcast_id)) 1799 mlx4_warn(mdev, "Failed Attaching Broadcast\n"); 1800 1801 /* Must redo promiscuous mode setup. */ 1802 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); 1803 1804 /* Schedule multicast task to populate multicast list */ 1805 queue_work(mdev->workqueue, &priv->rx_mode_task); 1806 1807 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 1808 udp_tunnel_get_rx_info(dev); 1809 1810 priv->port_up = true; 1811 1812 /* Process all completions if exist to prevent 1813 * the queues freezing if they are full 1814 */ 1815 for (i = 0; i < priv->rx_ring_num; i++) { 1816 local_bh_disable(); 1817 napi_schedule(&priv->rx_cq[i]->napi); 1818 local_bh_enable(); 1819 } 1820 1821 netif_tx_start_all_queues(dev); 1822 netif_device_attach(dev); 1823 1824 return 0; 1825 1826 tx_err: 1827 if (t == MLX4_EN_NUM_TX_TYPES) { 1828 t--; 1829 i = priv->tx_ring_num[t]; 1830 } 1831 while (t >= 0) { 1832 while (i--) { 1833 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1834 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1835 } 1836 if (!t--) 1837 break; 1838 i = priv->tx_ring_num[t]; 1839 } 1840 mlx4_en_destroy_drop_qp(priv); 1841 rss_err: 1842 mlx4_en_release_rss_steer(priv); 1843 mac_err: 1844 mlx4_en_put_qp(priv); 1845 cq_err: 1846 while (rx_index--) { 1847 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]); 1848 mlx4_en_free_affinity_hint(priv, rx_index); 1849 } 1850 for (i = 0; i < priv->rx_ring_num; i++) 1851 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1852 1853 return err; /* need to close devices */ 1854 } 1855 1856 1857 void mlx4_en_stop_port(struct net_device *dev, int detach) 1858 { 1859 struct mlx4_en_priv *priv = netdev_priv(dev); 1860 struct mlx4_en_dev *mdev = priv->mdev; 1861 struct mlx4_en_mc_list *mclist, *tmp; 1862 struct ethtool_flow_id *flow, *tmp_flow; 1863 int i, t; 1864 u8 mc_list[16] = {0}; 1865 1866 if (!priv->port_up) { 1867 en_dbg(DRV, priv, "stop port called while port already down\n"); 1868 return; 1869 } 1870 1871 /* close port*/ 1872 mlx4_CLOSE_PORT(mdev->dev, priv->port); 1873 1874 /* Synchronize with tx routine */ 1875 netif_tx_lock_bh(dev); 1876 if (detach) 1877 netif_device_detach(dev); 1878 netif_tx_stop_all_queues(dev); 1879 netif_tx_unlock_bh(dev); 1880 1881 netif_tx_disable(dev); 1882 1883 spin_lock_bh(&priv->stats_lock); 1884 mlx4_en_fold_software_stats(dev); 1885 /* Set port as not active */ 1886 priv->port_up = false; 1887 spin_unlock_bh(&priv->stats_lock); 1888 1889 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 1890 1891 /* Promsicuous mode */ 1892 if (mdev->dev->caps.steering_mode == 1893 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1894 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | 1895 MLX4_EN_FLAG_MC_PROMISC); 1896 mlx4_flow_steer_promisc_remove(mdev->dev, 1897 priv->port, 1898 MLX4_FS_ALL_DEFAULT); 1899 mlx4_flow_steer_promisc_remove(mdev->dev, 1900 priv->port, 1901 MLX4_FS_MC_DEFAULT); 1902 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) { 1903 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 1904 1905 /* Disable promiscouos mode */ 1906 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, 1907 priv->port); 1908 1909 /* Disable Multicast promisc */ 1910 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1911 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, 1912 priv->port); 1913 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1914 } 1915 } 1916 1917 /* Detach All multicasts */ 1918 eth_broadcast_addr(&mc_list[10]); 1919 mc_list[5] = priv->port; /* needed for B0 steering support */ 1920 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list, 1921 MLX4_PROT_ETH, priv->broadcast_id); 1922 list_for_each_entry(mclist, &priv->curr_list, list) { 1923 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1924 mc_list[5] = priv->port; 1925 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, 1926 mc_list, MLX4_PROT_ETH, mclist->reg_id); 1927 if (mclist->tunnel_reg_id) 1928 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id); 1929 } 1930 mlx4_en_clear_list(dev); 1931 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1932 list_del(&mclist->list); 1933 kfree(mclist); 1934 } 1935 1936 /* Flush multicast filter */ 1937 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); 1938 1939 /* Remove flow steering rules for the port*/ 1940 if (mdev->dev->caps.steering_mode == 1941 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1942 ASSERT_RTNL(); 1943 list_for_each_entry_safe(flow, tmp_flow, 1944 &priv->ethtool_list, list) { 1945 mlx4_flow_detach(mdev->dev, flow->id); 1946 list_del(&flow->list); 1947 } 1948 } 1949 1950 mlx4_en_destroy_drop_qp(priv); 1951 1952 /* Free TX Rings */ 1953 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 1954 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1955 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1956 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1957 } 1958 } 1959 msleep(10); 1960 1961 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) 1962 for (i = 0; i < priv->tx_ring_num[t]; i++) 1963 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]); 1964 1965 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 1966 mlx4_en_delete_rss_steer_rules(priv); 1967 1968 /* Free RSS qps */ 1969 mlx4_en_release_rss_steer(priv); 1970 1971 /* Unregister Mac address for the port */ 1972 mlx4_en_put_qp(priv); 1973 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN)) 1974 mdev->mac_removed[priv->port] = 1; 1975 1976 /* Free RX Rings */ 1977 for (i = 0; i < priv->rx_ring_num; i++) { 1978 struct mlx4_en_cq *cq = priv->rx_cq[i]; 1979 1980 napi_synchronize(&cq->napi); 1981 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1982 mlx4_en_deactivate_cq(priv, cq); 1983 1984 mlx4_en_free_affinity_hint(priv, i); 1985 } 1986 } 1987 1988 static void mlx4_en_restart(struct work_struct *work) 1989 { 1990 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1991 watchdog_task); 1992 struct mlx4_en_dev *mdev = priv->mdev; 1993 struct net_device *dev = priv->dev; 1994 1995 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); 1996 1997 rtnl_lock(); 1998 mutex_lock(&mdev->state_lock); 1999 if (priv->port_up) { 2000 mlx4_en_stop_port(dev, 1); 2001 if (mlx4_en_start_port(dev)) 2002 en_err(priv, "Failed restarting port %d\n", priv->port); 2003 } 2004 mutex_unlock(&mdev->state_lock); 2005 rtnl_unlock(); 2006 } 2007 2008 static void mlx4_en_clear_stats(struct net_device *dev) 2009 { 2010 struct mlx4_en_priv *priv = netdev_priv(dev); 2011 struct mlx4_en_dev *mdev = priv->mdev; 2012 struct mlx4_en_tx_ring **tx_ring; 2013 int i; 2014 2015 if (!mlx4_is_slave(mdev->dev)) 2016 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) 2017 en_dbg(HW, priv, "Failed dumping statistics\n"); 2018 2019 memset(&priv->pstats, 0, sizeof(priv->pstats)); 2020 memset(&priv->pkstats, 0, sizeof(priv->pkstats)); 2021 memset(&priv->port_stats, 0, sizeof(priv->port_stats)); 2022 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats)); 2023 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats)); 2024 memset(&priv->rx_priority_flowstats, 0, 2025 sizeof(priv->rx_priority_flowstats)); 2026 memset(&priv->tx_priority_flowstats, 0, 2027 sizeof(priv->tx_priority_flowstats)); 2028 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats)); 2029 2030 tx_ring = priv->tx_ring[TX]; 2031 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 2032 tx_ring[i]->bytes = 0; 2033 tx_ring[i]->packets = 0; 2034 tx_ring[i]->tx_csum = 0; 2035 tx_ring[i]->tx_dropped = 0; 2036 tx_ring[i]->queue_stopped = 0; 2037 tx_ring[i]->wake_queue = 0; 2038 tx_ring[i]->tso_packets = 0; 2039 tx_ring[i]->xmit_more = 0; 2040 } 2041 for (i = 0; i < priv->rx_ring_num; i++) { 2042 priv->rx_ring[i]->bytes = 0; 2043 priv->rx_ring[i]->packets = 0; 2044 priv->rx_ring[i]->csum_ok = 0; 2045 priv->rx_ring[i]->csum_none = 0; 2046 priv->rx_ring[i]->csum_complete = 0; 2047 } 2048 } 2049 2050 static int mlx4_en_open(struct net_device *dev) 2051 { 2052 struct mlx4_en_priv *priv = netdev_priv(dev); 2053 struct mlx4_en_dev *mdev = priv->mdev; 2054 int err = 0; 2055 2056 mutex_lock(&mdev->state_lock); 2057 2058 if (!mdev->device_up) { 2059 en_err(priv, "Cannot open - device down/disabled\n"); 2060 err = -EBUSY; 2061 goto out; 2062 } 2063 2064 /* Reset HW statistics and SW counters */ 2065 mlx4_en_clear_stats(dev); 2066 2067 err = mlx4_en_start_port(dev); 2068 if (err) 2069 en_err(priv, "Failed starting port:%d\n", priv->port); 2070 2071 out: 2072 mutex_unlock(&mdev->state_lock); 2073 return err; 2074 } 2075 2076 2077 static int mlx4_en_close(struct net_device *dev) 2078 { 2079 struct mlx4_en_priv *priv = netdev_priv(dev); 2080 struct mlx4_en_dev *mdev = priv->mdev; 2081 2082 en_dbg(IFDOWN, priv, "Close port called\n"); 2083 2084 mutex_lock(&mdev->state_lock); 2085 2086 mlx4_en_stop_port(dev, 0); 2087 netif_carrier_off(dev); 2088 2089 mutex_unlock(&mdev->state_lock); 2090 return 0; 2091 } 2092 2093 static void mlx4_en_free_resources(struct mlx4_en_priv *priv) 2094 { 2095 int i, t; 2096 2097 #ifdef CONFIG_RFS_ACCEL 2098 priv->dev->rx_cpu_rmap = NULL; 2099 #endif 2100 2101 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2102 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2103 if (priv->tx_ring[t] && priv->tx_ring[t][i]) 2104 mlx4_en_destroy_tx_ring(priv, 2105 &priv->tx_ring[t][i]); 2106 if (priv->tx_cq[t] && priv->tx_cq[t][i]) 2107 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2108 } 2109 kfree(priv->tx_ring[t]); 2110 kfree(priv->tx_cq[t]); 2111 } 2112 2113 for (i = 0; i < priv->rx_ring_num; i++) { 2114 if (priv->rx_ring[i]) 2115 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2116 priv->prof->rx_ring_size, priv->stride); 2117 if (priv->rx_cq[i]) 2118 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2119 } 2120 2121 } 2122 2123 static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) 2124 { 2125 struct mlx4_en_port_profile *prof = priv->prof; 2126 int i, t; 2127 int node; 2128 2129 /* Create tx Rings */ 2130 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2131 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2132 node = cpu_to_node(i % num_online_cpus()); 2133 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i], 2134 prof->tx_ring_size, i, t, node)) 2135 goto err; 2136 2137 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i], 2138 prof->tx_ring_size, 2139 TXBB_SIZE, node, i)) 2140 goto err; 2141 } 2142 } 2143 2144 /* Create rx Rings */ 2145 for (i = 0; i < priv->rx_ring_num; i++) { 2146 node = cpu_to_node(i % num_online_cpus()); 2147 if (mlx4_en_create_cq(priv, &priv->rx_cq[i], 2148 prof->rx_ring_size, i, RX, node)) 2149 goto err; 2150 2151 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], 2152 prof->rx_ring_size, priv->stride, 2153 node)) 2154 goto err; 2155 } 2156 2157 #ifdef CONFIG_RFS_ACCEL 2158 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port); 2159 #endif 2160 2161 return 0; 2162 2163 err: 2164 en_err(priv, "Failed to allocate NIC resources\n"); 2165 for (i = 0; i < priv->rx_ring_num; i++) { 2166 if (priv->rx_ring[i]) 2167 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2168 prof->rx_ring_size, 2169 priv->stride); 2170 if (priv->rx_cq[i]) 2171 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2172 } 2173 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2174 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2175 if (priv->tx_ring[t][i]) 2176 mlx4_en_destroy_tx_ring(priv, 2177 &priv->tx_ring[t][i]); 2178 if (priv->tx_cq[t][i]) 2179 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2180 } 2181 } 2182 return -ENOMEM; 2183 } 2184 2185 2186 static int mlx4_en_copy_priv(struct mlx4_en_priv *dst, 2187 struct mlx4_en_priv *src, 2188 struct mlx4_en_port_profile *prof) 2189 { 2190 int t; 2191 2192 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config, 2193 sizeof(dst->hwtstamp_config)); 2194 dst->num_tx_rings_p_up = prof->num_tx_rings_p_up; 2195 dst->rx_ring_num = prof->rx_ring_num; 2196 dst->flags = prof->flags; 2197 dst->mdev = src->mdev; 2198 dst->port = src->port; 2199 dst->dev = src->dev; 2200 dst->prof = prof; 2201 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 2202 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 2203 2204 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2205 dst->tx_ring_num[t] = prof->tx_ring_num[t]; 2206 if (!dst->tx_ring_num[t]) 2207 continue; 2208 2209 dst->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) * 2210 MAX_TX_RINGS, GFP_KERNEL); 2211 if (!dst->tx_ring[t]) 2212 goto err_free_tx; 2213 2214 dst->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) * 2215 MAX_TX_RINGS, GFP_KERNEL); 2216 if (!dst->tx_cq[t]) { 2217 kfree(dst->tx_ring[t]); 2218 goto err_free_tx; 2219 } 2220 } 2221 2222 return 0; 2223 2224 err_free_tx: 2225 while (t--) { 2226 kfree(dst->tx_ring[t]); 2227 kfree(dst->tx_cq[t]); 2228 } 2229 return -ENOMEM; 2230 } 2231 2232 static void mlx4_en_update_priv(struct mlx4_en_priv *dst, 2233 struct mlx4_en_priv *src) 2234 { 2235 int t; 2236 memcpy(dst->rx_ring, src->rx_ring, 2237 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num); 2238 memcpy(dst->rx_cq, src->rx_cq, 2239 sizeof(struct mlx4_en_cq *) * src->rx_ring_num); 2240 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config, 2241 sizeof(dst->hwtstamp_config)); 2242 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2243 dst->tx_ring_num[t] = src->tx_ring_num[t]; 2244 dst->tx_ring[t] = src->tx_ring[t]; 2245 dst->tx_cq[t] = src->tx_cq[t]; 2246 } 2247 dst->num_tx_rings_p_up = src->num_tx_rings_p_up; 2248 dst->rx_ring_num = src->rx_ring_num; 2249 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile)); 2250 } 2251 2252 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv, 2253 struct mlx4_en_priv *tmp, 2254 struct mlx4_en_port_profile *prof, 2255 bool carry_xdp_prog) 2256 { 2257 struct bpf_prog *xdp_prog; 2258 int i, t; 2259 2260 mlx4_en_copy_priv(tmp, priv, prof); 2261 2262 if (mlx4_en_alloc_resources(tmp)) { 2263 en_warn(priv, 2264 "%s: Resource allocation failed, using previous configuration\n", 2265 __func__); 2266 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2267 kfree(tmp->tx_ring[t]); 2268 kfree(tmp->tx_cq[t]); 2269 } 2270 return -ENOMEM; 2271 } 2272 2273 /* All rx_rings has the same xdp_prog. Pick the first one. */ 2274 xdp_prog = rcu_dereference_protected( 2275 priv->rx_ring[0]->xdp_prog, 2276 lockdep_is_held(&priv->mdev->state_lock)); 2277 2278 if (xdp_prog && carry_xdp_prog) { 2279 xdp_prog = bpf_prog_add(xdp_prog, tmp->rx_ring_num); 2280 if (IS_ERR(xdp_prog)) { 2281 mlx4_en_free_resources(tmp); 2282 return PTR_ERR(xdp_prog); 2283 } 2284 for (i = 0; i < tmp->rx_ring_num; i++) 2285 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog, 2286 xdp_prog); 2287 } 2288 2289 return 0; 2290 } 2291 2292 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv, 2293 struct mlx4_en_priv *tmp) 2294 { 2295 mlx4_en_free_resources(priv); 2296 mlx4_en_update_priv(priv, tmp); 2297 } 2298 2299 void mlx4_en_destroy_netdev(struct net_device *dev) 2300 { 2301 struct mlx4_en_priv *priv = netdev_priv(dev); 2302 struct mlx4_en_dev *mdev = priv->mdev; 2303 2304 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); 2305 2306 /* Unregister device - this will close the port if it was up */ 2307 if (priv->registered) { 2308 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev, 2309 priv->port)); 2310 unregister_netdev(dev); 2311 } 2312 2313 if (priv->allocated) 2314 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); 2315 2316 cancel_delayed_work(&priv->stats_task); 2317 cancel_delayed_work(&priv->service_task); 2318 /* flush any pending task for this netdev */ 2319 flush_workqueue(mdev->workqueue); 2320 2321 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 2322 mlx4_en_remove_timestamp(mdev); 2323 2324 /* Detach the netdev so tasks would not attempt to access it */ 2325 mutex_lock(&mdev->state_lock); 2326 mdev->pndev[priv->port] = NULL; 2327 mdev->upper[priv->port] = NULL; 2328 2329 #ifdef CONFIG_RFS_ACCEL 2330 mlx4_en_cleanup_filters(priv); 2331 #endif 2332 2333 mlx4_en_free_resources(priv); 2334 mutex_unlock(&mdev->state_lock); 2335 2336 free_netdev(dev); 2337 } 2338 2339 static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu) 2340 { 2341 struct mlx4_en_priv *priv = netdev_priv(dev); 2342 2343 if (mtu > MLX4_EN_MAX_XDP_MTU) { 2344 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n", 2345 mtu, MLX4_EN_MAX_XDP_MTU); 2346 return false; 2347 } 2348 2349 return true; 2350 } 2351 2352 static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) 2353 { 2354 struct mlx4_en_priv *priv = netdev_priv(dev); 2355 struct mlx4_en_dev *mdev = priv->mdev; 2356 int err = 0; 2357 2358 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", 2359 dev->mtu, new_mtu); 2360 2361 if (priv->tx_ring_num[TX_XDP] && 2362 !mlx4_en_check_xdp_mtu(dev, new_mtu)) 2363 return -EOPNOTSUPP; 2364 2365 dev->mtu = new_mtu; 2366 2367 if (netif_running(dev)) { 2368 mutex_lock(&mdev->state_lock); 2369 if (!mdev->device_up) { 2370 /* NIC is probably restarting - let watchdog task reset 2371 * the port */ 2372 en_dbg(DRV, priv, "Change MTU called with card down!?\n"); 2373 } else { 2374 mlx4_en_stop_port(dev, 1); 2375 err = mlx4_en_start_port(dev); 2376 if (err) { 2377 en_err(priv, "Failed restarting port:%d\n", 2378 priv->port); 2379 queue_work(mdev->workqueue, &priv->watchdog_task); 2380 } 2381 } 2382 mutex_unlock(&mdev->state_lock); 2383 } 2384 return 0; 2385 } 2386 2387 static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 2388 { 2389 struct mlx4_en_priv *priv = netdev_priv(dev); 2390 struct mlx4_en_dev *mdev = priv->mdev; 2391 struct hwtstamp_config config; 2392 2393 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 2394 return -EFAULT; 2395 2396 /* reserved for future extensions */ 2397 if (config.flags) 2398 return -EINVAL; 2399 2400 /* device doesn't support time stamping */ 2401 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)) 2402 return -EINVAL; 2403 2404 /* TX HW timestamp */ 2405 switch (config.tx_type) { 2406 case HWTSTAMP_TX_OFF: 2407 case HWTSTAMP_TX_ON: 2408 break; 2409 default: 2410 return -ERANGE; 2411 } 2412 2413 /* RX HW timestamp */ 2414 switch (config.rx_filter) { 2415 case HWTSTAMP_FILTER_NONE: 2416 break; 2417 case HWTSTAMP_FILTER_ALL: 2418 case HWTSTAMP_FILTER_SOME: 2419 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2420 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2421 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2422 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2423 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2424 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2425 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2426 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2427 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2428 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2429 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2430 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2431 case HWTSTAMP_FILTER_NTP_ALL: 2432 config.rx_filter = HWTSTAMP_FILTER_ALL; 2433 break; 2434 default: 2435 return -ERANGE; 2436 } 2437 2438 if (mlx4_en_reset_config(dev, config, dev->features)) { 2439 config.tx_type = HWTSTAMP_TX_OFF; 2440 config.rx_filter = HWTSTAMP_FILTER_NONE; 2441 } 2442 2443 return copy_to_user(ifr->ifr_data, &config, 2444 sizeof(config)) ? -EFAULT : 0; 2445 } 2446 2447 static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 2448 { 2449 struct mlx4_en_priv *priv = netdev_priv(dev); 2450 2451 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config, 2452 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0; 2453 } 2454 2455 static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 2456 { 2457 switch (cmd) { 2458 case SIOCSHWTSTAMP: 2459 return mlx4_en_hwtstamp_set(dev, ifr); 2460 case SIOCGHWTSTAMP: 2461 return mlx4_en_hwtstamp_get(dev, ifr); 2462 default: 2463 return -EOPNOTSUPP; 2464 } 2465 } 2466 2467 static netdev_features_t mlx4_en_fix_features(struct net_device *netdev, 2468 netdev_features_t features) 2469 { 2470 struct mlx4_en_priv *en_priv = netdev_priv(netdev); 2471 struct mlx4_en_dev *mdev = en_priv->mdev; 2472 2473 /* Since there is no support for separate RX C-TAG/S-TAG vlan accel 2474 * enable/disable make sure S-TAG flag is always in same state as 2475 * C-TAG. 2476 */ 2477 if (features & NETIF_F_HW_VLAN_CTAG_RX && 2478 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 2479 features |= NETIF_F_HW_VLAN_STAG_RX; 2480 else 2481 features &= ~NETIF_F_HW_VLAN_STAG_RX; 2482 2483 return features; 2484 } 2485 2486 static int mlx4_en_set_features(struct net_device *netdev, 2487 netdev_features_t features) 2488 { 2489 struct mlx4_en_priv *priv = netdev_priv(netdev); 2490 bool reset = false; 2491 int ret = 0; 2492 2493 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) { 2494 en_info(priv, "Turn %s RX-FCS\n", 2495 (features & NETIF_F_RXFCS) ? "ON" : "OFF"); 2496 reset = true; 2497 } 2498 2499 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) { 2500 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0; 2501 2502 en_info(priv, "Turn %s RX-ALL\n", 2503 ignore_fcs_value ? "ON" : "OFF"); 2504 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev, 2505 priv->port, ignore_fcs_value); 2506 if (ret) 2507 return ret; 2508 } 2509 2510 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 2511 en_info(priv, "Turn %s RX vlan strip offload\n", 2512 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF"); 2513 reset = true; 2514 } 2515 2516 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX)) 2517 en_info(priv, "Turn %s TX vlan strip offload\n", 2518 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF"); 2519 2520 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX)) 2521 en_info(priv, "Turn %s TX S-VLAN strip offload\n", 2522 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF"); 2523 2524 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) { 2525 en_info(priv, "Turn %s loopback\n", 2526 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF"); 2527 mlx4_en_update_loopback_state(netdev, features); 2528 } 2529 2530 if (reset) { 2531 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config, 2532 features); 2533 if (ret) 2534 return ret; 2535 } 2536 2537 return 0; 2538 } 2539 2540 static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac) 2541 { 2542 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2543 struct mlx4_en_dev *mdev = en_priv->mdev; 2544 2545 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac); 2546 } 2547 2548 static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos, 2549 __be16 vlan_proto) 2550 { 2551 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2552 struct mlx4_en_dev *mdev = en_priv->mdev; 2553 2554 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos, 2555 vlan_proto); 2556 } 2557 2558 static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate, 2559 int max_tx_rate) 2560 { 2561 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2562 struct mlx4_en_dev *mdev = en_priv->mdev; 2563 2564 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate, 2565 max_tx_rate); 2566 } 2567 2568 static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting) 2569 { 2570 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2571 struct mlx4_en_dev *mdev = en_priv->mdev; 2572 2573 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting); 2574 } 2575 2576 static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf) 2577 { 2578 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2579 struct mlx4_en_dev *mdev = en_priv->mdev; 2580 2581 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf); 2582 } 2583 2584 static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state) 2585 { 2586 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2587 struct mlx4_en_dev *mdev = en_priv->mdev; 2588 2589 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state); 2590 } 2591 2592 static int mlx4_en_get_vf_stats(struct net_device *dev, int vf, 2593 struct ifla_vf_stats *vf_stats) 2594 { 2595 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2596 struct mlx4_en_dev *mdev = en_priv->mdev; 2597 2598 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats); 2599 } 2600 2601 #define PORT_ID_BYTE_LEN 8 2602 static int mlx4_en_get_phys_port_id(struct net_device *dev, 2603 struct netdev_phys_item_id *ppid) 2604 { 2605 struct mlx4_en_priv *priv = netdev_priv(dev); 2606 struct mlx4_dev *mdev = priv->mdev->dev; 2607 int i; 2608 u64 phys_port_id = mdev->caps.phys_port_id[priv->port]; 2609 2610 if (!phys_port_id) 2611 return -EOPNOTSUPP; 2612 2613 ppid->id_len = sizeof(phys_port_id); 2614 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) { 2615 ppid->id[i] = phys_port_id & 0xff; 2616 phys_port_id >>= 8; 2617 } 2618 return 0; 2619 } 2620 2621 static void mlx4_en_add_vxlan_offloads(struct work_struct *work) 2622 { 2623 int ret; 2624 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2625 vxlan_add_task); 2626 2627 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port); 2628 if (ret) 2629 goto out; 2630 2631 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2632 VXLAN_STEER_BY_OUTER_MAC, 1); 2633 out: 2634 if (ret) { 2635 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret); 2636 return; 2637 } 2638 2639 /* set offloads */ 2640 priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2641 NETIF_F_RXCSUM | 2642 NETIF_F_TSO | NETIF_F_TSO6 | 2643 NETIF_F_GSO_UDP_TUNNEL | 2644 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2645 NETIF_F_GSO_PARTIAL; 2646 } 2647 2648 static void mlx4_en_del_vxlan_offloads(struct work_struct *work) 2649 { 2650 int ret; 2651 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2652 vxlan_del_task); 2653 /* unset offloads */ 2654 priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2655 NETIF_F_RXCSUM | 2656 NETIF_F_TSO | NETIF_F_TSO6 | 2657 NETIF_F_GSO_UDP_TUNNEL | 2658 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2659 NETIF_F_GSO_PARTIAL); 2660 2661 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2662 VXLAN_STEER_BY_OUTER_MAC, 0); 2663 if (ret) 2664 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret); 2665 2666 priv->vxlan_port = 0; 2667 } 2668 2669 static void mlx4_en_add_vxlan_port(struct net_device *dev, 2670 struct udp_tunnel_info *ti) 2671 { 2672 struct mlx4_en_priv *priv = netdev_priv(dev); 2673 __be16 port = ti->port; 2674 __be16 current_port; 2675 2676 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2677 return; 2678 2679 if (ti->sa_family != AF_INET) 2680 return; 2681 2682 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 2683 return; 2684 2685 current_port = priv->vxlan_port; 2686 if (current_port && current_port != port) { 2687 en_warn(priv, "vxlan port %d configured, can't add port %d\n", 2688 ntohs(current_port), ntohs(port)); 2689 return; 2690 } 2691 2692 priv->vxlan_port = port; 2693 queue_work(priv->mdev->workqueue, &priv->vxlan_add_task); 2694 } 2695 2696 static void mlx4_en_del_vxlan_port(struct net_device *dev, 2697 struct udp_tunnel_info *ti) 2698 { 2699 struct mlx4_en_priv *priv = netdev_priv(dev); 2700 __be16 port = ti->port; 2701 __be16 current_port; 2702 2703 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2704 return; 2705 2706 if (ti->sa_family != AF_INET) 2707 return; 2708 2709 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 2710 return; 2711 2712 current_port = priv->vxlan_port; 2713 if (current_port != port) { 2714 en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port)); 2715 return; 2716 } 2717 2718 queue_work(priv->mdev->workqueue, &priv->vxlan_del_task); 2719 } 2720 2721 static netdev_features_t mlx4_en_features_check(struct sk_buff *skb, 2722 struct net_device *dev, 2723 netdev_features_t features) 2724 { 2725 features = vlan_features_check(skb, features); 2726 features = vxlan_features_check(skb, features); 2727 2728 /* The ConnectX-3 doesn't support outer IPv6 checksums but it does 2729 * support inner IPv6 checksums and segmentation so we need to 2730 * strip that feature if this is an IPv6 encapsulated frame. 2731 */ 2732 if (skb->encapsulation && 2733 (skb->ip_summed == CHECKSUM_PARTIAL)) { 2734 struct mlx4_en_priv *priv = netdev_priv(dev); 2735 2736 if (!priv->vxlan_port || 2737 (ip_hdr(skb)->version != 4) || 2738 (udp_hdr(skb)->dest != priv->vxlan_port)) 2739 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 2740 } 2741 2742 return features; 2743 } 2744 2745 static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate) 2746 { 2747 struct mlx4_en_priv *priv = netdev_priv(dev); 2748 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index]; 2749 struct mlx4_update_qp_params params; 2750 int err; 2751 2752 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT)) 2753 return -EOPNOTSUPP; 2754 2755 /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */ 2756 if (maxrate >> 12) { 2757 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS; 2758 params.rate_val = maxrate / 1000; 2759 } else if (maxrate) { 2760 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS; 2761 params.rate_val = maxrate; 2762 } else { /* zero serves to revoke the QP rate-limitation */ 2763 params.rate_unit = 0; 2764 params.rate_val = 0; 2765 } 2766 2767 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT, 2768 ¶ms); 2769 return err; 2770 } 2771 2772 static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog) 2773 { 2774 struct mlx4_en_priv *priv = netdev_priv(dev); 2775 struct mlx4_en_dev *mdev = priv->mdev; 2776 struct mlx4_en_port_profile new_prof; 2777 struct bpf_prog *old_prog; 2778 struct mlx4_en_priv *tmp; 2779 int tx_changed = 0; 2780 int xdp_ring_num; 2781 int port_up = 0; 2782 int err; 2783 int i; 2784 2785 xdp_ring_num = prog ? priv->rx_ring_num : 0; 2786 2787 /* No need to reconfigure buffers when simply swapping the 2788 * program for a new one. 2789 */ 2790 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) { 2791 if (prog) { 2792 prog = bpf_prog_add(prog, priv->rx_ring_num - 1); 2793 if (IS_ERR(prog)) 2794 return PTR_ERR(prog); 2795 } 2796 mutex_lock(&mdev->state_lock); 2797 for (i = 0; i < priv->rx_ring_num; i++) { 2798 old_prog = rcu_dereference_protected( 2799 priv->rx_ring[i]->xdp_prog, 2800 lockdep_is_held(&mdev->state_lock)); 2801 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2802 if (old_prog) 2803 bpf_prog_put(old_prog); 2804 } 2805 mutex_unlock(&mdev->state_lock); 2806 return 0; 2807 } 2808 2809 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu)) 2810 return -EOPNOTSUPP; 2811 2812 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 2813 if (!tmp) 2814 return -ENOMEM; 2815 2816 if (prog) { 2817 prog = bpf_prog_add(prog, priv->rx_ring_num - 1); 2818 if (IS_ERR(prog)) { 2819 err = PTR_ERR(prog); 2820 goto out; 2821 } 2822 } 2823 2824 mutex_lock(&mdev->state_lock); 2825 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 2826 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num; 2827 2828 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) { 2829 tx_changed = 1; 2830 new_prof.tx_ring_num[TX] = 2831 MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up); 2832 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n"); 2833 } 2834 2835 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false); 2836 if (err) { 2837 if (prog) 2838 bpf_prog_sub(prog, priv->rx_ring_num - 1); 2839 goto unlock_out; 2840 } 2841 2842 if (priv->port_up) { 2843 port_up = 1; 2844 mlx4_en_stop_port(dev, 1); 2845 } 2846 2847 mlx4_en_safe_replace_resources(priv, tmp); 2848 if (tx_changed) 2849 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 2850 2851 for (i = 0; i < priv->rx_ring_num; i++) { 2852 old_prog = rcu_dereference_protected( 2853 priv->rx_ring[i]->xdp_prog, 2854 lockdep_is_held(&mdev->state_lock)); 2855 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2856 if (old_prog) 2857 bpf_prog_put(old_prog); 2858 } 2859 2860 if (port_up) { 2861 err = mlx4_en_start_port(dev); 2862 if (err) { 2863 en_err(priv, "Failed starting port %d for XDP change\n", 2864 priv->port); 2865 queue_work(mdev->workqueue, &priv->watchdog_task); 2866 } 2867 } 2868 2869 unlock_out: 2870 mutex_unlock(&mdev->state_lock); 2871 out: 2872 kfree(tmp); 2873 return err; 2874 } 2875 2876 static u32 mlx4_xdp_query(struct net_device *dev) 2877 { 2878 struct mlx4_en_priv *priv = netdev_priv(dev); 2879 struct mlx4_en_dev *mdev = priv->mdev; 2880 const struct bpf_prog *xdp_prog; 2881 u32 prog_id = 0; 2882 2883 if (!priv->tx_ring_num[TX_XDP]) 2884 return prog_id; 2885 2886 mutex_lock(&mdev->state_lock); 2887 xdp_prog = rcu_dereference_protected( 2888 priv->rx_ring[0]->xdp_prog, 2889 lockdep_is_held(&mdev->state_lock)); 2890 if (xdp_prog) 2891 prog_id = xdp_prog->aux->id; 2892 mutex_unlock(&mdev->state_lock); 2893 2894 return prog_id; 2895 } 2896 2897 static int mlx4_xdp(struct net_device *dev, struct netdev_xdp *xdp) 2898 { 2899 switch (xdp->command) { 2900 case XDP_SETUP_PROG: 2901 return mlx4_xdp_set(dev, xdp->prog); 2902 case XDP_QUERY_PROG: 2903 xdp->prog_id = mlx4_xdp_query(dev); 2904 xdp->prog_attached = !!xdp->prog_id; 2905 return 0; 2906 default: 2907 return -EINVAL; 2908 } 2909 } 2910 2911 static const struct net_device_ops mlx4_netdev_ops = { 2912 .ndo_open = mlx4_en_open, 2913 .ndo_stop = mlx4_en_close, 2914 .ndo_start_xmit = mlx4_en_xmit, 2915 .ndo_select_queue = mlx4_en_select_queue, 2916 .ndo_get_stats64 = mlx4_en_get_stats64, 2917 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2918 .ndo_set_mac_address = mlx4_en_set_mac, 2919 .ndo_validate_addr = eth_validate_addr, 2920 .ndo_change_mtu = mlx4_en_change_mtu, 2921 .ndo_do_ioctl = mlx4_en_ioctl, 2922 .ndo_tx_timeout = mlx4_en_tx_timeout, 2923 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2924 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2925 #ifdef CONFIG_NET_POLL_CONTROLLER 2926 .ndo_poll_controller = mlx4_en_netpoll, 2927 #endif 2928 .ndo_set_features = mlx4_en_set_features, 2929 .ndo_fix_features = mlx4_en_fix_features, 2930 .ndo_setup_tc = __mlx4_en_setup_tc, 2931 #ifdef CONFIG_RFS_ACCEL 2932 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2933 #endif 2934 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2935 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port, 2936 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port, 2937 .ndo_features_check = mlx4_en_features_check, 2938 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2939 .ndo_xdp = mlx4_xdp, 2940 }; 2941 2942 static const struct net_device_ops mlx4_netdev_ops_master = { 2943 .ndo_open = mlx4_en_open, 2944 .ndo_stop = mlx4_en_close, 2945 .ndo_start_xmit = mlx4_en_xmit, 2946 .ndo_select_queue = mlx4_en_select_queue, 2947 .ndo_get_stats64 = mlx4_en_get_stats64, 2948 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2949 .ndo_set_mac_address = mlx4_en_set_mac, 2950 .ndo_validate_addr = eth_validate_addr, 2951 .ndo_change_mtu = mlx4_en_change_mtu, 2952 .ndo_tx_timeout = mlx4_en_tx_timeout, 2953 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2954 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2955 .ndo_set_vf_mac = mlx4_en_set_vf_mac, 2956 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan, 2957 .ndo_set_vf_rate = mlx4_en_set_vf_rate, 2958 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk, 2959 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state, 2960 .ndo_get_vf_stats = mlx4_en_get_vf_stats, 2961 .ndo_get_vf_config = mlx4_en_get_vf_config, 2962 #ifdef CONFIG_NET_POLL_CONTROLLER 2963 .ndo_poll_controller = mlx4_en_netpoll, 2964 #endif 2965 .ndo_set_features = mlx4_en_set_features, 2966 .ndo_fix_features = mlx4_en_fix_features, 2967 .ndo_setup_tc = __mlx4_en_setup_tc, 2968 #ifdef CONFIG_RFS_ACCEL 2969 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2970 #endif 2971 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2972 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port, 2973 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port, 2974 .ndo_features_check = mlx4_en_features_check, 2975 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2976 .ndo_xdp = mlx4_xdp, 2977 }; 2978 2979 struct mlx4_en_bond { 2980 struct work_struct work; 2981 struct mlx4_en_priv *priv; 2982 int is_bonded; 2983 struct mlx4_port_map port_map; 2984 }; 2985 2986 static void mlx4_en_bond_work(struct work_struct *work) 2987 { 2988 struct mlx4_en_bond *bond = container_of(work, 2989 struct mlx4_en_bond, 2990 work); 2991 int err = 0; 2992 struct mlx4_dev *dev = bond->priv->mdev->dev; 2993 2994 if (bond->is_bonded) { 2995 if (!mlx4_is_bonded(dev)) { 2996 err = mlx4_bond(dev); 2997 if (err) 2998 en_err(bond->priv, "Fail to bond device\n"); 2999 } 3000 if (!err) { 3001 err = mlx4_port_map_set(dev, &bond->port_map); 3002 if (err) 3003 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n", 3004 bond->port_map.port1, 3005 bond->port_map.port2, 3006 err); 3007 } 3008 } else if (mlx4_is_bonded(dev)) { 3009 err = mlx4_unbond(dev); 3010 if (err) 3011 en_err(bond->priv, "Fail to unbond device\n"); 3012 } 3013 dev_put(bond->priv->dev); 3014 kfree(bond); 3015 } 3016 3017 static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded, 3018 u8 v2p_p1, u8 v2p_p2) 3019 { 3020 struct mlx4_en_bond *bond = NULL; 3021 3022 bond = kzalloc(sizeof(*bond), GFP_ATOMIC); 3023 if (!bond) 3024 return -ENOMEM; 3025 3026 INIT_WORK(&bond->work, mlx4_en_bond_work); 3027 bond->priv = priv; 3028 bond->is_bonded = is_bonded; 3029 bond->port_map.port1 = v2p_p1; 3030 bond->port_map.port2 = v2p_p2; 3031 dev_hold(priv->dev); 3032 queue_work(priv->mdev->workqueue, &bond->work); 3033 return 0; 3034 } 3035 3036 int mlx4_en_netdev_event(struct notifier_block *this, 3037 unsigned long event, void *ptr) 3038 { 3039 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 3040 u8 port = 0; 3041 struct mlx4_en_dev *mdev; 3042 struct mlx4_dev *dev; 3043 int i, num_eth_ports = 0; 3044 bool do_bond = true; 3045 struct mlx4_en_priv *priv; 3046 u8 v2p_port1 = 0; 3047 u8 v2p_port2 = 0; 3048 3049 if (!net_eq(dev_net(ndev), &init_net)) 3050 return NOTIFY_DONE; 3051 3052 mdev = container_of(this, struct mlx4_en_dev, nb); 3053 dev = mdev->dev; 3054 3055 /* Go into this mode only when two network devices set on two ports 3056 * of the same mlx4 device are slaves of the same bonding master 3057 */ 3058 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { 3059 ++num_eth_ports; 3060 if (!port && (mdev->pndev[i] == ndev)) 3061 port = i; 3062 mdev->upper[i] = mdev->pndev[i] ? 3063 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL; 3064 /* condition not met: network device is a slave */ 3065 if (!mdev->upper[i]) 3066 do_bond = false; 3067 if (num_eth_ports < 2) 3068 continue; 3069 /* condition not met: same master */ 3070 if (mdev->upper[i] != mdev->upper[i-1]) 3071 do_bond = false; 3072 } 3073 /* condition not met: 2 salves */ 3074 do_bond = (num_eth_ports == 2) ? do_bond : false; 3075 3076 /* handle only events that come with enough info */ 3077 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port) 3078 return NOTIFY_DONE; 3079 3080 priv = netdev_priv(ndev); 3081 if (do_bond) { 3082 struct netdev_notifier_bonding_info *notifier_info = ptr; 3083 struct netdev_bonding_info *bonding_info = 3084 ¬ifier_info->bonding_info; 3085 3086 /* required mode 1, 2 or 4 */ 3087 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) && 3088 (bonding_info->master.bond_mode != BOND_MODE_XOR) && 3089 (bonding_info->master.bond_mode != BOND_MODE_8023AD)) 3090 do_bond = false; 3091 3092 /* require exactly 2 slaves */ 3093 if (bonding_info->master.num_slaves != 2) 3094 do_bond = false; 3095 3096 /* calc v2p */ 3097 if (do_bond) { 3098 if (bonding_info->master.bond_mode == 3099 BOND_MODE_ACTIVEBACKUP) { 3100 /* in active-backup mode virtual ports are 3101 * mapped to the physical port of the active 3102 * slave */ 3103 if (bonding_info->slave.state == 3104 BOND_STATE_BACKUP) { 3105 if (port == 1) { 3106 v2p_port1 = 2; 3107 v2p_port2 = 2; 3108 } else { 3109 v2p_port1 = 1; 3110 v2p_port2 = 1; 3111 } 3112 } else { /* BOND_STATE_ACTIVE */ 3113 if (port == 1) { 3114 v2p_port1 = 1; 3115 v2p_port2 = 1; 3116 } else { 3117 v2p_port1 = 2; 3118 v2p_port2 = 2; 3119 } 3120 } 3121 } else { /* Active-Active */ 3122 /* in active-active mode a virtual port is 3123 * mapped to the native physical port if and only 3124 * if the physical port is up */ 3125 __s8 link = bonding_info->slave.link; 3126 3127 if (port == 1) 3128 v2p_port2 = 2; 3129 else 3130 v2p_port1 = 1; 3131 if ((link == BOND_LINK_UP) || 3132 (link == BOND_LINK_FAIL)) { 3133 if (port == 1) 3134 v2p_port1 = 1; 3135 else 3136 v2p_port2 = 2; 3137 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */ 3138 if (port == 1) 3139 v2p_port1 = 2; 3140 else 3141 v2p_port2 = 1; 3142 } 3143 } 3144 } 3145 } 3146 3147 mlx4_en_queue_bond_work(priv, do_bond, 3148 v2p_port1, v2p_port2); 3149 3150 return NOTIFY_DONE; 3151 } 3152 3153 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev, 3154 struct mlx4_en_stats_bitmap *stats_bitmap, 3155 u8 rx_ppp, u8 rx_pause, 3156 u8 tx_ppp, u8 tx_pause) 3157 { 3158 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS; 3159 3160 if (!mlx4_is_slave(dev) && 3161 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) { 3162 mutex_lock(&stats_bitmap->mutex); 3163 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS); 3164 3165 if (rx_ppp) 3166 bitmap_set(stats_bitmap->bitmap, last_i, 3167 NUM_FLOW_PRIORITY_STATS_RX); 3168 last_i += NUM_FLOW_PRIORITY_STATS_RX; 3169 3170 if (rx_pause && !(rx_ppp)) 3171 bitmap_set(stats_bitmap->bitmap, last_i, 3172 NUM_FLOW_STATS_RX); 3173 last_i += NUM_FLOW_STATS_RX; 3174 3175 if (tx_ppp) 3176 bitmap_set(stats_bitmap->bitmap, last_i, 3177 NUM_FLOW_PRIORITY_STATS_TX); 3178 last_i += NUM_FLOW_PRIORITY_STATS_TX; 3179 3180 if (tx_pause && !(tx_ppp)) 3181 bitmap_set(stats_bitmap->bitmap, last_i, 3182 NUM_FLOW_STATS_TX); 3183 last_i += NUM_FLOW_STATS_TX; 3184 3185 mutex_unlock(&stats_bitmap->mutex); 3186 } 3187 } 3188 3189 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev, 3190 struct mlx4_en_stats_bitmap *stats_bitmap, 3191 u8 rx_ppp, u8 rx_pause, 3192 u8 tx_ppp, u8 tx_pause) 3193 { 3194 int last_i = 0; 3195 3196 mutex_init(&stats_bitmap->mutex); 3197 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS); 3198 3199 if (mlx4_is_slave(dev)) { 3200 bitmap_set(stats_bitmap->bitmap, last_i + 3201 MLX4_FIND_NETDEV_STAT(rx_packets), 1); 3202 bitmap_set(stats_bitmap->bitmap, last_i + 3203 MLX4_FIND_NETDEV_STAT(tx_packets), 1); 3204 bitmap_set(stats_bitmap->bitmap, last_i + 3205 MLX4_FIND_NETDEV_STAT(rx_bytes), 1); 3206 bitmap_set(stats_bitmap->bitmap, last_i + 3207 MLX4_FIND_NETDEV_STAT(tx_bytes), 1); 3208 bitmap_set(stats_bitmap->bitmap, last_i + 3209 MLX4_FIND_NETDEV_STAT(rx_dropped), 1); 3210 bitmap_set(stats_bitmap->bitmap, last_i + 3211 MLX4_FIND_NETDEV_STAT(tx_dropped), 1); 3212 } else { 3213 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS); 3214 } 3215 last_i += NUM_MAIN_STATS; 3216 3217 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS); 3218 last_i += NUM_PORT_STATS; 3219 3220 if (mlx4_is_master(dev)) 3221 bitmap_set(stats_bitmap->bitmap, last_i, 3222 NUM_PF_STATS); 3223 last_i += NUM_PF_STATS; 3224 3225 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap, 3226 rx_ppp, rx_pause, 3227 tx_ppp, tx_pause); 3228 last_i += NUM_FLOW_STATS; 3229 3230 if (!mlx4_is_slave(dev)) 3231 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS); 3232 last_i += NUM_PKT_STATS; 3233 3234 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS); 3235 last_i += NUM_XDP_STATS; 3236 } 3237 3238 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 3239 struct mlx4_en_port_profile *prof) 3240 { 3241 struct net_device *dev; 3242 struct mlx4_en_priv *priv; 3243 int i, t; 3244 int err; 3245 3246 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv), 3247 MAX_TX_RINGS, MAX_RX_RINGS); 3248 if (dev == NULL) 3249 return -ENOMEM; 3250 3251 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]); 3252 netif_set_real_num_rx_queues(dev, prof->rx_ring_num); 3253 3254 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev); 3255 dev->dev_port = port - 1; 3256 3257 /* 3258 * Initialize driver private data 3259 */ 3260 3261 priv = netdev_priv(dev); 3262 memset(priv, 0, sizeof(struct mlx4_en_priv)); 3263 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 3264 spin_lock_init(&priv->stats_lock); 3265 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode); 3266 INIT_WORK(&priv->watchdog_task, mlx4_en_restart); 3267 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); 3268 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); 3269 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task); 3270 INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads); 3271 INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads); 3272 #ifdef CONFIG_RFS_ACCEL 3273 INIT_LIST_HEAD(&priv->filters); 3274 spin_lock_init(&priv->filters_lock); 3275 #endif 3276 3277 priv->dev = dev; 3278 priv->mdev = mdev; 3279 priv->ddev = &mdev->pdev->dev; 3280 priv->prof = prof; 3281 priv->port = port; 3282 priv->port_up = false; 3283 priv->flags = prof->flags; 3284 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME; 3285 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | 3286 MLX4_WQE_CTRL_SOLICITED); 3287 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up; 3288 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK; 3289 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key)); 3290 3291 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 3292 priv->tx_ring_num[t] = prof->tx_ring_num[t]; 3293 if (!priv->tx_ring_num[t]) 3294 continue; 3295 3296 priv->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) * 3297 MAX_TX_RINGS, GFP_KERNEL); 3298 if (!priv->tx_ring[t]) { 3299 err = -ENOMEM; 3300 goto err_free_tx; 3301 } 3302 priv->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) * 3303 MAX_TX_RINGS, GFP_KERNEL); 3304 if (!priv->tx_cq[t]) { 3305 kfree(priv->tx_ring[t]); 3306 err = -ENOMEM; 3307 goto out; 3308 } 3309 } 3310 priv->rx_ring_num = prof->rx_ring_num; 3311 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0; 3312 priv->cqe_size = mdev->dev->caps.cqe_size; 3313 priv->mac_index = -1; 3314 priv->msg_enable = MLX4_EN_MSG_LEVEL; 3315 #ifdef CONFIG_MLX4_EN_DCB 3316 if (!mlx4_is_slave(priv->mdev->dev)) { 3317 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST | 3318 DCB_CAP_DCBX_VER_IEEE; 3319 priv->flags |= MLX4_EN_DCB_ENABLED; 3320 priv->cee_config.pfc_state = false; 3321 3322 for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++) 3323 priv->cee_config.dcb_pfc[i] = pfc_disabled; 3324 3325 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) { 3326 dev->dcbnl_ops = &mlx4_en_dcbnl_ops; 3327 } else { 3328 en_info(priv, "enabling only PFC DCB ops\n"); 3329 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops; 3330 } 3331 } 3332 #endif 3333 3334 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) 3335 INIT_HLIST_HEAD(&priv->mac_hash[i]); 3336 3337 /* Query for default mac and max mtu */ 3338 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; 3339 3340 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] & 3341 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP) 3342 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP; 3343 3344 /* Set default MAC */ 3345 dev->addr_len = ETH_ALEN; 3346 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]); 3347 if (!is_valid_ether_addr(dev->dev_addr)) { 3348 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n", 3349 priv->port, dev->dev_addr); 3350 err = -EINVAL; 3351 goto out; 3352 } else if (mlx4_is_slave(priv->mdev->dev) && 3353 (priv->mdev->dev->port_random_macs & 1 << priv->port)) { 3354 /* Random MAC was assigned in mlx4_slave_cap 3355 * in mlx4_core module 3356 */ 3357 dev->addr_assign_type |= NET_ADDR_RANDOM; 3358 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr); 3359 } 3360 3361 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac)); 3362 3363 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 3364 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 3365 err = mlx4_en_alloc_resources(priv); 3366 if (err) 3367 goto out; 3368 3369 /* Initialize time stamping config */ 3370 priv->hwtstamp_config.flags = 0; 3371 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF; 3372 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; 3373 3374 /* Allocate page for receive rings */ 3375 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, 3376 MLX4_EN_PAGE_SIZE); 3377 if (err) { 3378 en_err(priv, "Failed to allocate page for rx qps\n"); 3379 goto out; 3380 } 3381 priv->allocated = 1; 3382 3383 /* 3384 * Initialize netdev entry points 3385 */ 3386 if (mlx4_is_master(priv->mdev->dev)) 3387 dev->netdev_ops = &mlx4_netdev_ops_master; 3388 else 3389 dev->netdev_ops = &mlx4_netdev_ops; 3390 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; 3391 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 3392 netif_set_real_num_rx_queues(dev, priv->rx_ring_num); 3393 3394 dev->ethtool_ops = &mlx4_en_ethtool_ops; 3395 3396 /* 3397 * Set driver features 3398 */ 3399 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 3400 if (mdev->LSO_support) 3401 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6; 3402 3403 dev->vlan_features = dev->hw_features; 3404 3405 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH; 3406 dev->features = dev->hw_features | NETIF_F_HIGHDMA | 3407 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 3408 NETIF_F_HW_VLAN_CTAG_FILTER; 3409 dev->hw_features |= NETIF_F_LOOPBACK | 3410 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 3411 3412 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) { 3413 dev->features |= NETIF_F_HW_VLAN_STAG_RX | 3414 NETIF_F_HW_VLAN_STAG_FILTER; 3415 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX; 3416 } 3417 3418 if (mlx4_is_slave(mdev->dev)) { 3419 bool vlan_offload_disabled; 3420 int phv; 3421 3422 err = get_phv_bit(mdev->dev, port, &phv); 3423 if (!err && phv) { 3424 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3425 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV; 3426 } 3427 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port, 3428 &vlan_offload_disabled); 3429 if (!err && vlan_offload_disabled) { 3430 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3431 NETIF_F_HW_VLAN_CTAG_RX | 3432 NETIF_F_HW_VLAN_STAG_TX | 3433 NETIF_F_HW_VLAN_STAG_RX); 3434 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3435 NETIF_F_HW_VLAN_CTAG_RX | 3436 NETIF_F_HW_VLAN_STAG_TX | 3437 NETIF_F_HW_VLAN_STAG_RX); 3438 } 3439 } else { 3440 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN && 3441 !(mdev->dev->caps.flags2 & 3442 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 3443 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3444 } 3445 3446 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) 3447 dev->hw_features |= NETIF_F_RXFCS; 3448 3449 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS) 3450 dev->hw_features |= NETIF_F_RXALL; 3451 3452 if (mdev->dev->caps.steering_mode == 3453 MLX4_STEERING_MODE_DEVICE_MANAGED && 3454 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC) 3455 dev->hw_features |= NETIF_F_NTUPLE; 3456 3457 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 3458 dev->priv_flags |= IFF_UNICAST_FLT; 3459 3460 /* Setting a default hash function value */ 3461 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) { 3462 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3463 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) { 3464 priv->rss_hash_fn = ETH_RSS_HASH_XOR; 3465 } else { 3466 en_warn(priv, 3467 "No RSS hash capabilities exposed, using Toeplitz\n"); 3468 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3469 } 3470 3471 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3472 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | 3473 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3474 NETIF_F_GSO_PARTIAL; 3475 dev->features |= NETIF_F_GSO_UDP_TUNNEL | 3476 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3477 NETIF_F_GSO_PARTIAL; 3478 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM; 3479 } 3480 3481 /* MTU range: 46 - hw-specific max */ 3482 dev->min_mtu = MLX4_EN_MIN_MTU; 3483 dev->max_mtu = priv->max_mtu; 3484 3485 mdev->pndev[port] = dev; 3486 mdev->upper[port] = NULL; 3487 3488 netif_carrier_off(dev); 3489 mlx4_en_set_default_moderation(priv); 3490 3491 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]); 3492 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num); 3493 3494 mlx4_en_update_loopback_state(priv->dev, priv->dev->features); 3495 3496 /* Configure port */ 3497 mlx4_en_calc_rx_buf(dev); 3498 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 3499 priv->rx_skb_size + ETH_FCS_LEN, 3500 prof->tx_pause, prof->tx_ppp, 3501 prof->rx_pause, prof->rx_ppp); 3502 if (err) { 3503 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 3504 priv->port, err); 3505 goto out; 3506 } 3507 3508 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3509 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 3510 if (err) { 3511 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 3512 err); 3513 goto out; 3514 } 3515 } 3516 3517 /* Init port */ 3518 en_warn(priv, "Initializing port\n"); 3519 err = mlx4_INIT_PORT(mdev->dev, priv->port); 3520 if (err) { 3521 en_err(priv, "Failed Initializing port\n"); 3522 goto out; 3523 } 3524 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 3525 3526 /* Initialize time stamp mechanism */ 3527 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 3528 mlx4_en_init_timestamp(mdev); 3529 3530 queue_delayed_work(mdev->workqueue, &priv->service_task, 3531 SERVICE_TASK_DELAY); 3532 3533 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap, 3534 mdev->profile.prof[priv->port].rx_ppp, 3535 mdev->profile.prof[priv->port].rx_pause, 3536 mdev->profile.prof[priv->port].tx_ppp, 3537 mdev->profile.prof[priv->port].tx_pause); 3538 3539 err = register_netdev(dev); 3540 if (err) { 3541 en_err(priv, "Netdev registration failed for port %d\n", port); 3542 goto out; 3543 } 3544 3545 priv->registered = 1; 3546 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port), 3547 dev); 3548 3549 return 0; 3550 3551 err_free_tx: 3552 while (t--) { 3553 kfree(priv->tx_ring[t]); 3554 kfree(priv->tx_cq[t]); 3555 } 3556 out: 3557 mlx4_en_destroy_netdev(dev); 3558 return err; 3559 } 3560 3561 int mlx4_en_reset_config(struct net_device *dev, 3562 struct hwtstamp_config ts_config, 3563 netdev_features_t features) 3564 { 3565 struct mlx4_en_priv *priv = netdev_priv(dev); 3566 struct mlx4_en_dev *mdev = priv->mdev; 3567 struct mlx4_en_port_profile new_prof; 3568 struct mlx4_en_priv *tmp; 3569 int port_up = 0; 3570 int err = 0; 3571 3572 if (priv->hwtstamp_config.tx_type == ts_config.tx_type && 3573 priv->hwtstamp_config.rx_filter == ts_config.rx_filter && 3574 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3575 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) 3576 return 0; /* Nothing to change */ 3577 3578 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3579 (features & NETIF_F_HW_VLAN_CTAG_RX) && 3580 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) { 3581 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n"); 3582 return -EINVAL; 3583 } 3584 3585 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 3586 if (!tmp) 3587 return -ENOMEM; 3588 3589 mutex_lock(&mdev->state_lock); 3590 3591 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 3592 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config)); 3593 3594 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true); 3595 if (err) 3596 goto out; 3597 3598 if (priv->port_up) { 3599 port_up = 1; 3600 mlx4_en_stop_port(dev, 1); 3601 } 3602 3603 en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n", 3604 ts_config.rx_filter, 3605 !!(features & NETIF_F_HW_VLAN_CTAG_RX)); 3606 3607 mlx4_en_safe_replace_resources(priv, tmp); 3608 3609 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 3610 if (features & NETIF_F_HW_VLAN_CTAG_RX) 3611 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3612 else 3613 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3614 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) { 3615 /* RX time-stamping is OFF, update the RX vlan offload 3616 * to the latest wanted state 3617 */ 3618 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX) 3619 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3620 else 3621 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3622 } 3623 3624 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) { 3625 if (features & NETIF_F_RXFCS) 3626 dev->features |= NETIF_F_RXFCS; 3627 else 3628 dev->features &= ~NETIF_F_RXFCS; 3629 } 3630 3631 /* RX vlan offload and RX time-stamping can't co-exist ! 3632 * Regardless of the caller's choice, 3633 * Turn Off RX vlan offload in case of time-stamping is ON 3634 */ 3635 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) { 3636 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX) 3637 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n"); 3638 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3639 } 3640 3641 if (port_up) { 3642 err = mlx4_en_start_port(dev); 3643 if (err) 3644 en_err(priv, "Failed starting port\n"); 3645 } 3646 3647 out: 3648 mutex_unlock(&mdev->state_lock); 3649 kfree(tmp); 3650 if (!err) 3651 netdev_features_change(dev); 3652 return err; 3653 } 3654