1 /* 2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 * 32 */ 33 34 #include <linux/bpf.h> 35 #include <linux/etherdevice.h> 36 #include <linux/tcp.h> 37 #include <linux/if_vlan.h> 38 #include <linux/delay.h> 39 #include <linux/slab.h> 40 #include <linux/hash.h> 41 #include <net/ip.h> 42 #include <net/busy_poll.h> 43 #include <net/vxlan.h> 44 #include <net/devlink.h> 45 46 #include <linux/mlx4/driver.h> 47 #include <linux/mlx4/device.h> 48 #include <linux/mlx4/cmd.h> 49 #include <linux/mlx4/cq.h> 50 51 #include "mlx4_en.h" 52 #include "en_port.h" 53 54 #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \ 55 XDP_PACKET_HEADROOM)) 56 57 int mlx4_en_setup_tc(struct net_device *dev, u8 up) 58 { 59 struct mlx4_en_priv *priv = netdev_priv(dev); 60 int i; 61 unsigned int offset = 0; 62 63 if (up && up != MLX4_EN_NUM_UP) 64 return -EINVAL; 65 66 netdev_set_num_tc(dev, up); 67 68 /* Partition Tx queues evenly amongst UP's */ 69 for (i = 0; i < up; i++) { 70 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset); 71 offset += priv->num_tx_rings_p_up; 72 } 73 74 #ifdef CONFIG_MLX4_EN_DCB 75 if (!mlx4_is_slave(priv->mdev->dev)) { 76 if (up) { 77 if (priv->dcbx_cap) 78 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED; 79 } else { 80 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED; 81 priv->cee_config.pfc_state = false; 82 } 83 } 84 #endif /* CONFIG_MLX4_EN_DCB */ 85 86 return 0; 87 } 88 89 static int __mlx4_en_setup_tc(struct net_device *dev, u32 handle, __be16 proto, 90 struct tc_to_netdev *tc) 91 { 92 if (tc->type != TC_SETUP_MQPRIO) 93 return -EINVAL; 94 95 return mlx4_en_setup_tc(dev, tc->tc); 96 } 97 98 #ifdef CONFIG_RFS_ACCEL 99 100 struct mlx4_en_filter { 101 struct list_head next; 102 struct work_struct work; 103 104 u8 ip_proto; 105 __be32 src_ip; 106 __be32 dst_ip; 107 __be16 src_port; 108 __be16 dst_port; 109 110 int rxq_index; 111 struct mlx4_en_priv *priv; 112 u32 flow_id; /* RFS infrastructure id */ 113 int id; /* mlx4_en driver id */ 114 u64 reg_id; /* Flow steering API id */ 115 u8 activated; /* Used to prevent expiry before filter 116 * is attached 117 */ 118 struct hlist_node filter_chain; 119 }; 120 121 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv); 122 123 static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto) 124 { 125 switch (ip_proto) { 126 case IPPROTO_UDP: 127 return MLX4_NET_TRANS_RULE_ID_UDP; 128 case IPPROTO_TCP: 129 return MLX4_NET_TRANS_RULE_ID_TCP; 130 default: 131 return MLX4_NET_TRANS_RULE_NUM; 132 } 133 }; 134 135 /* Must not acquire state_lock, as its corresponding work_sync 136 * is done under it. 137 */ 138 static void mlx4_en_filter_work(struct work_struct *work) 139 { 140 struct mlx4_en_filter *filter = container_of(work, 141 struct mlx4_en_filter, 142 work); 143 struct mlx4_en_priv *priv = filter->priv; 144 struct mlx4_spec_list spec_tcp_udp = { 145 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto), 146 { 147 .tcp_udp = { 148 .dst_port = filter->dst_port, 149 .dst_port_msk = (__force __be16)-1, 150 .src_port = filter->src_port, 151 .src_port_msk = (__force __be16)-1, 152 }, 153 }, 154 }; 155 struct mlx4_spec_list spec_ip = { 156 .id = MLX4_NET_TRANS_RULE_ID_IPV4, 157 { 158 .ipv4 = { 159 .dst_ip = filter->dst_ip, 160 .dst_ip_msk = (__force __be32)-1, 161 .src_ip = filter->src_ip, 162 .src_ip_msk = (__force __be32)-1, 163 }, 164 }, 165 }; 166 struct mlx4_spec_list spec_eth = { 167 .id = MLX4_NET_TRANS_RULE_ID_ETH, 168 }; 169 struct mlx4_net_trans_rule rule = { 170 .list = LIST_HEAD_INIT(rule.list), 171 .queue_mode = MLX4_NET_TRANS_Q_LIFO, 172 .exclusive = 1, 173 .allow_loopback = 1, 174 .promisc_mode = MLX4_FS_REGULAR, 175 .port = priv->port, 176 .priority = MLX4_DOMAIN_RFS, 177 }; 178 int rc; 179 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 180 181 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) { 182 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n", 183 filter->ip_proto); 184 goto ignore; 185 } 186 list_add_tail(&spec_eth.list, &rule.list); 187 list_add_tail(&spec_ip.list, &rule.list); 188 list_add_tail(&spec_tcp_udp.list, &rule.list); 189 190 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn; 191 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN); 192 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 193 194 filter->activated = 0; 195 196 if (filter->reg_id) { 197 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 198 if (rc && rc != -ENOENT) 199 en_err(priv, "Error detaching flow. rc = %d\n", rc); 200 } 201 202 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); 203 if (rc) 204 en_err(priv, "Error attaching flow. err = %d\n", rc); 205 206 ignore: 207 mlx4_en_filter_rfs_expire(priv); 208 209 filter->activated = 1; 210 } 211 212 static inline struct hlist_head * 213 filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 214 __be16 src_port, __be16 dst_port) 215 { 216 unsigned long l; 217 int bucket_idx; 218 219 l = (__force unsigned long)src_port | 220 ((__force unsigned long)dst_port << 2); 221 l ^= (__force unsigned long)(src_ip ^ dst_ip); 222 223 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT); 224 225 return &priv->filter_hash[bucket_idx]; 226 } 227 228 static struct mlx4_en_filter * 229 mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip, 230 __be32 dst_ip, u8 ip_proto, __be16 src_port, 231 __be16 dst_port, u32 flow_id) 232 { 233 struct mlx4_en_filter *filter = NULL; 234 235 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC); 236 if (!filter) 237 return NULL; 238 239 filter->priv = priv; 240 filter->rxq_index = rxq_index; 241 INIT_WORK(&filter->work, mlx4_en_filter_work); 242 243 filter->src_ip = src_ip; 244 filter->dst_ip = dst_ip; 245 filter->ip_proto = ip_proto; 246 filter->src_port = src_port; 247 filter->dst_port = dst_port; 248 249 filter->flow_id = flow_id; 250 251 filter->id = priv->last_filter_id++ % RPS_NO_FILTER; 252 253 list_add_tail(&filter->next, &priv->filters); 254 hlist_add_head(&filter->filter_chain, 255 filter_hash_bucket(priv, src_ip, dst_ip, src_port, 256 dst_port)); 257 258 return filter; 259 } 260 261 static void mlx4_en_filter_free(struct mlx4_en_filter *filter) 262 { 263 struct mlx4_en_priv *priv = filter->priv; 264 int rc; 265 266 list_del(&filter->next); 267 268 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 269 if (rc && rc != -ENOENT) 270 en_err(priv, "Error detaching flow. rc = %d\n", rc); 271 272 kfree(filter); 273 } 274 275 static inline struct mlx4_en_filter * 276 mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 277 u8 ip_proto, __be16 src_port, __be16 dst_port) 278 { 279 struct mlx4_en_filter *filter; 280 struct mlx4_en_filter *ret = NULL; 281 282 hlist_for_each_entry(filter, 283 filter_hash_bucket(priv, src_ip, dst_ip, 284 src_port, dst_port), 285 filter_chain) { 286 if (filter->src_ip == src_ip && 287 filter->dst_ip == dst_ip && 288 filter->ip_proto == ip_proto && 289 filter->src_port == src_port && 290 filter->dst_port == dst_port) { 291 ret = filter; 292 break; 293 } 294 } 295 296 return ret; 297 } 298 299 static int 300 mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, 301 u16 rxq_index, u32 flow_id) 302 { 303 struct mlx4_en_priv *priv = netdev_priv(net_dev); 304 struct mlx4_en_filter *filter; 305 const struct iphdr *ip; 306 const __be16 *ports; 307 u8 ip_proto; 308 __be32 src_ip; 309 __be32 dst_ip; 310 __be16 src_port; 311 __be16 dst_port; 312 int nhoff = skb_network_offset(skb); 313 int ret = 0; 314 315 if (skb->protocol != htons(ETH_P_IP)) 316 return -EPROTONOSUPPORT; 317 318 ip = (const struct iphdr *)(skb->data + nhoff); 319 if (ip_is_fragment(ip)) 320 return -EPROTONOSUPPORT; 321 322 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP)) 323 return -EPROTONOSUPPORT; 324 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl); 325 326 ip_proto = ip->protocol; 327 src_ip = ip->saddr; 328 dst_ip = ip->daddr; 329 src_port = ports[0]; 330 dst_port = ports[1]; 331 332 spin_lock_bh(&priv->filters_lock); 333 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto, 334 src_port, dst_port); 335 if (filter) { 336 if (filter->rxq_index == rxq_index) 337 goto out; 338 339 filter->rxq_index = rxq_index; 340 } else { 341 filter = mlx4_en_filter_alloc(priv, rxq_index, 342 src_ip, dst_ip, ip_proto, 343 src_port, dst_port, flow_id); 344 if (!filter) { 345 ret = -ENOMEM; 346 goto err; 347 } 348 } 349 350 queue_work(priv->mdev->workqueue, &filter->work); 351 352 out: 353 ret = filter->id; 354 err: 355 spin_unlock_bh(&priv->filters_lock); 356 357 return ret; 358 } 359 360 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv) 361 { 362 struct mlx4_en_filter *filter, *tmp; 363 LIST_HEAD(del_list); 364 365 spin_lock_bh(&priv->filters_lock); 366 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 367 list_move(&filter->next, &del_list); 368 hlist_del(&filter->filter_chain); 369 } 370 spin_unlock_bh(&priv->filters_lock); 371 372 list_for_each_entry_safe(filter, tmp, &del_list, next) { 373 cancel_work_sync(&filter->work); 374 mlx4_en_filter_free(filter); 375 } 376 } 377 378 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv) 379 { 380 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL; 381 LIST_HEAD(del_list); 382 int i = 0; 383 384 spin_lock_bh(&priv->filters_lock); 385 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 386 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA) 387 break; 388 389 if (filter->activated && 390 !work_pending(&filter->work) && 391 rps_may_expire_flow(priv->dev, 392 filter->rxq_index, filter->flow_id, 393 filter->id)) { 394 list_move(&filter->next, &del_list); 395 hlist_del(&filter->filter_chain); 396 } else 397 last_filter = filter; 398 399 i++; 400 } 401 402 if (last_filter && (&last_filter->next != priv->filters.next)) 403 list_move(&priv->filters, &last_filter->next); 404 405 spin_unlock_bh(&priv->filters_lock); 406 407 list_for_each_entry_safe(filter, tmp, &del_list, next) 408 mlx4_en_filter_free(filter); 409 } 410 #endif 411 412 static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, 413 __be16 proto, u16 vid) 414 { 415 struct mlx4_en_priv *priv = netdev_priv(dev); 416 struct mlx4_en_dev *mdev = priv->mdev; 417 int err; 418 int idx; 419 420 en_dbg(HW, priv, "adding VLAN:%d\n", vid); 421 422 set_bit(vid, priv->active_vlans); 423 424 /* Add VID to port VLAN filter */ 425 mutex_lock(&mdev->state_lock); 426 if (mdev->device_up && priv->port_up) { 427 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 428 if (err) { 429 en_err(priv, "Failed configuring VLAN filter\n"); 430 goto out; 431 } 432 } 433 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx); 434 if (err) 435 en_dbg(HW, priv, "Failed adding vlan %d\n", vid); 436 437 out: 438 mutex_unlock(&mdev->state_lock); 439 return err; 440 } 441 442 static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, 443 __be16 proto, u16 vid) 444 { 445 struct mlx4_en_priv *priv = netdev_priv(dev); 446 struct mlx4_en_dev *mdev = priv->mdev; 447 int err = 0; 448 449 en_dbg(HW, priv, "Killing VID:%d\n", vid); 450 451 clear_bit(vid, priv->active_vlans); 452 453 /* Remove VID from port VLAN filter */ 454 mutex_lock(&mdev->state_lock); 455 mlx4_unregister_vlan(mdev->dev, priv->port, vid); 456 457 if (mdev->device_up && priv->port_up) { 458 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 459 if (err) 460 en_err(priv, "Failed configuring VLAN filter\n"); 461 } 462 mutex_unlock(&mdev->state_lock); 463 464 return err; 465 } 466 467 static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac) 468 { 469 int i; 470 for (i = ETH_ALEN - 1; i >= 0; --i) { 471 dst_mac[i] = src_mac & 0xff; 472 src_mac >>= 8; 473 } 474 memset(&dst_mac[ETH_ALEN], 0, 2); 475 } 476 477 478 static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr, 479 int qpn, u64 *reg_id) 480 { 481 int err; 482 483 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 484 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 485 return 0; /* do nothing */ 486 487 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn, 488 MLX4_DOMAIN_NIC, reg_id); 489 if (err) { 490 en_err(priv, "failed to add vxlan steering rule, err %d\n", err); 491 return err; 492 } 493 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id); 494 return 0; 495 } 496 497 498 static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv, 499 unsigned char *mac, int *qpn, u64 *reg_id) 500 { 501 struct mlx4_en_dev *mdev = priv->mdev; 502 struct mlx4_dev *dev = mdev->dev; 503 int err; 504 505 switch (dev->caps.steering_mode) { 506 case MLX4_STEERING_MODE_B0: { 507 struct mlx4_qp qp; 508 u8 gid[16] = {0}; 509 510 qp.qpn = *qpn; 511 memcpy(&gid[10], mac, ETH_ALEN); 512 gid[5] = priv->port; 513 514 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH); 515 break; 516 } 517 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 518 struct mlx4_spec_list spec_eth = { {NULL} }; 519 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 520 521 struct mlx4_net_trans_rule rule = { 522 .queue_mode = MLX4_NET_TRANS_Q_FIFO, 523 .exclusive = 0, 524 .allow_loopback = 1, 525 .promisc_mode = MLX4_FS_REGULAR, 526 .priority = MLX4_DOMAIN_NIC, 527 }; 528 529 rule.port = priv->port; 530 rule.qpn = *qpn; 531 INIT_LIST_HEAD(&rule.list); 532 533 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH; 534 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN); 535 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 536 list_add_tail(&spec_eth.list, &rule.list); 537 538 err = mlx4_flow_attach(dev, &rule, reg_id); 539 break; 540 } 541 default: 542 return -EINVAL; 543 } 544 if (err) 545 en_warn(priv, "Failed Attaching Unicast\n"); 546 547 return err; 548 } 549 550 static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv, 551 unsigned char *mac, int qpn, u64 reg_id) 552 { 553 struct mlx4_en_dev *mdev = priv->mdev; 554 struct mlx4_dev *dev = mdev->dev; 555 556 switch (dev->caps.steering_mode) { 557 case MLX4_STEERING_MODE_B0: { 558 struct mlx4_qp qp; 559 u8 gid[16] = {0}; 560 561 qp.qpn = qpn; 562 memcpy(&gid[10], mac, ETH_ALEN); 563 gid[5] = priv->port; 564 565 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH); 566 break; 567 } 568 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 569 mlx4_flow_detach(dev, reg_id); 570 break; 571 } 572 default: 573 en_err(priv, "Invalid steering mode.\n"); 574 } 575 } 576 577 static int mlx4_en_get_qp(struct mlx4_en_priv *priv) 578 { 579 struct mlx4_en_dev *mdev = priv->mdev; 580 struct mlx4_dev *dev = mdev->dev; 581 int index = 0; 582 int err = 0; 583 int *qpn = &priv->base_qpn; 584 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr); 585 586 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n", 587 priv->dev->dev_addr); 588 index = mlx4_register_mac(dev, priv->port, mac); 589 if (index < 0) { 590 err = index; 591 en_err(priv, "Failed adding MAC: %pM\n", 592 priv->dev->dev_addr); 593 return err; 594 } 595 596 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 597 int base_qpn = mlx4_get_base_qpn(dev, priv->port); 598 *qpn = base_qpn + index; 599 return 0; 600 } 601 602 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP); 603 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn); 604 if (err) { 605 en_err(priv, "Failed to reserve qp for mac registration\n"); 606 mlx4_unregister_mac(dev, priv->port, mac); 607 return err; 608 } 609 610 return 0; 611 } 612 613 static void mlx4_en_put_qp(struct mlx4_en_priv *priv) 614 { 615 struct mlx4_en_dev *mdev = priv->mdev; 616 struct mlx4_dev *dev = mdev->dev; 617 int qpn = priv->base_qpn; 618 619 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 620 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr); 621 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", 622 priv->dev->dev_addr); 623 mlx4_unregister_mac(dev, priv->port, mac); 624 } else { 625 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n", 626 priv->port, qpn); 627 mlx4_qp_release_range(dev, qpn, 1); 628 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 629 } 630 } 631 632 static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn, 633 unsigned char *new_mac, unsigned char *prev_mac) 634 { 635 struct mlx4_en_dev *mdev = priv->mdev; 636 struct mlx4_dev *dev = mdev->dev; 637 int err = 0; 638 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac); 639 640 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { 641 struct hlist_head *bucket; 642 unsigned int mac_hash; 643 struct mlx4_mac_entry *entry; 644 struct hlist_node *tmp; 645 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac); 646 647 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]]; 648 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 649 if (ether_addr_equal_64bits(entry->mac, prev_mac)) { 650 mlx4_en_uc_steer_release(priv, entry->mac, 651 qpn, entry->reg_id); 652 mlx4_unregister_mac(dev, priv->port, 653 prev_mac_u64); 654 hlist_del_rcu(&entry->hlist); 655 synchronize_rcu(); 656 memcpy(entry->mac, new_mac, ETH_ALEN); 657 entry->reg_id = 0; 658 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX]; 659 hlist_add_head_rcu(&entry->hlist, 660 &priv->mac_hash[mac_hash]); 661 mlx4_register_mac(dev, priv->port, new_mac_u64); 662 err = mlx4_en_uc_steer_add(priv, new_mac, 663 &qpn, 664 &entry->reg_id); 665 if (err) 666 return err; 667 if (priv->tunnel_reg_id) { 668 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 669 priv->tunnel_reg_id = 0; 670 } 671 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn, 672 &priv->tunnel_reg_id); 673 return err; 674 } 675 } 676 return -EINVAL; 677 } 678 679 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64); 680 } 681 682 static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv, 683 unsigned char new_mac[ETH_ALEN + 2]) 684 { 685 int err = 0; 686 687 if (priv->port_up) { 688 /* Remove old MAC and insert the new one */ 689 err = mlx4_en_replace_mac(priv, priv->base_qpn, 690 new_mac, priv->current_mac); 691 if (err) 692 en_err(priv, "Failed changing HW MAC address\n"); 693 } else 694 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n"); 695 696 if (!err) 697 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac)); 698 699 return err; 700 } 701 702 static int mlx4_en_set_mac(struct net_device *dev, void *addr) 703 { 704 struct mlx4_en_priv *priv = netdev_priv(dev); 705 struct mlx4_en_dev *mdev = priv->mdev; 706 struct sockaddr *saddr = addr; 707 unsigned char new_mac[ETH_ALEN + 2]; 708 int err; 709 710 if (!is_valid_ether_addr(saddr->sa_data)) 711 return -EADDRNOTAVAIL; 712 713 mutex_lock(&mdev->state_lock); 714 memcpy(new_mac, saddr->sa_data, ETH_ALEN); 715 err = mlx4_en_do_set_mac(priv, new_mac); 716 if (!err) 717 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); 718 mutex_unlock(&mdev->state_lock); 719 720 return err; 721 } 722 723 static void mlx4_en_clear_list(struct net_device *dev) 724 { 725 struct mlx4_en_priv *priv = netdev_priv(dev); 726 struct mlx4_en_mc_list *tmp, *mc_to_del; 727 728 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) { 729 list_del(&mc_to_del->list); 730 kfree(mc_to_del); 731 } 732 } 733 734 static void mlx4_en_cache_mclist(struct net_device *dev) 735 { 736 struct mlx4_en_priv *priv = netdev_priv(dev); 737 struct netdev_hw_addr *ha; 738 struct mlx4_en_mc_list *tmp; 739 740 mlx4_en_clear_list(dev); 741 netdev_for_each_mc_addr(ha, dev) { 742 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC); 743 if (!tmp) { 744 mlx4_en_clear_list(dev); 745 return; 746 } 747 memcpy(tmp->addr, ha->addr, ETH_ALEN); 748 list_add_tail(&tmp->list, &priv->mc_list); 749 } 750 } 751 752 static void update_mclist_flags(struct mlx4_en_priv *priv, 753 struct list_head *dst, 754 struct list_head *src) 755 { 756 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc; 757 bool found; 758 759 /* Find all the entries that should be removed from dst, 760 * These are the entries that are not found in src 761 */ 762 list_for_each_entry(dst_tmp, dst, list) { 763 found = false; 764 list_for_each_entry(src_tmp, src, list) { 765 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 766 found = true; 767 break; 768 } 769 } 770 if (!found) 771 dst_tmp->action = MCLIST_REM; 772 } 773 774 /* Add entries that exist in src but not in dst 775 * mark them as need to add 776 */ 777 list_for_each_entry(src_tmp, src, list) { 778 found = false; 779 list_for_each_entry(dst_tmp, dst, list) { 780 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 781 dst_tmp->action = MCLIST_NONE; 782 found = true; 783 break; 784 } 785 } 786 if (!found) { 787 new_mc = kmemdup(src_tmp, 788 sizeof(struct mlx4_en_mc_list), 789 GFP_KERNEL); 790 if (!new_mc) 791 return; 792 793 new_mc->action = MCLIST_ADD; 794 list_add_tail(&new_mc->list, dst); 795 } 796 } 797 } 798 799 static void mlx4_en_set_rx_mode(struct net_device *dev) 800 { 801 struct mlx4_en_priv *priv = netdev_priv(dev); 802 803 if (!priv->port_up) 804 return; 805 806 queue_work(priv->mdev->workqueue, &priv->rx_mode_task); 807 } 808 809 static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv, 810 struct mlx4_en_dev *mdev) 811 { 812 int err = 0; 813 814 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { 815 if (netif_msg_rx_status(priv)) 816 en_warn(priv, "Entering promiscuous mode\n"); 817 priv->flags |= MLX4_EN_FLAG_PROMISC; 818 819 /* Enable promiscouos mode */ 820 switch (mdev->dev->caps.steering_mode) { 821 case MLX4_STEERING_MODE_DEVICE_MANAGED: 822 err = mlx4_flow_steer_promisc_add(mdev->dev, 823 priv->port, 824 priv->base_qpn, 825 MLX4_FS_ALL_DEFAULT); 826 if (err) 827 en_err(priv, "Failed enabling promiscuous mode\n"); 828 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 829 break; 830 831 case MLX4_STEERING_MODE_B0: 832 err = mlx4_unicast_promisc_add(mdev->dev, 833 priv->base_qpn, 834 priv->port); 835 if (err) 836 en_err(priv, "Failed enabling unicast promiscuous mode\n"); 837 838 /* Add the default qp number as multicast 839 * promisc 840 */ 841 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 842 err = mlx4_multicast_promisc_add(mdev->dev, 843 priv->base_qpn, 844 priv->port); 845 if (err) 846 en_err(priv, "Failed enabling multicast promiscuous mode\n"); 847 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 848 } 849 break; 850 851 case MLX4_STEERING_MODE_A0: 852 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 853 priv->port, 854 priv->base_qpn, 855 1); 856 if (err) 857 en_err(priv, "Failed enabling promiscuous mode\n"); 858 break; 859 } 860 861 /* Disable port multicast filter (unconditionally) */ 862 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 863 0, MLX4_MCAST_DISABLE); 864 if (err) 865 en_err(priv, "Failed disabling multicast filter\n"); 866 } 867 } 868 869 static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv, 870 struct mlx4_en_dev *mdev) 871 { 872 int err = 0; 873 874 if (netif_msg_rx_status(priv)) 875 en_warn(priv, "Leaving promiscuous mode\n"); 876 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 877 878 /* Disable promiscouos mode */ 879 switch (mdev->dev->caps.steering_mode) { 880 case MLX4_STEERING_MODE_DEVICE_MANAGED: 881 err = mlx4_flow_steer_promisc_remove(mdev->dev, 882 priv->port, 883 MLX4_FS_ALL_DEFAULT); 884 if (err) 885 en_err(priv, "Failed disabling promiscuous mode\n"); 886 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 887 break; 888 889 case MLX4_STEERING_MODE_B0: 890 err = mlx4_unicast_promisc_remove(mdev->dev, 891 priv->base_qpn, 892 priv->port); 893 if (err) 894 en_err(priv, "Failed disabling unicast promiscuous mode\n"); 895 /* Disable Multicast promisc */ 896 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 897 err = mlx4_multicast_promisc_remove(mdev->dev, 898 priv->base_qpn, 899 priv->port); 900 if (err) 901 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 902 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 903 } 904 break; 905 906 case MLX4_STEERING_MODE_A0: 907 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 908 priv->port, 909 priv->base_qpn, 0); 910 if (err) 911 en_err(priv, "Failed disabling promiscuous mode\n"); 912 break; 913 } 914 } 915 916 static void mlx4_en_do_multicast(struct mlx4_en_priv *priv, 917 struct net_device *dev, 918 struct mlx4_en_dev *mdev) 919 { 920 struct mlx4_en_mc_list *mclist, *tmp; 921 u64 mcast_addr = 0; 922 u8 mc_list[16] = {0}; 923 int err = 0; 924 925 /* Enable/disable the multicast filter according to IFF_ALLMULTI */ 926 if (dev->flags & IFF_ALLMULTI) { 927 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 928 0, MLX4_MCAST_DISABLE); 929 if (err) 930 en_err(priv, "Failed disabling multicast filter\n"); 931 932 /* Add the default qp number as multicast promisc */ 933 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 934 switch (mdev->dev->caps.steering_mode) { 935 case MLX4_STEERING_MODE_DEVICE_MANAGED: 936 err = mlx4_flow_steer_promisc_add(mdev->dev, 937 priv->port, 938 priv->base_qpn, 939 MLX4_FS_MC_DEFAULT); 940 break; 941 942 case MLX4_STEERING_MODE_B0: 943 err = mlx4_multicast_promisc_add(mdev->dev, 944 priv->base_qpn, 945 priv->port); 946 break; 947 948 case MLX4_STEERING_MODE_A0: 949 break; 950 } 951 if (err) 952 en_err(priv, "Failed entering multicast promisc mode\n"); 953 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 954 } 955 } else { 956 /* Disable Multicast promisc */ 957 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 958 switch (mdev->dev->caps.steering_mode) { 959 case MLX4_STEERING_MODE_DEVICE_MANAGED: 960 err = mlx4_flow_steer_promisc_remove(mdev->dev, 961 priv->port, 962 MLX4_FS_MC_DEFAULT); 963 break; 964 965 case MLX4_STEERING_MODE_B0: 966 err = mlx4_multicast_promisc_remove(mdev->dev, 967 priv->base_qpn, 968 priv->port); 969 break; 970 971 case MLX4_STEERING_MODE_A0: 972 break; 973 } 974 if (err) 975 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 976 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 977 } 978 979 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 980 0, MLX4_MCAST_DISABLE); 981 if (err) 982 en_err(priv, "Failed disabling multicast filter\n"); 983 984 /* Flush mcast filter and init it with broadcast address */ 985 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, 986 1, MLX4_MCAST_CONFIG); 987 988 /* Update multicast list - we cache all addresses so they won't 989 * change while HW is updated holding the command semaphor */ 990 netif_addr_lock_bh(dev); 991 mlx4_en_cache_mclist(dev); 992 netif_addr_unlock_bh(dev); 993 list_for_each_entry(mclist, &priv->mc_list, list) { 994 mcast_addr = mlx4_mac_to_u64(mclist->addr); 995 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 996 mcast_addr, 0, MLX4_MCAST_CONFIG); 997 } 998 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 999 0, MLX4_MCAST_ENABLE); 1000 if (err) 1001 en_err(priv, "Failed enabling multicast filter\n"); 1002 1003 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list); 1004 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1005 if (mclist->action == MCLIST_REM) { 1006 /* detach this address and delete from list */ 1007 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1008 mc_list[5] = priv->port; 1009 err = mlx4_multicast_detach(mdev->dev, 1010 &priv->rss_map.indir_qp, 1011 mc_list, 1012 MLX4_PROT_ETH, 1013 mclist->reg_id); 1014 if (err) 1015 en_err(priv, "Fail to detach multicast address\n"); 1016 1017 if (mclist->tunnel_reg_id) { 1018 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id); 1019 if (err) 1020 en_err(priv, "Failed to detach multicast address\n"); 1021 } 1022 1023 /* remove from list */ 1024 list_del(&mclist->list); 1025 kfree(mclist); 1026 } else if (mclist->action == MCLIST_ADD) { 1027 /* attach the address */ 1028 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1029 /* needed for B0 steering support */ 1030 mc_list[5] = priv->port; 1031 err = mlx4_multicast_attach(mdev->dev, 1032 &priv->rss_map.indir_qp, 1033 mc_list, 1034 priv->port, 0, 1035 MLX4_PROT_ETH, 1036 &mclist->reg_id); 1037 if (err) 1038 en_err(priv, "Fail to attach multicast address\n"); 1039 1040 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn, 1041 &mclist->tunnel_reg_id); 1042 if (err) 1043 en_err(priv, "Failed to attach multicast address\n"); 1044 } 1045 } 1046 } 1047 } 1048 1049 static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv, 1050 struct net_device *dev, 1051 struct mlx4_en_dev *mdev) 1052 { 1053 struct netdev_hw_addr *ha; 1054 struct mlx4_mac_entry *entry; 1055 struct hlist_node *tmp; 1056 bool found; 1057 u64 mac; 1058 int err = 0; 1059 struct hlist_head *bucket; 1060 unsigned int i; 1061 int removed = 0; 1062 u32 prev_flags; 1063 1064 /* Note that we do not need to protect our mac_hash traversal with rcu, 1065 * since all modification code is protected by mdev->state_lock 1066 */ 1067 1068 /* find what to remove */ 1069 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1070 bucket = &priv->mac_hash[i]; 1071 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1072 found = false; 1073 netdev_for_each_uc_addr(ha, dev) { 1074 if (ether_addr_equal_64bits(entry->mac, 1075 ha->addr)) { 1076 found = true; 1077 break; 1078 } 1079 } 1080 1081 /* MAC address of the port is not in uc list */ 1082 if (ether_addr_equal_64bits(entry->mac, 1083 priv->current_mac)) 1084 found = true; 1085 1086 if (!found) { 1087 mac = mlx4_mac_to_u64(entry->mac); 1088 mlx4_en_uc_steer_release(priv, entry->mac, 1089 priv->base_qpn, 1090 entry->reg_id); 1091 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1092 1093 hlist_del_rcu(&entry->hlist); 1094 kfree_rcu(entry, rcu); 1095 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n", 1096 entry->mac, priv->port); 1097 ++removed; 1098 } 1099 } 1100 } 1101 1102 /* if we didn't remove anything, there is no use in trying to add 1103 * again once we are in a forced promisc mode state 1104 */ 1105 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed) 1106 return; 1107 1108 prev_flags = priv->flags; 1109 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 1110 1111 /* find what to add */ 1112 netdev_for_each_uc_addr(ha, dev) { 1113 found = false; 1114 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]]; 1115 hlist_for_each_entry(entry, bucket, hlist) { 1116 if (ether_addr_equal_64bits(entry->mac, ha->addr)) { 1117 found = true; 1118 break; 1119 } 1120 } 1121 1122 if (!found) { 1123 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1124 if (!entry) { 1125 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n", 1126 ha->addr, priv->port); 1127 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1128 break; 1129 } 1130 mac = mlx4_mac_to_u64(ha->addr); 1131 memcpy(entry->mac, ha->addr, ETH_ALEN); 1132 err = mlx4_register_mac(mdev->dev, priv->port, mac); 1133 if (err < 0) { 1134 en_err(priv, "Failed registering MAC %pM on port %d: %d\n", 1135 ha->addr, priv->port, err); 1136 kfree(entry); 1137 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1138 break; 1139 } 1140 err = mlx4_en_uc_steer_add(priv, ha->addr, 1141 &priv->base_qpn, 1142 &entry->reg_id); 1143 if (err) { 1144 en_err(priv, "Failed adding MAC %pM on port %d: %d\n", 1145 ha->addr, priv->port, err); 1146 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1147 kfree(entry); 1148 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1149 break; 1150 } else { 1151 unsigned int mac_hash; 1152 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n", 1153 ha->addr, priv->port); 1154 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX]; 1155 bucket = &priv->mac_hash[mac_hash]; 1156 hlist_add_head_rcu(&entry->hlist, bucket); 1157 } 1158 } 1159 } 1160 1161 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1162 en_warn(priv, "Forcing promiscuous mode on port:%d\n", 1163 priv->port); 1164 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1165 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n", 1166 priv->port); 1167 } 1168 } 1169 1170 static void mlx4_en_do_set_rx_mode(struct work_struct *work) 1171 { 1172 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1173 rx_mode_task); 1174 struct mlx4_en_dev *mdev = priv->mdev; 1175 struct net_device *dev = priv->dev; 1176 1177 mutex_lock(&mdev->state_lock); 1178 if (!mdev->device_up) { 1179 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n"); 1180 goto out; 1181 } 1182 if (!priv->port_up) { 1183 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n"); 1184 goto out; 1185 } 1186 1187 if (!netif_carrier_ok(dev)) { 1188 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) { 1189 if (priv->port_state.link_state) { 1190 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP; 1191 netif_carrier_on(dev); 1192 en_dbg(LINK, priv, "Link Up\n"); 1193 } 1194 } 1195 } 1196 1197 if (dev->priv_flags & IFF_UNICAST_FLT) 1198 mlx4_en_do_uc_filter(priv, dev, mdev); 1199 1200 /* Promsicuous mode: disable all filters */ 1201 if ((dev->flags & IFF_PROMISC) || 1202 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) { 1203 mlx4_en_set_promisc_mode(priv, mdev); 1204 goto out; 1205 } 1206 1207 /* Not in promiscuous mode */ 1208 if (priv->flags & MLX4_EN_FLAG_PROMISC) 1209 mlx4_en_clear_promisc_mode(priv, mdev); 1210 1211 mlx4_en_do_multicast(priv, dev, mdev); 1212 out: 1213 mutex_unlock(&mdev->state_lock); 1214 } 1215 1216 #ifdef CONFIG_NET_POLL_CONTROLLER 1217 static void mlx4_en_netpoll(struct net_device *dev) 1218 { 1219 struct mlx4_en_priv *priv = netdev_priv(dev); 1220 struct mlx4_en_cq *cq; 1221 int i; 1222 1223 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1224 cq = priv->tx_cq[TX][i]; 1225 napi_schedule(&cq->napi); 1226 } 1227 } 1228 #endif 1229 1230 static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv) 1231 { 1232 u64 reg_id; 1233 int err = 0; 1234 int *qpn = &priv->base_qpn; 1235 struct mlx4_mac_entry *entry; 1236 1237 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id); 1238 if (err) 1239 return err; 1240 1241 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn, 1242 &priv->tunnel_reg_id); 1243 if (err) 1244 goto tunnel_err; 1245 1246 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1247 if (!entry) { 1248 err = -ENOMEM; 1249 goto alloc_err; 1250 } 1251 1252 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac)); 1253 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac)); 1254 entry->reg_id = reg_id; 1255 hlist_add_head_rcu(&entry->hlist, 1256 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]); 1257 1258 return 0; 1259 1260 alloc_err: 1261 if (priv->tunnel_reg_id) 1262 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1263 1264 tunnel_err: 1265 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id); 1266 return err; 1267 } 1268 1269 static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv) 1270 { 1271 u64 mac; 1272 unsigned int i; 1273 int qpn = priv->base_qpn; 1274 struct hlist_head *bucket; 1275 struct hlist_node *tmp; 1276 struct mlx4_mac_entry *entry; 1277 1278 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1279 bucket = &priv->mac_hash[i]; 1280 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1281 mac = mlx4_mac_to_u64(entry->mac); 1282 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n", 1283 entry->mac); 1284 mlx4_en_uc_steer_release(priv, entry->mac, 1285 qpn, entry->reg_id); 1286 1287 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac); 1288 hlist_del_rcu(&entry->hlist); 1289 kfree_rcu(entry, rcu); 1290 } 1291 } 1292 1293 if (priv->tunnel_reg_id) { 1294 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1295 priv->tunnel_reg_id = 0; 1296 } 1297 } 1298 1299 static void mlx4_en_tx_timeout(struct net_device *dev) 1300 { 1301 struct mlx4_en_priv *priv = netdev_priv(dev); 1302 struct mlx4_en_dev *mdev = priv->mdev; 1303 int i; 1304 1305 if (netif_msg_timer(priv)) 1306 en_warn(priv, "Tx timeout called on port:%d\n", priv->port); 1307 1308 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1309 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][i]; 1310 1311 if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i))) 1312 continue; 1313 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n", 1314 i, tx_ring->qpn, tx_ring->sp_cqn, 1315 tx_ring->cons, tx_ring->prod); 1316 } 1317 1318 priv->port_stats.tx_timeout++; 1319 en_dbg(DRV, priv, "Scheduling watchdog\n"); 1320 queue_work(mdev->workqueue, &priv->watchdog_task); 1321 } 1322 1323 1324 static void 1325 mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) 1326 { 1327 struct mlx4_en_priv *priv = netdev_priv(dev); 1328 1329 spin_lock_bh(&priv->stats_lock); 1330 mlx4_en_fold_software_stats(dev); 1331 netdev_stats_to_stats64(stats, &dev->stats); 1332 spin_unlock_bh(&priv->stats_lock); 1333 } 1334 1335 static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) 1336 { 1337 struct mlx4_en_cq *cq; 1338 int i, t; 1339 1340 /* If we haven't received a specific coalescing setting 1341 * (module param), we set the moderation parameters as follows: 1342 * - moder_cnt is set to the number of mtu sized packets to 1343 * satisfy our coalescing target. 1344 * - moder_time is set to a fixed value. 1345 */ 1346 priv->rx_frames = MLX4_EN_RX_COAL_TARGET; 1347 priv->rx_usecs = MLX4_EN_RX_COAL_TIME; 1348 priv->tx_frames = MLX4_EN_TX_COAL_PKTS; 1349 priv->tx_usecs = MLX4_EN_TX_COAL_TIME; 1350 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n", 1351 priv->dev->mtu, priv->rx_frames, priv->rx_usecs); 1352 1353 /* Setup cq moderation params */ 1354 for (i = 0; i < priv->rx_ring_num; i++) { 1355 cq = priv->rx_cq[i]; 1356 cq->moder_cnt = priv->rx_frames; 1357 cq->moder_time = priv->rx_usecs; 1358 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; 1359 priv->last_moder_packets[i] = 0; 1360 priv->last_moder_bytes[i] = 0; 1361 } 1362 1363 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1364 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1365 cq = priv->tx_cq[t][i]; 1366 cq->moder_cnt = priv->tx_frames; 1367 cq->moder_time = priv->tx_usecs; 1368 } 1369 } 1370 1371 /* Reset auto-moderation params */ 1372 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; 1373 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; 1374 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; 1375 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; 1376 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; 1377 priv->adaptive_rx_coal = 1; 1378 priv->last_moder_jiffies = 0; 1379 priv->last_moder_tx_packets = 0; 1380 } 1381 1382 static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) 1383 { 1384 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); 1385 u32 pkt_rate_high, pkt_rate_low; 1386 struct mlx4_en_cq *cq; 1387 unsigned long packets; 1388 unsigned long rate; 1389 unsigned long avg_pkt_size; 1390 unsigned long rx_packets; 1391 unsigned long rx_bytes; 1392 unsigned long rx_pkt_diff; 1393 int moder_time; 1394 int ring, err; 1395 1396 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) 1397 return; 1398 1399 pkt_rate_low = READ_ONCE(priv->pkt_rate_low); 1400 pkt_rate_high = READ_ONCE(priv->pkt_rate_high); 1401 1402 for (ring = 0; ring < priv->rx_ring_num; ring++) { 1403 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets); 1404 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes); 1405 1406 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring]; 1407 packets = rx_pkt_diff; 1408 rate = packets * HZ / period; 1409 avg_pkt_size = packets ? (rx_bytes - 1410 priv->last_moder_bytes[ring]) / packets : 0; 1411 1412 /* Apply auto-moderation only when packet rate 1413 * exceeds a rate that it matters */ 1414 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && 1415 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { 1416 if (rate <= pkt_rate_low) 1417 moder_time = priv->rx_usecs_low; 1418 else if (rate >= pkt_rate_high) 1419 moder_time = priv->rx_usecs_high; 1420 else 1421 moder_time = (rate - pkt_rate_low) * 1422 (priv->rx_usecs_high - priv->rx_usecs_low) / 1423 (pkt_rate_high - pkt_rate_low) + 1424 priv->rx_usecs_low; 1425 } else { 1426 moder_time = priv->rx_usecs_low; 1427 } 1428 1429 cq = priv->rx_cq[ring]; 1430 if (moder_time != priv->last_moder_time[ring] || 1431 cq->moder_cnt != priv->rx_frames) { 1432 priv->last_moder_time[ring] = moder_time; 1433 cq->moder_time = moder_time; 1434 cq->moder_cnt = priv->rx_frames; 1435 err = mlx4_en_set_cq_moder(priv, cq); 1436 if (err) 1437 en_err(priv, "Failed modifying moderation for cq:%d\n", 1438 ring); 1439 } 1440 priv->last_moder_packets[ring] = rx_packets; 1441 priv->last_moder_bytes[ring] = rx_bytes; 1442 } 1443 1444 priv->last_moder_jiffies = jiffies; 1445 } 1446 1447 static void mlx4_en_do_get_stats(struct work_struct *work) 1448 { 1449 struct delayed_work *delay = to_delayed_work(work); 1450 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1451 stats_task); 1452 struct mlx4_en_dev *mdev = priv->mdev; 1453 int err; 1454 1455 mutex_lock(&mdev->state_lock); 1456 if (mdev->device_up) { 1457 if (priv->port_up) { 1458 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); 1459 if (err) 1460 en_dbg(HW, priv, "Could not update stats\n"); 1461 1462 mlx4_en_auto_moderation(priv); 1463 } 1464 1465 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 1466 } 1467 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { 1468 mlx4_en_do_set_mac(priv, priv->current_mac); 1469 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; 1470 } 1471 mutex_unlock(&mdev->state_lock); 1472 } 1473 1474 /* mlx4_en_service_task - Run service task for tasks that needed to be done 1475 * periodically 1476 */ 1477 static void mlx4_en_service_task(struct work_struct *work) 1478 { 1479 struct delayed_work *delay = to_delayed_work(work); 1480 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1481 service_task); 1482 struct mlx4_en_dev *mdev = priv->mdev; 1483 1484 mutex_lock(&mdev->state_lock); 1485 if (mdev->device_up) { 1486 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 1487 mlx4_en_ptp_overflow_check(mdev); 1488 1489 mlx4_en_recover_from_oom(priv); 1490 queue_delayed_work(mdev->workqueue, &priv->service_task, 1491 SERVICE_TASK_DELAY); 1492 } 1493 mutex_unlock(&mdev->state_lock); 1494 } 1495 1496 static void mlx4_en_linkstate(struct work_struct *work) 1497 { 1498 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1499 linkstate_task); 1500 struct mlx4_en_dev *mdev = priv->mdev; 1501 int linkstate = priv->link_state; 1502 1503 mutex_lock(&mdev->state_lock); 1504 /* If observable port state changed set carrier state and 1505 * report to system log */ 1506 if (priv->last_link_state != linkstate) { 1507 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { 1508 en_info(priv, "Link Down\n"); 1509 netif_carrier_off(priv->dev); 1510 } else { 1511 en_info(priv, "Link Up\n"); 1512 netif_carrier_on(priv->dev); 1513 } 1514 } 1515 priv->last_link_state = linkstate; 1516 mutex_unlock(&mdev->state_lock); 1517 } 1518 1519 static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1520 { 1521 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx]; 1522 int numa_node = priv->mdev->dev->numa_node; 1523 1524 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL)) 1525 return -ENOMEM; 1526 1527 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node), 1528 ring->affinity_mask); 1529 return 0; 1530 } 1531 1532 static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1533 { 1534 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask); 1535 } 1536 1537 static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv, 1538 int tx_ring_idx) 1539 { 1540 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx]; 1541 int rr_index = tx_ring_idx; 1542 1543 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc; 1544 tx_ring->recycle_ring = priv->rx_ring[rr_index]; 1545 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n", 1546 TX_XDP, tx_ring_idx, rr_index); 1547 } 1548 1549 int mlx4_en_start_port(struct net_device *dev) 1550 { 1551 struct mlx4_en_priv *priv = netdev_priv(dev); 1552 struct mlx4_en_dev *mdev = priv->mdev; 1553 struct mlx4_en_cq *cq; 1554 struct mlx4_en_tx_ring *tx_ring; 1555 int rx_index = 0; 1556 int err = 0; 1557 int i, t; 1558 int j; 1559 u8 mc_list[16] = {0}; 1560 1561 if (priv->port_up) { 1562 en_dbg(DRV, priv, "start port called while port already up\n"); 1563 return 0; 1564 } 1565 1566 INIT_LIST_HEAD(&priv->mc_list); 1567 INIT_LIST_HEAD(&priv->curr_list); 1568 INIT_LIST_HEAD(&priv->ethtool_list); 1569 memset(&priv->ethtool_rules[0], 0, 1570 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES); 1571 1572 /* Calculate Rx buf size */ 1573 dev->mtu = min(dev->mtu, priv->max_mtu); 1574 mlx4_en_calc_rx_buf(dev); 1575 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); 1576 1577 /* Configure rx cq's and rings */ 1578 err = mlx4_en_activate_rx_rings(priv); 1579 if (err) { 1580 en_err(priv, "Failed to activate RX rings\n"); 1581 return err; 1582 } 1583 for (i = 0; i < priv->rx_ring_num; i++) { 1584 cq = priv->rx_cq[i]; 1585 1586 err = mlx4_en_init_affinity_hint(priv, i); 1587 if (err) { 1588 en_err(priv, "Failed preparing IRQ affinity hint\n"); 1589 goto cq_err; 1590 } 1591 1592 err = mlx4_en_activate_cq(priv, cq, i); 1593 if (err) { 1594 en_err(priv, "Failed activating Rx CQ\n"); 1595 mlx4_en_free_affinity_hint(priv, i); 1596 goto cq_err; 1597 } 1598 1599 for (j = 0; j < cq->size; j++) { 1600 struct mlx4_cqe *cqe = NULL; 1601 1602 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) + 1603 priv->cqe_factor; 1604 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK; 1605 } 1606 1607 err = mlx4_en_set_cq_moder(priv, cq); 1608 if (err) { 1609 en_err(priv, "Failed setting cq moderation parameters\n"); 1610 mlx4_en_deactivate_cq(priv, cq); 1611 mlx4_en_free_affinity_hint(priv, i); 1612 goto cq_err; 1613 } 1614 mlx4_en_arm_cq(priv, cq); 1615 priv->rx_ring[i]->cqn = cq->mcq.cqn; 1616 ++rx_index; 1617 } 1618 1619 /* Set qp number */ 1620 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port); 1621 err = mlx4_en_get_qp(priv); 1622 if (err) { 1623 en_err(priv, "Failed getting eth qp\n"); 1624 goto cq_err; 1625 } 1626 mdev->mac_removed[priv->port] = 0; 1627 1628 priv->counter_index = 1629 mlx4_get_default_counter_index(mdev->dev, priv->port); 1630 1631 err = mlx4_en_config_rss_steer(priv); 1632 if (err) { 1633 en_err(priv, "Failed configuring rss steering\n"); 1634 goto mac_err; 1635 } 1636 1637 err = mlx4_en_create_drop_qp(priv); 1638 if (err) 1639 goto rss_err; 1640 1641 /* Configure tx cq's and rings */ 1642 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1643 u8 num_tx_rings_p_up = t == TX ? 1644 priv->num_tx_rings_p_up : priv->tx_ring_num[t]; 1645 1646 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1647 /* Configure cq */ 1648 cq = priv->tx_cq[t][i]; 1649 err = mlx4_en_activate_cq(priv, cq, i); 1650 if (err) { 1651 en_err(priv, "Failed allocating Tx CQ\n"); 1652 goto tx_err; 1653 } 1654 err = mlx4_en_set_cq_moder(priv, cq); 1655 if (err) { 1656 en_err(priv, "Failed setting cq moderation parameters\n"); 1657 mlx4_en_deactivate_cq(priv, cq); 1658 goto tx_err; 1659 } 1660 en_dbg(DRV, priv, 1661 "Resetting index of collapsed CQ:%d to -1\n", i); 1662 cq->buf->wqe_index = cpu_to_be16(0xffff); 1663 1664 /* Configure ring */ 1665 tx_ring = priv->tx_ring[t][i]; 1666 err = mlx4_en_activate_tx_ring(priv, tx_ring, 1667 cq->mcq.cqn, 1668 i / num_tx_rings_p_up); 1669 if (err) { 1670 en_err(priv, "Failed allocating Tx ring\n"); 1671 mlx4_en_deactivate_cq(priv, cq); 1672 goto tx_err; 1673 } 1674 if (t != TX_XDP) { 1675 tx_ring->tx_queue = netdev_get_tx_queue(dev, i); 1676 tx_ring->recycle_ring = NULL; 1677 } else { 1678 mlx4_en_init_recycle_ring(priv, i); 1679 } 1680 1681 /* Arm CQ for TX completions */ 1682 mlx4_en_arm_cq(priv, cq); 1683 1684 /* Set initial ownership of all Tx TXBBs to SW (1) */ 1685 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) 1686 *((u32 *)(tx_ring->buf + j)) = 0xffffffff; 1687 } 1688 } 1689 1690 /* Configure port */ 1691 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 1692 priv->rx_skb_size + ETH_FCS_LEN, 1693 priv->prof->tx_pause, 1694 priv->prof->tx_ppp, 1695 priv->prof->rx_pause, 1696 priv->prof->rx_ppp); 1697 if (err) { 1698 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 1699 priv->port, err); 1700 goto tx_err; 1701 } 1702 1703 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu); 1704 if (err) { 1705 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n", 1706 dev->mtu, priv->port, err); 1707 goto tx_err; 1708 } 1709 1710 /* Set default qp number */ 1711 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); 1712 if (err) { 1713 en_err(priv, "Failed setting default qp numbers\n"); 1714 goto tx_err; 1715 } 1716 1717 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 1718 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 1719 if (err) { 1720 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 1721 err); 1722 goto tx_err; 1723 } 1724 } 1725 1726 /* Init port */ 1727 en_dbg(HW, priv, "Initializing port\n"); 1728 err = mlx4_INIT_PORT(mdev->dev, priv->port); 1729 if (err) { 1730 en_err(priv, "Failed Initializing port\n"); 1731 goto tx_err; 1732 } 1733 1734 /* Set Unicast and VXLAN steering rules */ 1735 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 && 1736 mlx4_en_set_rss_steer_rules(priv)) 1737 mlx4_warn(mdev, "Failed setting steering rules\n"); 1738 1739 /* Attach rx QP to bradcast address */ 1740 eth_broadcast_addr(&mc_list[10]); 1741 mc_list[5] = priv->port; /* needed for B0 steering support */ 1742 if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list, 1743 priv->port, 0, MLX4_PROT_ETH, 1744 &priv->broadcast_id)) 1745 mlx4_warn(mdev, "Failed Attaching Broadcast\n"); 1746 1747 /* Must redo promiscuous mode setup. */ 1748 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); 1749 1750 /* Schedule multicast task to populate multicast list */ 1751 queue_work(mdev->workqueue, &priv->rx_mode_task); 1752 1753 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 1754 udp_tunnel_get_rx_info(dev); 1755 1756 priv->port_up = true; 1757 1758 /* Process all completions if exist to prevent 1759 * the queues freezing if they are full 1760 */ 1761 for (i = 0; i < priv->rx_ring_num; i++) { 1762 local_bh_disable(); 1763 napi_schedule(&priv->rx_cq[i]->napi); 1764 local_bh_enable(); 1765 } 1766 1767 netif_tx_start_all_queues(dev); 1768 netif_device_attach(dev); 1769 1770 return 0; 1771 1772 tx_err: 1773 if (t == MLX4_EN_NUM_TX_TYPES) { 1774 t--; 1775 i = priv->tx_ring_num[t]; 1776 } 1777 while (t >= 0) { 1778 while (i--) { 1779 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1780 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1781 } 1782 if (!t--) 1783 break; 1784 i = priv->tx_ring_num[t]; 1785 } 1786 mlx4_en_destroy_drop_qp(priv); 1787 rss_err: 1788 mlx4_en_release_rss_steer(priv); 1789 mac_err: 1790 mlx4_en_put_qp(priv); 1791 cq_err: 1792 while (rx_index--) { 1793 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]); 1794 mlx4_en_free_affinity_hint(priv, rx_index); 1795 } 1796 for (i = 0; i < priv->rx_ring_num; i++) 1797 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1798 1799 return err; /* need to close devices */ 1800 } 1801 1802 1803 void mlx4_en_stop_port(struct net_device *dev, int detach) 1804 { 1805 struct mlx4_en_priv *priv = netdev_priv(dev); 1806 struct mlx4_en_dev *mdev = priv->mdev; 1807 struct mlx4_en_mc_list *mclist, *tmp; 1808 struct ethtool_flow_id *flow, *tmp_flow; 1809 int i, t; 1810 u8 mc_list[16] = {0}; 1811 1812 if (!priv->port_up) { 1813 en_dbg(DRV, priv, "stop port called while port already down\n"); 1814 return; 1815 } 1816 1817 /* close port*/ 1818 mlx4_CLOSE_PORT(mdev->dev, priv->port); 1819 1820 /* Synchronize with tx routine */ 1821 netif_tx_lock_bh(dev); 1822 if (detach) 1823 netif_device_detach(dev); 1824 netif_tx_stop_all_queues(dev); 1825 netif_tx_unlock_bh(dev); 1826 1827 netif_tx_disable(dev); 1828 1829 spin_lock_bh(&priv->stats_lock); 1830 mlx4_en_fold_software_stats(dev); 1831 /* Set port as not active */ 1832 priv->port_up = false; 1833 spin_unlock_bh(&priv->stats_lock); 1834 1835 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 1836 1837 /* Promsicuous mode */ 1838 if (mdev->dev->caps.steering_mode == 1839 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1840 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | 1841 MLX4_EN_FLAG_MC_PROMISC); 1842 mlx4_flow_steer_promisc_remove(mdev->dev, 1843 priv->port, 1844 MLX4_FS_ALL_DEFAULT); 1845 mlx4_flow_steer_promisc_remove(mdev->dev, 1846 priv->port, 1847 MLX4_FS_MC_DEFAULT); 1848 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) { 1849 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 1850 1851 /* Disable promiscouos mode */ 1852 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, 1853 priv->port); 1854 1855 /* Disable Multicast promisc */ 1856 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1857 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, 1858 priv->port); 1859 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1860 } 1861 } 1862 1863 /* Detach All multicasts */ 1864 eth_broadcast_addr(&mc_list[10]); 1865 mc_list[5] = priv->port; /* needed for B0 steering support */ 1866 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list, 1867 MLX4_PROT_ETH, priv->broadcast_id); 1868 list_for_each_entry(mclist, &priv->curr_list, list) { 1869 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1870 mc_list[5] = priv->port; 1871 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, 1872 mc_list, MLX4_PROT_ETH, mclist->reg_id); 1873 if (mclist->tunnel_reg_id) 1874 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id); 1875 } 1876 mlx4_en_clear_list(dev); 1877 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1878 list_del(&mclist->list); 1879 kfree(mclist); 1880 } 1881 1882 /* Flush multicast filter */ 1883 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); 1884 1885 /* Remove flow steering rules for the port*/ 1886 if (mdev->dev->caps.steering_mode == 1887 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1888 ASSERT_RTNL(); 1889 list_for_each_entry_safe(flow, tmp_flow, 1890 &priv->ethtool_list, list) { 1891 mlx4_flow_detach(mdev->dev, flow->id); 1892 list_del(&flow->list); 1893 } 1894 } 1895 1896 mlx4_en_destroy_drop_qp(priv); 1897 1898 /* Free TX Rings */ 1899 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 1900 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1901 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1902 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1903 } 1904 } 1905 msleep(10); 1906 1907 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) 1908 for (i = 0; i < priv->tx_ring_num[t]; i++) 1909 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]); 1910 1911 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 1912 mlx4_en_delete_rss_steer_rules(priv); 1913 1914 /* Free RSS qps */ 1915 mlx4_en_release_rss_steer(priv); 1916 1917 /* Unregister Mac address for the port */ 1918 mlx4_en_put_qp(priv); 1919 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN)) 1920 mdev->mac_removed[priv->port] = 1; 1921 1922 /* Free RX Rings */ 1923 for (i = 0; i < priv->rx_ring_num; i++) { 1924 struct mlx4_en_cq *cq = priv->rx_cq[i]; 1925 1926 napi_synchronize(&cq->napi); 1927 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1928 mlx4_en_deactivate_cq(priv, cq); 1929 1930 mlx4_en_free_affinity_hint(priv, i); 1931 } 1932 } 1933 1934 static void mlx4_en_restart(struct work_struct *work) 1935 { 1936 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1937 watchdog_task); 1938 struct mlx4_en_dev *mdev = priv->mdev; 1939 struct net_device *dev = priv->dev; 1940 1941 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); 1942 1943 rtnl_lock(); 1944 mutex_lock(&mdev->state_lock); 1945 if (priv->port_up) { 1946 mlx4_en_stop_port(dev, 1); 1947 if (mlx4_en_start_port(dev)) 1948 en_err(priv, "Failed restarting port %d\n", priv->port); 1949 } 1950 mutex_unlock(&mdev->state_lock); 1951 rtnl_unlock(); 1952 } 1953 1954 static void mlx4_en_clear_stats(struct net_device *dev) 1955 { 1956 struct mlx4_en_priv *priv = netdev_priv(dev); 1957 struct mlx4_en_dev *mdev = priv->mdev; 1958 struct mlx4_en_tx_ring **tx_ring; 1959 int i; 1960 1961 if (!mlx4_is_slave(mdev->dev)) 1962 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) 1963 en_dbg(HW, priv, "Failed dumping statistics\n"); 1964 1965 memset(&priv->pstats, 0, sizeof(priv->pstats)); 1966 memset(&priv->pkstats, 0, sizeof(priv->pkstats)); 1967 memset(&priv->port_stats, 0, sizeof(priv->port_stats)); 1968 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats)); 1969 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats)); 1970 memset(&priv->rx_priority_flowstats, 0, 1971 sizeof(priv->rx_priority_flowstats)); 1972 memset(&priv->tx_priority_flowstats, 0, 1973 sizeof(priv->tx_priority_flowstats)); 1974 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats)); 1975 1976 tx_ring = priv->tx_ring[TX]; 1977 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 1978 tx_ring[i]->bytes = 0; 1979 tx_ring[i]->packets = 0; 1980 tx_ring[i]->tx_csum = 0; 1981 tx_ring[i]->tx_dropped = 0; 1982 tx_ring[i]->queue_stopped = 0; 1983 tx_ring[i]->wake_queue = 0; 1984 tx_ring[i]->tso_packets = 0; 1985 tx_ring[i]->xmit_more = 0; 1986 } 1987 for (i = 0; i < priv->rx_ring_num; i++) { 1988 priv->rx_ring[i]->bytes = 0; 1989 priv->rx_ring[i]->packets = 0; 1990 priv->rx_ring[i]->csum_ok = 0; 1991 priv->rx_ring[i]->csum_none = 0; 1992 priv->rx_ring[i]->csum_complete = 0; 1993 } 1994 } 1995 1996 static int mlx4_en_open(struct net_device *dev) 1997 { 1998 struct mlx4_en_priv *priv = netdev_priv(dev); 1999 struct mlx4_en_dev *mdev = priv->mdev; 2000 int err = 0; 2001 2002 mutex_lock(&mdev->state_lock); 2003 2004 if (!mdev->device_up) { 2005 en_err(priv, "Cannot open - device down/disabled\n"); 2006 err = -EBUSY; 2007 goto out; 2008 } 2009 2010 /* Reset HW statistics and SW counters */ 2011 mlx4_en_clear_stats(dev); 2012 2013 err = mlx4_en_start_port(dev); 2014 if (err) 2015 en_err(priv, "Failed starting port:%d\n", priv->port); 2016 2017 out: 2018 mutex_unlock(&mdev->state_lock); 2019 return err; 2020 } 2021 2022 2023 static int mlx4_en_close(struct net_device *dev) 2024 { 2025 struct mlx4_en_priv *priv = netdev_priv(dev); 2026 struct mlx4_en_dev *mdev = priv->mdev; 2027 2028 en_dbg(IFDOWN, priv, "Close port called\n"); 2029 2030 mutex_lock(&mdev->state_lock); 2031 2032 mlx4_en_stop_port(dev, 0); 2033 netif_carrier_off(dev); 2034 2035 mutex_unlock(&mdev->state_lock); 2036 return 0; 2037 } 2038 2039 static void mlx4_en_free_resources(struct mlx4_en_priv *priv) 2040 { 2041 int i, t; 2042 2043 #ifdef CONFIG_RFS_ACCEL 2044 priv->dev->rx_cpu_rmap = NULL; 2045 #endif 2046 2047 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2048 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2049 if (priv->tx_ring[t] && priv->tx_ring[t][i]) 2050 mlx4_en_destroy_tx_ring(priv, 2051 &priv->tx_ring[t][i]); 2052 if (priv->tx_cq[t] && priv->tx_cq[t][i]) 2053 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2054 } 2055 kfree(priv->tx_ring[t]); 2056 kfree(priv->tx_cq[t]); 2057 } 2058 2059 for (i = 0; i < priv->rx_ring_num; i++) { 2060 if (priv->rx_ring[i]) 2061 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2062 priv->prof->rx_ring_size, priv->stride); 2063 if (priv->rx_cq[i]) 2064 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2065 } 2066 2067 } 2068 2069 static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) 2070 { 2071 struct mlx4_en_port_profile *prof = priv->prof; 2072 int i, t; 2073 int node; 2074 2075 /* Create tx Rings */ 2076 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2077 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2078 node = cpu_to_node(i % num_online_cpus()); 2079 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i], 2080 prof->tx_ring_size, i, t, node)) 2081 goto err; 2082 2083 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i], 2084 prof->tx_ring_size, 2085 TXBB_SIZE, node, i)) 2086 goto err; 2087 } 2088 } 2089 2090 /* Create rx Rings */ 2091 for (i = 0; i < priv->rx_ring_num; i++) { 2092 node = cpu_to_node(i % num_online_cpus()); 2093 if (mlx4_en_create_cq(priv, &priv->rx_cq[i], 2094 prof->rx_ring_size, i, RX, node)) 2095 goto err; 2096 2097 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], 2098 prof->rx_ring_size, priv->stride, 2099 node)) 2100 goto err; 2101 } 2102 2103 #ifdef CONFIG_RFS_ACCEL 2104 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port); 2105 #endif 2106 2107 return 0; 2108 2109 err: 2110 en_err(priv, "Failed to allocate NIC resources\n"); 2111 for (i = 0; i < priv->rx_ring_num; i++) { 2112 if (priv->rx_ring[i]) 2113 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2114 prof->rx_ring_size, 2115 priv->stride); 2116 if (priv->rx_cq[i]) 2117 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2118 } 2119 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2120 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2121 if (priv->tx_ring[t][i]) 2122 mlx4_en_destroy_tx_ring(priv, 2123 &priv->tx_ring[t][i]); 2124 if (priv->tx_cq[t][i]) 2125 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2126 } 2127 } 2128 return -ENOMEM; 2129 } 2130 2131 2132 static int mlx4_en_copy_priv(struct mlx4_en_priv *dst, 2133 struct mlx4_en_priv *src, 2134 struct mlx4_en_port_profile *prof) 2135 { 2136 int t; 2137 2138 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config, 2139 sizeof(dst->hwtstamp_config)); 2140 dst->num_tx_rings_p_up = src->mdev->profile.num_tx_rings_p_up; 2141 dst->rx_ring_num = prof->rx_ring_num; 2142 dst->flags = prof->flags; 2143 dst->mdev = src->mdev; 2144 dst->port = src->port; 2145 dst->dev = src->dev; 2146 dst->prof = prof; 2147 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 2148 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 2149 2150 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2151 dst->tx_ring_num[t] = prof->tx_ring_num[t]; 2152 if (!dst->tx_ring_num[t]) 2153 continue; 2154 2155 dst->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) * 2156 MAX_TX_RINGS, GFP_KERNEL); 2157 if (!dst->tx_ring[t]) 2158 goto err_free_tx; 2159 2160 dst->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) * 2161 MAX_TX_RINGS, GFP_KERNEL); 2162 if (!dst->tx_cq[t]) { 2163 kfree(dst->tx_ring[t]); 2164 goto err_free_tx; 2165 } 2166 } 2167 2168 return 0; 2169 2170 err_free_tx: 2171 while (t--) { 2172 kfree(dst->tx_ring[t]); 2173 kfree(dst->tx_cq[t]); 2174 } 2175 return -ENOMEM; 2176 } 2177 2178 static void mlx4_en_update_priv(struct mlx4_en_priv *dst, 2179 struct mlx4_en_priv *src) 2180 { 2181 int t; 2182 memcpy(dst->rx_ring, src->rx_ring, 2183 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num); 2184 memcpy(dst->rx_cq, src->rx_cq, 2185 sizeof(struct mlx4_en_cq *) * src->rx_ring_num); 2186 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config, 2187 sizeof(dst->hwtstamp_config)); 2188 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2189 dst->tx_ring_num[t] = src->tx_ring_num[t]; 2190 dst->tx_ring[t] = src->tx_ring[t]; 2191 dst->tx_cq[t] = src->tx_cq[t]; 2192 } 2193 dst->rx_ring_num = src->rx_ring_num; 2194 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile)); 2195 } 2196 2197 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv, 2198 struct mlx4_en_priv *tmp, 2199 struct mlx4_en_port_profile *prof, 2200 bool carry_xdp_prog) 2201 { 2202 struct bpf_prog *xdp_prog; 2203 int i, t; 2204 2205 mlx4_en_copy_priv(tmp, priv, prof); 2206 2207 if (mlx4_en_alloc_resources(tmp)) { 2208 en_warn(priv, 2209 "%s: Resource allocation failed, using previous configuration\n", 2210 __func__); 2211 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2212 kfree(tmp->tx_ring[t]); 2213 kfree(tmp->tx_cq[t]); 2214 } 2215 return -ENOMEM; 2216 } 2217 2218 /* All rx_rings has the same xdp_prog. Pick the first one. */ 2219 xdp_prog = rcu_dereference_protected( 2220 priv->rx_ring[0]->xdp_prog, 2221 lockdep_is_held(&priv->mdev->state_lock)); 2222 2223 if (xdp_prog && carry_xdp_prog) { 2224 xdp_prog = bpf_prog_add(xdp_prog, tmp->rx_ring_num); 2225 if (IS_ERR(xdp_prog)) { 2226 mlx4_en_free_resources(tmp); 2227 return PTR_ERR(xdp_prog); 2228 } 2229 for (i = 0; i < tmp->rx_ring_num; i++) 2230 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog, 2231 xdp_prog); 2232 } 2233 2234 return 0; 2235 } 2236 2237 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv, 2238 struct mlx4_en_priv *tmp) 2239 { 2240 mlx4_en_free_resources(priv); 2241 mlx4_en_update_priv(priv, tmp); 2242 } 2243 2244 void mlx4_en_destroy_netdev(struct net_device *dev) 2245 { 2246 struct mlx4_en_priv *priv = netdev_priv(dev); 2247 struct mlx4_en_dev *mdev = priv->mdev; 2248 2249 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); 2250 2251 /* Unregister device - this will close the port if it was up */ 2252 if (priv->registered) { 2253 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev, 2254 priv->port)); 2255 unregister_netdev(dev); 2256 } 2257 2258 if (priv->allocated) 2259 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); 2260 2261 cancel_delayed_work(&priv->stats_task); 2262 cancel_delayed_work(&priv->service_task); 2263 /* flush any pending task for this netdev */ 2264 flush_workqueue(mdev->workqueue); 2265 2266 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 2267 mlx4_en_remove_timestamp(mdev); 2268 2269 /* Detach the netdev so tasks would not attempt to access it */ 2270 mutex_lock(&mdev->state_lock); 2271 mdev->pndev[priv->port] = NULL; 2272 mdev->upper[priv->port] = NULL; 2273 2274 #ifdef CONFIG_RFS_ACCEL 2275 mlx4_en_cleanup_filters(priv); 2276 #endif 2277 2278 mlx4_en_free_resources(priv); 2279 mutex_unlock(&mdev->state_lock); 2280 2281 free_netdev(dev); 2282 } 2283 2284 static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu) 2285 { 2286 struct mlx4_en_priv *priv = netdev_priv(dev); 2287 2288 if (mtu > MLX4_EN_MAX_XDP_MTU) { 2289 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n", 2290 mtu, MLX4_EN_MAX_XDP_MTU); 2291 return false; 2292 } 2293 2294 return true; 2295 } 2296 2297 static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) 2298 { 2299 struct mlx4_en_priv *priv = netdev_priv(dev); 2300 struct mlx4_en_dev *mdev = priv->mdev; 2301 int err = 0; 2302 2303 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", 2304 dev->mtu, new_mtu); 2305 2306 if (priv->tx_ring_num[TX_XDP] && 2307 !mlx4_en_check_xdp_mtu(dev, new_mtu)) 2308 return -EOPNOTSUPP; 2309 2310 dev->mtu = new_mtu; 2311 2312 if (netif_running(dev)) { 2313 mutex_lock(&mdev->state_lock); 2314 if (!mdev->device_up) { 2315 /* NIC is probably restarting - let watchdog task reset 2316 * the port */ 2317 en_dbg(DRV, priv, "Change MTU called with card down!?\n"); 2318 } else { 2319 mlx4_en_stop_port(dev, 1); 2320 err = mlx4_en_start_port(dev); 2321 if (err) { 2322 en_err(priv, "Failed restarting port:%d\n", 2323 priv->port); 2324 queue_work(mdev->workqueue, &priv->watchdog_task); 2325 } 2326 } 2327 mutex_unlock(&mdev->state_lock); 2328 } 2329 return 0; 2330 } 2331 2332 static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 2333 { 2334 struct mlx4_en_priv *priv = netdev_priv(dev); 2335 struct mlx4_en_dev *mdev = priv->mdev; 2336 struct hwtstamp_config config; 2337 2338 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 2339 return -EFAULT; 2340 2341 /* reserved for future extensions */ 2342 if (config.flags) 2343 return -EINVAL; 2344 2345 /* device doesn't support time stamping */ 2346 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)) 2347 return -EINVAL; 2348 2349 /* TX HW timestamp */ 2350 switch (config.tx_type) { 2351 case HWTSTAMP_TX_OFF: 2352 case HWTSTAMP_TX_ON: 2353 break; 2354 default: 2355 return -ERANGE; 2356 } 2357 2358 /* RX HW timestamp */ 2359 switch (config.rx_filter) { 2360 case HWTSTAMP_FILTER_NONE: 2361 break; 2362 case HWTSTAMP_FILTER_ALL: 2363 case HWTSTAMP_FILTER_SOME: 2364 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2365 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2366 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2367 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2368 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2369 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2370 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2371 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2372 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2373 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2374 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2375 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2376 config.rx_filter = HWTSTAMP_FILTER_ALL; 2377 break; 2378 default: 2379 return -ERANGE; 2380 } 2381 2382 if (mlx4_en_reset_config(dev, config, dev->features)) { 2383 config.tx_type = HWTSTAMP_TX_OFF; 2384 config.rx_filter = HWTSTAMP_FILTER_NONE; 2385 } 2386 2387 return copy_to_user(ifr->ifr_data, &config, 2388 sizeof(config)) ? -EFAULT : 0; 2389 } 2390 2391 static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 2392 { 2393 struct mlx4_en_priv *priv = netdev_priv(dev); 2394 2395 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config, 2396 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0; 2397 } 2398 2399 static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 2400 { 2401 switch (cmd) { 2402 case SIOCSHWTSTAMP: 2403 return mlx4_en_hwtstamp_set(dev, ifr); 2404 case SIOCGHWTSTAMP: 2405 return mlx4_en_hwtstamp_get(dev, ifr); 2406 default: 2407 return -EOPNOTSUPP; 2408 } 2409 } 2410 2411 static netdev_features_t mlx4_en_fix_features(struct net_device *netdev, 2412 netdev_features_t features) 2413 { 2414 struct mlx4_en_priv *en_priv = netdev_priv(netdev); 2415 struct mlx4_en_dev *mdev = en_priv->mdev; 2416 2417 /* Since there is no support for separate RX C-TAG/S-TAG vlan accel 2418 * enable/disable make sure S-TAG flag is always in same state as 2419 * C-TAG. 2420 */ 2421 if (features & NETIF_F_HW_VLAN_CTAG_RX && 2422 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 2423 features |= NETIF_F_HW_VLAN_STAG_RX; 2424 else 2425 features &= ~NETIF_F_HW_VLAN_STAG_RX; 2426 2427 return features; 2428 } 2429 2430 static int mlx4_en_set_features(struct net_device *netdev, 2431 netdev_features_t features) 2432 { 2433 struct mlx4_en_priv *priv = netdev_priv(netdev); 2434 bool reset = false; 2435 int ret = 0; 2436 2437 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) { 2438 en_info(priv, "Turn %s RX-FCS\n", 2439 (features & NETIF_F_RXFCS) ? "ON" : "OFF"); 2440 reset = true; 2441 } 2442 2443 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) { 2444 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0; 2445 2446 en_info(priv, "Turn %s RX-ALL\n", 2447 ignore_fcs_value ? "ON" : "OFF"); 2448 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev, 2449 priv->port, ignore_fcs_value); 2450 if (ret) 2451 return ret; 2452 } 2453 2454 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 2455 en_info(priv, "Turn %s RX vlan strip offload\n", 2456 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF"); 2457 reset = true; 2458 } 2459 2460 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX)) 2461 en_info(priv, "Turn %s TX vlan strip offload\n", 2462 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF"); 2463 2464 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX)) 2465 en_info(priv, "Turn %s TX S-VLAN strip offload\n", 2466 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF"); 2467 2468 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) { 2469 en_info(priv, "Turn %s loopback\n", 2470 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF"); 2471 mlx4_en_update_loopback_state(netdev, features); 2472 } 2473 2474 if (reset) { 2475 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config, 2476 features); 2477 if (ret) 2478 return ret; 2479 } 2480 2481 return 0; 2482 } 2483 2484 static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac) 2485 { 2486 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2487 struct mlx4_en_dev *mdev = en_priv->mdev; 2488 2489 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac); 2490 } 2491 2492 static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos, 2493 __be16 vlan_proto) 2494 { 2495 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2496 struct mlx4_en_dev *mdev = en_priv->mdev; 2497 2498 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos, 2499 vlan_proto); 2500 } 2501 2502 static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate, 2503 int max_tx_rate) 2504 { 2505 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2506 struct mlx4_en_dev *mdev = en_priv->mdev; 2507 2508 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate, 2509 max_tx_rate); 2510 } 2511 2512 static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting) 2513 { 2514 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2515 struct mlx4_en_dev *mdev = en_priv->mdev; 2516 2517 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting); 2518 } 2519 2520 static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf) 2521 { 2522 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2523 struct mlx4_en_dev *mdev = en_priv->mdev; 2524 2525 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf); 2526 } 2527 2528 static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state) 2529 { 2530 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2531 struct mlx4_en_dev *mdev = en_priv->mdev; 2532 2533 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state); 2534 } 2535 2536 static int mlx4_en_get_vf_stats(struct net_device *dev, int vf, 2537 struct ifla_vf_stats *vf_stats) 2538 { 2539 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2540 struct mlx4_en_dev *mdev = en_priv->mdev; 2541 2542 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats); 2543 } 2544 2545 #define PORT_ID_BYTE_LEN 8 2546 static int mlx4_en_get_phys_port_id(struct net_device *dev, 2547 struct netdev_phys_item_id *ppid) 2548 { 2549 struct mlx4_en_priv *priv = netdev_priv(dev); 2550 struct mlx4_dev *mdev = priv->mdev->dev; 2551 int i; 2552 u64 phys_port_id = mdev->caps.phys_port_id[priv->port]; 2553 2554 if (!phys_port_id) 2555 return -EOPNOTSUPP; 2556 2557 ppid->id_len = sizeof(phys_port_id); 2558 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) { 2559 ppid->id[i] = phys_port_id & 0xff; 2560 phys_port_id >>= 8; 2561 } 2562 return 0; 2563 } 2564 2565 static void mlx4_en_add_vxlan_offloads(struct work_struct *work) 2566 { 2567 int ret; 2568 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2569 vxlan_add_task); 2570 2571 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port); 2572 if (ret) 2573 goto out; 2574 2575 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2576 VXLAN_STEER_BY_OUTER_MAC, 1); 2577 out: 2578 if (ret) { 2579 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret); 2580 return; 2581 } 2582 2583 /* set offloads */ 2584 priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2585 NETIF_F_RXCSUM | 2586 NETIF_F_TSO | NETIF_F_TSO6 | 2587 NETIF_F_GSO_UDP_TUNNEL | 2588 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2589 NETIF_F_GSO_PARTIAL; 2590 } 2591 2592 static void mlx4_en_del_vxlan_offloads(struct work_struct *work) 2593 { 2594 int ret; 2595 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2596 vxlan_del_task); 2597 /* unset offloads */ 2598 priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2599 NETIF_F_RXCSUM | 2600 NETIF_F_TSO | NETIF_F_TSO6 | 2601 NETIF_F_GSO_UDP_TUNNEL | 2602 NETIF_F_GSO_UDP_TUNNEL_CSUM | 2603 NETIF_F_GSO_PARTIAL); 2604 2605 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2606 VXLAN_STEER_BY_OUTER_MAC, 0); 2607 if (ret) 2608 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret); 2609 2610 priv->vxlan_port = 0; 2611 } 2612 2613 static void mlx4_en_add_vxlan_port(struct net_device *dev, 2614 struct udp_tunnel_info *ti) 2615 { 2616 struct mlx4_en_priv *priv = netdev_priv(dev); 2617 __be16 port = ti->port; 2618 __be16 current_port; 2619 2620 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2621 return; 2622 2623 if (ti->sa_family != AF_INET) 2624 return; 2625 2626 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 2627 return; 2628 2629 current_port = priv->vxlan_port; 2630 if (current_port && current_port != port) { 2631 en_warn(priv, "vxlan port %d configured, can't add port %d\n", 2632 ntohs(current_port), ntohs(port)); 2633 return; 2634 } 2635 2636 priv->vxlan_port = port; 2637 queue_work(priv->mdev->workqueue, &priv->vxlan_add_task); 2638 } 2639 2640 static void mlx4_en_del_vxlan_port(struct net_device *dev, 2641 struct udp_tunnel_info *ti) 2642 { 2643 struct mlx4_en_priv *priv = netdev_priv(dev); 2644 __be16 port = ti->port; 2645 __be16 current_port; 2646 2647 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2648 return; 2649 2650 if (ti->sa_family != AF_INET) 2651 return; 2652 2653 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 2654 return; 2655 2656 current_port = priv->vxlan_port; 2657 if (current_port != port) { 2658 en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port)); 2659 return; 2660 } 2661 2662 queue_work(priv->mdev->workqueue, &priv->vxlan_del_task); 2663 } 2664 2665 static netdev_features_t mlx4_en_features_check(struct sk_buff *skb, 2666 struct net_device *dev, 2667 netdev_features_t features) 2668 { 2669 features = vlan_features_check(skb, features); 2670 features = vxlan_features_check(skb, features); 2671 2672 /* The ConnectX-3 doesn't support outer IPv6 checksums but it does 2673 * support inner IPv6 checksums and segmentation so we need to 2674 * strip that feature if this is an IPv6 encapsulated frame. 2675 */ 2676 if (skb->encapsulation && 2677 (skb->ip_summed == CHECKSUM_PARTIAL)) { 2678 struct mlx4_en_priv *priv = netdev_priv(dev); 2679 2680 if (!priv->vxlan_port || 2681 (ip_hdr(skb)->version != 4) || 2682 (udp_hdr(skb)->dest != priv->vxlan_port)) 2683 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 2684 } 2685 2686 return features; 2687 } 2688 2689 static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate) 2690 { 2691 struct mlx4_en_priv *priv = netdev_priv(dev); 2692 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index]; 2693 struct mlx4_update_qp_params params; 2694 int err; 2695 2696 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT)) 2697 return -EOPNOTSUPP; 2698 2699 /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */ 2700 if (maxrate >> 12) { 2701 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS; 2702 params.rate_val = maxrate / 1000; 2703 } else if (maxrate) { 2704 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS; 2705 params.rate_val = maxrate; 2706 } else { /* zero serves to revoke the QP rate-limitation */ 2707 params.rate_unit = 0; 2708 params.rate_val = 0; 2709 } 2710 2711 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT, 2712 ¶ms); 2713 return err; 2714 } 2715 2716 static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog) 2717 { 2718 struct mlx4_en_priv *priv = netdev_priv(dev); 2719 struct mlx4_en_dev *mdev = priv->mdev; 2720 struct mlx4_en_port_profile new_prof; 2721 struct bpf_prog *old_prog; 2722 struct mlx4_en_priv *tmp; 2723 int tx_changed = 0; 2724 int xdp_ring_num; 2725 int port_up = 0; 2726 int err; 2727 int i; 2728 2729 xdp_ring_num = prog ? priv->rx_ring_num : 0; 2730 2731 /* No need to reconfigure buffers when simply swapping the 2732 * program for a new one. 2733 */ 2734 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) { 2735 if (prog) { 2736 prog = bpf_prog_add(prog, priv->rx_ring_num - 1); 2737 if (IS_ERR(prog)) 2738 return PTR_ERR(prog); 2739 } 2740 mutex_lock(&mdev->state_lock); 2741 for (i = 0; i < priv->rx_ring_num; i++) { 2742 old_prog = rcu_dereference_protected( 2743 priv->rx_ring[i]->xdp_prog, 2744 lockdep_is_held(&mdev->state_lock)); 2745 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2746 if (old_prog) 2747 bpf_prog_put(old_prog); 2748 } 2749 mutex_unlock(&mdev->state_lock); 2750 return 0; 2751 } 2752 2753 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu)) 2754 return -EOPNOTSUPP; 2755 2756 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 2757 if (!tmp) 2758 return -ENOMEM; 2759 2760 if (prog) { 2761 prog = bpf_prog_add(prog, priv->rx_ring_num - 1); 2762 if (IS_ERR(prog)) { 2763 err = PTR_ERR(prog); 2764 goto out; 2765 } 2766 } 2767 2768 mutex_lock(&mdev->state_lock); 2769 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 2770 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num; 2771 2772 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) { 2773 tx_changed = 1; 2774 new_prof.tx_ring_num[TX] = 2775 MAX_TX_RINGS - ALIGN(xdp_ring_num, MLX4_EN_NUM_UP); 2776 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n"); 2777 } 2778 2779 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false); 2780 if (err) { 2781 if (prog) 2782 bpf_prog_sub(prog, priv->rx_ring_num - 1); 2783 goto unlock_out; 2784 } 2785 2786 if (priv->port_up) { 2787 port_up = 1; 2788 mlx4_en_stop_port(dev, 1); 2789 } 2790 2791 mlx4_en_safe_replace_resources(priv, tmp); 2792 if (tx_changed) 2793 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 2794 2795 for (i = 0; i < priv->rx_ring_num; i++) { 2796 old_prog = rcu_dereference_protected( 2797 priv->rx_ring[i]->xdp_prog, 2798 lockdep_is_held(&mdev->state_lock)); 2799 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2800 if (old_prog) 2801 bpf_prog_put(old_prog); 2802 } 2803 2804 if (port_up) { 2805 err = mlx4_en_start_port(dev); 2806 if (err) { 2807 en_err(priv, "Failed starting port %d for XDP change\n", 2808 priv->port); 2809 queue_work(mdev->workqueue, &priv->watchdog_task); 2810 } 2811 } 2812 2813 unlock_out: 2814 mutex_unlock(&mdev->state_lock); 2815 out: 2816 kfree(tmp); 2817 return err; 2818 } 2819 2820 static bool mlx4_xdp_attached(struct net_device *dev) 2821 { 2822 struct mlx4_en_priv *priv = netdev_priv(dev); 2823 2824 return !!priv->tx_ring_num[TX_XDP]; 2825 } 2826 2827 static int mlx4_xdp(struct net_device *dev, struct netdev_xdp *xdp) 2828 { 2829 switch (xdp->command) { 2830 case XDP_SETUP_PROG: 2831 return mlx4_xdp_set(dev, xdp->prog); 2832 case XDP_QUERY_PROG: 2833 xdp->prog_attached = mlx4_xdp_attached(dev); 2834 return 0; 2835 default: 2836 return -EINVAL; 2837 } 2838 } 2839 2840 static const struct net_device_ops mlx4_netdev_ops = { 2841 .ndo_open = mlx4_en_open, 2842 .ndo_stop = mlx4_en_close, 2843 .ndo_start_xmit = mlx4_en_xmit, 2844 .ndo_select_queue = mlx4_en_select_queue, 2845 .ndo_get_stats64 = mlx4_en_get_stats64, 2846 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2847 .ndo_set_mac_address = mlx4_en_set_mac, 2848 .ndo_validate_addr = eth_validate_addr, 2849 .ndo_change_mtu = mlx4_en_change_mtu, 2850 .ndo_do_ioctl = mlx4_en_ioctl, 2851 .ndo_tx_timeout = mlx4_en_tx_timeout, 2852 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2853 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2854 #ifdef CONFIG_NET_POLL_CONTROLLER 2855 .ndo_poll_controller = mlx4_en_netpoll, 2856 #endif 2857 .ndo_set_features = mlx4_en_set_features, 2858 .ndo_fix_features = mlx4_en_fix_features, 2859 .ndo_setup_tc = __mlx4_en_setup_tc, 2860 #ifdef CONFIG_RFS_ACCEL 2861 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2862 #endif 2863 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2864 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port, 2865 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port, 2866 .ndo_features_check = mlx4_en_features_check, 2867 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2868 .ndo_xdp = mlx4_xdp, 2869 }; 2870 2871 static const struct net_device_ops mlx4_netdev_ops_master = { 2872 .ndo_open = mlx4_en_open, 2873 .ndo_stop = mlx4_en_close, 2874 .ndo_start_xmit = mlx4_en_xmit, 2875 .ndo_select_queue = mlx4_en_select_queue, 2876 .ndo_get_stats64 = mlx4_en_get_stats64, 2877 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2878 .ndo_set_mac_address = mlx4_en_set_mac, 2879 .ndo_validate_addr = eth_validate_addr, 2880 .ndo_change_mtu = mlx4_en_change_mtu, 2881 .ndo_tx_timeout = mlx4_en_tx_timeout, 2882 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2883 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2884 .ndo_set_vf_mac = mlx4_en_set_vf_mac, 2885 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan, 2886 .ndo_set_vf_rate = mlx4_en_set_vf_rate, 2887 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk, 2888 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state, 2889 .ndo_get_vf_stats = mlx4_en_get_vf_stats, 2890 .ndo_get_vf_config = mlx4_en_get_vf_config, 2891 #ifdef CONFIG_NET_POLL_CONTROLLER 2892 .ndo_poll_controller = mlx4_en_netpoll, 2893 #endif 2894 .ndo_set_features = mlx4_en_set_features, 2895 .ndo_fix_features = mlx4_en_fix_features, 2896 .ndo_setup_tc = __mlx4_en_setup_tc, 2897 #ifdef CONFIG_RFS_ACCEL 2898 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2899 #endif 2900 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2901 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port, 2902 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port, 2903 .ndo_features_check = mlx4_en_features_check, 2904 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2905 .ndo_xdp = mlx4_xdp, 2906 }; 2907 2908 struct mlx4_en_bond { 2909 struct work_struct work; 2910 struct mlx4_en_priv *priv; 2911 int is_bonded; 2912 struct mlx4_port_map port_map; 2913 }; 2914 2915 static void mlx4_en_bond_work(struct work_struct *work) 2916 { 2917 struct mlx4_en_bond *bond = container_of(work, 2918 struct mlx4_en_bond, 2919 work); 2920 int err = 0; 2921 struct mlx4_dev *dev = bond->priv->mdev->dev; 2922 2923 if (bond->is_bonded) { 2924 if (!mlx4_is_bonded(dev)) { 2925 err = mlx4_bond(dev); 2926 if (err) 2927 en_err(bond->priv, "Fail to bond device\n"); 2928 } 2929 if (!err) { 2930 err = mlx4_port_map_set(dev, &bond->port_map); 2931 if (err) 2932 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n", 2933 bond->port_map.port1, 2934 bond->port_map.port2, 2935 err); 2936 } 2937 } else if (mlx4_is_bonded(dev)) { 2938 err = mlx4_unbond(dev); 2939 if (err) 2940 en_err(bond->priv, "Fail to unbond device\n"); 2941 } 2942 dev_put(bond->priv->dev); 2943 kfree(bond); 2944 } 2945 2946 static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded, 2947 u8 v2p_p1, u8 v2p_p2) 2948 { 2949 struct mlx4_en_bond *bond = NULL; 2950 2951 bond = kzalloc(sizeof(*bond), GFP_ATOMIC); 2952 if (!bond) 2953 return -ENOMEM; 2954 2955 INIT_WORK(&bond->work, mlx4_en_bond_work); 2956 bond->priv = priv; 2957 bond->is_bonded = is_bonded; 2958 bond->port_map.port1 = v2p_p1; 2959 bond->port_map.port2 = v2p_p2; 2960 dev_hold(priv->dev); 2961 queue_work(priv->mdev->workqueue, &bond->work); 2962 return 0; 2963 } 2964 2965 int mlx4_en_netdev_event(struct notifier_block *this, 2966 unsigned long event, void *ptr) 2967 { 2968 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 2969 u8 port = 0; 2970 struct mlx4_en_dev *mdev; 2971 struct mlx4_dev *dev; 2972 int i, num_eth_ports = 0; 2973 bool do_bond = true; 2974 struct mlx4_en_priv *priv; 2975 u8 v2p_port1 = 0; 2976 u8 v2p_port2 = 0; 2977 2978 if (!net_eq(dev_net(ndev), &init_net)) 2979 return NOTIFY_DONE; 2980 2981 mdev = container_of(this, struct mlx4_en_dev, nb); 2982 dev = mdev->dev; 2983 2984 /* Go into this mode only when two network devices set on two ports 2985 * of the same mlx4 device are slaves of the same bonding master 2986 */ 2987 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { 2988 ++num_eth_ports; 2989 if (!port && (mdev->pndev[i] == ndev)) 2990 port = i; 2991 mdev->upper[i] = mdev->pndev[i] ? 2992 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL; 2993 /* condition not met: network device is a slave */ 2994 if (!mdev->upper[i]) 2995 do_bond = false; 2996 if (num_eth_ports < 2) 2997 continue; 2998 /* condition not met: same master */ 2999 if (mdev->upper[i] != mdev->upper[i-1]) 3000 do_bond = false; 3001 } 3002 /* condition not met: 2 salves */ 3003 do_bond = (num_eth_ports == 2) ? do_bond : false; 3004 3005 /* handle only events that come with enough info */ 3006 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port) 3007 return NOTIFY_DONE; 3008 3009 priv = netdev_priv(ndev); 3010 if (do_bond) { 3011 struct netdev_notifier_bonding_info *notifier_info = ptr; 3012 struct netdev_bonding_info *bonding_info = 3013 ¬ifier_info->bonding_info; 3014 3015 /* required mode 1, 2 or 4 */ 3016 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) && 3017 (bonding_info->master.bond_mode != BOND_MODE_XOR) && 3018 (bonding_info->master.bond_mode != BOND_MODE_8023AD)) 3019 do_bond = false; 3020 3021 /* require exactly 2 slaves */ 3022 if (bonding_info->master.num_slaves != 2) 3023 do_bond = false; 3024 3025 /* calc v2p */ 3026 if (do_bond) { 3027 if (bonding_info->master.bond_mode == 3028 BOND_MODE_ACTIVEBACKUP) { 3029 /* in active-backup mode virtual ports are 3030 * mapped to the physical port of the active 3031 * slave */ 3032 if (bonding_info->slave.state == 3033 BOND_STATE_BACKUP) { 3034 if (port == 1) { 3035 v2p_port1 = 2; 3036 v2p_port2 = 2; 3037 } else { 3038 v2p_port1 = 1; 3039 v2p_port2 = 1; 3040 } 3041 } else { /* BOND_STATE_ACTIVE */ 3042 if (port == 1) { 3043 v2p_port1 = 1; 3044 v2p_port2 = 1; 3045 } else { 3046 v2p_port1 = 2; 3047 v2p_port2 = 2; 3048 } 3049 } 3050 } else { /* Active-Active */ 3051 /* in active-active mode a virtual port is 3052 * mapped to the native physical port if and only 3053 * if the physical port is up */ 3054 __s8 link = bonding_info->slave.link; 3055 3056 if (port == 1) 3057 v2p_port2 = 2; 3058 else 3059 v2p_port1 = 1; 3060 if ((link == BOND_LINK_UP) || 3061 (link == BOND_LINK_FAIL)) { 3062 if (port == 1) 3063 v2p_port1 = 1; 3064 else 3065 v2p_port2 = 2; 3066 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */ 3067 if (port == 1) 3068 v2p_port1 = 2; 3069 else 3070 v2p_port2 = 1; 3071 } 3072 } 3073 } 3074 } 3075 3076 mlx4_en_queue_bond_work(priv, do_bond, 3077 v2p_port1, v2p_port2); 3078 3079 return NOTIFY_DONE; 3080 } 3081 3082 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev, 3083 struct mlx4_en_stats_bitmap *stats_bitmap, 3084 u8 rx_ppp, u8 rx_pause, 3085 u8 tx_ppp, u8 tx_pause) 3086 { 3087 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS; 3088 3089 if (!mlx4_is_slave(dev) && 3090 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) { 3091 mutex_lock(&stats_bitmap->mutex); 3092 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS); 3093 3094 if (rx_ppp) 3095 bitmap_set(stats_bitmap->bitmap, last_i, 3096 NUM_FLOW_PRIORITY_STATS_RX); 3097 last_i += NUM_FLOW_PRIORITY_STATS_RX; 3098 3099 if (rx_pause && !(rx_ppp)) 3100 bitmap_set(stats_bitmap->bitmap, last_i, 3101 NUM_FLOW_STATS_RX); 3102 last_i += NUM_FLOW_STATS_RX; 3103 3104 if (tx_ppp) 3105 bitmap_set(stats_bitmap->bitmap, last_i, 3106 NUM_FLOW_PRIORITY_STATS_TX); 3107 last_i += NUM_FLOW_PRIORITY_STATS_TX; 3108 3109 if (tx_pause && !(tx_ppp)) 3110 bitmap_set(stats_bitmap->bitmap, last_i, 3111 NUM_FLOW_STATS_TX); 3112 last_i += NUM_FLOW_STATS_TX; 3113 3114 mutex_unlock(&stats_bitmap->mutex); 3115 } 3116 } 3117 3118 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev, 3119 struct mlx4_en_stats_bitmap *stats_bitmap, 3120 u8 rx_ppp, u8 rx_pause, 3121 u8 tx_ppp, u8 tx_pause) 3122 { 3123 int last_i = 0; 3124 3125 mutex_init(&stats_bitmap->mutex); 3126 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS); 3127 3128 if (mlx4_is_slave(dev)) { 3129 bitmap_set(stats_bitmap->bitmap, last_i + 3130 MLX4_FIND_NETDEV_STAT(rx_packets), 1); 3131 bitmap_set(stats_bitmap->bitmap, last_i + 3132 MLX4_FIND_NETDEV_STAT(tx_packets), 1); 3133 bitmap_set(stats_bitmap->bitmap, last_i + 3134 MLX4_FIND_NETDEV_STAT(rx_bytes), 1); 3135 bitmap_set(stats_bitmap->bitmap, last_i + 3136 MLX4_FIND_NETDEV_STAT(tx_bytes), 1); 3137 bitmap_set(stats_bitmap->bitmap, last_i + 3138 MLX4_FIND_NETDEV_STAT(rx_dropped), 1); 3139 bitmap_set(stats_bitmap->bitmap, last_i + 3140 MLX4_FIND_NETDEV_STAT(tx_dropped), 1); 3141 } else { 3142 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS); 3143 } 3144 last_i += NUM_MAIN_STATS; 3145 3146 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS); 3147 last_i += NUM_PORT_STATS; 3148 3149 if (mlx4_is_master(dev)) 3150 bitmap_set(stats_bitmap->bitmap, last_i, 3151 NUM_PF_STATS); 3152 last_i += NUM_PF_STATS; 3153 3154 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap, 3155 rx_ppp, rx_pause, 3156 tx_ppp, tx_pause); 3157 last_i += NUM_FLOW_STATS; 3158 3159 if (!mlx4_is_slave(dev)) 3160 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS); 3161 last_i += NUM_PKT_STATS; 3162 3163 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS); 3164 last_i += NUM_XDP_STATS; 3165 } 3166 3167 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 3168 struct mlx4_en_port_profile *prof) 3169 { 3170 struct net_device *dev; 3171 struct mlx4_en_priv *priv; 3172 int i, t; 3173 int err; 3174 3175 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv), 3176 MAX_TX_RINGS, MAX_RX_RINGS); 3177 if (dev == NULL) 3178 return -ENOMEM; 3179 3180 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]); 3181 netif_set_real_num_rx_queues(dev, prof->rx_ring_num); 3182 3183 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev); 3184 dev->dev_port = port - 1; 3185 3186 /* 3187 * Initialize driver private data 3188 */ 3189 3190 priv = netdev_priv(dev); 3191 memset(priv, 0, sizeof(struct mlx4_en_priv)); 3192 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 3193 spin_lock_init(&priv->stats_lock); 3194 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode); 3195 INIT_WORK(&priv->watchdog_task, mlx4_en_restart); 3196 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); 3197 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); 3198 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task); 3199 INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads); 3200 INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads); 3201 #ifdef CONFIG_RFS_ACCEL 3202 INIT_LIST_HEAD(&priv->filters); 3203 spin_lock_init(&priv->filters_lock); 3204 #endif 3205 3206 priv->dev = dev; 3207 priv->mdev = mdev; 3208 priv->ddev = &mdev->pdev->dev; 3209 priv->prof = prof; 3210 priv->port = port; 3211 priv->port_up = false; 3212 priv->flags = prof->flags; 3213 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME; 3214 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | 3215 MLX4_WQE_CTRL_SOLICITED); 3216 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up; 3217 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK; 3218 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key)); 3219 3220 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 3221 priv->tx_ring_num[t] = prof->tx_ring_num[t]; 3222 if (!priv->tx_ring_num[t]) 3223 continue; 3224 3225 priv->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) * 3226 MAX_TX_RINGS, GFP_KERNEL); 3227 if (!priv->tx_ring[t]) { 3228 err = -ENOMEM; 3229 goto err_free_tx; 3230 } 3231 priv->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) * 3232 MAX_TX_RINGS, GFP_KERNEL); 3233 if (!priv->tx_cq[t]) { 3234 kfree(priv->tx_ring[t]); 3235 err = -ENOMEM; 3236 goto out; 3237 } 3238 } 3239 priv->rx_ring_num = prof->rx_ring_num; 3240 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0; 3241 priv->cqe_size = mdev->dev->caps.cqe_size; 3242 priv->mac_index = -1; 3243 priv->msg_enable = MLX4_EN_MSG_LEVEL; 3244 #ifdef CONFIG_MLX4_EN_DCB 3245 if (!mlx4_is_slave(priv->mdev->dev)) { 3246 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST | 3247 DCB_CAP_DCBX_VER_IEEE; 3248 priv->flags |= MLX4_EN_DCB_ENABLED; 3249 priv->cee_config.pfc_state = false; 3250 3251 for (i = 0; i < MLX4_EN_NUM_UP; i++) 3252 priv->cee_config.dcb_pfc[i] = pfc_disabled; 3253 3254 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) { 3255 dev->dcbnl_ops = &mlx4_en_dcbnl_ops; 3256 } else { 3257 en_info(priv, "enabling only PFC DCB ops\n"); 3258 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops; 3259 } 3260 } 3261 #endif 3262 3263 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) 3264 INIT_HLIST_HEAD(&priv->mac_hash[i]); 3265 3266 /* Query for default mac and max mtu */ 3267 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; 3268 3269 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] & 3270 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP) 3271 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP; 3272 3273 /* Set default MAC */ 3274 dev->addr_len = ETH_ALEN; 3275 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]); 3276 if (!is_valid_ether_addr(dev->dev_addr)) { 3277 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n", 3278 priv->port, dev->dev_addr); 3279 err = -EINVAL; 3280 goto out; 3281 } else if (mlx4_is_slave(priv->mdev->dev) && 3282 (priv->mdev->dev->port_random_macs & 1 << priv->port)) { 3283 /* Random MAC was assigned in mlx4_slave_cap 3284 * in mlx4_core module 3285 */ 3286 dev->addr_assign_type |= NET_ADDR_RANDOM; 3287 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr); 3288 } 3289 3290 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac)); 3291 3292 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 3293 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 3294 err = mlx4_en_alloc_resources(priv); 3295 if (err) 3296 goto out; 3297 3298 /* Initialize time stamping config */ 3299 priv->hwtstamp_config.flags = 0; 3300 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF; 3301 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; 3302 3303 /* Allocate page for receive rings */ 3304 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, 3305 MLX4_EN_PAGE_SIZE); 3306 if (err) { 3307 en_err(priv, "Failed to allocate page for rx qps\n"); 3308 goto out; 3309 } 3310 priv->allocated = 1; 3311 3312 /* 3313 * Initialize netdev entry points 3314 */ 3315 if (mlx4_is_master(priv->mdev->dev)) 3316 dev->netdev_ops = &mlx4_netdev_ops_master; 3317 else 3318 dev->netdev_ops = &mlx4_netdev_ops; 3319 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; 3320 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 3321 netif_set_real_num_rx_queues(dev, priv->rx_ring_num); 3322 3323 dev->ethtool_ops = &mlx4_en_ethtool_ops; 3324 3325 /* 3326 * Set driver features 3327 */ 3328 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 3329 if (mdev->LSO_support) 3330 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6; 3331 3332 dev->vlan_features = dev->hw_features; 3333 3334 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH; 3335 dev->features = dev->hw_features | NETIF_F_HIGHDMA | 3336 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 3337 NETIF_F_HW_VLAN_CTAG_FILTER; 3338 dev->hw_features |= NETIF_F_LOOPBACK | 3339 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 3340 3341 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) { 3342 dev->features |= NETIF_F_HW_VLAN_STAG_RX | 3343 NETIF_F_HW_VLAN_STAG_FILTER; 3344 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX; 3345 } 3346 3347 if (mlx4_is_slave(mdev->dev)) { 3348 bool vlan_offload_disabled; 3349 int phv; 3350 3351 err = get_phv_bit(mdev->dev, port, &phv); 3352 if (!err && phv) { 3353 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3354 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV; 3355 } 3356 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port, 3357 &vlan_offload_disabled); 3358 if (!err && vlan_offload_disabled) { 3359 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3360 NETIF_F_HW_VLAN_CTAG_RX | 3361 NETIF_F_HW_VLAN_STAG_TX | 3362 NETIF_F_HW_VLAN_STAG_RX); 3363 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3364 NETIF_F_HW_VLAN_CTAG_RX | 3365 NETIF_F_HW_VLAN_STAG_TX | 3366 NETIF_F_HW_VLAN_STAG_RX); 3367 } 3368 } else { 3369 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN && 3370 !(mdev->dev->caps.flags2 & 3371 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 3372 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3373 } 3374 3375 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) 3376 dev->hw_features |= NETIF_F_RXFCS; 3377 3378 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS) 3379 dev->hw_features |= NETIF_F_RXALL; 3380 3381 if (mdev->dev->caps.steering_mode == 3382 MLX4_STEERING_MODE_DEVICE_MANAGED && 3383 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC) 3384 dev->hw_features |= NETIF_F_NTUPLE; 3385 3386 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 3387 dev->priv_flags |= IFF_UNICAST_FLT; 3388 3389 /* Setting a default hash function value */ 3390 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) { 3391 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3392 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) { 3393 priv->rss_hash_fn = ETH_RSS_HASH_XOR; 3394 } else { 3395 en_warn(priv, 3396 "No RSS hash capabilities exposed, using Toeplitz\n"); 3397 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3398 } 3399 3400 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3401 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | 3402 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3403 NETIF_F_GSO_PARTIAL; 3404 dev->features |= NETIF_F_GSO_UDP_TUNNEL | 3405 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3406 NETIF_F_GSO_PARTIAL; 3407 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM; 3408 } 3409 3410 /* MTU range: 46 - hw-specific max */ 3411 dev->min_mtu = MLX4_EN_MIN_MTU; 3412 dev->max_mtu = priv->max_mtu; 3413 3414 mdev->pndev[port] = dev; 3415 mdev->upper[port] = NULL; 3416 3417 netif_carrier_off(dev); 3418 mlx4_en_set_default_moderation(priv); 3419 3420 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]); 3421 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num); 3422 3423 mlx4_en_update_loopback_state(priv->dev, priv->dev->features); 3424 3425 /* Configure port */ 3426 mlx4_en_calc_rx_buf(dev); 3427 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 3428 priv->rx_skb_size + ETH_FCS_LEN, 3429 prof->tx_pause, prof->tx_ppp, 3430 prof->rx_pause, prof->rx_ppp); 3431 if (err) { 3432 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 3433 priv->port, err); 3434 goto out; 3435 } 3436 3437 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3438 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 3439 if (err) { 3440 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 3441 err); 3442 goto out; 3443 } 3444 } 3445 3446 /* Init port */ 3447 en_warn(priv, "Initializing port\n"); 3448 err = mlx4_INIT_PORT(mdev->dev, priv->port); 3449 if (err) { 3450 en_err(priv, "Failed Initializing port\n"); 3451 goto out; 3452 } 3453 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 3454 3455 /* Initialize time stamp mechanism */ 3456 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 3457 mlx4_en_init_timestamp(mdev); 3458 3459 queue_delayed_work(mdev->workqueue, &priv->service_task, 3460 SERVICE_TASK_DELAY); 3461 3462 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap, 3463 mdev->profile.prof[priv->port].rx_ppp, 3464 mdev->profile.prof[priv->port].rx_pause, 3465 mdev->profile.prof[priv->port].tx_ppp, 3466 mdev->profile.prof[priv->port].tx_pause); 3467 3468 err = register_netdev(dev); 3469 if (err) { 3470 en_err(priv, "Netdev registration failed for port %d\n", port); 3471 goto out; 3472 } 3473 3474 priv->registered = 1; 3475 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port), 3476 dev); 3477 3478 return 0; 3479 3480 err_free_tx: 3481 while (t--) { 3482 kfree(priv->tx_ring[t]); 3483 kfree(priv->tx_cq[t]); 3484 } 3485 out: 3486 mlx4_en_destroy_netdev(dev); 3487 return err; 3488 } 3489 3490 int mlx4_en_reset_config(struct net_device *dev, 3491 struct hwtstamp_config ts_config, 3492 netdev_features_t features) 3493 { 3494 struct mlx4_en_priv *priv = netdev_priv(dev); 3495 struct mlx4_en_dev *mdev = priv->mdev; 3496 struct mlx4_en_port_profile new_prof; 3497 struct mlx4_en_priv *tmp; 3498 int port_up = 0; 3499 int err = 0; 3500 3501 if (priv->hwtstamp_config.tx_type == ts_config.tx_type && 3502 priv->hwtstamp_config.rx_filter == ts_config.rx_filter && 3503 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3504 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) 3505 return 0; /* Nothing to change */ 3506 3507 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3508 (features & NETIF_F_HW_VLAN_CTAG_RX) && 3509 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) { 3510 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n"); 3511 return -EINVAL; 3512 } 3513 3514 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 3515 if (!tmp) 3516 return -ENOMEM; 3517 3518 mutex_lock(&mdev->state_lock); 3519 3520 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 3521 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config)); 3522 3523 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true); 3524 if (err) 3525 goto out; 3526 3527 if (priv->port_up) { 3528 port_up = 1; 3529 mlx4_en_stop_port(dev, 1); 3530 } 3531 3532 en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n", 3533 ts_config.rx_filter, 3534 !!(features & NETIF_F_HW_VLAN_CTAG_RX)); 3535 3536 mlx4_en_safe_replace_resources(priv, tmp); 3537 3538 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 3539 if (features & NETIF_F_HW_VLAN_CTAG_RX) 3540 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3541 else 3542 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3543 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) { 3544 /* RX time-stamping is OFF, update the RX vlan offload 3545 * to the latest wanted state 3546 */ 3547 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX) 3548 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3549 else 3550 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3551 } 3552 3553 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) { 3554 if (features & NETIF_F_RXFCS) 3555 dev->features |= NETIF_F_RXFCS; 3556 else 3557 dev->features &= ~NETIF_F_RXFCS; 3558 } 3559 3560 /* RX vlan offload and RX time-stamping can't co-exist ! 3561 * Regardless of the caller's choice, 3562 * Turn Off RX vlan offload in case of time-stamping is ON 3563 */ 3564 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) { 3565 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX) 3566 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n"); 3567 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3568 } 3569 3570 if (port_up) { 3571 err = mlx4_en_start_port(dev); 3572 if (err) 3573 en_err(priv, "Failed starting port\n"); 3574 } 3575 3576 out: 3577 mutex_unlock(&mdev->state_lock); 3578 kfree(tmp); 3579 if (!err) 3580 netdev_features_change(dev); 3581 return err; 3582 } 3583