1 /*
2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  */
33 
34 #include <linux/kernel.h>
35 #include <linux/ethtool.h>
36 #include <linux/netdevice.h>
37 #include <linux/mlx4/driver.h>
38 #include <linux/mlx4/device.h>
39 #include <linux/in.h>
40 #include <net/ip.h>
41 #include <linux/bitmap.h>
42 
43 #include "mlx4_en.h"
44 #include "en_port.h"
45 
46 #define EN_ETHTOOL_QP_ATTACH (1ull << 63)
47 #define EN_ETHTOOL_SHORT_MASK cpu_to_be16(0xffff)
48 #define EN_ETHTOOL_WORD_MASK  cpu_to_be32(0xffffffff)
49 
50 static int mlx4_en_moderation_update(struct mlx4_en_priv *priv)
51 {
52 	int i, t;
53 	int err = 0;
54 
55 	for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
56 		for (i = 0; i < priv->tx_ring_num[t]; i++) {
57 			priv->tx_cq[t][i]->moder_cnt = priv->tx_frames;
58 			priv->tx_cq[t][i]->moder_time = priv->tx_usecs;
59 			if (priv->port_up) {
60 				err = mlx4_en_set_cq_moder(priv,
61 							   priv->tx_cq[t][i]);
62 				if (err)
63 					return err;
64 			}
65 		}
66 	}
67 
68 	if (priv->adaptive_rx_coal)
69 		return 0;
70 
71 	for (i = 0; i < priv->rx_ring_num; i++) {
72 		priv->rx_cq[i]->moder_cnt = priv->rx_frames;
73 		priv->rx_cq[i]->moder_time = priv->rx_usecs;
74 		priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
75 		if (priv->port_up) {
76 			err = mlx4_en_set_cq_moder(priv, priv->rx_cq[i]);
77 			if (err)
78 				return err;
79 		}
80 	}
81 
82 	return err;
83 }
84 
85 static void
86 mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
87 {
88 	struct mlx4_en_priv *priv = netdev_priv(dev);
89 	struct mlx4_en_dev *mdev = priv->mdev;
90 
91 	strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
92 	strlcpy(drvinfo->version, DRV_VERSION,
93 		sizeof(drvinfo->version));
94 	snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
95 		"%d.%d.%d",
96 		(u16) (mdev->dev->caps.fw_ver >> 32),
97 		(u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
98 		(u16) (mdev->dev->caps.fw_ver & 0xffff));
99 	strlcpy(drvinfo->bus_info, pci_name(mdev->dev->persist->pdev),
100 		sizeof(drvinfo->bus_info));
101 }
102 
103 static const char mlx4_en_priv_flags[][ETH_GSTRING_LEN] = {
104 	"blueflame",
105 	"phv-bit"
106 };
107 
108 static const char main_strings[][ETH_GSTRING_LEN] = {
109 	/* main statistics */
110 	"rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
111 	"tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
112 	"rx_length_errors", "rx_over_errors", "rx_crc_errors",
113 	"rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
114 	"tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
115 	"tx_heartbeat_errors", "tx_window_errors",
116 
117 	/* port statistics */
118 	"tso_packets",
119 	"xmit_more",
120 	"queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_pages",
121 	"rx_csum_good", "rx_csum_none", "rx_csum_complete", "tx_chksum_offload",
122 
123 	/* pf statistics */
124 	"pf_rx_packets",
125 	"pf_rx_bytes",
126 	"pf_tx_packets",
127 	"pf_tx_bytes",
128 
129 	/* priority flow control statistics rx */
130 	"rx_pause_prio_0", "rx_pause_duration_prio_0",
131 	"rx_pause_transition_prio_0",
132 	"rx_pause_prio_1", "rx_pause_duration_prio_1",
133 	"rx_pause_transition_prio_1",
134 	"rx_pause_prio_2", "rx_pause_duration_prio_2",
135 	"rx_pause_transition_prio_2",
136 	"rx_pause_prio_3", "rx_pause_duration_prio_3",
137 	"rx_pause_transition_prio_3",
138 	"rx_pause_prio_4", "rx_pause_duration_prio_4",
139 	"rx_pause_transition_prio_4",
140 	"rx_pause_prio_5", "rx_pause_duration_prio_5",
141 	"rx_pause_transition_prio_5",
142 	"rx_pause_prio_6", "rx_pause_duration_prio_6",
143 	"rx_pause_transition_prio_6",
144 	"rx_pause_prio_7", "rx_pause_duration_prio_7",
145 	"rx_pause_transition_prio_7",
146 
147 	/* flow control statistics rx */
148 	"rx_pause", "rx_pause_duration", "rx_pause_transition",
149 
150 	/* priority flow control statistics tx */
151 	"tx_pause_prio_0", "tx_pause_duration_prio_0",
152 	"tx_pause_transition_prio_0",
153 	"tx_pause_prio_1", "tx_pause_duration_prio_1",
154 	"tx_pause_transition_prio_1",
155 	"tx_pause_prio_2", "tx_pause_duration_prio_2",
156 	"tx_pause_transition_prio_2",
157 	"tx_pause_prio_3", "tx_pause_duration_prio_3",
158 	"tx_pause_transition_prio_3",
159 	"tx_pause_prio_4", "tx_pause_duration_prio_4",
160 	"tx_pause_transition_prio_4",
161 	"tx_pause_prio_5", "tx_pause_duration_prio_5",
162 	"tx_pause_transition_prio_5",
163 	"tx_pause_prio_6", "tx_pause_duration_prio_6",
164 	"tx_pause_transition_prio_6",
165 	"tx_pause_prio_7", "tx_pause_duration_prio_7",
166 	"tx_pause_transition_prio_7",
167 
168 	/* flow control statistics tx */
169 	"tx_pause", "tx_pause_duration", "tx_pause_transition",
170 
171 	/* packet statistics */
172 	"rx_multicast_packets",
173 	"rx_broadcast_packets",
174 	"rx_jabbers",
175 	"rx_in_range_length_error",
176 	"rx_out_range_length_error",
177 	"tx_multicast_packets",
178 	"tx_broadcast_packets",
179 	"rx_prio_0_packets", "rx_prio_0_bytes",
180 	"rx_prio_1_packets", "rx_prio_1_bytes",
181 	"rx_prio_2_packets", "rx_prio_2_bytes",
182 	"rx_prio_3_packets", "rx_prio_3_bytes",
183 	"rx_prio_4_packets", "rx_prio_4_bytes",
184 	"rx_prio_5_packets", "rx_prio_5_bytes",
185 	"rx_prio_6_packets", "rx_prio_6_bytes",
186 	"rx_prio_7_packets", "rx_prio_7_bytes",
187 	"rx_novlan_packets", "rx_novlan_bytes",
188 	"tx_prio_0_packets", "tx_prio_0_bytes",
189 	"tx_prio_1_packets", "tx_prio_1_bytes",
190 	"tx_prio_2_packets", "tx_prio_2_bytes",
191 	"tx_prio_3_packets", "tx_prio_3_bytes",
192 	"tx_prio_4_packets", "tx_prio_4_bytes",
193 	"tx_prio_5_packets", "tx_prio_5_bytes",
194 	"tx_prio_6_packets", "tx_prio_6_bytes",
195 	"tx_prio_7_packets", "tx_prio_7_bytes",
196 	"tx_novlan_packets", "tx_novlan_bytes",
197 
198 	/* xdp statistics */
199 	"rx_xdp_drop",
200 	"rx_xdp_tx",
201 	"rx_xdp_tx_full",
202 
203 	/* phy statistics */
204 	"rx_packets_phy", "rx_bytes_phy",
205 	"tx_packets_phy", "tx_bytes_phy",
206 };
207 
208 static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
209 	"Interrupt Test",
210 	"Link Test",
211 	"Speed Test",
212 	"Register Test",
213 	"Loopback Test",
214 };
215 
216 static u32 mlx4_en_get_msglevel(struct net_device *dev)
217 {
218 	return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
219 }
220 
221 static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
222 {
223 	((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
224 }
225 
226 static void mlx4_en_get_wol(struct net_device *netdev,
227 			    struct ethtool_wolinfo *wol)
228 {
229 	struct mlx4_en_priv *priv = netdev_priv(netdev);
230 	struct mlx4_caps *caps = &priv->mdev->dev->caps;
231 	int err = 0;
232 	u64 config = 0;
233 	u64 mask;
234 
235 	if ((priv->port < 1) || (priv->port > 2)) {
236 		en_err(priv, "Failed to get WoL information\n");
237 		return;
238 	}
239 
240 	mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
241 		MLX4_DEV_CAP_FLAG_WOL_PORT2;
242 
243 	if (!(caps->flags & mask)) {
244 		wol->supported = 0;
245 		wol->wolopts = 0;
246 		return;
247 	}
248 
249 	if (caps->wol_port[priv->port])
250 		wol->supported = WAKE_MAGIC;
251 	else
252 		wol->supported = 0;
253 
254 	err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
255 	if (err) {
256 		en_err(priv, "Failed to get WoL information\n");
257 		return;
258 	}
259 
260 	if ((config & MLX4_EN_WOL_ENABLED) && (config & MLX4_EN_WOL_MAGIC))
261 		wol->wolopts = WAKE_MAGIC;
262 	else
263 		wol->wolopts = 0;
264 }
265 
266 static int mlx4_en_set_wol(struct net_device *netdev,
267 			    struct ethtool_wolinfo *wol)
268 {
269 	struct mlx4_en_priv *priv = netdev_priv(netdev);
270 	u64 config = 0;
271 	int err = 0;
272 	u64 mask;
273 
274 	if ((priv->port < 1) || (priv->port > 2))
275 		return -EOPNOTSUPP;
276 
277 	mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
278 		MLX4_DEV_CAP_FLAG_WOL_PORT2;
279 
280 	if (!(priv->mdev->dev->caps.flags & mask))
281 		return -EOPNOTSUPP;
282 
283 	if (wol->supported & ~WAKE_MAGIC)
284 		return -EINVAL;
285 
286 	err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
287 	if (err) {
288 		en_err(priv, "Failed to get WoL info, unable to modify\n");
289 		return err;
290 	}
291 
292 	if (wol->wolopts & WAKE_MAGIC) {
293 		config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
294 				MLX4_EN_WOL_MAGIC;
295 	} else {
296 		config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
297 		config |= MLX4_EN_WOL_DO_MODIFY;
298 	}
299 
300 	err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
301 	if (err)
302 		en_err(priv, "Failed to set WoL information\n");
303 
304 	return err;
305 }
306 
307 struct bitmap_iterator {
308 	unsigned long *stats_bitmap;
309 	unsigned int count;
310 	unsigned int iterator;
311 	bool advance_array; /* if set, force no increments */
312 };
313 
314 static inline void bitmap_iterator_init(struct bitmap_iterator *h,
315 					unsigned long *stats_bitmap,
316 					int count)
317 {
318 	h->iterator = 0;
319 	h->advance_array = !bitmap_empty(stats_bitmap, count);
320 	h->count = h->advance_array ? bitmap_weight(stats_bitmap, count)
321 		: count;
322 	h->stats_bitmap = stats_bitmap;
323 }
324 
325 static inline int bitmap_iterator_test(struct bitmap_iterator *h)
326 {
327 	return !h->advance_array ? 1 : test_bit(h->iterator, h->stats_bitmap);
328 }
329 
330 static inline int bitmap_iterator_inc(struct bitmap_iterator *h)
331 {
332 	return h->iterator++;
333 }
334 
335 static inline unsigned int
336 bitmap_iterator_count(struct bitmap_iterator *h)
337 {
338 	return h->count;
339 }
340 
341 static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
342 {
343 	struct mlx4_en_priv *priv = netdev_priv(dev);
344 	struct bitmap_iterator it;
345 
346 	bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
347 
348 	switch (sset) {
349 	case ETH_SS_STATS:
350 		return bitmap_iterator_count(&it) +
351 			(priv->tx_ring_num[TX] * 2) +
352 			(priv->rx_ring_num * (3 + NUM_XDP_STATS));
353 	case ETH_SS_TEST:
354 		return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
355 					& MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
356 	case ETH_SS_PRIV_FLAGS:
357 		return ARRAY_SIZE(mlx4_en_priv_flags);
358 	default:
359 		return -EOPNOTSUPP;
360 	}
361 }
362 
363 static void mlx4_en_get_ethtool_stats(struct net_device *dev,
364 		struct ethtool_stats *stats, uint64_t *data)
365 {
366 	struct mlx4_en_priv *priv = netdev_priv(dev);
367 	int index = 0;
368 	int i;
369 	struct bitmap_iterator it;
370 
371 	bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
372 
373 	spin_lock_bh(&priv->stats_lock);
374 
375 	mlx4_en_fold_software_stats(dev);
376 
377 	for (i = 0; i < NUM_MAIN_STATS; i++, bitmap_iterator_inc(&it))
378 		if (bitmap_iterator_test(&it))
379 			data[index++] = ((unsigned long *)&dev->stats)[i];
380 
381 	for (i = 0; i < NUM_PORT_STATS; i++, bitmap_iterator_inc(&it))
382 		if (bitmap_iterator_test(&it))
383 			data[index++] = ((unsigned long *)&priv->port_stats)[i];
384 
385 	for (i = 0; i < NUM_PF_STATS; i++, bitmap_iterator_inc(&it))
386 		if (bitmap_iterator_test(&it))
387 			data[index++] =
388 				((unsigned long *)&priv->pf_stats)[i];
389 
390 	for (i = 0; i < NUM_FLOW_PRIORITY_STATS_RX;
391 	     i++, bitmap_iterator_inc(&it))
392 		if (bitmap_iterator_test(&it))
393 			data[index++] =
394 				((u64 *)&priv->rx_priority_flowstats)[i];
395 
396 	for (i = 0; i < NUM_FLOW_STATS_RX; i++, bitmap_iterator_inc(&it))
397 		if (bitmap_iterator_test(&it))
398 			data[index++] = ((u64 *)&priv->rx_flowstats)[i];
399 
400 	for (i = 0; i < NUM_FLOW_PRIORITY_STATS_TX;
401 	     i++, bitmap_iterator_inc(&it))
402 		if (bitmap_iterator_test(&it))
403 			data[index++] =
404 				((u64 *)&priv->tx_priority_flowstats)[i];
405 
406 	for (i = 0; i < NUM_FLOW_STATS_TX; i++, bitmap_iterator_inc(&it))
407 		if (bitmap_iterator_test(&it))
408 			data[index++] = ((u64 *)&priv->tx_flowstats)[i];
409 
410 	for (i = 0; i < NUM_PKT_STATS; i++, bitmap_iterator_inc(&it))
411 		if (bitmap_iterator_test(&it))
412 			data[index++] = ((unsigned long *)&priv->pkstats)[i];
413 
414 	for (i = 0; i < NUM_XDP_STATS; i++, bitmap_iterator_inc(&it))
415 		if (bitmap_iterator_test(&it))
416 			data[index++] = ((unsigned long *)&priv->xdp_stats)[i];
417 
418 	for (i = 0; i < NUM_PHY_STATS; i++, bitmap_iterator_inc(&it))
419 		if (bitmap_iterator_test(&it))
420 			data[index++] = ((unsigned long *)&priv->phy_stats)[i];
421 
422 	for (i = 0; i < priv->tx_ring_num[TX]; i++) {
423 		data[index++] = priv->tx_ring[TX][i]->packets;
424 		data[index++] = priv->tx_ring[TX][i]->bytes;
425 	}
426 	for (i = 0; i < priv->rx_ring_num; i++) {
427 		data[index++] = priv->rx_ring[i]->packets;
428 		data[index++] = priv->rx_ring[i]->bytes;
429 		data[index++] = priv->rx_ring[i]->dropped;
430 		data[index++] = priv->rx_ring[i]->xdp_drop;
431 		data[index++] = priv->rx_ring[i]->xdp_tx;
432 		data[index++] = priv->rx_ring[i]->xdp_tx_full;
433 	}
434 	spin_unlock_bh(&priv->stats_lock);
435 
436 }
437 
438 static void mlx4_en_self_test(struct net_device *dev,
439 			      struct ethtool_test *etest, u64 *buf)
440 {
441 	mlx4_en_ex_selftest(dev, &etest->flags, buf);
442 }
443 
444 static void mlx4_en_get_strings(struct net_device *dev,
445 				uint32_t stringset, uint8_t *data)
446 {
447 	struct mlx4_en_priv *priv = netdev_priv(dev);
448 	int index = 0;
449 	int i, strings = 0;
450 	struct bitmap_iterator it;
451 
452 	bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
453 
454 	switch (stringset) {
455 	case ETH_SS_TEST:
456 		for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
457 			strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
458 		if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
459 			for (; i < MLX4_EN_NUM_SELF_TEST; i++)
460 				strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
461 		break;
462 
463 	case ETH_SS_STATS:
464 		/* Add main counters */
465 		for (i = 0; i < NUM_MAIN_STATS; i++, strings++,
466 		     bitmap_iterator_inc(&it))
467 			if (bitmap_iterator_test(&it))
468 				strcpy(data + (index++) * ETH_GSTRING_LEN,
469 				       main_strings[strings]);
470 
471 		for (i = 0; i < NUM_PORT_STATS; i++, strings++,
472 		     bitmap_iterator_inc(&it))
473 			if (bitmap_iterator_test(&it))
474 				strcpy(data + (index++) * ETH_GSTRING_LEN,
475 				       main_strings[strings]);
476 
477 		for (i = 0; i < NUM_PF_STATS; i++, strings++,
478 		     bitmap_iterator_inc(&it))
479 			if (bitmap_iterator_test(&it))
480 				strcpy(data + (index++) * ETH_GSTRING_LEN,
481 				       main_strings[strings]);
482 
483 		for (i = 0; i < NUM_FLOW_STATS; i++, strings++,
484 		     bitmap_iterator_inc(&it))
485 			if (bitmap_iterator_test(&it))
486 				strcpy(data + (index++) * ETH_GSTRING_LEN,
487 				       main_strings[strings]);
488 
489 		for (i = 0; i < NUM_PKT_STATS; i++, strings++,
490 		     bitmap_iterator_inc(&it))
491 			if (bitmap_iterator_test(&it))
492 				strcpy(data + (index++) * ETH_GSTRING_LEN,
493 				       main_strings[strings]);
494 
495 		for (i = 0; i < NUM_XDP_STATS; i++, strings++,
496 		     bitmap_iterator_inc(&it))
497 			if (bitmap_iterator_test(&it))
498 				strcpy(data + (index++) * ETH_GSTRING_LEN,
499 				       main_strings[strings]);
500 
501 		for (i = 0; i < NUM_PHY_STATS; i++, strings++,
502 		     bitmap_iterator_inc(&it))
503 			if (bitmap_iterator_test(&it))
504 				strcpy(data + (index++) * ETH_GSTRING_LEN,
505 				       main_strings[strings]);
506 
507 		for (i = 0; i < priv->tx_ring_num[TX]; i++) {
508 			sprintf(data + (index++) * ETH_GSTRING_LEN,
509 				"tx%d_packets", i);
510 			sprintf(data + (index++) * ETH_GSTRING_LEN,
511 				"tx%d_bytes", i);
512 		}
513 		for (i = 0; i < priv->rx_ring_num; i++) {
514 			sprintf(data + (index++) * ETH_GSTRING_LEN,
515 				"rx%d_packets", i);
516 			sprintf(data + (index++) * ETH_GSTRING_LEN,
517 				"rx%d_bytes", i);
518 			sprintf(data + (index++) * ETH_GSTRING_LEN,
519 				"rx%d_dropped", i);
520 			sprintf(data + (index++) * ETH_GSTRING_LEN,
521 				"rx%d_xdp_drop", i);
522 			sprintf(data + (index++) * ETH_GSTRING_LEN,
523 				"rx%d_xdp_tx", i);
524 			sprintf(data + (index++) * ETH_GSTRING_LEN,
525 				"rx%d_xdp_tx_full", i);
526 		}
527 		break;
528 	case ETH_SS_PRIV_FLAGS:
529 		for (i = 0; i < ARRAY_SIZE(mlx4_en_priv_flags); i++)
530 			strcpy(data + i * ETH_GSTRING_LEN,
531 			       mlx4_en_priv_flags[i]);
532 		break;
533 
534 	}
535 }
536 
537 static u32 mlx4_en_autoneg_get(struct net_device *dev)
538 {
539 	struct mlx4_en_priv *priv = netdev_priv(dev);
540 	struct mlx4_en_dev *mdev = priv->mdev;
541 	u32 autoneg = AUTONEG_DISABLE;
542 
543 	if ((mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP) &&
544 	    (priv->port_state.flags & MLX4_EN_PORT_ANE))
545 		autoneg = AUTONEG_ENABLE;
546 
547 	return autoneg;
548 }
549 
550 static void ptys2ethtool_update_supported_port(unsigned long *mask,
551 					       struct mlx4_ptys_reg *ptys_reg)
552 {
553 	u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
554 
555 	if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
556 			 | MLX4_PROT_MASK(MLX4_1000BASE_T)
557 			 | MLX4_PROT_MASK(MLX4_100BASE_TX))) {
558 		__set_bit(ETHTOOL_LINK_MODE_TP_BIT, mask);
559 	} else if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
560 			 | MLX4_PROT_MASK(MLX4_10GBASE_SR)
561 			 | MLX4_PROT_MASK(MLX4_56GBASE_SR4)
562 			 | MLX4_PROT_MASK(MLX4_40GBASE_CR4)
563 			 | MLX4_PROT_MASK(MLX4_40GBASE_SR4)
564 			 | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
565 		__set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, mask);
566 	} else if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
567 			 | MLX4_PROT_MASK(MLX4_40GBASE_KR4)
568 			 | MLX4_PROT_MASK(MLX4_20GBASE_KR2)
569 			 | MLX4_PROT_MASK(MLX4_10GBASE_KR)
570 			 | MLX4_PROT_MASK(MLX4_10GBASE_KX4)
571 			 | MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
572 		__set_bit(ETHTOOL_LINK_MODE_Backplane_BIT, mask);
573 	}
574 }
575 
576 static u32 ptys_get_active_port(struct mlx4_ptys_reg *ptys_reg)
577 {
578 	u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_oper);
579 
580 	if (!eth_proto) /* link down */
581 		eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
582 
583 	if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
584 			 | MLX4_PROT_MASK(MLX4_1000BASE_T)
585 			 | MLX4_PROT_MASK(MLX4_100BASE_TX))) {
586 			return PORT_TP;
587 	}
588 
589 	if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_SR)
590 			 | MLX4_PROT_MASK(MLX4_56GBASE_SR4)
591 			 | MLX4_PROT_MASK(MLX4_40GBASE_SR4)
592 			 | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
593 			return PORT_FIBRE;
594 	}
595 
596 	if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
597 			 | MLX4_PROT_MASK(MLX4_56GBASE_CR4)
598 			 | MLX4_PROT_MASK(MLX4_40GBASE_CR4))) {
599 			return PORT_DA;
600 	}
601 
602 	if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
603 			 | MLX4_PROT_MASK(MLX4_40GBASE_KR4)
604 			 | MLX4_PROT_MASK(MLX4_20GBASE_KR2)
605 			 | MLX4_PROT_MASK(MLX4_10GBASE_KR)
606 			 | MLX4_PROT_MASK(MLX4_10GBASE_KX4)
607 			 | MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
608 			return PORT_NONE;
609 	}
610 	return PORT_OTHER;
611 }
612 
613 #define MLX4_LINK_MODES_SZ \
614 	(sizeof_field(struct mlx4_ptys_reg, eth_proto_cap) * 8)
615 
616 enum ethtool_report {
617 	SUPPORTED = 0,
618 	ADVERTISED = 1,
619 };
620 
621 struct ptys2ethtool_config {
622 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
623 	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
624 	u32 speed;
625 };
626 
627 static unsigned long *ptys2ethtool_link_mode(struct ptys2ethtool_config *cfg,
628 					     enum ethtool_report report)
629 {
630 	switch (report) {
631 	case SUPPORTED:
632 		return cfg->supported;
633 	case ADVERTISED:
634 		return cfg->advertised;
635 	}
636 	return NULL;
637 }
638 
639 #define MLX4_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)		\
640 	({								\
641 		struct ptys2ethtool_config *cfg;			\
642 		static const unsigned int modes[] = { __VA_ARGS__ };	\
643 		unsigned int i;						\
644 		cfg = &ptys2ethtool_map[reg_];				\
645 		cfg->speed = speed_;					\
646 		bitmap_zero(cfg->supported,				\
647 			    __ETHTOOL_LINK_MODE_MASK_NBITS);		\
648 		bitmap_zero(cfg->advertised,				\
649 			    __ETHTOOL_LINK_MODE_MASK_NBITS);		\
650 		for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {		\
651 			__set_bit(modes[i], cfg->supported);		\
652 			__set_bit(modes[i], cfg->advertised);		\
653 		}							\
654 	})
655 
656 /* Translates mlx4 link mode to equivalent ethtool Link modes/speed */
657 static struct ptys2ethtool_config ptys2ethtool_map[MLX4_LINK_MODES_SZ];
658 
659 void __init mlx4_en_init_ptys2ethtool_map(void)
660 {
661 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_100BASE_TX, SPEED_100,
662 				       ETHTOOL_LINK_MODE_100baseT_Full_BIT);
663 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_T, SPEED_1000,
664 				       ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
665 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_CX_SGMII, SPEED_1000,
666 				       ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
667 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_KX, SPEED_1000,
668 				       ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
669 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_T, SPEED_10000,
670 				       ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
671 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_CX4, SPEED_10000,
672 				       ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
673 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_KX4, SPEED_10000,
674 				       ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
675 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_KR, SPEED_10000,
676 				       ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
677 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_CR, SPEED_10000,
678 				       ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
679 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_SR, SPEED_10000,
680 				       ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
681 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_20GBASE_KR2, SPEED_20000,
682 				       ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT,
683 				       ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
684 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_CR4, SPEED_40000,
685 				       ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
686 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_KR4, SPEED_40000,
687 				       ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
688 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_SR4, SPEED_40000,
689 				       ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
690 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_KR4, SPEED_56000,
691 				       ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
692 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_CR4, SPEED_56000,
693 				       ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT);
694 	MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_SR4, SPEED_56000,
695 				       ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT);
696 };
697 
698 static void ptys2ethtool_update_link_modes(unsigned long *link_modes,
699 					   u32 eth_proto,
700 					   enum ethtool_report report)
701 {
702 	int i;
703 	for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
704 		if (eth_proto & MLX4_PROT_MASK(i))
705 			bitmap_or(link_modes, link_modes,
706 				  ptys2ethtool_link_mode(&ptys2ethtool_map[i],
707 							 report),
708 				  __ETHTOOL_LINK_MODE_MASK_NBITS);
709 	}
710 }
711 
712 static u32 ethtool2ptys_link_modes(const unsigned long *link_modes,
713 				   enum ethtool_report report)
714 {
715 	int i;
716 	u32 ptys_modes = 0;
717 
718 	for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
719 		if (bitmap_intersects(
720 			    ptys2ethtool_link_mode(&ptys2ethtool_map[i],
721 						   report),
722 			    link_modes,
723 			    __ETHTOOL_LINK_MODE_MASK_NBITS))
724 			ptys_modes |= 1 << i;
725 	}
726 	return ptys_modes;
727 }
728 
729 /* Convert actual speed (SPEED_XXX) to ptys link modes */
730 static u32 speed2ptys_link_modes(u32 speed)
731 {
732 	int i;
733 	u32 ptys_modes = 0;
734 
735 	for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
736 		if (ptys2ethtool_map[i].speed == speed)
737 			ptys_modes |= 1 << i;
738 	}
739 	return ptys_modes;
740 }
741 
742 static int
743 ethtool_get_ptys_link_ksettings(struct net_device *dev,
744 				struct ethtool_link_ksettings *link_ksettings)
745 {
746 	struct mlx4_en_priv *priv = netdev_priv(dev);
747 	struct mlx4_ptys_reg ptys_reg;
748 	u32 eth_proto;
749 	int ret;
750 
751 	memset(&ptys_reg, 0, sizeof(ptys_reg));
752 	ptys_reg.local_port = priv->port;
753 	ptys_reg.proto_mask = MLX4_PTYS_EN;
754 	ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
755 				   MLX4_ACCESS_REG_QUERY, &ptys_reg);
756 	if (ret) {
757 		en_warn(priv, "Failed to run mlx4_ACCESS_PTYS_REG status(%x)",
758 			ret);
759 		return ret;
760 	}
761 	en_dbg(DRV, priv, "ptys_reg.proto_mask       %x\n",
762 	       ptys_reg.proto_mask);
763 	en_dbg(DRV, priv, "ptys_reg.eth_proto_cap    %x\n",
764 	       be32_to_cpu(ptys_reg.eth_proto_cap));
765 	en_dbg(DRV, priv, "ptys_reg.eth_proto_admin  %x\n",
766 	       be32_to_cpu(ptys_reg.eth_proto_admin));
767 	en_dbg(DRV, priv, "ptys_reg.eth_proto_oper   %x\n",
768 	       be32_to_cpu(ptys_reg.eth_proto_oper));
769 	en_dbg(DRV, priv, "ptys_reg.eth_proto_lp_adv %x\n",
770 	       be32_to_cpu(ptys_reg.eth_proto_lp_adv));
771 
772 	/* reset supported/advertising masks */
773 	ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
774 	ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
775 
776 	ptys2ethtool_update_supported_port(link_ksettings->link_modes.supported,
777 					   &ptys_reg);
778 
779 	eth_proto = be32_to_cpu(ptys_reg.eth_proto_cap);
780 	ptys2ethtool_update_link_modes(link_ksettings->link_modes.supported,
781 				       eth_proto, SUPPORTED);
782 
783 	eth_proto = be32_to_cpu(ptys_reg.eth_proto_admin);
784 	ptys2ethtool_update_link_modes(link_ksettings->link_modes.advertising,
785 				       eth_proto, ADVERTISED);
786 
787 	ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
788 					     Pause);
789 	ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
790 					     Asym_Pause);
791 
792 	if (priv->prof->tx_pause)
793 		ethtool_link_ksettings_add_link_mode(link_ksettings,
794 						     advertising, Pause);
795 	if (priv->prof->tx_pause ^ priv->prof->rx_pause)
796 		ethtool_link_ksettings_add_link_mode(link_ksettings,
797 						     advertising, Asym_Pause);
798 
799 	link_ksettings->base.port = ptys_get_active_port(&ptys_reg);
800 
801 	if (mlx4_en_autoneg_get(dev)) {
802 		ethtool_link_ksettings_add_link_mode(link_ksettings,
803 						     supported, Autoneg);
804 		ethtool_link_ksettings_add_link_mode(link_ksettings,
805 						     advertising, Autoneg);
806 	}
807 
808 	link_ksettings->base.autoneg
809 		= (priv->port_state.flags & MLX4_EN_PORT_ANC) ?
810 		AUTONEG_ENABLE : AUTONEG_DISABLE;
811 
812 	eth_proto = be32_to_cpu(ptys_reg.eth_proto_lp_adv);
813 
814 	ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising);
815 	ptys2ethtool_update_link_modes(
816 		link_ksettings->link_modes.lp_advertising,
817 		eth_proto, ADVERTISED);
818 	if (priv->port_state.flags & MLX4_EN_PORT_ANC)
819 		ethtool_link_ksettings_add_link_mode(link_ksettings,
820 						     lp_advertising, Autoneg);
821 
822 	link_ksettings->base.phy_address = 0;
823 	link_ksettings->base.mdio_support = 0;
824 	link_ksettings->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
825 	link_ksettings->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
826 
827 	return ret;
828 }
829 
830 static void
831 ethtool_get_default_link_ksettings(
832 	struct net_device *dev, struct ethtool_link_ksettings *link_ksettings)
833 {
834 	struct mlx4_en_priv *priv = netdev_priv(dev);
835 	int trans_type;
836 
837 	link_ksettings->base.autoneg = AUTONEG_DISABLE;
838 
839 	ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
840 	ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
841 					     10000baseT_Full);
842 
843 	ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
844 	ethtool_link_ksettings_add_link_mode(link_ksettings, advertising,
845 					     10000baseT_Full);
846 
847 	trans_type = priv->port_state.transceiver;
848 	if (trans_type > 0 && trans_type <= 0xC) {
849 		link_ksettings->base.port = PORT_FIBRE;
850 		ethtool_link_ksettings_add_link_mode(link_ksettings,
851 						     supported, FIBRE);
852 		ethtool_link_ksettings_add_link_mode(link_ksettings,
853 						     advertising, FIBRE);
854 	} else if (trans_type == 0x80 || trans_type == 0) {
855 		link_ksettings->base.port = PORT_TP;
856 		ethtool_link_ksettings_add_link_mode(link_ksettings,
857 						     supported, TP);
858 		ethtool_link_ksettings_add_link_mode(link_ksettings,
859 						     advertising, TP);
860 	} else  {
861 		link_ksettings->base.port = -1;
862 	}
863 }
864 
865 static int
866 mlx4_en_get_link_ksettings(struct net_device *dev,
867 			   struct ethtool_link_ksettings *link_ksettings)
868 {
869 	struct mlx4_en_priv *priv = netdev_priv(dev);
870 	int ret = -EINVAL;
871 
872 	if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
873 		return -ENOMEM;
874 
875 	en_dbg(DRV, priv, "query port state.flags ANC(%x) ANE(%x)\n",
876 	       priv->port_state.flags & MLX4_EN_PORT_ANC,
877 	       priv->port_state.flags & MLX4_EN_PORT_ANE);
878 
879 	if (priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL)
880 		ret = ethtool_get_ptys_link_ksettings(dev, link_ksettings);
881 	if (ret) /* ETH PROT CRTL is not supported or PTYS CMD failed */
882 		ethtool_get_default_link_ksettings(dev, link_ksettings);
883 
884 	if (netif_carrier_ok(dev)) {
885 		link_ksettings->base.speed = priv->port_state.link_speed;
886 		link_ksettings->base.duplex = DUPLEX_FULL;
887 	} else {
888 		link_ksettings->base.speed = SPEED_UNKNOWN;
889 		link_ksettings->base.duplex = DUPLEX_UNKNOWN;
890 	}
891 	return 0;
892 }
893 
894 /* Calculate PTYS admin according ethtool speed (SPEED_XXX) */
895 static __be32 speed_set_ptys_admin(struct mlx4_en_priv *priv, u32 speed,
896 				   __be32 proto_cap)
897 {
898 	__be32 proto_admin = 0;
899 
900 	if (!speed) { /* Speed = 0 ==> Reset Link modes */
901 		proto_admin = proto_cap;
902 		en_info(priv, "Speed was set to 0, Reset advertised Link Modes to default (%x)\n",
903 			be32_to_cpu(proto_cap));
904 	} else {
905 		u32 ptys_link_modes = speed2ptys_link_modes(speed);
906 
907 		proto_admin = cpu_to_be32(ptys_link_modes) & proto_cap;
908 		en_info(priv, "Setting Speed to %d\n", speed);
909 	}
910 	return proto_admin;
911 }
912 
913 static int
914 mlx4_en_set_link_ksettings(struct net_device *dev,
915 			   const struct ethtool_link_ksettings *link_ksettings)
916 {
917 	struct mlx4_en_priv *priv = netdev_priv(dev);
918 	struct mlx4_ptys_reg ptys_reg;
919 	__be32 proto_admin;
920 	u8 cur_autoneg;
921 	int ret;
922 
923 	u32 ptys_adv = ethtool2ptys_link_modes(
924 		link_ksettings->link_modes.advertising, ADVERTISED);
925 	const int speed = link_ksettings->base.speed;
926 
927 	en_dbg(DRV, priv,
928 	       "Set Speed=%d adv={%*pbl} autoneg=%d duplex=%d\n",
929 	       speed, __ETHTOOL_LINK_MODE_MASK_NBITS,
930 	       link_ksettings->link_modes.advertising,
931 	       link_ksettings->base.autoneg,
932 	       link_ksettings->base.duplex);
933 
934 	if (!(priv->mdev->dev->caps.flags2 &
935 	      MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL) ||
936 	    (link_ksettings->base.duplex == DUPLEX_HALF))
937 		return -EINVAL;
938 
939 	memset(&ptys_reg, 0, sizeof(ptys_reg));
940 	ptys_reg.local_port = priv->port;
941 	ptys_reg.proto_mask = MLX4_PTYS_EN;
942 	ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
943 				   MLX4_ACCESS_REG_QUERY, &ptys_reg);
944 	if (ret) {
945 		en_warn(priv, "Failed to QUERY mlx4_ACCESS_PTYS_REG status(%x)\n",
946 			ret);
947 		return 0;
948 	}
949 
950 	cur_autoneg = ptys_reg.flags & MLX4_PTYS_AN_DISABLE_ADMIN ?
951 				AUTONEG_DISABLE : AUTONEG_ENABLE;
952 
953 	if (link_ksettings->base.autoneg == AUTONEG_DISABLE) {
954 		proto_admin = speed_set_ptys_admin(priv, speed,
955 						   ptys_reg.eth_proto_cap);
956 		if ((be32_to_cpu(proto_admin) &
957 		     (MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII) |
958 		      MLX4_PROT_MASK(MLX4_1000BASE_KX))) &&
959 		    (ptys_reg.flags & MLX4_PTYS_AN_DISABLE_CAP))
960 			ptys_reg.flags |= MLX4_PTYS_AN_DISABLE_ADMIN;
961 	} else {
962 		proto_admin = cpu_to_be32(ptys_adv);
963 		ptys_reg.flags &= ~MLX4_PTYS_AN_DISABLE_ADMIN;
964 	}
965 
966 	proto_admin &= ptys_reg.eth_proto_cap;
967 	if (!proto_admin) {
968 		en_warn(priv, "Not supported link mode(s) requested, check supported link modes.\n");
969 		return -EINVAL; /* nothing to change due to bad input */
970 	}
971 
972 	if ((proto_admin == ptys_reg.eth_proto_admin) &&
973 	    ((ptys_reg.flags & MLX4_PTYS_AN_DISABLE_CAP) &&
974 	     (link_ksettings->base.autoneg == cur_autoneg)))
975 		return 0; /* Nothing to change */
976 
977 	en_dbg(DRV, priv, "mlx4_ACCESS_PTYS_REG SET: ptys_reg.eth_proto_admin = 0x%x\n",
978 	       be32_to_cpu(proto_admin));
979 
980 	ptys_reg.eth_proto_admin = proto_admin;
981 	ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev, MLX4_ACCESS_REG_WRITE,
982 				   &ptys_reg);
983 	if (ret) {
984 		en_warn(priv, "Failed to write mlx4_ACCESS_PTYS_REG eth_proto_admin(0x%x) status(0x%x)",
985 			be32_to_cpu(ptys_reg.eth_proto_admin), ret);
986 		return ret;
987 	}
988 
989 	mutex_lock(&priv->mdev->state_lock);
990 	if (priv->port_up) {
991 		en_warn(priv, "Port link mode changed, restarting port...\n");
992 		mlx4_en_stop_port(dev, 1);
993 		if (mlx4_en_start_port(dev))
994 			en_err(priv, "Failed restarting port %d\n", priv->port);
995 	}
996 	mutex_unlock(&priv->mdev->state_lock);
997 	return 0;
998 }
999 
1000 static int mlx4_en_get_coalesce(struct net_device *dev,
1001 			      struct ethtool_coalesce *coal)
1002 {
1003 	struct mlx4_en_priv *priv = netdev_priv(dev);
1004 
1005 	coal->tx_coalesce_usecs = priv->tx_usecs;
1006 	coal->tx_max_coalesced_frames = priv->tx_frames;
1007 	coal->tx_max_coalesced_frames_irq = priv->tx_work_limit;
1008 
1009 	coal->rx_coalesce_usecs = priv->rx_usecs;
1010 	coal->rx_max_coalesced_frames = priv->rx_frames;
1011 
1012 	coal->pkt_rate_low = priv->pkt_rate_low;
1013 	coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
1014 	coal->pkt_rate_high = priv->pkt_rate_high;
1015 	coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
1016 	coal->rate_sample_interval = priv->sample_interval;
1017 	coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
1018 
1019 	return 0;
1020 }
1021 
1022 static int mlx4_en_set_coalesce(struct net_device *dev,
1023 			      struct ethtool_coalesce *coal)
1024 {
1025 	struct mlx4_en_priv *priv = netdev_priv(dev);
1026 
1027 	if (!coal->tx_max_coalesced_frames_irq)
1028 		return -EINVAL;
1029 
1030 	if (coal->tx_coalesce_usecs > MLX4_EN_MAX_COAL_TIME ||
1031 	    coal->rx_coalesce_usecs > MLX4_EN_MAX_COAL_TIME ||
1032 	    coal->rx_coalesce_usecs_low > MLX4_EN_MAX_COAL_TIME ||
1033 	    coal->rx_coalesce_usecs_high > MLX4_EN_MAX_COAL_TIME) {
1034 		netdev_info(dev, "%s: maximum coalesce time supported is %d usecs\n",
1035 			    __func__, MLX4_EN_MAX_COAL_TIME);
1036 		return -ERANGE;
1037 	}
1038 
1039 	if (coal->tx_max_coalesced_frames > MLX4_EN_MAX_COAL_PKTS ||
1040 	    coal->rx_max_coalesced_frames > MLX4_EN_MAX_COAL_PKTS) {
1041 		netdev_info(dev, "%s: maximum coalesced frames supported is %d\n",
1042 			    __func__, MLX4_EN_MAX_COAL_PKTS);
1043 		return -ERANGE;
1044 	}
1045 
1046 	priv->rx_frames = (coal->rx_max_coalesced_frames ==
1047 			   MLX4_EN_AUTO_CONF) ?
1048 				MLX4_EN_RX_COAL_TARGET :
1049 				coal->rx_max_coalesced_frames;
1050 	priv->rx_usecs = (coal->rx_coalesce_usecs ==
1051 			  MLX4_EN_AUTO_CONF) ?
1052 				MLX4_EN_RX_COAL_TIME :
1053 				coal->rx_coalesce_usecs;
1054 
1055 	/* Setting TX coalescing parameters */
1056 	if (coal->tx_coalesce_usecs != priv->tx_usecs ||
1057 	    coal->tx_max_coalesced_frames != priv->tx_frames) {
1058 		priv->tx_usecs = coal->tx_coalesce_usecs;
1059 		priv->tx_frames = coal->tx_max_coalesced_frames;
1060 	}
1061 
1062 	/* Set adaptive coalescing params */
1063 	priv->pkt_rate_low = coal->pkt_rate_low;
1064 	priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
1065 	priv->pkt_rate_high = coal->pkt_rate_high;
1066 	priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
1067 	priv->sample_interval = coal->rate_sample_interval;
1068 	priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
1069 	priv->tx_work_limit = coal->tx_max_coalesced_frames_irq;
1070 
1071 	return mlx4_en_moderation_update(priv);
1072 }
1073 
1074 static int mlx4_en_set_pauseparam(struct net_device *dev,
1075 				struct ethtool_pauseparam *pause)
1076 {
1077 	struct mlx4_en_priv *priv = netdev_priv(dev);
1078 	struct mlx4_en_dev *mdev = priv->mdev;
1079 	u8 tx_pause, tx_ppp, rx_pause, rx_ppp;
1080 	int err;
1081 
1082 	if (pause->autoneg)
1083 		return -EINVAL;
1084 
1085 	tx_pause = !!(pause->tx_pause);
1086 	rx_pause = !!(pause->rx_pause);
1087 	rx_ppp = (tx_pause || rx_pause) ? 0 : priv->prof->rx_ppp;
1088 	tx_ppp = (tx_pause || rx_pause) ? 0 : priv->prof->tx_ppp;
1089 
1090 	err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1091 				    priv->rx_skb_size + ETH_FCS_LEN,
1092 				    tx_pause, tx_ppp, rx_pause, rx_ppp);
1093 	if (err) {
1094 		en_err(priv, "Failed setting pause params, err = %d\n", err);
1095 		return err;
1096 	}
1097 
1098 	mlx4_en_update_pfc_stats_bitmap(mdev->dev, &priv->stats_bitmap,
1099 					rx_ppp, rx_pause, tx_ppp, tx_pause);
1100 
1101 	priv->prof->tx_pause = tx_pause;
1102 	priv->prof->rx_pause = rx_pause;
1103 	priv->prof->tx_ppp = tx_ppp;
1104 	priv->prof->rx_ppp = rx_ppp;
1105 
1106 	return err;
1107 }
1108 
1109 static void mlx4_en_get_pause_stats(struct net_device *dev,
1110 				    struct ethtool_pause_stats *stats)
1111 {
1112 	struct mlx4_en_priv *priv = netdev_priv(dev);
1113 	struct bitmap_iterator it;
1114 
1115 	bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
1116 
1117 	spin_lock_bh(&priv->stats_lock);
1118 	if (test_bit(FLOW_PRIORITY_STATS_IDX_TX_FRAMES,
1119 		     priv->stats_bitmap.bitmap))
1120 		stats->tx_pause_frames = priv->tx_flowstats.tx_pause;
1121 	if (test_bit(FLOW_PRIORITY_STATS_IDX_RX_FRAMES,
1122 		     priv->stats_bitmap.bitmap))
1123 		stats->rx_pause_frames = priv->rx_flowstats.rx_pause;
1124 	spin_unlock_bh(&priv->stats_lock);
1125 }
1126 
1127 static void mlx4_en_get_pauseparam(struct net_device *dev,
1128 				 struct ethtool_pauseparam *pause)
1129 {
1130 	struct mlx4_en_priv *priv = netdev_priv(dev);
1131 
1132 	pause->tx_pause = priv->prof->tx_pause;
1133 	pause->rx_pause = priv->prof->rx_pause;
1134 }
1135 
1136 static int mlx4_en_set_ringparam(struct net_device *dev,
1137 				 struct ethtool_ringparam *param)
1138 {
1139 	struct mlx4_en_priv *priv = netdev_priv(dev);
1140 	struct mlx4_en_dev *mdev = priv->mdev;
1141 	struct mlx4_en_port_profile new_prof;
1142 	struct mlx4_en_priv *tmp;
1143 	u32 rx_size, tx_size;
1144 	int port_up = 0;
1145 	int err = 0;
1146 
1147 	if (param->rx_jumbo_pending || param->rx_mini_pending)
1148 		return -EINVAL;
1149 
1150 	if (param->rx_pending < MLX4_EN_MIN_RX_SIZE) {
1151 		en_warn(priv, "%s: rx_pending (%d) < min (%d)\n",
1152 			__func__, param->rx_pending,
1153 			MLX4_EN_MIN_RX_SIZE);
1154 		return -EINVAL;
1155 	}
1156 	if (param->tx_pending < MLX4_EN_MIN_TX_SIZE) {
1157 		en_warn(priv, "%s: tx_pending (%d) < min (%lu)\n",
1158 			__func__, param->tx_pending,
1159 			MLX4_EN_MIN_TX_SIZE);
1160 		return -EINVAL;
1161 	}
1162 
1163 	rx_size = roundup_pow_of_two(param->rx_pending);
1164 	tx_size = roundup_pow_of_two(param->tx_pending);
1165 
1166 	if (rx_size == (priv->port_up ? priv->rx_ring[0]->actual_size :
1167 					priv->rx_ring[0]->size) &&
1168 	    tx_size == priv->tx_ring[TX][0]->size)
1169 		return 0;
1170 
1171 	tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
1172 	if (!tmp)
1173 		return -ENOMEM;
1174 
1175 	mutex_lock(&mdev->state_lock);
1176 	memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
1177 	new_prof.tx_ring_size = tx_size;
1178 	new_prof.rx_ring_size = rx_size;
1179 	err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
1180 	if (err)
1181 		goto out;
1182 
1183 	if (priv->port_up) {
1184 		port_up = 1;
1185 		mlx4_en_stop_port(dev, 1);
1186 	}
1187 
1188 	mlx4_en_safe_replace_resources(priv, tmp);
1189 
1190 	if (port_up) {
1191 		err = mlx4_en_start_port(dev);
1192 		if (err)
1193 			en_err(priv, "Failed starting port\n");
1194 	}
1195 
1196 	err = mlx4_en_moderation_update(priv);
1197 out:
1198 	kfree(tmp);
1199 	mutex_unlock(&mdev->state_lock);
1200 	return err;
1201 }
1202 
1203 static void mlx4_en_get_ringparam(struct net_device *dev,
1204 				  struct ethtool_ringparam *param)
1205 {
1206 	struct mlx4_en_priv *priv = netdev_priv(dev);
1207 
1208 	memset(param, 0, sizeof(*param));
1209 	param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
1210 	param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
1211 	param->rx_pending = priv->port_up ?
1212 		priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size;
1213 	param->tx_pending = priv->tx_ring[TX][0]->size;
1214 }
1215 
1216 static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev)
1217 {
1218 	struct mlx4_en_priv *priv = netdev_priv(dev);
1219 
1220 	return rounddown_pow_of_two(priv->rx_ring_num);
1221 }
1222 
1223 static u32 mlx4_en_get_rxfh_key_size(struct net_device *netdev)
1224 {
1225 	return MLX4_EN_RSS_KEY_SIZE;
1226 }
1227 
1228 static int mlx4_en_check_rxfh_func(struct net_device *dev, u8 hfunc)
1229 {
1230 	struct mlx4_en_priv *priv = netdev_priv(dev);
1231 
1232 	/* check if requested function is supported by the device */
1233 	if (hfunc == ETH_RSS_HASH_TOP) {
1234 		if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP))
1235 			return -EINVAL;
1236 		if (!(dev->features & NETIF_F_RXHASH))
1237 			en_warn(priv, "Toeplitz hash function should be used in conjunction with RX hashing for optimal performance\n");
1238 		return 0;
1239 	} else if (hfunc == ETH_RSS_HASH_XOR) {
1240 		if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR))
1241 			return -EINVAL;
1242 		if (dev->features & NETIF_F_RXHASH)
1243 			en_warn(priv, "Enabling both XOR Hash function and RX Hashing can limit RPS functionality\n");
1244 		return 0;
1245 	}
1246 
1247 	return -EINVAL;
1248 }
1249 
1250 static int mlx4_en_get_rxfh(struct net_device *dev, u32 *ring_index, u8 *key,
1251 			    u8 *hfunc)
1252 {
1253 	struct mlx4_en_priv *priv = netdev_priv(dev);
1254 	u32 n = mlx4_en_get_rxfh_indir_size(dev);
1255 	u32 i, rss_rings;
1256 
1257 	rss_rings = priv->prof->rss_rings ?: n;
1258 	rss_rings = rounddown_pow_of_two(rss_rings);
1259 
1260 	for (i = 0; i < n; i++) {
1261 		if (!ring_index)
1262 			break;
1263 		ring_index[i] = i % rss_rings;
1264 	}
1265 	if (key)
1266 		memcpy(key, priv->rss_key, MLX4_EN_RSS_KEY_SIZE);
1267 	if (hfunc)
1268 		*hfunc = priv->rss_hash_fn;
1269 	return 0;
1270 }
1271 
1272 static int mlx4_en_set_rxfh(struct net_device *dev, const u32 *ring_index,
1273 			    const u8 *key, const u8 hfunc)
1274 {
1275 	struct mlx4_en_priv *priv = netdev_priv(dev);
1276 	u32 n = mlx4_en_get_rxfh_indir_size(dev);
1277 	struct mlx4_en_dev *mdev = priv->mdev;
1278 	int port_up = 0;
1279 	int err = 0;
1280 	int i;
1281 	int rss_rings = 0;
1282 
1283 	/* Calculate RSS table size and make sure flows are spread evenly
1284 	 * between rings
1285 	 */
1286 	for (i = 0; i < n; i++) {
1287 		if (!ring_index)
1288 			break;
1289 		if (i > 0 && !ring_index[i] && !rss_rings)
1290 			rss_rings = i;
1291 
1292 		if (ring_index[i] != (i % (rss_rings ?: n)))
1293 			return -EINVAL;
1294 	}
1295 
1296 	if (!rss_rings)
1297 		rss_rings = n;
1298 
1299 	/* RSS table size must be an order of 2 */
1300 	if (!is_power_of_2(rss_rings))
1301 		return -EINVAL;
1302 
1303 	if (hfunc != ETH_RSS_HASH_NO_CHANGE) {
1304 		err = mlx4_en_check_rxfh_func(dev, hfunc);
1305 		if (err)
1306 			return err;
1307 	}
1308 
1309 	mutex_lock(&mdev->state_lock);
1310 	if (priv->port_up) {
1311 		port_up = 1;
1312 		mlx4_en_stop_port(dev, 1);
1313 	}
1314 
1315 	if (ring_index)
1316 		priv->prof->rss_rings = rss_rings;
1317 	if (key)
1318 		memcpy(priv->rss_key, key, MLX4_EN_RSS_KEY_SIZE);
1319 	if (hfunc !=  ETH_RSS_HASH_NO_CHANGE)
1320 		priv->rss_hash_fn = hfunc;
1321 
1322 	if (port_up) {
1323 		err = mlx4_en_start_port(dev);
1324 		if (err)
1325 			en_err(priv, "Failed starting port\n");
1326 	}
1327 
1328 	mutex_unlock(&mdev->state_lock);
1329 	return err;
1330 }
1331 
1332 #define all_zeros_or_all_ones(field)		\
1333 	((field) == 0 || (field) == (__force typeof(field))-1)
1334 
1335 static int mlx4_en_validate_flow(struct net_device *dev,
1336 				 struct ethtool_rxnfc *cmd)
1337 {
1338 	struct ethtool_usrip4_spec *l3_mask;
1339 	struct ethtool_tcpip4_spec *l4_mask;
1340 	struct ethhdr *eth_mask;
1341 
1342 	if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1343 		return -EINVAL;
1344 
1345 	if (cmd->fs.flow_type & FLOW_MAC_EXT) {
1346 		/* dest mac mask must be ff:ff:ff:ff:ff:ff */
1347 		if (!is_broadcast_ether_addr(cmd->fs.m_ext.h_dest))
1348 			return -EINVAL;
1349 	}
1350 
1351 	switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
1352 	case TCP_V4_FLOW:
1353 	case UDP_V4_FLOW:
1354 		if (cmd->fs.m_u.tcp_ip4_spec.tos)
1355 			return -EINVAL;
1356 		l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
1357 		/* don't allow mask which isn't all 0 or 1 */
1358 		if (!all_zeros_or_all_ones(l4_mask->ip4src) ||
1359 		    !all_zeros_or_all_ones(l4_mask->ip4dst) ||
1360 		    !all_zeros_or_all_ones(l4_mask->psrc) ||
1361 		    !all_zeros_or_all_ones(l4_mask->pdst))
1362 			return -EINVAL;
1363 		break;
1364 	case IP_USER_FLOW:
1365 		l3_mask = &cmd->fs.m_u.usr_ip4_spec;
1366 		if (l3_mask->l4_4_bytes || l3_mask->tos || l3_mask->proto ||
1367 		    cmd->fs.h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4 ||
1368 		    (!l3_mask->ip4src && !l3_mask->ip4dst) ||
1369 		    !all_zeros_or_all_ones(l3_mask->ip4src) ||
1370 		    !all_zeros_or_all_ones(l3_mask->ip4dst))
1371 			return -EINVAL;
1372 		break;
1373 	case ETHER_FLOW:
1374 		eth_mask = &cmd->fs.m_u.ether_spec;
1375 		/* source mac mask must not be set */
1376 		if (!is_zero_ether_addr(eth_mask->h_source))
1377 			return -EINVAL;
1378 
1379 		/* dest mac mask must be ff:ff:ff:ff:ff:ff */
1380 		if (!is_broadcast_ether_addr(eth_mask->h_dest))
1381 			return -EINVAL;
1382 
1383 		if (!all_zeros_or_all_ones(eth_mask->h_proto))
1384 			return -EINVAL;
1385 		break;
1386 	default:
1387 		return -EINVAL;
1388 	}
1389 
1390 	if ((cmd->fs.flow_type & FLOW_EXT)) {
1391 		if (cmd->fs.m_ext.vlan_etype ||
1392 		    !((cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
1393 		      0 ||
1394 		      (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
1395 		      cpu_to_be16(VLAN_VID_MASK)))
1396 			return -EINVAL;
1397 
1398 		if (cmd->fs.m_ext.vlan_tci) {
1399 			if (be16_to_cpu(cmd->fs.h_ext.vlan_tci) >= VLAN_N_VID)
1400 				return -EINVAL;
1401 
1402 		}
1403 	}
1404 
1405 	return 0;
1406 }
1407 
1408 static int mlx4_en_ethtool_add_mac_rule(struct ethtool_rxnfc *cmd,
1409 					struct list_head *rule_list_h,
1410 					struct mlx4_spec_list *spec_l2,
1411 					unsigned char *mac)
1412 {
1413 	__be64 mac_msk = cpu_to_be64(MLX4_MAC_MASK << 16);
1414 
1415 	spec_l2->id = MLX4_NET_TRANS_RULE_ID_ETH;
1416 	memcpy(spec_l2->eth.dst_mac_msk, &mac_msk, ETH_ALEN);
1417 	memcpy(spec_l2->eth.dst_mac, mac, ETH_ALEN);
1418 
1419 	if ((cmd->fs.flow_type & FLOW_EXT) &&
1420 	    (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK))) {
1421 		spec_l2->eth.vlan_id = cmd->fs.h_ext.vlan_tci;
1422 		spec_l2->eth.vlan_id_msk = cpu_to_be16(VLAN_VID_MASK);
1423 	}
1424 
1425 	list_add_tail(&spec_l2->list, rule_list_h);
1426 
1427 	return 0;
1428 }
1429 
1430 static int mlx4_en_ethtool_add_mac_rule_by_ipv4(struct mlx4_en_priv *priv,
1431 						struct ethtool_rxnfc *cmd,
1432 						struct list_head *rule_list_h,
1433 						struct mlx4_spec_list *spec_l2,
1434 						__be32 ipv4_dst)
1435 {
1436 #ifdef CONFIG_INET
1437 	unsigned char mac[ETH_ALEN];
1438 
1439 	if (!ipv4_is_multicast(ipv4_dst)) {
1440 		if (cmd->fs.flow_type & FLOW_MAC_EXT)
1441 			memcpy(&mac, cmd->fs.h_ext.h_dest, ETH_ALEN);
1442 		else
1443 			memcpy(&mac, priv->dev->dev_addr, ETH_ALEN);
1444 	} else {
1445 		ip_eth_mc_map(ipv4_dst, mac);
1446 	}
1447 
1448 	return mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2, &mac[0]);
1449 #else
1450 	return -EINVAL;
1451 #endif
1452 }
1453 
1454 static int add_ip_rule(struct mlx4_en_priv *priv,
1455 		       struct ethtool_rxnfc *cmd,
1456 		       struct list_head *list_h)
1457 {
1458 	int err;
1459 	struct mlx4_spec_list *spec_l2 = NULL;
1460 	struct mlx4_spec_list *spec_l3 = NULL;
1461 	struct ethtool_usrip4_spec *l3_mask = &cmd->fs.m_u.usr_ip4_spec;
1462 
1463 	spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
1464 	spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1465 	if (!spec_l2 || !spec_l3) {
1466 		err = -ENOMEM;
1467 		goto free_spec;
1468 	}
1469 
1470 	err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, spec_l2,
1471 						   cmd->fs.h_u.
1472 						   usr_ip4_spec.ip4dst);
1473 	if (err)
1474 		goto free_spec;
1475 	spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
1476 	spec_l3->ipv4.src_ip = cmd->fs.h_u.usr_ip4_spec.ip4src;
1477 	if (l3_mask->ip4src)
1478 		spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
1479 	spec_l3->ipv4.dst_ip = cmd->fs.h_u.usr_ip4_spec.ip4dst;
1480 	if (l3_mask->ip4dst)
1481 		spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
1482 	list_add_tail(&spec_l3->list, list_h);
1483 
1484 	return 0;
1485 
1486 free_spec:
1487 	kfree(spec_l2);
1488 	kfree(spec_l3);
1489 	return err;
1490 }
1491 
1492 static int add_tcp_udp_rule(struct mlx4_en_priv *priv,
1493 			     struct ethtool_rxnfc *cmd,
1494 			     struct list_head *list_h, int proto)
1495 {
1496 	int err;
1497 	struct mlx4_spec_list *spec_l2 = NULL;
1498 	struct mlx4_spec_list *spec_l3 = NULL;
1499 	struct mlx4_spec_list *spec_l4 = NULL;
1500 	struct ethtool_tcpip4_spec *l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
1501 
1502 	spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1503 	spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
1504 	spec_l4 = kzalloc(sizeof(*spec_l4), GFP_KERNEL);
1505 	if (!spec_l2 || !spec_l3 || !spec_l4) {
1506 		err = -ENOMEM;
1507 		goto free_spec;
1508 	}
1509 
1510 	spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
1511 
1512 	if (proto == TCP_V4_FLOW) {
1513 		err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
1514 							   spec_l2,
1515 							   cmd->fs.h_u.
1516 							   tcp_ip4_spec.ip4dst);
1517 		if (err)
1518 			goto free_spec;
1519 		spec_l4->id = MLX4_NET_TRANS_RULE_ID_TCP;
1520 		spec_l3->ipv4.src_ip = cmd->fs.h_u.tcp_ip4_spec.ip4src;
1521 		spec_l3->ipv4.dst_ip = cmd->fs.h_u.tcp_ip4_spec.ip4dst;
1522 		spec_l4->tcp_udp.src_port = cmd->fs.h_u.tcp_ip4_spec.psrc;
1523 		spec_l4->tcp_udp.dst_port = cmd->fs.h_u.tcp_ip4_spec.pdst;
1524 	} else {
1525 		err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
1526 							   spec_l2,
1527 							   cmd->fs.h_u.
1528 							   udp_ip4_spec.ip4dst);
1529 		if (err)
1530 			goto free_spec;
1531 		spec_l4->id = MLX4_NET_TRANS_RULE_ID_UDP;
1532 		spec_l3->ipv4.src_ip = cmd->fs.h_u.udp_ip4_spec.ip4src;
1533 		spec_l3->ipv4.dst_ip = cmd->fs.h_u.udp_ip4_spec.ip4dst;
1534 		spec_l4->tcp_udp.src_port = cmd->fs.h_u.udp_ip4_spec.psrc;
1535 		spec_l4->tcp_udp.dst_port = cmd->fs.h_u.udp_ip4_spec.pdst;
1536 	}
1537 
1538 	if (l4_mask->ip4src)
1539 		spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
1540 	if (l4_mask->ip4dst)
1541 		spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
1542 
1543 	if (l4_mask->psrc)
1544 		spec_l4->tcp_udp.src_port_msk = EN_ETHTOOL_SHORT_MASK;
1545 	if (l4_mask->pdst)
1546 		spec_l4->tcp_udp.dst_port_msk = EN_ETHTOOL_SHORT_MASK;
1547 
1548 	list_add_tail(&spec_l3->list, list_h);
1549 	list_add_tail(&spec_l4->list, list_h);
1550 
1551 	return 0;
1552 
1553 free_spec:
1554 	kfree(spec_l2);
1555 	kfree(spec_l3);
1556 	kfree(spec_l4);
1557 	return err;
1558 }
1559 
1560 static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev,
1561 					     struct ethtool_rxnfc *cmd,
1562 					     struct list_head *rule_list_h)
1563 {
1564 	int err;
1565 	struct ethhdr *eth_spec;
1566 	struct mlx4_spec_list *spec_l2;
1567 	struct mlx4_en_priv *priv = netdev_priv(dev);
1568 
1569 	err = mlx4_en_validate_flow(dev, cmd);
1570 	if (err)
1571 		return err;
1572 
1573 	switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
1574 	case ETHER_FLOW:
1575 		spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1576 		if (!spec_l2)
1577 			return -ENOMEM;
1578 
1579 		eth_spec = &cmd->fs.h_u.ether_spec;
1580 		mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2,
1581 					     &eth_spec->h_dest[0]);
1582 		spec_l2->eth.ether_type = eth_spec->h_proto;
1583 		if (eth_spec->h_proto)
1584 			spec_l2->eth.ether_type_enable = 1;
1585 		break;
1586 	case IP_USER_FLOW:
1587 		err = add_ip_rule(priv, cmd, rule_list_h);
1588 		break;
1589 	case TCP_V4_FLOW:
1590 		err = add_tcp_udp_rule(priv, cmd, rule_list_h, TCP_V4_FLOW);
1591 		break;
1592 	case UDP_V4_FLOW:
1593 		err = add_tcp_udp_rule(priv, cmd, rule_list_h, UDP_V4_FLOW);
1594 		break;
1595 	}
1596 
1597 	return err;
1598 }
1599 
1600 static int mlx4_en_flow_replace(struct net_device *dev,
1601 				struct ethtool_rxnfc *cmd)
1602 {
1603 	int err;
1604 	struct mlx4_en_priv *priv = netdev_priv(dev);
1605 	struct ethtool_flow_id *loc_rule;
1606 	struct mlx4_spec_list *spec, *tmp_spec;
1607 	u32 qpn;
1608 	u64 reg_id;
1609 
1610 	struct mlx4_net_trans_rule rule = {
1611 		.queue_mode = MLX4_NET_TRANS_Q_FIFO,
1612 		.exclusive = 0,
1613 		.allow_loopback = 1,
1614 		.promisc_mode = MLX4_FS_REGULAR,
1615 	};
1616 
1617 	rule.port = priv->port;
1618 	rule.priority = MLX4_DOMAIN_ETHTOOL | cmd->fs.location;
1619 	INIT_LIST_HEAD(&rule.list);
1620 
1621 	/* Allow direct QP attaches if the EN_ETHTOOL_QP_ATTACH flag is set */
1622 	if (cmd->fs.ring_cookie == RX_CLS_FLOW_DISC)
1623 		qpn = priv->drop_qp.qpn;
1624 	else if (cmd->fs.ring_cookie & EN_ETHTOOL_QP_ATTACH) {
1625 		qpn = cmd->fs.ring_cookie & (EN_ETHTOOL_QP_ATTACH - 1);
1626 	} else {
1627 		if (cmd->fs.ring_cookie >= priv->rx_ring_num) {
1628 			en_warn(priv, "rxnfc: RX ring (%llu) doesn't exist\n",
1629 				cmd->fs.ring_cookie);
1630 			return -EINVAL;
1631 		}
1632 		qpn = priv->rss_map.qps[cmd->fs.ring_cookie].qpn;
1633 		if (!qpn) {
1634 			en_warn(priv, "rxnfc: RX ring (%llu) is inactive\n",
1635 				cmd->fs.ring_cookie);
1636 			return -EINVAL;
1637 		}
1638 	}
1639 	rule.qpn = qpn;
1640 	err = mlx4_en_ethtool_to_net_trans_rule(dev, cmd, &rule.list);
1641 	if (err)
1642 		goto out_free_list;
1643 
1644 	loc_rule = &priv->ethtool_rules[cmd->fs.location];
1645 	if (loc_rule->id) {
1646 		err = mlx4_flow_detach(priv->mdev->dev, loc_rule->id);
1647 		if (err) {
1648 			en_err(priv, "Fail to detach network rule at location %d. registration id = %llx\n",
1649 			       cmd->fs.location, loc_rule->id);
1650 			goto out_free_list;
1651 		}
1652 		loc_rule->id = 0;
1653 		memset(&loc_rule->flow_spec, 0,
1654 		       sizeof(struct ethtool_rx_flow_spec));
1655 		list_del(&loc_rule->list);
1656 	}
1657 	err = mlx4_flow_attach(priv->mdev->dev, &rule, &reg_id);
1658 	if (err) {
1659 		en_err(priv, "Fail to attach network rule at location %d\n",
1660 		       cmd->fs.location);
1661 		goto out_free_list;
1662 	}
1663 	loc_rule->id = reg_id;
1664 	memcpy(&loc_rule->flow_spec, &cmd->fs,
1665 	       sizeof(struct ethtool_rx_flow_spec));
1666 	list_add_tail(&loc_rule->list, &priv->ethtool_list);
1667 
1668 out_free_list:
1669 	list_for_each_entry_safe(spec, tmp_spec, &rule.list, list) {
1670 		list_del(&spec->list);
1671 		kfree(spec);
1672 	}
1673 	return err;
1674 }
1675 
1676 static int mlx4_en_flow_detach(struct net_device *dev,
1677 			       struct ethtool_rxnfc *cmd)
1678 {
1679 	int err = 0;
1680 	struct ethtool_flow_id *rule;
1681 	struct mlx4_en_priv *priv = netdev_priv(dev);
1682 
1683 	if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1684 		return -EINVAL;
1685 
1686 	rule = &priv->ethtool_rules[cmd->fs.location];
1687 	if (!rule->id) {
1688 		err =  -ENOENT;
1689 		goto out;
1690 	}
1691 
1692 	err = mlx4_flow_detach(priv->mdev->dev, rule->id);
1693 	if (err) {
1694 		en_err(priv, "Fail to detach network rule at location %d. registration id = 0x%llx\n",
1695 		       cmd->fs.location, rule->id);
1696 		goto out;
1697 	}
1698 	rule->id = 0;
1699 	memset(&rule->flow_spec, 0, sizeof(struct ethtool_rx_flow_spec));
1700 	list_del(&rule->list);
1701 out:
1702 	return err;
1703 
1704 }
1705 
1706 static int mlx4_en_get_flow(struct net_device *dev, struct ethtool_rxnfc *cmd,
1707 			    int loc)
1708 {
1709 	int err = 0;
1710 	struct ethtool_flow_id *rule;
1711 	struct mlx4_en_priv *priv = netdev_priv(dev);
1712 
1713 	if (loc < 0 || loc >= MAX_NUM_OF_FS_RULES)
1714 		return -EINVAL;
1715 
1716 	rule = &priv->ethtool_rules[loc];
1717 	if (rule->id)
1718 		memcpy(&cmd->fs, &rule->flow_spec,
1719 		       sizeof(struct ethtool_rx_flow_spec));
1720 	else
1721 		err = -ENOENT;
1722 
1723 	return err;
1724 }
1725 
1726 static int mlx4_en_get_num_flows(struct mlx4_en_priv *priv)
1727 {
1728 
1729 	int i, res = 0;
1730 	for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {
1731 		if (priv->ethtool_rules[i].id)
1732 			res++;
1733 	}
1734 	return res;
1735 
1736 }
1737 
1738 static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1739 			     u32 *rule_locs)
1740 {
1741 	struct mlx4_en_priv *priv = netdev_priv(dev);
1742 	struct mlx4_en_dev *mdev = priv->mdev;
1743 	int err = 0;
1744 	int i = 0, priority = 0;
1745 
1746 	if ((cmd->cmd == ETHTOOL_GRXCLSRLCNT ||
1747 	     cmd->cmd == ETHTOOL_GRXCLSRULE ||
1748 	     cmd->cmd == ETHTOOL_GRXCLSRLALL) &&
1749 	    (mdev->dev->caps.steering_mode !=
1750 	     MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up))
1751 		return -EINVAL;
1752 
1753 	switch (cmd->cmd) {
1754 	case ETHTOOL_GRXRINGS:
1755 		cmd->data = priv->rx_ring_num;
1756 		break;
1757 	case ETHTOOL_GRXCLSRLCNT:
1758 		cmd->rule_cnt = mlx4_en_get_num_flows(priv);
1759 		break;
1760 	case ETHTOOL_GRXCLSRULE:
1761 		err = mlx4_en_get_flow(dev, cmd, cmd->fs.location);
1762 		break;
1763 	case ETHTOOL_GRXCLSRLALL:
1764 		cmd->data = MAX_NUM_OF_FS_RULES;
1765 		while ((!err || err == -ENOENT) && priority < cmd->rule_cnt) {
1766 			err = mlx4_en_get_flow(dev, cmd, i);
1767 			if (!err)
1768 				rule_locs[priority++] = i;
1769 			i++;
1770 		}
1771 		err = 0;
1772 		break;
1773 	default:
1774 		err = -EOPNOTSUPP;
1775 		break;
1776 	}
1777 
1778 	return err;
1779 }
1780 
1781 static int mlx4_en_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1782 {
1783 	int err = 0;
1784 	struct mlx4_en_priv *priv = netdev_priv(dev);
1785 	struct mlx4_en_dev *mdev = priv->mdev;
1786 
1787 	if (mdev->dev->caps.steering_mode !=
1788 	    MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up)
1789 		return -EINVAL;
1790 
1791 	switch (cmd->cmd) {
1792 	case ETHTOOL_SRXCLSRLINS:
1793 		err = mlx4_en_flow_replace(dev, cmd);
1794 		break;
1795 	case ETHTOOL_SRXCLSRLDEL:
1796 		err = mlx4_en_flow_detach(dev, cmd);
1797 		break;
1798 	default:
1799 		en_warn(priv, "Unsupported ethtool command. (%d)\n", cmd->cmd);
1800 		return -EINVAL;
1801 	}
1802 
1803 	return err;
1804 }
1805 
1806 static int mlx4_en_get_max_num_rx_rings(struct net_device *dev)
1807 {
1808 	return min_t(int, num_online_cpus(), MAX_RX_RINGS);
1809 }
1810 
1811 static void mlx4_en_get_channels(struct net_device *dev,
1812 				 struct ethtool_channels *channel)
1813 {
1814 	struct mlx4_en_priv *priv = netdev_priv(dev);
1815 
1816 	channel->max_rx = mlx4_en_get_max_num_rx_rings(dev);
1817 	channel->max_tx = priv->mdev->profile.max_num_tx_rings_p_up;
1818 
1819 	channel->rx_count = priv->rx_ring_num;
1820 	channel->tx_count = priv->tx_ring_num[TX] /
1821 			    priv->prof->num_up;
1822 }
1823 
1824 static int mlx4_en_set_channels(struct net_device *dev,
1825 				struct ethtool_channels *channel)
1826 {
1827 	struct mlx4_en_priv *priv = netdev_priv(dev);
1828 	struct mlx4_en_dev *mdev = priv->mdev;
1829 	struct mlx4_en_port_profile new_prof;
1830 	struct mlx4_en_priv *tmp;
1831 	int total_tx_count;
1832 	int port_up = 0;
1833 	int xdp_count;
1834 	int err = 0;
1835 	u8 up;
1836 
1837 	if (!channel->tx_count || !channel->rx_count)
1838 		return -EINVAL;
1839 
1840 	tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
1841 	if (!tmp)
1842 		return -ENOMEM;
1843 
1844 	mutex_lock(&mdev->state_lock);
1845 	xdp_count = priv->tx_ring_num[TX_XDP] ? channel->rx_count : 0;
1846 	total_tx_count = channel->tx_count * priv->prof->num_up + xdp_count;
1847 	if (total_tx_count > MAX_TX_RINGS) {
1848 		err = -EINVAL;
1849 		en_err(priv,
1850 		       "Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",
1851 		       total_tx_count, MAX_TX_RINGS);
1852 		goto out;
1853 	}
1854 
1855 	memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
1856 	new_prof.num_tx_rings_p_up = channel->tx_count;
1857 	new_prof.tx_ring_num[TX] = channel->tx_count * priv->prof->num_up;
1858 	new_prof.tx_ring_num[TX_XDP] = xdp_count;
1859 	new_prof.rx_ring_num = channel->rx_count;
1860 
1861 	err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
1862 	if (err)
1863 		goto out;
1864 
1865 	if (priv->port_up) {
1866 		port_up = 1;
1867 		mlx4_en_stop_port(dev, 1);
1868 	}
1869 
1870 	mlx4_en_safe_replace_resources(priv, tmp);
1871 
1872 	netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
1873 
1874 	up = (priv->prof->num_up == MLX4_EN_NUM_UP_LOW) ?
1875 				    0 : priv->prof->num_up;
1876 	mlx4_en_setup_tc(dev, up);
1877 
1878 	en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num[TX]);
1879 	en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
1880 
1881 	if (port_up) {
1882 		err = mlx4_en_start_port(dev);
1883 		if (err)
1884 			en_err(priv, "Failed starting port\n");
1885 	}
1886 
1887 	err = mlx4_en_moderation_update(priv);
1888 out:
1889 	mutex_unlock(&mdev->state_lock);
1890 	kfree(tmp);
1891 	return err;
1892 }
1893 
1894 static int mlx4_en_get_ts_info(struct net_device *dev,
1895 			       struct ethtool_ts_info *info)
1896 {
1897 	struct mlx4_en_priv *priv = netdev_priv(dev);
1898 	struct mlx4_en_dev *mdev = priv->mdev;
1899 	int ret;
1900 
1901 	ret = ethtool_op_get_ts_info(dev, info);
1902 	if (ret)
1903 		return ret;
1904 
1905 	if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
1906 		info->so_timestamping |=
1907 			SOF_TIMESTAMPING_TX_HARDWARE |
1908 			SOF_TIMESTAMPING_RX_HARDWARE |
1909 			SOF_TIMESTAMPING_RAW_HARDWARE;
1910 
1911 		info->tx_types =
1912 			(1 << HWTSTAMP_TX_OFF) |
1913 			(1 << HWTSTAMP_TX_ON);
1914 
1915 		info->rx_filters =
1916 			(1 << HWTSTAMP_FILTER_NONE) |
1917 			(1 << HWTSTAMP_FILTER_ALL);
1918 
1919 		if (mdev->ptp_clock)
1920 			info->phc_index = ptp_clock_index(mdev->ptp_clock);
1921 	}
1922 
1923 	return ret;
1924 }
1925 
1926 static int mlx4_en_set_priv_flags(struct net_device *dev, u32 flags)
1927 {
1928 	struct mlx4_en_priv *priv = netdev_priv(dev);
1929 	struct mlx4_en_dev *mdev = priv->mdev;
1930 	bool bf_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1931 	bool bf_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1932 	bool phv_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_PHV);
1933 	bool phv_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_PHV);
1934 	int i;
1935 	int ret = 0;
1936 
1937 	if (bf_enabled_new != bf_enabled_old) {
1938 		int t;
1939 
1940 		if (bf_enabled_new) {
1941 			bool bf_supported = true;
1942 
1943 			for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1944 				for (i = 0; i < priv->tx_ring_num[t]; i++)
1945 					bf_supported &=
1946 						priv->tx_ring[t][i]->bf_alloced;
1947 
1948 			if (!bf_supported) {
1949 				en_err(priv, "BlueFlame is not supported\n");
1950 				return -EINVAL;
1951 			}
1952 
1953 			priv->pflags |= MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1954 		} else {
1955 			priv->pflags &= ~MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1956 		}
1957 
1958 		for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1959 			for (i = 0; i < priv->tx_ring_num[t]; i++)
1960 				priv->tx_ring[t][i]->bf_enabled =
1961 					bf_enabled_new;
1962 
1963 		en_info(priv, "BlueFlame %s\n",
1964 			bf_enabled_new ?  "Enabled" : "Disabled");
1965 	}
1966 
1967 	if (phv_enabled_new != phv_enabled_old) {
1968 		ret = set_phv_bit(mdev->dev, priv->port, (int)phv_enabled_new);
1969 		if (ret)
1970 			return ret;
1971 		else if (phv_enabled_new)
1972 			priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
1973 		else
1974 			priv->pflags &= ~MLX4_EN_PRIV_FLAGS_PHV;
1975 		en_info(priv, "PHV bit %s\n",
1976 			phv_enabled_new ?  "Enabled" : "Disabled");
1977 	}
1978 	return 0;
1979 }
1980 
1981 static u32 mlx4_en_get_priv_flags(struct net_device *dev)
1982 {
1983 	struct mlx4_en_priv *priv = netdev_priv(dev);
1984 
1985 	return priv->pflags;
1986 }
1987 
1988 static int mlx4_en_get_tunable(struct net_device *dev,
1989 			       const struct ethtool_tunable *tuna,
1990 			       void *data)
1991 {
1992 	const struct mlx4_en_priv *priv = netdev_priv(dev);
1993 	int ret = 0;
1994 
1995 	switch (tuna->id) {
1996 	case ETHTOOL_TX_COPYBREAK:
1997 		*(u32 *)data = priv->prof->inline_thold;
1998 		break;
1999 	default:
2000 		ret = -EINVAL;
2001 		break;
2002 	}
2003 
2004 	return ret;
2005 }
2006 
2007 static int mlx4_en_set_tunable(struct net_device *dev,
2008 			       const struct ethtool_tunable *tuna,
2009 			       const void *data)
2010 {
2011 	struct mlx4_en_priv *priv = netdev_priv(dev);
2012 	int val, ret = 0;
2013 
2014 	switch (tuna->id) {
2015 	case ETHTOOL_TX_COPYBREAK:
2016 		val = *(u32 *)data;
2017 		if (val < MIN_PKT_LEN || val > MAX_INLINE)
2018 			ret = -EINVAL;
2019 		else
2020 			priv->prof->inline_thold = val;
2021 		break;
2022 	default:
2023 		ret = -EINVAL;
2024 		break;
2025 	}
2026 
2027 	return ret;
2028 }
2029 
2030 #define MLX4_EEPROM_PAGE_LEN 256
2031 
2032 static int mlx4_en_get_module_info(struct net_device *dev,
2033 				   struct ethtool_modinfo *modinfo)
2034 {
2035 	struct mlx4_en_priv *priv = netdev_priv(dev);
2036 	struct mlx4_en_dev *mdev = priv->mdev;
2037 	int ret;
2038 	u8 data[4];
2039 
2040 	/* Read first 2 bytes to get Module & REV ID */
2041 	ret = mlx4_get_module_info(mdev->dev, priv->port,
2042 				   0/*offset*/, 2/*size*/, data);
2043 	if (ret < 2)
2044 		return -EIO;
2045 
2046 	switch (data[0] /* identifier */) {
2047 	case MLX4_MODULE_ID_QSFP:
2048 		modinfo->type = ETH_MODULE_SFF_8436;
2049 		modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2050 		break;
2051 	case MLX4_MODULE_ID_QSFP_PLUS:
2052 		if (data[1] >= 0x3) { /* revision id */
2053 			modinfo->type = ETH_MODULE_SFF_8636;
2054 			modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2055 		} else {
2056 			modinfo->type = ETH_MODULE_SFF_8436;
2057 			modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2058 		}
2059 		break;
2060 	case MLX4_MODULE_ID_QSFP28:
2061 		modinfo->type = ETH_MODULE_SFF_8636;
2062 		modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2063 		break;
2064 	case MLX4_MODULE_ID_SFP:
2065 		modinfo->type = ETH_MODULE_SFF_8472;
2066 		modinfo->eeprom_len = MLX4_EEPROM_PAGE_LEN;
2067 		break;
2068 	default:
2069 		return -EINVAL;
2070 	}
2071 
2072 	return 0;
2073 }
2074 
2075 static int mlx4_en_get_module_eeprom(struct net_device *dev,
2076 				     struct ethtool_eeprom *ee,
2077 				     u8 *data)
2078 {
2079 	struct mlx4_en_priv *priv = netdev_priv(dev);
2080 	struct mlx4_en_dev *mdev = priv->mdev;
2081 	int offset = ee->offset;
2082 	int i = 0, ret;
2083 
2084 	if (ee->len == 0)
2085 		return -EINVAL;
2086 
2087 	memset(data, 0, ee->len);
2088 
2089 	while (i < ee->len) {
2090 		en_dbg(DRV, priv,
2091 		       "mlx4_get_module_info i(%d) offset(%d) len(%d)\n",
2092 		       i, offset, ee->len - i);
2093 
2094 		ret = mlx4_get_module_info(mdev->dev, priv->port,
2095 					   offset, ee->len - i, data + i);
2096 
2097 		if (!ret) /* Done reading */
2098 			return 0;
2099 
2100 		if (ret < 0) {
2101 			en_err(priv,
2102 			       "mlx4_get_module_info i(%d) offset(%d) bytes_to_read(%d) - FAILED (0x%x)\n",
2103 			       i, offset, ee->len - i, ret);
2104 			return 0;
2105 		}
2106 
2107 		i += ret;
2108 		offset += ret;
2109 	}
2110 	return 0;
2111 }
2112 
2113 static int mlx4_en_set_phys_id(struct net_device *dev,
2114 			       enum ethtool_phys_id_state state)
2115 {
2116 	int err;
2117 	u16 beacon_duration;
2118 	struct mlx4_en_priv *priv = netdev_priv(dev);
2119 	struct mlx4_en_dev *mdev = priv->mdev;
2120 
2121 	if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_BEACON))
2122 		return -EOPNOTSUPP;
2123 
2124 	switch (state) {
2125 	case ETHTOOL_ID_ACTIVE:
2126 		beacon_duration = PORT_BEACON_MAX_LIMIT;
2127 		break;
2128 	case ETHTOOL_ID_INACTIVE:
2129 		beacon_duration = 0;
2130 		break;
2131 	default:
2132 		return -EOPNOTSUPP;
2133 	}
2134 
2135 	err = mlx4_SET_PORT_BEACON(mdev->dev, priv->port, beacon_duration);
2136 	return err;
2137 }
2138 
2139 const struct ethtool_ops mlx4_en_ethtool_ops = {
2140 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2141 				     ETHTOOL_COALESCE_MAX_FRAMES |
2142 				     ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ |
2143 				     ETHTOOL_COALESCE_PKT_RATE_RX_USECS,
2144 	.get_drvinfo = mlx4_en_get_drvinfo,
2145 	.get_link_ksettings = mlx4_en_get_link_ksettings,
2146 	.set_link_ksettings = mlx4_en_set_link_ksettings,
2147 	.get_link = ethtool_op_get_link,
2148 	.get_strings = mlx4_en_get_strings,
2149 	.get_sset_count = mlx4_en_get_sset_count,
2150 	.get_ethtool_stats = mlx4_en_get_ethtool_stats,
2151 	.self_test = mlx4_en_self_test,
2152 	.set_phys_id = mlx4_en_set_phys_id,
2153 	.get_wol = mlx4_en_get_wol,
2154 	.set_wol = mlx4_en_set_wol,
2155 	.get_msglevel = mlx4_en_get_msglevel,
2156 	.set_msglevel = mlx4_en_set_msglevel,
2157 	.get_coalesce = mlx4_en_get_coalesce,
2158 	.set_coalesce = mlx4_en_set_coalesce,
2159 	.get_pause_stats = mlx4_en_get_pause_stats,
2160 	.get_pauseparam = mlx4_en_get_pauseparam,
2161 	.set_pauseparam = mlx4_en_set_pauseparam,
2162 	.get_ringparam = mlx4_en_get_ringparam,
2163 	.set_ringparam = mlx4_en_set_ringparam,
2164 	.get_rxnfc = mlx4_en_get_rxnfc,
2165 	.set_rxnfc = mlx4_en_set_rxnfc,
2166 	.get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
2167 	.get_rxfh_key_size = mlx4_en_get_rxfh_key_size,
2168 	.get_rxfh = mlx4_en_get_rxfh,
2169 	.set_rxfh = mlx4_en_set_rxfh,
2170 	.get_channels = mlx4_en_get_channels,
2171 	.set_channels = mlx4_en_set_channels,
2172 	.get_ts_info = mlx4_en_get_ts_info,
2173 	.set_priv_flags = mlx4_en_set_priv_flags,
2174 	.get_priv_flags = mlx4_en_get_priv_flags,
2175 	.get_tunable		= mlx4_en_get_tunable,
2176 	.set_tunable		= mlx4_en_set_tunable,
2177 	.get_module_info = mlx4_en_get_module_info,
2178 	.get_module_eeprom = mlx4_en_get_module_eeprom
2179 };
2180 
2181 
2182 
2183 
2184 
2185