1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (C) 2022 MediaTek Inc. 3 * 4 * Author: Lorenzo Bianconi <lorenzo@kernel.org> 5 * Sujuan Chen <sujuan.chen@mediatek.com> 6 */ 7 8 #include <linux/firmware.h> 9 #include <linux/of_address.h> 10 #include <linux/of_reserved_mem.h> 11 #include <linux/mfd/syscon.h> 12 #include <linux/soc/mediatek/mtk_wed.h> 13 #include <asm/unaligned.h> 14 15 #include "mtk_wed_regs.h" 16 #include "mtk_wed_wo.h" 17 #include "mtk_wed.h" 18 19 static u32 wo_r32(struct mtk_wed_wo *wo, u32 reg) 20 { 21 return readl(wo->boot.addr + reg); 22 } 23 24 static void wo_w32(struct mtk_wed_wo *wo, u32 reg, u32 val) 25 { 26 writel(val, wo->boot.addr + reg); 27 } 28 29 static struct sk_buff * 30 mtk_wed_mcu_msg_alloc(const void *data, int data_len) 31 { 32 int length = sizeof(struct mtk_wed_mcu_hdr) + data_len; 33 struct sk_buff *skb; 34 35 skb = alloc_skb(length, GFP_KERNEL); 36 if (!skb) 37 return NULL; 38 39 memset(skb->head, 0, length); 40 skb_reserve(skb, sizeof(struct mtk_wed_mcu_hdr)); 41 if (data && data_len) 42 skb_put_data(skb, data, data_len); 43 44 return skb; 45 } 46 47 static struct sk_buff * 48 mtk_wed_mcu_get_response(struct mtk_wed_wo *wo, unsigned long expires) 49 { 50 if (!time_is_after_jiffies(expires)) 51 return NULL; 52 53 wait_event_timeout(wo->mcu.wait, !skb_queue_empty(&wo->mcu.res_q), 54 expires - jiffies); 55 return skb_dequeue(&wo->mcu.res_q); 56 } 57 58 void mtk_wed_mcu_rx_event(struct mtk_wed_wo *wo, struct sk_buff *skb) 59 { 60 skb_queue_tail(&wo->mcu.res_q, skb); 61 wake_up(&wo->mcu.wait); 62 } 63 64 static void 65 mtk_wed_update_rx_stats(struct mtk_wed_device *wed, struct sk_buff *skb) 66 { 67 u32 count = get_unaligned_le32(skb->data); 68 struct mtk_wed_wo_rx_stats *stats; 69 int i; 70 71 if (count * sizeof(*stats) > skb->len - sizeof(u32)) 72 return; 73 74 stats = (struct mtk_wed_wo_rx_stats *)(skb->data + sizeof(u32)); 75 for (i = 0 ; i < count ; i++) 76 wed->wlan.update_wo_rx_stats(wed, &stats[i]); 77 } 78 79 void mtk_wed_mcu_rx_unsolicited_event(struct mtk_wed_wo *wo, 80 struct sk_buff *skb) 81 { 82 struct mtk_wed_mcu_hdr *hdr = (struct mtk_wed_mcu_hdr *)skb->data; 83 84 skb_pull(skb, sizeof(*hdr)); 85 86 switch (hdr->cmd) { 87 case MTK_WED_WO_EVT_LOG_DUMP: 88 dev_notice(wo->hw->dev, "%s\n", skb->data); 89 break; 90 case MTK_WED_WO_EVT_PROFILING: { 91 struct mtk_wed_wo_log_info *info = (void *)skb->data; 92 u32 count = skb->len / sizeof(*info); 93 int i; 94 95 for (i = 0 ; i < count ; i++) 96 dev_notice(wo->hw->dev, 97 "SN:%u latency: total=%u, rro:%u, mod:%u\n", 98 le32_to_cpu(info[i].sn), 99 le32_to_cpu(info[i].total), 100 le32_to_cpu(info[i].rro), 101 le32_to_cpu(info[i].mod)); 102 break; 103 } 104 case MTK_WED_WO_EVT_RXCNT_INFO: 105 mtk_wed_update_rx_stats(wo->hw->wed_dev, skb); 106 break; 107 default: 108 break; 109 } 110 111 dev_kfree_skb(skb); 112 } 113 114 static int 115 mtk_wed_mcu_skb_send_msg(struct mtk_wed_wo *wo, struct sk_buff *skb, 116 int id, int cmd, u16 *wait_seq, bool wait_resp) 117 { 118 struct mtk_wed_mcu_hdr *hdr; 119 120 /* TODO: make it dynamic based on cmd */ 121 wo->mcu.timeout = 20 * HZ; 122 123 hdr = (struct mtk_wed_mcu_hdr *)skb_push(skb, sizeof(*hdr)); 124 hdr->cmd = cmd; 125 hdr->length = cpu_to_le16(skb->len); 126 127 if (wait_resp && wait_seq) { 128 u16 seq = ++wo->mcu.seq; 129 130 if (!seq) 131 seq = ++wo->mcu.seq; 132 *wait_seq = seq; 133 134 hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_NEED_RSP); 135 hdr->seq = cpu_to_le16(seq); 136 } 137 if (id == MTK_WED_MODULE_ID_WO) 138 hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_FROM_TO_WO); 139 140 return mtk_wed_wo_queue_tx_skb(wo, &wo->q_tx, skb); 141 } 142 143 static int 144 mtk_wed_mcu_parse_response(struct mtk_wed_wo *wo, struct sk_buff *skb, 145 int cmd, int seq) 146 { 147 struct mtk_wed_mcu_hdr *hdr; 148 149 if (!skb) { 150 dev_err(wo->hw->dev, "Message %08x (seq %d) timeout\n", 151 cmd, seq); 152 return -ETIMEDOUT; 153 } 154 155 hdr = (struct mtk_wed_mcu_hdr *)skb->data; 156 if (le16_to_cpu(hdr->seq) != seq) 157 return -EAGAIN; 158 159 skb_pull(skb, sizeof(*hdr)); 160 switch (cmd) { 161 case MTK_WED_WO_CMD_RXCNT_INFO: 162 mtk_wed_update_rx_stats(wo->hw->wed_dev, skb); 163 break; 164 default: 165 break; 166 } 167 168 return 0; 169 } 170 171 int mtk_wed_mcu_send_msg(struct mtk_wed_wo *wo, int id, int cmd, 172 const void *data, int len, bool wait_resp) 173 { 174 unsigned long expires; 175 struct sk_buff *skb; 176 u16 seq; 177 int ret; 178 179 skb = mtk_wed_mcu_msg_alloc(data, len); 180 if (!skb) 181 return -ENOMEM; 182 183 mutex_lock(&wo->mcu.mutex); 184 185 ret = mtk_wed_mcu_skb_send_msg(wo, skb, id, cmd, &seq, wait_resp); 186 if (ret || !wait_resp) 187 goto unlock; 188 189 expires = jiffies + wo->mcu.timeout; 190 do { 191 skb = mtk_wed_mcu_get_response(wo, expires); 192 ret = mtk_wed_mcu_parse_response(wo, skb, cmd, seq); 193 dev_kfree_skb(skb); 194 } while (ret == -EAGAIN); 195 196 unlock: 197 mutex_unlock(&wo->mcu.mutex); 198 199 return ret; 200 } 201 202 int mtk_wed_mcu_msg_update(struct mtk_wed_device *dev, int id, void *data, 203 int len) 204 { 205 struct mtk_wed_wo *wo = dev->hw->wed_wo; 206 207 if (dev->hw->version == 1) 208 return 0; 209 210 return mtk_wed_mcu_send_msg(wo, MTK_WED_MODULE_ID_WO, id, data, len, 211 true); 212 } 213 214 static int 215 mtk_wed_get_memory_region(struct mtk_wed_wo *wo, 216 struct mtk_wed_wo_memory_region *region) 217 { 218 struct reserved_mem *rmem; 219 struct device_node *np; 220 int index; 221 222 index = of_property_match_string(wo->hw->node, "memory-region-names", 223 region->name); 224 if (index < 0) 225 return index; 226 227 np = of_parse_phandle(wo->hw->node, "memory-region", index); 228 if (!np) 229 return -ENODEV; 230 231 rmem = of_reserved_mem_lookup(np); 232 of_node_put(np); 233 234 if (!rmem) 235 return -ENODEV; 236 237 region->phy_addr = rmem->base; 238 region->size = rmem->size; 239 region->addr = devm_ioremap(wo->hw->dev, region->phy_addr, region->size); 240 241 return !region->addr ? -EINVAL : 0; 242 } 243 244 static int 245 mtk_wed_mcu_run_firmware(struct mtk_wed_wo *wo, const struct firmware *fw, 246 struct mtk_wed_wo_memory_region *region) 247 { 248 const u8 *first_region_ptr, *region_ptr, *trailer_ptr, *ptr = fw->data; 249 const struct mtk_wed_fw_trailer *trailer; 250 const struct mtk_wed_fw_region *fw_region; 251 252 trailer_ptr = fw->data + fw->size - sizeof(*trailer); 253 trailer = (const struct mtk_wed_fw_trailer *)trailer_ptr; 254 region_ptr = trailer_ptr - trailer->num_region * sizeof(*fw_region); 255 first_region_ptr = region_ptr; 256 257 while (region_ptr < trailer_ptr) { 258 u32 length; 259 260 fw_region = (const struct mtk_wed_fw_region *)region_ptr; 261 length = le32_to_cpu(fw_region->len); 262 263 if (region->phy_addr != le32_to_cpu(fw_region->addr)) 264 goto next; 265 266 if (region->size < length) 267 goto next; 268 269 if (first_region_ptr < ptr + length) 270 goto next; 271 272 if (region->shared && region->consumed) 273 return 0; 274 275 if (!region->shared || !region->consumed) { 276 memcpy_toio(region->addr, ptr, length); 277 region->consumed = true; 278 return 0; 279 } 280 next: 281 region_ptr += sizeof(*fw_region); 282 ptr += length; 283 } 284 285 return -EINVAL; 286 } 287 288 static int 289 mtk_wed_mcu_load_firmware(struct mtk_wed_wo *wo) 290 { 291 static struct mtk_wed_wo_memory_region mem_region[] = { 292 [MTK_WED_WO_REGION_EMI] = { 293 .name = "wo-emi", 294 }, 295 [MTK_WED_WO_REGION_ILM] = { 296 .name = "wo-ilm", 297 }, 298 [MTK_WED_WO_REGION_DATA] = { 299 .name = "wo-data", 300 .shared = true, 301 }, 302 }; 303 const struct mtk_wed_fw_trailer *trailer; 304 const struct firmware *fw; 305 const char *fw_name; 306 u32 val, boot_cr; 307 int ret, i; 308 309 /* load firmware region metadata */ 310 for (i = 0; i < ARRAY_SIZE(mem_region); i++) { 311 ret = mtk_wed_get_memory_region(wo, &mem_region[i]); 312 if (ret) 313 return ret; 314 } 315 316 wo->boot.name = "wo-boot"; 317 ret = mtk_wed_get_memory_region(wo, &wo->boot); 318 if (ret) 319 return ret; 320 321 /* set dummy cr */ 322 wed_w32(wo->hw->wed_dev, MTK_WED_SCR0 + 4 * MTK_WED_DUMMY_CR_FWDL, 323 wo->hw->index + 1); 324 325 /* load firmware */ 326 fw_name = wo->hw->index ? MT7986_FIRMWARE_WO1 : MT7986_FIRMWARE_WO0; 327 ret = request_firmware(&fw, fw_name, wo->hw->dev); 328 if (ret) 329 return ret; 330 331 trailer = (void *)(fw->data + fw->size - 332 sizeof(struct mtk_wed_fw_trailer)); 333 dev_info(wo->hw->dev, 334 "MTK WED WO Firmware Version: %.10s, Build Time: %.15s\n", 335 trailer->fw_ver, trailer->build_date); 336 dev_info(wo->hw->dev, "MTK WED WO Chip ID %02x Region %d\n", 337 trailer->chip_id, trailer->num_region); 338 339 for (i = 0; i < ARRAY_SIZE(mem_region); i++) { 340 ret = mtk_wed_mcu_run_firmware(wo, fw, &mem_region[i]); 341 if (ret) 342 goto out; 343 } 344 345 /* set the start address */ 346 boot_cr = wo->hw->index ? MTK_WO_MCU_CFG_LS_WA_BOOT_ADDR_ADDR 347 : MTK_WO_MCU_CFG_LS_WM_BOOT_ADDR_ADDR; 348 wo_w32(wo, boot_cr, mem_region[MTK_WED_WO_REGION_EMI].phy_addr >> 16); 349 /* wo firmware reset */ 350 wo_w32(wo, MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, 0xc00); 351 352 val = wo_r32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR); 353 val |= wo->hw->index ? MTK_WO_MCU_CFG_LS_WF_WM_WA_WA_CPU_RSTB_MASK 354 : MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK; 355 wo_w32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val); 356 out: 357 release_firmware(fw); 358 359 return ret; 360 } 361 362 static u32 363 mtk_wed_mcu_read_fw_dl(struct mtk_wed_wo *wo) 364 { 365 return wed_r32(wo->hw->wed_dev, 366 MTK_WED_SCR0 + 4 * MTK_WED_DUMMY_CR_FWDL); 367 } 368 369 int mtk_wed_mcu_init(struct mtk_wed_wo *wo) 370 { 371 u32 val; 372 int ret; 373 374 skb_queue_head_init(&wo->mcu.res_q); 375 init_waitqueue_head(&wo->mcu.wait); 376 mutex_init(&wo->mcu.mutex); 377 378 ret = mtk_wed_mcu_load_firmware(wo); 379 if (ret) 380 return ret; 381 382 return readx_poll_timeout(mtk_wed_mcu_read_fw_dl, wo, val, !val, 383 100, MTK_FW_DL_TIMEOUT); 384 } 385 386 MODULE_FIRMWARE(MT7986_FIRMWARE_WO0); 387 MODULE_FIRMWARE(MT7986_FIRMWARE_WO1); 388