1 // SPDX-License-Identifier: GPL-2.0 2 /* Marvell RVU Ethernet driver 3 * 4 * Copyright (C) 2020 Marvell. 5 * 6 */ 7 8 #include <net/ipv6.h> 9 #include <linux/sort.h> 10 11 #include "otx2_common.h" 12 13 #define OTX2_DEFAULT_ACTION 0x1 14 15 static int otx2_mcam_entry_init(struct otx2_nic *pfvf); 16 17 struct otx2_flow { 18 struct ethtool_rx_flow_spec flow_spec; 19 struct list_head list; 20 u32 location; 21 u32 entry; 22 bool is_vf; 23 u8 rss_ctx_id; 24 #define DMAC_FILTER_RULE BIT(0) 25 #define PFC_FLOWCTRL_RULE BIT(1) 26 u16 rule_type; 27 int vf; 28 }; 29 30 enum dmac_req { 31 DMAC_ADDR_UPDATE, 32 DMAC_ADDR_DEL 33 }; 34 35 static void otx2_clear_ntuple_flow_info(struct otx2_nic *pfvf, struct otx2_flow_config *flow_cfg) 36 { 37 devm_kfree(pfvf->dev, flow_cfg->flow_ent); 38 flow_cfg->flow_ent = NULL; 39 flow_cfg->max_flows = 0; 40 } 41 42 static int otx2_free_ntuple_mcam_entries(struct otx2_nic *pfvf) 43 { 44 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg; 45 struct npc_mcam_free_entry_req *req; 46 int ent, err; 47 48 if (!flow_cfg->max_flows) 49 return 0; 50 51 mutex_lock(&pfvf->mbox.lock); 52 for (ent = 0; ent < flow_cfg->max_flows; ent++) { 53 req = otx2_mbox_alloc_msg_npc_mcam_free_entry(&pfvf->mbox); 54 if (!req) 55 break; 56 57 req->entry = flow_cfg->flow_ent[ent]; 58 59 /* Send message to AF to free MCAM entries */ 60 err = otx2_sync_mbox_msg(&pfvf->mbox); 61 if (err) 62 break; 63 } 64 mutex_unlock(&pfvf->mbox.lock); 65 otx2_clear_ntuple_flow_info(pfvf, flow_cfg); 66 return 0; 67 } 68 69 static int mcam_entry_cmp(const void *a, const void *b) 70 { 71 return *(u16 *)a - *(u16 *)b; 72 } 73 74 int otx2_alloc_mcam_entries(struct otx2_nic *pfvf, u16 count) 75 { 76 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg; 77 struct npc_mcam_alloc_entry_req *req; 78 struct npc_mcam_alloc_entry_rsp *rsp; 79 int ent, allocated = 0; 80 81 /* Free current ones and allocate new ones with requested count */ 82 otx2_free_ntuple_mcam_entries(pfvf); 83 84 if (!count) 85 return 0; 86 87 flow_cfg->flow_ent = devm_kmalloc_array(pfvf->dev, count, 88 sizeof(u16), GFP_KERNEL); 89 if (!flow_cfg->flow_ent) { 90 netdev_err(pfvf->netdev, 91 "%s: Unable to allocate memory for flow entries\n", 92 __func__); 93 return -ENOMEM; 94 } 95 96 mutex_lock(&pfvf->mbox.lock); 97 98 /* In a single request a max of NPC_MAX_NONCONTIG_ENTRIES MCAM entries 99 * can only be allocated. 100 */ 101 while (allocated < count) { 102 req = otx2_mbox_alloc_msg_npc_mcam_alloc_entry(&pfvf->mbox); 103 if (!req) 104 goto exit; 105 106 req->contig = false; 107 req->count = (count - allocated) > NPC_MAX_NONCONTIG_ENTRIES ? 108 NPC_MAX_NONCONTIG_ENTRIES : count - allocated; 109 110 /* Allocate higher priority entries for PFs, so that VF's entries 111 * will be on top of PF. 112 */ 113 if (!is_otx2_vf(pfvf->pcifunc)) { 114 req->priority = NPC_MCAM_HIGHER_PRIO; 115 req->ref_entry = flow_cfg->def_ent[0]; 116 } 117 118 /* Send message to AF */ 119 if (otx2_sync_mbox_msg(&pfvf->mbox)) 120 goto exit; 121 122 rsp = (struct npc_mcam_alloc_entry_rsp *)otx2_mbox_get_rsp 123 (&pfvf->mbox.mbox, 0, &req->hdr); 124 125 for (ent = 0; ent < rsp->count; ent++) 126 flow_cfg->flow_ent[ent + allocated] = rsp->entry_list[ent]; 127 128 allocated += rsp->count; 129 130 /* If this request is not fulfilled, no need to send 131 * further requests. 132 */ 133 if (rsp->count != req->count) 134 break; 135 } 136 137 /* Multiple MCAM entry alloc requests could result in non-sequential 138 * MCAM entries in the flow_ent[] array. Sort them in an ascending order, 139 * otherwise user installed ntuple filter index and MCAM entry index will 140 * not be in sync. 141 */ 142 if (allocated) 143 sort(&flow_cfg->flow_ent[0], allocated, 144 sizeof(flow_cfg->flow_ent[0]), mcam_entry_cmp, NULL); 145 146 exit: 147 mutex_unlock(&pfvf->mbox.lock); 148 149 flow_cfg->max_flows = allocated; 150 151 if (allocated) { 152 pfvf->flags |= OTX2_FLAG_MCAM_ENTRIES_ALLOC; 153 pfvf->flags |= OTX2_FLAG_NTUPLE_SUPPORT; 154 } 155 156 if (allocated != count) 157 netdev_info(pfvf->netdev, 158 "Unable to allocate %d MCAM entries, got only %d\n", 159 count, allocated); 160 return allocated; 161 } 162 EXPORT_SYMBOL(otx2_alloc_mcam_entries); 163 164 static int otx2_mcam_entry_init(struct otx2_nic *pfvf) 165 { 166 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg; 167 struct npc_mcam_alloc_entry_req *req; 168 struct npc_mcam_alloc_entry_rsp *rsp; 169 int vf_vlan_max_flows; 170 int ent, count; 171 172 vf_vlan_max_flows = pfvf->total_vfs * OTX2_PER_VF_VLAN_FLOWS; 173 count = OTX2_MAX_UNICAST_FLOWS + 174 OTX2_MAX_VLAN_FLOWS + vf_vlan_max_flows; 175 176 flow_cfg->def_ent = devm_kmalloc_array(pfvf->dev, count, 177 sizeof(u16), GFP_KERNEL); 178 if (!flow_cfg->def_ent) 179 return -ENOMEM; 180 181 mutex_lock(&pfvf->mbox.lock); 182 183 req = otx2_mbox_alloc_msg_npc_mcam_alloc_entry(&pfvf->mbox); 184 if (!req) { 185 mutex_unlock(&pfvf->mbox.lock); 186 return -ENOMEM; 187 } 188 189 req->contig = false; 190 req->count = count; 191 192 /* Send message to AF */ 193 if (otx2_sync_mbox_msg(&pfvf->mbox)) { 194 mutex_unlock(&pfvf->mbox.lock); 195 return -EINVAL; 196 } 197 198 rsp = (struct npc_mcam_alloc_entry_rsp *)otx2_mbox_get_rsp 199 (&pfvf->mbox.mbox, 0, &req->hdr); 200 201 if (rsp->count != req->count) { 202 netdev_info(pfvf->netdev, 203 "Unable to allocate MCAM entries for ucast, vlan and vf_vlan\n"); 204 mutex_unlock(&pfvf->mbox.lock); 205 devm_kfree(pfvf->dev, flow_cfg->def_ent); 206 return 0; 207 } 208 209 for (ent = 0; ent < rsp->count; ent++) 210 flow_cfg->def_ent[ent] = rsp->entry_list[ent]; 211 212 flow_cfg->vf_vlan_offset = 0; 213 flow_cfg->unicast_offset = vf_vlan_max_flows; 214 flow_cfg->rx_vlan_offset = flow_cfg->unicast_offset + 215 OTX2_MAX_UNICAST_FLOWS; 216 pfvf->flags |= OTX2_FLAG_UCAST_FLTR_SUPPORT; 217 pfvf->flags |= OTX2_FLAG_RX_VLAN_SUPPORT; 218 pfvf->flags |= OTX2_FLAG_VF_VLAN_SUPPORT; 219 220 pfvf->flags |= OTX2_FLAG_MCAM_ENTRIES_ALLOC; 221 mutex_unlock(&pfvf->mbox.lock); 222 223 /* Allocate entries for Ntuple filters */ 224 count = otx2_alloc_mcam_entries(pfvf, OTX2_DEFAULT_FLOWCOUNT); 225 if (count <= 0) { 226 otx2_clear_ntuple_flow_info(pfvf, flow_cfg); 227 return 0; 228 } 229 230 pfvf->flags |= OTX2_FLAG_TC_FLOWER_SUPPORT; 231 232 return 0; 233 } 234 235 /* TODO : revisit on size */ 236 #define OTX2_DMAC_FLTR_BITMAP_SZ (4 * 2048 + 32) 237 238 int otx2vf_mcam_flow_init(struct otx2_nic *pfvf) 239 { 240 struct otx2_flow_config *flow_cfg; 241 242 pfvf->flow_cfg = devm_kzalloc(pfvf->dev, 243 sizeof(struct otx2_flow_config), 244 GFP_KERNEL); 245 if (!pfvf->flow_cfg) 246 return -ENOMEM; 247 248 pfvf->flow_cfg->dmacflt_bmap = devm_kcalloc(pfvf->dev, 249 BITS_TO_LONGS(OTX2_DMAC_FLTR_BITMAP_SZ), 250 sizeof(long), GFP_KERNEL); 251 if (!pfvf->flow_cfg->dmacflt_bmap) 252 return -ENOMEM; 253 254 flow_cfg = pfvf->flow_cfg; 255 INIT_LIST_HEAD(&flow_cfg->flow_list); 256 flow_cfg->max_flows = 0; 257 258 return 0; 259 } 260 EXPORT_SYMBOL(otx2vf_mcam_flow_init); 261 262 int otx2_mcam_flow_init(struct otx2_nic *pf) 263 { 264 int err; 265 266 pf->flow_cfg = devm_kzalloc(pf->dev, sizeof(struct otx2_flow_config), 267 GFP_KERNEL); 268 if (!pf->flow_cfg) 269 return -ENOMEM; 270 271 pf->flow_cfg->dmacflt_bmap = devm_kcalloc(pf->dev, 272 BITS_TO_LONGS(OTX2_DMAC_FLTR_BITMAP_SZ), 273 sizeof(long), GFP_KERNEL); 274 if (!pf->flow_cfg->dmacflt_bmap) 275 return -ENOMEM; 276 277 INIT_LIST_HEAD(&pf->flow_cfg->flow_list); 278 279 /* Allocate bare minimum number of MCAM entries needed for 280 * unicast and ntuple filters. 281 */ 282 err = otx2_mcam_entry_init(pf); 283 if (err) 284 return err; 285 286 /* Check if MCAM entries are allocate or not */ 287 if (!(pf->flags & OTX2_FLAG_UCAST_FLTR_SUPPORT)) 288 return 0; 289 290 pf->mac_table = devm_kzalloc(pf->dev, sizeof(struct otx2_mac_table) 291 * OTX2_MAX_UNICAST_FLOWS, GFP_KERNEL); 292 if (!pf->mac_table) 293 return -ENOMEM; 294 295 otx2_dmacflt_get_max_cnt(pf); 296 297 /* DMAC filters are not allocated */ 298 if (!pf->flow_cfg->dmacflt_max_flows) 299 return 0; 300 301 pf->flow_cfg->bmap_to_dmacindex = 302 devm_kzalloc(pf->dev, sizeof(u32) * 303 pf->flow_cfg->dmacflt_max_flows, 304 GFP_KERNEL); 305 306 if (!pf->flow_cfg->bmap_to_dmacindex) 307 return -ENOMEM; 308 309 pf->flags |= OTX2_FLAG_DMACFLTR_SUPPORT; 310 311 return 0; 312 } 313 314 void otx2_mcam_flow_del(struct otx2_nic *pf) 315 { 316 otx2_destroy_mcam_flows(pf); 317 } 318 EXPORT_SYMBOL(otx2_mcam_flow_del); 319 320 /* On success adds mcam entry 321 * On failure enable promisous mode 322 */ 323 static int otx2_do_add_macfilter(struct otx2_nic *pf, const u8 *mac) 324 { 325 struct otx2_flow_config *flow_cfg = pf->flow_cfg; 326 struct npc_install_flow_req *req; 327 int err, i; 328 329 if (!(pf->flags & OTX2_FLAG_UCAST_FLTR_SUPPORT)) 330 return -ENOMEM; 331 332 /* dont have free mcam entries or uc list is greater than alloted */ 333 if (netdev_uc_count(pf->netdev) > OTX2_MAX_UNICAST_FLOWS) 334 return -ENOMEM; 335 336 mutex_lock(&pf->mbox.lock); 337 req = otx2_mbox_alloc_msg_npc_install_flow(&pf->mbox); 338 if (!req) { 339 mutex_unlock(&pf->mbox.lock); 340 return -ENOMEM; 341 } 342 343 /* unicast offset starts with 32 0..31 for ntuple */ 344 for (i = 0; i < OTX2_MAX_UNICAST_FLOWS; i++) { 345 if (pf->mac_table[i].inuse) 346 continue; 347 ether_addr_copy(pf->mac_table[i].addr, mac); 348 pf->mac_table[i].inuse = true; 349 pf->mac_table[i].mcam_entry = 350 flow_cfg->def_ent[i + flow_cfg->unicast_offset]; 351 req->entry = pf->mac_table[i].mcam_entry; 352 break; 353 } 354 355 ether_addr_copy(req->packet.dmac, mac); 356 eth_broadcast_addr((u8 *)&req->mask.dmac); 357 req->features = BIT_ULL(NPC_DMAC); 358 req->channel = pf->hw.rx_chan_base; 359 req->intf = NIX_INTF_RX; 360 req->op = NIX_RX_ACTION_DEFAULT; 361 req->set_cntr = 1; 362 363 err = otx2_sync_mbox_msg(&pf->mbox); 364 mutex_unlock(&pf->mbox.lock); 365 366 return err; 367 } 368 369 int otx2_add_macfilter(struct net_device *netdev, const u8 *mac) 370 { 371 struct otx2_nic *pf = netdev_priv(netdev); 372 373 if (!bitmap_empty(pf->flow_cfg->dmacflt_bmap, 374 pf->flow_cfg->dmacflt_max_flows)) 375 netdev_warn(netdev, 376 "Add %pM to CGX/RPM DMAC filters list as well\n", 377 mac); 378 379 return otx2_do_add_macfilter(pf, mac); 380 } 381 382 static bool otx2_get_mcamentry_for_mac(struct otx2_nic *pf, const u8 *mac, 383 int *mcam_entry) 384 { 385 int i; 386 387 for (i = 0; i < OTX2_MAX_UNICAST_FLOWS; i++) { 388 if (!pf->mac_table[i].inuse) 389 continue; 390 391 if (ether_addr_equal(pf->mac_table[i].addr, mac)) { 392 *mcam_entry = pf->mac_table[i].mcam_entry; 393 pf->mac_table[i].inuse = false; 394 return true; 395 } 396 } 397 return false; 398 } 399 400 int otx2_del_macfilter(struct net_device *netdev, const u8 *mac) 401 { 402 struct otx2_nic *pf = netdev_priv(netdev); 403 struct npc_delete_flow_req *req; 404 int err, mcam_entry; 405 406 /* check does mcam entry exists for given mac */ 407 if (!otx2_get_mcamentry_for_mac(pf, mac, &mcam_entry)) 408 return 0; 409 410 mutex_lock(&pf->mbox.lock); 411 req = otx2_mbox_alloc_msg_npc_delete_flow(&pf->mbox); 412 if (!req) { 413 mutex_unlock(&pf->mbox.lock); 414 return -ENOMEM; 415 } 416 req->entry = mcam_entry; 417 /* Send message to AF */ 418 err = otx2_sync_mbox_msg(&pf->mbox); 419 mutex_unlock(&pf->mbox.lock); 420 421 return err; 422 } 423 424 static struct otx2_flow *otx2_find_flow(struct otx2_nic *pfvf, u32 location) 425 { 426 struct otx2_flow *iter; 427 428 list_for_each_entry(iter, &pfvf->flow_cfg->flow_list, list) { 429 if (iter->location == location) 430 return iter; 431 } 432 433 return NULL; 434 } 435 436 static void otx2_add_flow_to_list(struct otx2_nic *pfvf, struct otx2_flow *flow) 437 { 438 struct list_head *head = &pfvf->flow_cfg->flow_list; 439 struct otx2_flow *iter; 440 441 list_for_each_entry(iter, &pfvf->flow_cfg->flow_list, list) { 442 if (iter->location > flow->location) 443 break; 444 head = &iter->list; 445 } 446 447 list_add(&flow->list, head); 448 } 449 450 int otx2_get_maxflows(struct otx2_flow_config *flow_cfg) 451 { 452 if (!flow_cfg) 453 return 0; 454 455 if (flow_cfg->nr_flows == flow_cfg->max_flows || 456 !bitmap_empty(flow_cfg->dmacflt_bmap, 457 flow_cfg->dmacflt_max_flows)) 458 return flow_cfg->max_flows + flow_cfg->dmacflt_max_flows; 459 else 460 return flow_cfg->max_flows; 461 } 462 EXPORT_SYMBOL(otx2_get_maxflows); 463 464 int otx2_get_flow(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc, 465 u32 location) 466 { 467 struct otx2_flow *iter; 468 469 if (location >= otx2_get_maxflows(pfvf->flow_cfg)) 470 return -EINVAL; 471 472 list_for_each_entry(iter, &pfvf->flow_cfg->flow_list, list) { 473 if (iter->location == location) { 474 nfc->fs = iter->flow_spec; 475 nfc->rss_context = iter->rss_ctx_id; 476 return 0; 477 } 478 } 479 480 return -ENOENT; 481 } 482 483 int otx2_get_all_flows(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc, 484 u32 *rule_locs) 485 { 486 u32 rule_cnt = nfc->rule_cnt; 487 u32 location = 0; 488 int idx = 0; 489 int err = 0; 490 491 nfc->data = otx2_get_maxflows(pfvf->flow_cfg); 492 while ((!err || err == -ENOENT) && idx < rule_cnt) { 493 err = otx2_get_flow(pfvf, nfc, location); 494 if (!err) 495 rule_locs[idx++] = location; 496 location++; 497 } 498 nfc->rule_cnt = rule_cnt; 499 500 return err; 501 } 502 503 static int otx2_prepare_ipv4_flow(struct ethtool_rx_flow_spec *fsp, 504 struct npc_install_flow_req *req, 505 u32 flow_type) 506 { 507 struct ethtool_usrip4_spec *ipv4_usr_mask = &fsp->m_u.usr_ip4_spec; 508 struct ethtool_usrip4_spec *ipv4_usr_hdr = &fsp->h_u.usr_ip4_spec; 509 struct ethtool_tcpip4_spec *ipv4_l4_mask = &fsp->m_u.tcp_ip4_spec; 510 struct ethtool_tcpip4_spec *ipv4_l4_hdr = &fsp->h_u.tcp_ip4_spec; 511 struct ethtool_ah_espip4_spec *ah_esp_hdr = &fsp->h_u.ah_ip4_spec; 512 struct ethtool_ah_espip4_spec *ah_esp_mask = &fsp->m_u.ah_ip4_spec; 513 struct flow_msg *pmask = &req->mask; 514 struct flow_msg *pkt = &req->packet; 515 516 switch (flow_type) { 517 case IP_USER_FLOW: 518 if (ipv4_usr_mask->ip4src) { 519 memcpy(&pkt->ip4src, &ipv4_usr_hdr->ip4src, 520 sizeof(pkt->ip4src)); 521 memcpy(&pmask->ip4src, &ipv4_usr_mask->ip4src, 522 sizeof(pmask->ip4src)); 523 req->features |= BIT_ULL(NPC_SIP_IPV4); 524 } 525 if (ipv4_usr_mask->ip4dst) { 526 memcpy(&pkt->ip4dst, &ipv4_usr_hdr->ip4dst, 527 sizeof(pkt->ip4dst)); 528 memcpy(&pmask->ip4dst, &ipv4_usr_mask->ip4dst, 529 sizeof(pmask->ip4dst)); 530 req->features |= BIT_ULL(NPC_DIP_IPV4); 531 } 532 if (ipv4_usr_mask->tos) { 533 pkt->tos = ipv4_usr_hdr->tos; 534 pmask->tos = ipv4_usr_mask->tos; 535 req->features |= BIT_ULL(NPC_TOS); 536 } 537 if (ipv4_usr_mask->proto) { 538 switch (ipv4_usr_hdr->proto) { 539 case IPPROTO_ICMP: 540 req->features |= BIT_ULL(NPC_IPPROTO_ICMP); 541 break; 542 case IPPROTO_TCP: 543 req->features |= BIT_ULL(NPC_IPPROTO_TCP); 544 break; 545 case IPPROTO_UDP: 546 req->features |= BIT_ULL(NPC_IPPROTO_UDP); 547 break; 548 case IPPROTO_SCTP: 549 req->features |= BIT_ULL(NPC_IPPROTO_SCTP); 550 break; 551 case IPPROTO_AH: 552 req->features |= BIT_ULL(NPC_IPPROTO_AH); 553 break; 554 case IPPROTO_ESP: 555 req->features |= BIT_ULL(NPC_IPPROTO_ESP); 556 break; 557 default: 558 return -EOPNOTSUPP; 559 } 560 } 561 pkt->etype = cpu_to_be16(ETH_P_IP); 562 pmask->etype = cpu_to_be16(0xFFFF); 563 req->features |= BIT_ULL(NPC_ETYPE); 564 break; 565 case TCP_V4_FLOW: 566 case UDP_V4_FLOW: 567 case SCTP_V4_FLOW: 568 pkt->etype = cpu_to_be16(ETH_P_IP); 569 pmask->etype = cpu_to_be16(0xFFFF); 570 req->features |= BIT_ULL(NPC_ETYPE); 571 if (ipv4_l4_mask->ip4src) { 572 memcpy(&pkt->ip4src, &ipv4_l4_hdr->ip4src, 573 sizeof(pkt->ip4src)); 574 memcpy(&pmask->ip4src, &ipv4_l4_mask->ip4src, 575 sizeof(pmask->ip4src)); 576 req->features |= BIT_ULL(NPC_SIP_IPV4); 577 } 578 if (ipv4_l4_mask->ip4dst) { 579 memcpy(&pkt->ip4dst, &ipv4_l4_hdr->ip4dst, 580 sizeof(pkt->ip4dst)); 581 memcpy(&pmask->ip4dst, &ipv4_l4_mask->ip4dst, 582 sizeof(pmask->ip4dst)); 583 req->features |= BIT_ULL(NPC_DIP_IPV4); 584 } 585 if (ipv4_l4_mask->tos) { 586 pkt->tos = ipv4_l4_hdr->tos; 587 pmask->tos = ipv4_l4_mask->tos; 588 req->features |= BIT_ULL(NPC_TOS); 589 } 590 if (ipv4_l4_mask->psrc) { 591 memcpy(&pkt->sport, &ipv4_l4_hdr->psrc, 592 sizeof(pkt->sport)); 593 memcpy(&pmask->sport, &ipv4_l4_mask->psrc, 594 sizeof(pmask->sport)); 595 if (flow_type == UDP_V4_FLOW) 596 req->features |= BIT_ULL(NPC_SPORT_UDP); 597 else if (flow_type == TCP_V4_FLOW) 598 req->features |= BIT_ULL(NPC_SPORT_TCP); 599 else 600 req->features |= BIT_ULL(NPC_SPORT_SCTP); 601 } 602 if (ipv4_l4_mask->pdst) { 603 memcpy(&pkt->dport, &ipv4_l4_hdr->pdst, 604 sizeof(pkt->dport)); 605 memcpy(&pmask->dport, &ipv4_l4_mask->pdst, 606 sizeof(pmask->dport)); 607 if (flow_type == UDP_V4_FLOW) 608 req->features |= BIT_ULL(NPC_DPORT_UDP); 609 else if (flow_type == TCP_V4_FLOW) 610 req->features |= BIT_ULL(NPC_DPORT_TCP); 611 else 612 req->features |= BIT_ULL(NPC_DPORT_SCTP); 613 } 614 if (flow_type == UDP_V4_FLOW) 615 req->features |= BIT_ULL(NPC_IPPROTO_UDP); 616 else if (flow_type == TCP_V4_FLOW) 617 req->features |= BIT_ULL(NPC_IPPROTO_TCP); 618 else 619 req->features |= BIT_ULL(NPC_IPPROTO_SCTP); 620 break; 621 case AH_V4_FLOW: 622 case ESP_V4_FLOW: 623 pkt->etype = cpu_to_be16(ETH_P_IP); 624 pmask->etype = cpu_to_be16(0xFFFF); 625 req->features |= BIT_ULL(NPC_ETYPE); 626 if (ah_esp_mask->ip4src) { 627 memcpy(&pkt->ip4src, &ah_esp_hdr->ip4src, 628 sizeof(pkt->ip4src)); 629 memcpy(&pmask->ip4src, &ah_esp_mask->ip4src, 630 sizeof(pmask->ip4src)); 631 req->features |= BIT_ULL(NPC_SIP_IPV4); 632 } 633 if (ah_esp_mask->ip4dst) { 634 memcpy(&pkt->ip4dst, &ah_esp_hdr->ip4dst, 635 sizeof(pkt->ip4dst)); 636 memcpy(&pmask->ip4dst, &ah_esp_mask->ip4dst, 637 sizeof(pmask->ip4dst)); 638 req->features |= BIT_ULL(NPC_DIP_IPV4); 639 } 640 if (ah_esp_mask->tos) { 641 pkt->tos = ah_esp_hdr->tos; 642 pmask->tos = ah_esp_mask->tos; 643 req->features |= BIT_ULL(NPC_TOS); 644 } 645 646 /* NPC profile doesn't extract AH/ESP header fields */ 647 if (ah_esp_mask->spi & ah_esp_hdr->spi) 648 return -EOPNOTSUPP; 649 650 if (flow_type == AH_V4_FLOW) 651 req->features |= BIT_ULL(NPC_IPPROTO_AH); 652 else 653 req->features |= BIT_ULL(NPC_IPPROTO_ESP); 654 break; 655 default: 656 break; 657 } 658 659 return 0; 660 } 661 662 static int otx2_prepare_ipv6_flow(struct ethtool_rx_flow_spec *fsp, 663 struct npc_install_flow_req *req, 664 u32 flow_type) 665 { 666 struct ethtool_usrip6_spec *ipv6_usr_mask = &fsp->m_u.usr_ip6_spec; 667 struct ethtool_usrip6_spec *ipv6_usr_hdr = &fsp->h_u.usr_ip6_spec; 668 struct ethtool_tcpip6_spec *ipv6_l4_mask = &fsp->m_u.tcp_ip6_spec; 669 struct ethtool_tcpip6_spec *ipv6_l4_hdr = &fsp->h_u.tcp_ip6_spec; 670 struct ethtool_ah_espip6_spec *ah_esp_hdr = &fsp->h_u.ah_ip6_spec; 671 struct ethtool_ah_espip6_spec *ah_esp_mask = &fsp->m_u.ah_ip6_spec; 672 struct flow_msg *pmask = &req->mask; 673 struct flow_msg *pkt = &req->packet; 674 675 switch (flow_type) { 676 case IPV6_USER_FLOW: 677 if (!ipv6_addr_any((struct in6_addr *)ipv6_usr_mask->ip6src)) { 678 memcpy(&pkt->ip6src, &ipv6_usr_hdr->ip6src, 679 sizeof(pkt->ip6src)); 680 memcpy(&pmask->ip6src, &ipv6_usr_mask->ip6src, 681 sizeof(pmask->ip6src)); 682 req->features |= BIT_ULL(NPC_SIP_IPV6); 683 } 684 if (!ipv6_addr_any((struct in6_addr *)ipv6_usr_mask->ip6dst)) { 685 memcpy(&pkt->ip6dst, &ipv6_usr_hdr->ip6dst, 686 sizeof(pkt->ip6dst)); 687 memcpy(&pmask->ip6dst, &ipv6_usr_mask->ip6dst, 688 sizeof(pmask->ip6dst)); 689 req->features |= BIT_ULL(NPC_DIP_IPV6); 690 } 691 pkt->etype = cpu_to_be16(ETH_P_IPV6); 692 pmask->etype = cpu_to_be16(0xFFFF); 693 req->features |= BIT_ULL(NPC_ETYPE); 694 break; 695 case TCP_V6_FLOW: 696 case UDP_V6_FLOW: 697 case SCTP_V6_FLOW: 698 pkt->etype = cpu_to_be16(ETH_P_IPV6); 699 pmask->etype = cpu_to_be16(0xFFFF); 700 req->features |= BIT_ULL(NPC_ETYPE); 701 if (!ipv6_addr_any((struct in6_addr *)ipv6_l4_mask->ip6src)) { 702 memcpy(&pkt->ip6src, &ipv6_l4_hdr->ip6src, 703 sizeof(pkt->ip6src)); 704 memcpy(&pmask->ip6src, &ipv6_l4_mask->ip6src, 705 sizeof(pmask->ip6src)); 706 req->features |= BIT_ULL(NPC_SIP_IPV6); 707 } 708 if (!ipv6_addr_any((struct in6_addr *)ipv6_l4_mask->ip6dst)) { 709 memcpy(&pkt->ip6dst, &ipv6_l4_hdr->ip6dst, 710 sizeof(pkt->ip6dst)); 711 memcpy(&pmask->ip6dst, &ipv6_l4_mask->ip6dst, 712 sizeof(pmask->ip6dst)); 713 req->features |= BIT_ULL(NPC_DIP_IPV6); 714 } 715 if (ipv6_l4_mask->psrc) { 716 memcpy(&pkt->sport, &ipv6_l4_hdr->psrc, 717 sizeof(pkt->sport)); 718 memcpy(&pmask->sport, &ipv6_l4_mask->psrc, 719 sizeof(pmask->sport)); 720 if (flow_type == UDP_V6_FLOW) 721 req->features |= BIT_ULL(NPC_SPORT_UDP); 722 else if (flow_type == TCP_V6_FLOW) 723 req->features |= BIT_ULL(NPC_SPORT_TCP); 724 else 725 req->features |= BIT_ULL(NPC_SPORT_SCTP); 726 } 727 if (ipv6_l4_mask->pdst) { 728 memcpy(&pkt->dport, &ipv6_l4_hdr->pdst, 729 sizeof(pkt->dport)); 730 memcpy(&pmask->dport, &ipv6_l4_mask->pdst, 731 sizeof(pmask->dport)); 732 if (flow_type == UDP_V6_FLOW) 733 req->features |= BIT_ULL(NPC_DPORT_UDP); 734 else if (flow_type == TCP_V6_FLOW) 735 req->features |= BIT_ULL(NPC_DPORT_TCP); 736 else 737 req->features |= BIT_ULL(NPC_DPORT_SCTP); 738 } 739 if (flow_type == UDP_V6_FLOW) 740 req->features |= BIT_ULL(NPC_IPPROTO_UDP); 741 else if (flow_type == TCP_V6_FLOW) 742 req->features |= BIT_ULL(NPC_IPPROTO_TCP); 743 else 744 req->features |= BIT_ULL(NPC_IPPROTO_SCTP); 745 break; 746 case AH_V6_FLOW: 747 case ESP_V6_FLOW: 748 pkt->etype = cpu_to_be16(ETH_P_IPV6); 749 pmask->etype = cpu_to_be16(0xFFFF); 750 req->features |= BIT_ULL(NPC_ETYPE); 751 if (!ipv6_addr_any((struct in6_addr *)ah_esp_hdr->ip6src)) { 752 memcpy(&pkt->ip6src, &ah_esp_hdr->ip6src, 753 sizeof(pkt->ip6src)); 754 memcpy(&pmask->ip6src, &ah_esp_mask->ip6src, 755 sizeof(pmask->ip6src)); 756 req->features |= BIT_ULL(NPC_SIP_IPV6); 757 } 758 if (!ipv6_addr_any((struct in6_addr *)ah_esp_hdr->ip6dst)) { 759 memcpy(&pkt->ip6dst, &ah_esp_hdr->ip6dst, 760 sizeof(pkt->ip6dst)); 761 memcpy(&pmask->ip6dst, &ah_esp_mask->ip6dst, 762 sizeof(pmask->ip6dst)); 763 req->features |= BIT_ULL(NPC_DIP_IPV6); 764 } 765 766 /* NPC profile doesn't extract AH/ESP header fields */ 767 if ((ah_esp_mask->spi & ah_esp_hdr->spi) || 768 (ah_esp_mask->tclass & ah_esp_mask->tclass)) 769 return -EOPNOTSUPP; 770 771 if (flow_type == AH_V6_FLOW) 772 req->features |= BIT_ULL(NPC_IPPROTO_AH); 773 else 774 req->features |= BIT_ULL(NPC_IPPROTO_ESP); 775 break; 776 default: 777 break; 778 } 779 780 return 0; 781 } 782 783 static int otx2_prepare_flow_request(struct ethtool_rx_flow_spec *fsp, 784 struct npc_install_flow_req *req) 785 { 786 struct ethhdr *eth_mask = &fsp->m_u.ether_spec; 787 struct ethhdr *eth_hdr = &fsp->h_u.ether_spec; 788 struct flow_msg *pmask = &req->mask; 789 struct flow_msg *pkt = &req->packet; 790 u32 flow_type; 791 int ret; 792 793 flow_type = fsp->flow_type & ~(FLOW_EXT | FLOW_MAC_EXT | FLOW_RSS); 794 switch (flow_type) { 795 /* bits not set in mask are don't care */ 796 case ETHER_FLOW: 797 if (!is_zero_ether_addr(eth_mask->h_source)) { 798 ether_addr_copy(pkt->smac, eth_hdr->h_source); 799 ether_addr_copy(pmask->smac, eth_mask->h_source); 800 req->features |= BIT_ULL(NPC_SMAC); 801 } 802 if (!is_zero_ether_addr(eth_mask->h_dest)) { 803 ether_addr_copy(pkt->dmac, eth_hdr->h_dest); 804 ether_addr_copy(pmask->dmac, eth_mask->h_dest); 805 req->features |= BIT_ULL(NPC_DMAC); 806 } 807 if (eth_hdr->h_proto) { 808 memcpy(&pkt->etype, ð_hdr->h_proto, 809 sizeof(pkt->etype)); 810 memcpy(&pmask->etype, ð_mask->h_proto, 811 sizeof(pmask->etype)); 812 req->features |= BIT_ULL(NPC_ETYPE); 813 } 814 break; 815 case IP_USER_FLOW: 816 case TCP_V4_FLOW: 817 case UDP_V4_FLOW: 818 case SCTP_V4_FLOW: 819 case AH_V4_FLOW: 820 case ESP_V4_FLOW: 821 ret = otx2_prepare_ipv4_flow(fsp, req, flow_type); 822 if (ret) 823 return ret; 824 break; 825 case IPV6_USER_FLOW: 826 case TCP_V6_FLOW: 827 case UDP_V6_FLOW: 828 case SCTP_V6_FLOW: 829 case AH_V6_FLOW: 830 case ESP_V6_FLOW: 831 ret = otx2_prepare_ipv6_flow(fsp, req, flow_type); 832 if (ret) 833 return ret; 834 break; 835 default: 836 return -EOPNOTSUPP; 837 } 838 if (fsp->flow_type & FLOW_EXT) { 839 u16 vlan_etype; 840 841 if (fsp->m_ext.vlan_etype) { 842 /* Partial masks not supported */ 843 if (be16_to_cpu(fsp->m_ext.vlan_etype) != 0xFFFF) 844 return -EINVAL; 845 846 vlan_etype = be16_to_cpu(fsp->h_ext.vlan_etype); 847 /* Only ETH_P_8021Q and ETH_P_802AD types supported */ 848 if (vlan_etype != ETH_P_8021Q && 849 vlan_etype != ETH_P_8021AD) 850 return -EINVAL; 851 852 memcpy(&pkt->vlan_etype, &fsp->h_ext.vlan_etype, 853 sizeof(pkt->vlan_etype)); 854 memcpy(&pmask->vlan_etype, &fsp->m_ext.vlan_etype, 855 sizeof(pmask->vlan_etype)); 856 857 if (vlan_etype == ETH_P_8021Q) 858 req->features |= BIT_ULL(NPC_VLAN_ETYPE_CTAG); 859 else 860 req->features |= BIT_ULL(NPC_VLAN_ETYPE_STAG); 861 } 862 863 if (fsp->m_ext.vlan_tci) { 864 memcpy(&pkt->vlan_tci, &fsp->h_ext.vlan_tci, 865 sizeof(pkt->vlan_tci)); 866 memcpy(&pmask->vlan_tci, &fsp->m_ext.vlan_tci, 867 sizeof(pmask->vlan_tci)); 868 req->features |= BIT_ULL(NPC_OUTER_VID); 869 } 870 871 /* Not Drop/Direct to queue but use action in default entry */ 872 if (fsp->m_ext.data[1] && 873 fsp->h_ext.data[1] == cpu_to_be32(OTX2_DEFAULT_ACTION)) 874 req->op = NIX_RX_ACTION_DEFAULT; 875 } 876 877 if (fsp->flow_type & FLOW_MAC_EXT && 878 !is_zero_ether_addr(fsp->m_ext.h_dest)) { 879 ether_addr_copy(pkt->dmac, fsp->h_ext.h_dest); 880 ether_addr_copy(pmask->dmac, fsp->m_ext.h_dest); 881 req->features |= BIT_ULL(NPC_DMAC); 882 } 883 884 if (!req->features) 885 return -EOPNOTSUPP; 886 887 return 0; 888 } 889 890 static int otx2_is_flow_rule_dmacfilter(struct otx2_nic *pfvf, 891 struct ethtool_rx_flow_spec *fsp) 892 { 893 struct ethhdr *eth_mask = &fsp->m_u.ether_spec; 894 struct ethhdr *eth_hdr = &fsp->h_u.ether_spec; 895 u64 ring_cookie = fsp->ring_cookie; 896 u32 flow_type; 897 898 if (!(pfvf->flags & OTX2_FLAG_DMACFLTR_SUPPORT)) 899 return false; 900 901 flow_type = fsp->flow_type & ~(FLOW_EXT | FLOW_MAC_EXT | FLOW_RSS); 902 903 /* CGX/RPM block dmac filtering configured for white listing 904 * check for action other than DROP 905 */ 906 if (flow_type == ETHER_FLOW && ring_cookie != RX_CLS_FLOW_DISC && 907 !ethtool_get_flow_spec_ring_vf(ring_cookie)) { 908 if (is_zero_ether_addr(eth_mask->h_dest) && 909 is_valid_ether_addr(eth_hdr->h_dest)) 910 return true; 911 } 912 913 return false; 914 } 915 916 static int otx2_add_flow_msg(struct otx2_nic *pfvf, struct otx2_flow *flow) 917 { 918 u64 ring_cookie = flow->flow_spec.ring_cookie; 919 #ifdef CONFIG_DCB 920 int vlan_prio, qidx, pfc_rule = 0; 921 #endif 922 struct npc_install_flow_req *req; 923 int err, vf = 0; 924 925 mutex_lock(&pfvf->mbox.lock); 926 req = otx2_mbox_alloc_msg_npc_install_flow(&pfvf->mbox); 927 if (!req) { 928 mutex_unlock(&pfvf->mbox.lock); 929 return -ENOMEM; 930 } 931 932 err = otx2_prepare_flow_request(&flow->flow_spec, req); 933 if (err) { 934 /* free the allocated msg above */ 935 otx2_mbox_reset(&pfvf->mbox.mbox, 0); 936 mutex_unlock(&pfvf->mbox.lock); 937 return err; 938 } 939 940 req->entry = flow->entry; 941 req->intf = NIX_INTF_RX; 942 req->set_cntr = 1; 943 req->channel = pfvf->hw.rx_chan_base; 944 if (ring_cookie == RX_CLS_FLOW_DISC) { 945 req->op = NIX_RX_ACTIONOP_DROP; 946 } else { 947 /* change to unicast only if action of default entry is not 948 * requested by user 949 */ 950 if (flow->flow_spec.flow_type & FLOW_RSS) { 951 req->op = NIX_RX_ACTIONOP_RSS; 952 req->index = flow->rss_ctx_id; 953 req->flow_key_alg = pfvf->hw.flowkey_alg_idx; 954 } else { 955 req->op = NIX_RX_ACTIONOP_UCAST; 956 req->index = ethtool_get_flow_spec_ring(ring_cookie); 957 } 958 vf = ethtool_get_flow_spec_ring_vf(ring_cookie); 959 if (vf > pci_num_vf(pfvf->pdev)) { 960 mutex_unlock(&pfvf->mbox.lock); 961 return -EINVAL; 962 } 963 964 #ifdef CONFIG_DCB 965 /* Identify PFC rule if PFC enabled and ntuple rule is vlan */ 966 if (!vf && (req->features & BIT_ULL(NPC_OUTER_VID)) && 967 pfvf->pfc_en && req->op != NIX_RX_ACTIONOP_RSS) { 968 vlan_prio = ntohs(req->packet.vlan_tci) & 969 ntohs(req->mask.vlan_tci); 970 971 /* Get the priority */ 972 vlan_prio >>= 13; 973 flow->rule_type |= PFC_FLOWCTRL_RULE; 974 /* Check if PFC enabled for this priority */ 975 if (pfvf->pfc_en & BIT(vlan_prio)) { 976 pfc_rule = true; 977 qidx = req->index; 978 } 979 } 980 #endif 981 } 982 983 /* ethtool ring_cookie has (VF + 1) for VF */ 984 if (vf) { 985 req->vf = vf; 986 flow->is_vf = true; 987 flow->vf = vf; 988 } 989 990 /* Send message to AF */ 991 err = otx2_sync_mbox_msg(&pfvf->mbox); 992 993 #ifdef CONFIG_DCB 994 if (!err && pfc_rule) 995 otx2_update_bpid_in_rqctx(pfvf, vlan_prio, qidx, true); 996 #endif 997 998 mutex_unlock(&pfvf->mbox.lock); 999 return err; 1000 } 1001 1002 static int otx2_add_flow_with_pfmac(struct otx2_nic *pfvf, 1003 struct otx2_flow *flow) 1004 { 1005 struct otx2_flow *pf_mac; 1006 struct ethhdr *eth_hdr; 1007 1008 pf_mac = kzalloc(sizeof(*pf_mac), GFP_KERNEL); 1009 if (!pf_mac) 1010 return -ENOMEM; 1011 1012 pf_mac->entry = 0; 1013 pf_mac->rule_type |= DMAC_FILTER_RULE; 1014 pf_mac->location = pfvf->flow_cfg->max_flows; 1015 memcpy(&pf_mac->flow_spec, &flow->flow_spec, 1016 sizeof(struct ethtool_rx_flow_spec)); 1017 pf_mac->flow_spec.location = pf_mac->location; 1018 1019 /* Copy PF mac address */ 1020 eth_hdr = &pf_mac->flow_spec.h_u.ether_spec; 1021 ether_addr_copy(eth_hdr->h_dest, pfvf->netdev->dev_addr); 1022 1023 /* Install DMAC filter with PF mac address */ 1024 otx2_dmacflt_add(pfvf, eth_hdr->h_dest, 0); 1025 1026 otx2_add_flow_to_list(pfvf, pf_mac); 1027 pfvf->flow_cfg->nr_flows++; 1028 set_bit(0, pfvf->flow_cfg->dmacflt_bmap); 1029 1030 return 0; 1031 } 1032 1033 int otx2_add_flow(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc) 1034 { 1035 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg; 1036 struct ethtool_rx_flow_spec *fsp = &nfc->fs; 1037 struct otx2_flow *flow; 1038 struct ethhdr *eth_hdr; 1039 bool new = false; 1040 int err = 0; 1041 u32 ring; 1042 1043 if (!flow_cfg->max_flows) { 1044 netdev_err(pfvf->netdev, 1045 "Ntuple rule count is 0, allocate and retry\n"); 1046 return -EINVAL; 1047 } 1048 1049 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 1050 if (!(pfvf->flags & OTX2_FLAG_NTUPLE_SUPPORT)) 1051 return -ENOMEM; 1052 1053 if (ring >= pfvf->hw.rx_queues && fsp->ring_cookie != RX_CLS_FLOW_DISC) 1054 return -EINVAL; 1055 1056 if (fsp->location >= otx2_get_maxflows(flow_cfg)) 1057 return -EINVAL; 1058 1059 flow = otx2_find_flow(pfvf, fsp->location); 1060 if (!flow) { 1061 flow = kzalloc(sizeof(*flow), GFP_KERNEL); 1062 if (!flow) 1063 return -ENOMEM; 1064 flow->location = fsp->location; 1065 flow->entry = flow_cfg->flow_ent[flow->location]; 1066 new = true; 1067 } 1068 /* struct copy */ 1069 flow->flow_spec = *fsp; 1070 1071 if (fsp->flow_type & FLOW_RSS) 1072 flow->rss_ctx_id = nfc->rss_context; 1073 1074 if (otx2_is_flow_rule_dmacfilter(pfvf, &flow->flow_spec)) { 1075 eth_hdr = &flow->flow_spec.h_u.ether_spec; 1076 1077 /* Sync dmac filter table with updated fields */ 1078 if (flow->rule_type & DMAC_FILTER_RULE) 1079 return otx2_dmacflt_update(pfvf, eth_hdr->h_dest, 1080 flow->entry); 1081 1082 if (bitmap_full(flow_cfg->dmacflt_bmap, 1083 flow_cfg->dmacflt_max_flows)) { 1084 netdev_warn(pfvf->netdev, 1085 "Can't insert the rule %d as max allowed dmac filters are %d\n", 1086 flow->location + 1087 flow_cfg->dmacflt_max_flows, 1088 flow_cfg->dmacflt_max_flows); 1089 err = -EINVAL; 1090 if (new) 1091 kfree(flow); 1092 return err; 1093 } 1094 1095 /* Install PF mac address to DMAC filter list */ 1096 if (!test_bit(0, flow_cfg->dmacflt_bmap)) 1097 otx2_add_flow_with_pfmac(pfvf, flow); 1098 1099 flow->rule_type |= DMAC_FILTER_RULE; 1100 flow->entry = find_first_zero_bit(flow_cfg->dmacflt_bmap, 1101 flow_cfg->dmacflt_max_flows); 1102 fsp->location = flow_cfg->max_flows + flow->entry; 1103 flow->flow_spec.location = fsp->location; 1104 flow->location = fsp->location; 1105 1106 set_bit(flow->entry, flow_cfg->dmacflt_bmap); 1107 otx2_dmacflt_add(pfvf, eth_hdr->h_dest, flow->entry); 1108 1109 } else { 1110 if (flow->location >= pfvf->flow_cfg->max_flows) { 1111 netdev_warn(pfvf->netdev, 1112 "Can't insert non dmac ntuple rule at %d, allowed range %d-0\n", 1113 flow->location, 1114 flow_cfg->max_flows - 1); 1115 err = -EINVAL; 1116 } else { 1117 err = otx2_add_flow_msg(pfvf, flow); 1118 } 1119 } 1120 1121 if (err) { 1122 if (err == MBOX_MSG_INVALID) 1123 err = -EINVAL; 1124 if (new) 1125 kfree(flow); 1126 return err; 1127 } 1128 1129 /* add the new flow installed to list */ 1130 if (new) { 1131 otx2_add_flow_to_list(pfvf, flow); 1132 flow_cfg->nr_flows++; 1133 } 1134 1135 return 0; 1136 } 1137 1138 static int otx2_remove_flow_msg(struct otx2_nic *pfvf, u16 entry, bool all) 1139 { 1140 struct npc_delete_flow_req *req; 1141 int err; 1142 1143 mutex_lock(&pfvf->mbox.lock); 1144 req = otx2_mbox_alloc_msg_npc_delete_flow(&pfvf->mbox); 1145 if (!req) { 1146 mutex_unlock(&pfvf->mbox.lock); 1147 return -ENOMEM; 1148 } 1149 1150 req->entry = entry; 1151 if (all) 1152 req->all = 1; 1153 1154 /* Send message to AF */ 1155 err = otx2_sync_mbox_msg(&pfvf->mbox); 1156 mutex_unlock(&pfvf->mbox.lock); 1157 return err; 1158 } 1159 1160 static void otx2_update_rem_pfmac(struct otx2_nic *pfvf, int req) 1161 { 1162 struct otx2_flow *iter; 1163 struct ethhdr *eth_hdr; 1164 bool found = false; 1165 1166 list_for_each_entry(iter, &pfvf->flow_cfg->flow_list, list) { 1167 if ((iter->rule_type & DMAC_FILTER_RULE) && iter->entry == 0) { 1168 eth_hdr = &iter->flow_spec.h_u.ether_spec; 1169 if (req == DMAC_ADDR_DEL) { 1170 otx2_dmacflt_remove(pfvf, eth_hdr->h_dest, 1171 0); 1172 clear_bit(0, pfvf->flow_cfg->dmacflt_bmap); 1173 found = true; 1174 } else { 1175 ether_addr_copy(eth_hdr->h_dest, 1176 pfvf->netdev->dev_addr); 1177 1178 otx2_dmacflt_update(pfvf, eth_hdr->h_dest, 0); 1179 } 1180 break; 1181 } 1182 } 1183 1184 if (found) { 1185 list_del(&iter->list); 1186 kfree(iter); 1187 pfvf->flow_cfg->nr_flows--; 1188 } 1189 } 1190 1191 int otx2_remove_flow(struct otx2_nic *pfvf, u32 location) 1192 { 1193 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg; 1194 struct otx2_flow *flow; 1195 int err; 1196 1197 if (location >= otx2_get_maxflows(flow_cfg)) 1198 return -EINVAL; 1199 1200 flow = otx2_find_flow(pfvf, location); 1201 if (!flow) 1202 return -ENOENT; 1203 1204 if (flow->rule_type & DMAC_FILTER_RULE) { 1205 struct ethhdr *eth_hdr = &flow->flow_spec.h_u.ether_spec; 1206 1207 /* user not allowed to remove dmac filter with interface mac */ 1208 if (ether_addr_equal(pfvf->netdev->dev_addr, eth_hdr->h_dest)) 1209 return -EPERM; 1210 1211 err = otx2_dmacflt_remove(pfvf, eth_hdr->h_dest, 1212 flow->entry); 1213 clear_bit(flow->entry, flow_cfg->dmacflt_bmap); 1214 /* If all dmac filters are removed delete macfilter with 1215 * interface mac address and configure CGX/RPM block in 1216 * promiscuous mode 1217 */ 1218 if (bitmap_weight(flow_cfg->dmacflt_bmap, 1219 flow_cfg->dmacflt_max_flows) == 1) 1220 otx2_update_rem_pfmac(pfvf, DMAC_ADDR_DEL); 1221 } else { 1222 #ifdef CONFIG_DCB 1223 if (flow->rule_type & PFC_FLOWCTRL_RULE) 1224 otx2_update_bpid_in_rqctx(pfvf, 0, 1225 flow->flow_spec.ring_cookie, 1226 false); 1227 #endif 1228 1229 err = otx2_remove_flow_msg(pfvf, flow->entry, false); 1230 } 1231 1232 if (err) 1233 return err; 1234 1235 list_del(&flow->list); 1236 kfree(flow); 1237 flow_cfg->nr_flows--; 1238 1239 return 0; 1240 } 1241 1242 void otx2_rss_ctx_flow_del(struct otx2_nic *pfvf, int ctx_id) 1243 { 1244 struct otx2_flow *flow, *tmp; 1245 int err; 1246 1247 list_for_each_entry_safe(flow, tmp, &pfvf->flow_cfg->flow_list, list) { 1248 if (flow->rss_ctx_id != ctx_id) 1249 continue; 1250 err = otx2_remove_flow(pfvf, flow->location); 1251 if (err) 1252 netdev_warn(pfvf->netdev, 1253 "Can't delete the rule %d associated with this rss group err:%d", 1254 flow->location, err); 1255 } 1256 } 1257 1258 int otx2_destroy_ntuple_flows(struct otx2_nic *pfvf) 1259 { 1260 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg; 1261 struct npc_delete_flow_req *req; 1262 struct otx2_flow *iter, *tmp; 1263 int err; 1264 1265 if (!(pfvf->flags & OTX2_FLAG_NTUPLE_SUPPORT)) 1266 return 0; 1267 1268 if (!flow_cfg->max_flows) 1269 return 0; 1270 1271 mutex_lock(&pfvf->mbox.lock); 1272 req = otx2_mbox_alloc_msg_npc_delete_flow(&pfvf->mbox); 1273 if (!req) { 1274 mutex_unlock(&pfvf->mbox.lock); 1275 return -ENOMEM; 1276 } 1277 1278 req->start = flow_cfg->flow_ent[0]; 1279 req->end = flow_cfg->flow_ent[flow_cfg->max_flows - 1]; 1280 err = otx2_sync_mbox_msg(&pfvf->mbox); 1281 mutex_unlock(&pfvf->mbox.lock); 1282 1283 list_for_each_entry_safe(iter, tmp, &flow_cfg->flow_list, list) { 1284 list_del(&iter->list); 1285 kfree(iter); 1286 flow_cfg->nr_flows--; 1287 } 1288 return err; 1289 } 1290 1291 int otx2_destroy_mcam_flows(struct otx2_nic *pfvf) 1292 { 1293 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg; 1294 struct npc_mcam_free_entry_req *req; 1295 struct otx2_flow *iter, *tmp; 1296 int err; 1297 1298 if (!(pfvf->flags & OTX2_FLAG_MCAM_ENTRIES_ALLOC)) 1299 return 0; 1300 1301 /* remove all flows */ 1302 err = otx2_remove_flow_msg(pfvf, 0, true); 1303 if (err) 1304 return err; 1305 1306 list_for_each_entry_safe(iter, tmp, &flow_cfg->flow_list, list) { 1307 list_del(&iter->list); 1308 kfree(iter); 1309 flow_cfg->nr_flows--; 1310 } 1311 1312 mutex_lock(&pfvf->mbox.lock); 1313 req = otx2_mbox_alloc_msg_npc_mcam_free_entry(&pfvf->mbox); 1314 if (!req) { 1315 mutex_unlock(&pfvf->mbox.lock); 1316 return -ENOMEM; 1317 } 1318 1319 req->all = 1; 1320 /* Send message to AF to free MCAM entries */ 1321 err = otx2_sync_mbox_msg(&pfvf->mbox); 1322 if (err) { 1323 mutex_unlock(&pfvf->mbox.lock); 1324 return err; 1325 } 1326 1327 pfvf->flags &= ~OTX2_FLAG_MCAM_ENTRIES_ALLOC; 1328 mutex_unlock(&pfvf->mbox.lock); 1329 1330 return 0; 1331 } 1332 1333 int otx2_install_rxvlan_offload_flow(struct otx2_nic *pfvf) 1334 { 1335 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg; 1336 struct npc_install_flow_req *req; 1337 int err; 1338 1339 mutex_lock(&pfvf->mbox.lock); 1340 req = otx2_mbox_alloc_msg_npc_install_flow(&pfvf->mbox); 1341 if (!req) { 1342 mutex_unlock(&pfvf->mbox.lock); 1343 return -ENOMEM; 1344 } 1345 1346 req->entry = flow_cfg->def_ent[flow_cfg->rx_vlan_offset]; 1347 req->intf = NIX_INTF_RX; 1348 ether_addr_copy(req->packet.dmac, pfvf->netdev->dev_addr); 1349 eth_broadcast_addr((u8 *)&req->mask.dmac); 1350 req->channel = pfvf->hw.rx_chan_base; 1351 req->op = NIX_RX_ACTION_DEFAULT; 1352 req->features = BIT_ULL(NPC_OUTER_VID) | BIT_ULL(NPC_DMAC); 1353 req->vtag0_valid = true; 1354 req->vtag0_type = NIX_AF_LFX_RX_VTAG_TYPE0; 1355 1356 /* Send message to AF */ 1357 err = otx2_sync_mbox_msg(&pfvf->mbox); 1358 mutex_unlock(&pfvf->mbox.lock); 1359 return err; 1360 } 1361 1362 static int otx2_delete_rxvlan_offload_flow(struct otx2_nic *pfvf) 1363 { 1364 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg; 1365 struct npc_delete_flow_req *req; 1366 int err; 1367 1368 mutex_lock(&pfvf->mbox.lock); 1369 req = otx2_mbox_alloc_msg_npc_delete_flow(&pfvf->mbox); 1370 if (!req) { 1371 mutex_unlock(&pfvf->mbox.lock); 1372 return -ENOMEM; 1373 } 1374 1375 req->entry = flow_cfg->def_ent[flow_cfg->rx_vlan_offset]; 1376 /* Send message to AF */ 1377 err = otx2_sync_mbox_msg(&pfvf->mbox); 1378 mutex_unlock(&pfvf->mbox.lock); 1379 return err; 1380 } 1381 1382 int otx2_enable_rxvlan(struct otx2_nic *pf, bool enable) 1383 { 1384 struct nix_vtag_config *req; 1385 struct mbox_msghdr *rsp_hdr; 1386 int err; 1387 1388 /* Dont have enough mcam entries */ 1389 if (!(pf->flags & OTX2_FLAG_RX_VLAN_SUPPORT)) 1390 return -ENOMEM; 1391 1392 if (enable) { 1393 err = otx2_install_rxvlan_offload_flow(pf); 1394 if (err) 1395 return err; 1396 } else { 1397 err = otx2_delete_rxvlan_offload_flow(pf); 1398 if (err) 1399 return err; 1400 } 1401 1402 mutex_lock(&pf->mbox.lock); 1403 req = otx2_mbox_alloc_msg_nix_vtag_cfg(&pf->mbox); 1404 if (!req) { 1405 mutex_unlock(&pf->mbox.lock); 1406 return -ENOMEM; 1407 } 1408 1409 /* config strip, capture and size */ 1410 req->vtag_size = VTAGSIZE_T4; 1411 req->cfg_type = 1; /* rx vlan cfg */ 1412 req->rx.vtag_type = NIX_AF_LFX_RX_VTAG_TYPE0; 1413 req->rx.strip_vtag = enable; 1414 req->rx.capture_vtag = enable; 1415 1416 err = otx2_sync_mbox_msg(&pf->mbox); 1417 if (err) { 1418 mutex_unlock(&pf->mbox.lock); 1419 return err; 1420 } 1421 1422 rsp_hdr = otx2_mbox_get_rsp(&pf->mbox.mbox, 0, &req->hdr); 1423 if (IS_ERR(rsp_hdr)) { 1424 mutex_unlock(&pf->mbox.lock); 1425 return PTR_ERR(rsp_hdr); 1426 } 1427 1428 mutex_unlock(&pf->mbox.lock); 1429 return rsp_hdr->rc; 1430 } 1431 1432 void otx2_dmacflt_reinstall_flows(struct otx2_nic *pf) 1433 { 1434 struct otx2_flow *iter; 1435 struct ethhdr *eth_hdr; 1436 1437 list_for_each_entry(iter, &pf->flow_cfg->flow_list, list) { 1438 if (iter->rule_type & DMAC_FILTER_RULE) { 1439 eth_hdr = &iter->flow_spec.h_u.ether_spec; 1440 otx2_dmacflt_add(pf, eth_hdr->h_dest, 1441 iter->entry); 1442 } 1443 } 1444 } 1445 1446 void otx2_dmacflt_update_pfmac_flow(struct otx2_nic *pfvf) 1447 { 1448 otx2_update_rem_pfmac(pfvf, DMAC_ADDR_UPDATE); 1449 } 1450