1 // SPDX-License-Identifier: GPL-2.0 2 /* Marvell OcteonTx2 RVU Ethernet driver 3 * 4 * Copyright (C) 2020 Marvell International Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #include <linux/pci.h> 12 #include <linux/ethtool.h> 13 #include <linux/stddef.h> 14 #include <linux/etherdevice.h> 15 #include <linux/log2.h> 16 17 #include "otx2_common.h" 18 19 #define DRV_NAME "octeontx2-nicpf" 20 21 struct otx2_stat { 22 char name[ETH_GSTRING_LEN]; 23 unsigned int index; 24 }; 25 26 /* HW device stats */ 27 #define OTX2_DEV_STAT(stat) { \ 28 .name = #stat, \ 29 .index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \ 30 } 31 32 static const struct otx2_stat otx2_dev_stats[] = { 33 OTX2_DEV_STAT(rx_ucast_frames), 34 OTX2_DEV_STAT(rx_bcast_frames), 35 OTX2_DEV_STAT(rx_mcast_frames), 36 37 OTX2_DEV_STAT(tx_ucast_frames), 38 OTX2_DEV_STAT(tx_bcast_frames), 39 OTX2_DEV_STAT(tx_mcast_frames), 40 }; 41 42 /* Driver level stats */ 43 #define OTX2_DRV_STAT(stat) { \ 44 .name = #stat, \ 45 .index = offsetof(struct otx2_drv_stats, stat) / sizeof(atomic_t), \ 46 } 47 48 static const struct otx2_stat otx2_drv_stats[] = { 49 OTX2_DRV_STAT(rx_fcs_errs), 50 OTX2_DRV_STAT(rx_oversize_errs), 51 OTX2_DRV_STAT(rx_undersize_errs), 52 OTX2_DRV_STAT(rx_csum_errs), 53 OTX2_DRV_STAT(rx_len_errs), 54 OTX2_DRV_STAT(rx_other_errs), 55 }; 56 57 static const struct otx2_stat otx2_queue_stats[] = { 58 { "bytes", 0 }, 59 { "frames", 1 }, 60 }; 61 62 static const unsigned int otx2_n_dev_stats = ARRAY_SIZE(otx2_dev_stats); 63 static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats); 64 static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats); 65 66 static void otx2_dev_open(struct net_device *netdev) 67 { 68 otx2_open(netdev); 69 } 70 71 static void otx2_dev_stop(struct net_device *netdev) 72 { 73 otx2_stop(netdev); 74 } 75 76 static void otx2_get_drvinfo(struct net_device *netdev, 77 struct ethtool_drvinfo *info) 78 { 79 struct otx2_nic *pfvf = netdev_priv(netdev); 80 81 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); 82 strlcpy(info->bus_info, pci_name(pfvf->pdev), sizeof(info->bus_info)); 83 } 84 85 static void otx2_get_qset_strings(struct otx2_nic *pfvf, u8 **data, int qset) 86 { 87 int start_qidx = qset * pfvf->hw.rx_queues; 88 int qidx, stats; 89 90 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 91 for (stats = 0; stats < otx2_n_queue_stats; stats++) { 92 sprintf(*data, "rxq%d: %s", qidx + start_qidx, 93 otx2_queue_stats[stats].name); 94 *data += ETH_GSTRING_LEN; 95 } 96 } 97 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) { 98 for (stats = 0; stats < otx2_n_queue_stats; stats++) { 99 sprintf(*data, "txq%d: %s", qidx + start_qidx, 100 otx2_queue_stats[stats].name); 101 *data += ETH_GSTRING_LEN; 102 } 103 } 104 } 105 106 static void otx2_get_strings(struct net_device *netdev, u32 sset, u8 *data) 107 { 108 struct otx2_nic *pfvf = netdev_priv(netdev); 109 int stats; 110 111 if (sset != ETH_SS_STATS) 112 return; 113 114 for (stats = 0; stats < otx2_n_dev_stats; stats++) { 115 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN); 116 data += ETH_GSTRING_LEN; 117 } 118 119 for (stats = 0; stats < otx2_n_drv_stats; stats++) { 120 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN); 121 data += ETH_GSTRING_LEN; 122 } 123 124 otx2_get_qset_strings(pfvf, &data, 0); 125 126 for (stats = 0; stats < CGX_RX_STATS_COUNT; stats++) { 127 sprintf(data, "cgx_rxstat%d: ", stats); 128 data += ETH_GSTRING_LEN; 129 } 130 131 for (stats = 0; stats < CGX_TX_STATS_COUNT; stats++) { 132 sprintf(data, "cgx_txstat%d: ", stats); 133 data += ETH_GSTRING_LEN; 134 } 135 136 strcpy(data, "reset_count"); 137 data += ETH_GSTRING_LEN; 138 } 139 140 static void otx2_get_qset_stats(struct otx2_nic *pfvf, 141 struct ethtool_stats *stats, u64 **data) 142 { 143 int stat, qidx; 144 145 if (!pfvf) 146 return; 147 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 148 if (!otx2_update_rq_stats(pfvf, qidx)) { 149 for (stat = 0; stat < otx2_n_queue_stats; stat++) 150 *((*data)++) = 0; 151 continue; 152 } 153 for (stat = 0; stat < otx2_n_queue_stats; stat++) 154 *((*data)++) = ((u64 *)&pfvf->qset.rq[qidx].stats) 155 [otx2_queue_stats[stat].index]; 156 } 157 158 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) { 159 if (!otx2_update_sq_stats(pfvf, qidx)) { 160 for (stat = 0; stat < otx2_n_queue_stats; stat++) 161 *((*data)++) = 0; 162 continue; 163 } 164 for (stat = 0; stat < otx2_n_queue_stats; stat++) 165 *((*data)++) = ((u64 *)&pfvf->qset.sq[qidx].stats) 166 [otx2_queue_stats[stat].index]; 167 } 168 } 169 170 /* Get device and per queue statistics */ 171 static void otx2_get_ethtool_stats(struct net_device *netdev, 172 struct ethtool_stats *stats, u64 *data) 173 { 174 struct otx2_nic *pfvf = netdev_priv(netdev); 175 int stat; 176 177 otx2_get_dev_stats(pfvf); 178 for (stat = 0; stat < otx2_n_dev_stats; stat++) 179 *(data++) = ((u64 *)&pfvf->hw.dev_stats) 180 [otx2_dev_stats[stat].index]; 181 182 for (stat = 0; stat < otx2_n_drv_stats; stat++) 183 *(data++) = atomic_read(&((atomic_t *)&pfvf->hw.drv_stats) 184 [otx2_drv_stats[stat].index]); 185 186 otx2_get_qset_stats(pfvf, stats, &data); 187 otx2_update_lmac_stats(pfvf); 188 for (stat = 0; stat < CGX_RX_STATS_COUNT; stat++) 189 *(data++) = pfvf->hw.cgx_rx_stats[stat]; 190 for (stat = 0; stat < CGX_TX_STATS_COUNT; stat++) 191 *(data++) = pfvf->hw.cgx_tx_stats[stat]; 192 *(data++) = pfvf->reset_count; 193 } 194 195 static int otx2_get_sset_count(struct net_device *netdev, int sset) 196 { 197 struct otx2_nic *pfvf = netdev_priv(netdev); 198 int qstats_count; 199 200 if (sset != ETH_SS_STATS) 201 return -EINVAL; 202 203 qstats_count = otx2_n_queue_stats * 204 (pfvf->hw.rx_queues + pfvf->hw.tx_queues); 205 206 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 207 CGX_RX_STATS_COUNT + CGX_TX_STATS_COUNT + 1; 208 } 209 210 /* Get no of queues device supports and current queue count */ 211 static void otx2_get_channels(struct net_device *dev, 212 struct ethtool_channels *channel) 213 { 214 struct otx2_nic *pfvf = netdev_priv(dev); 215 216 channel->max_rx = pfvf->hw.max_queues; 217 channel->max_tx = pfvf->hw.max_queues; 218 219 channel->rx_count = pfvf->hw.rx_queues; 220 channel->tx_count = pfvf->hw.tx_queues; 221 } 222 223 /* Set no of Tx, Rx queues to be used */ 224 static int otx2_set_channels(struct net_device *dev, 225 struct ethtool_channels *channel) 226 { 227 struct otx2_nic *pfvf = netdev_priv(dev); 228 bool if_up = netif_running(dev); 229 int err = 0; 230 231 if (!channel->rx_count || !channel->tx_count) 232 return -EINVAL; 233 234 if (if_up) 235 otx2_dev_stop(dev); 236 237 err = otx2_set_real_num_queues(dev, channel->tx_count, 238 channel->rx_count); 239 if (err) 240 goto fail; 241 242 pfvf->hw.rx_queues = channel->rx_count; 243 pfvf->hw.tx_queues = channel->tx_count; 244 pfvf->qset.cq_cnt = pfvf->hw.tx_queues + pfvf->hw.rx_queues; 245 246 fail: 247 if (if_up) 248 otx2_dev_open(dev); 249 250 netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n", 251 pfvf->hw.tx_queues, pfvf->hw.rx_queues); 252 253 return err; 254 } 255 256 static void otx2_get_ringparam(struct net_device *netdev, 257 struct ethtool_ringparam *ring) 258 { 259 struct otx2_nic *pfvf = netdev_priv(netdev); 260 struct otx2_qset *qs = &pfvf->qset; 261 262 ring->rx_max_pending = Q_COUNT(Q_SIZE_MAX); 263 ring->rx_pending = qs->rqe_cnt ? qs->rqe_cnt : Q_COUNT(Q_SIZE_256); 264 ring->tx_max_pending = Q_COUNT(Q_SIZE_MAX); 265 ring->tx_pending = qs->sqe_cnt ? qs->sqe_cnt : Q_COUNT(Q_SIZE_4K); 266 } 267 268 static int otx2_set_ringparam(struct net_device *netdev, 269 struct ethtool_ringparam *ring) 270 { 271 struct otx2_nic *pfvf = netdev_priv(netdev); 272 bool if_up = netif_running(netdev); 273 struct otx2_qset *qs = &pfvf->qset; 274 u32 rx_count, tx_count; 275 276 if (ring->rx_mini_pending || ring->rx_jumbo_pending) 277 return -EINVAL; 278 279 /* Permitted lengths are 16 64 256 1K 4K 16K 64K 256K 1M */ 280 rx_count = ring->rx_pending; 281 /* On some silicon variants a skid or reserved CQEs are 282 * needed to avoid CQ overflow. 283 */ 284 if (rx_count < pfvf->hw.rq_skid) 285 rx_count = pfvf->hw.rq_skid; 286 rx_count = Q_COUNT(Q_SIZE(rx_count, 3)); 287 288 /* Due pipelining impact minimum 2000 unused SQ CQE's 289 * need to be maintained to avoid CQ overflow, hence the 290 * minimum 4K size. 291 */ 292 tx_count = clamp_t(u32, ring->tx_pending, 293 Q_COUNT(Q_SIZE_4K), Q_COUNT(Q_SIZE_MAX)); 294 tx_count = Q_COUNT(Q_SIZE(tx_count, 3)); 295 296 if (tx_count == qs->sqe_cnt && rx_count == qs->rqe_cnt) 297 return 0; 298 299 if (if_up) 300 otx2_dev_stop(netdev); 301 302 /* Assigned to the nearest possible exponent. */ 303 qs->sqe_cnt = tx_count; 304 qs->rqe_cnt = rx_count; 305 306 if (if_up) 307 otx2_dev_open(netdev); 308 return 0; 309 } 310 311 static int otx2_get_coalesce(struct net_device *netdev, 312 struct ethtool_coalesce *cmd) 313 { 314 struct otx2_nic *pfvf = netdev_priv(netdev); 315 struct otx2_hw *hw = &pfvf->hw; 316 317 cmd->rx_coalesce_usecs = hw->cq_time_wait; 318 cmd->rx_max_coalesced_frames = hw->cq_ecount_wait; 319 cmd->tx_coalesce_usecs = hw->cq_time_wait; 320 cmd->tx_max_coalesced_frames = hw->cq_ecount_wait; 321 322 return 0; 323 } 324 325 static int otx2_set_coalesce(struct net_device *netdev, 326 struct ethtool_coalesce *ec) 327 { 328 struct otx2_nic *pfvf = netdev_priv(netdev); 329 struct otx2_hw *hw = &pfvf->hw; 330 int qidx; 331 332 if (ec->use_adaptive_rx_coalesce || ec->use_adaptive_tx_coalesce || 333 ec->rx_coalesce_usecs_irq || ec->rx_max_coalesced_frames_irq || 334 ec->tx_coalesce_usecs_irq || ec->tx_max_coalesced_frames_irq || 335 ec->stats_block_coalesce_usecs || ec->pkt_rate_low || 336 ec->rx_coalesce_usecs_low || ec->rx_max_coalesced_frames_low || 337 ec->tx_coalesce_usecs_low || ec->tx_max_coalesced_frames_low || 338 ec->pkt_rate_high || ec->rx_coalesce_usecs_high || 339 ec->rx_max_coalesced_frames_high || ec->tx_coalesce_usecs_high || 340 ec->tx_max_coalesced_frames_high || ec->rate_sample_interval) 341 return -EOPNOTSUPP; 342 343 if (!ec->rx_max_coalesced_frames || !ec->tx_max_coalesced_frames) 344 return 0; 345 346 /* 'cq_time_wait' is 8bit and is in multiple of 100ns, 347 * so clamp the user given value to the range of 1 to 25usec. 348 */ 349 ec->rx_coalesce_usecs = clamp_t(u32, ec->rx_coalesce_usecs, 350 1, CQ_TIMER_THRESH_MAX); 351 ec->tx_coalesce_usecs = clamp_t(u32, ec->tx_coalesce_usecs, 352 1, CQ_TIMER_THRESH_MAX); 353 354 /* Rx and Tx are mapped to same CQ, check which one 355 * is changed, if both then choose the min. 356 */ 357 if (hw->cq_time_wait == ec->rx_coalesce_usecs) 358 hw->cq_time_wait = ec->tx_coalesce_usecs; 359 else if (hw->cq_time_wait == ec->tx_coalesce_usecs) 360 hw->cq_time_wait = ec->rx_coalesce_usecs; 361 else 362 hw->cq_time_wait = min_t(u8, ec->rx_coalesce_usecs, 363 ec->tx_coalesce_usecs); 364 365 /* Max ecount_wait supported is 16bit, 366 * so clamp the user given value to the range of 1 to 64k. 367 */ 368 ec->rx_max_coalesced_frames = clamp_t(u32, ec->rx_max_coalesced_frames, 369 1, U16_MAX); 370 ec->tx_max_coalesced_frames = clamp_t(u32, ec->tx_max_coalesced_frames, 371 1, U16_MAX); 372 373 /* Rx and Tx are mapped to same CQ, check which one 374 * is changed, if both then choose the min. 375 */ 376 if (hw->cq_ecount_wait == ec->rx_max_coalesced_frames) 377 hw->cq_ecount_wait = ec->tx_max_coalesced_frames; 378 else if (hw->cq_ecount_wait == ec->tx_max_coalesced_frames) 379 hw->cq_ecount_wait = ec->rx_max_coalesced_frames; 380 else 381 hw->cq_ecount_wait = min_t(u16, ec->rx_max_coalesced_frames, 382 ec->tx_max_coalesced_frames); 383 384 if (netif_running(netdev)) { 385 for (qidx = 0; qidx < pfvf->hw.cint_cnt; qidx++) 386 otx2_config_irq_coalescing(pfvf, qidx); 387 } 388 389 return 0; 390 } 391 392 static int otx2_get_rss_hash_opts(struct otx2_nic *pfvf, 393 struct ethtool_rxnfc *nfc) 394 { 395 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 396 397 if (!(rss->flowkey_cfg & 398 (NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6))) 399 return 0; 400 401 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 402 nfc->data = RXH_IP_SRC | RXH_IP_DST; 403 404 switch (nfc->flow_type) { 405 case TCP_V4_FLOW: 406 case TCP_V6_FLOW: 407 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_TCP) 408 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 409 break; 410 case UDP_V4_FLOW: 411 case UDP_V6_FLOW: 412 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_UDP) 413 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 414 break; 415 case SCTP_V4_FLOW: 416 case SCTP_V6_FLOW: 417 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_SCTP) 418 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 419 break; 420 case AH_ESP_V4_FLOW: 421 case AH_V4_FLOW: 422 case ESP_V4_FLOW: 423 case IPV4_FLOW: 424 case AH_ESP_V6_FLOW: 425 case AH_V6_FLOW: 426 case ESP_V6_FLOW: 427 case IPV6_FLOW: 428 break; 429 default: 430 return -EINVAL; 431 } 432 return 0; 433 } 434 435 static int otx2_set_rss_hash_opts(struct otx2_nic *pfvf, 436 struct ethtool_rxnfc *nfc) 437 { 438 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 439 u32 rxh_l4 = RXH_L4_B_0_1 | RXH_L4_B_2_3; 440 u32 rss_cfg = rss->flowkey_cfg; 441 442 if (!rss->enable) { 443 netdev_err(pfvf->netdev, 444 "RSS is disabled, cannot change settings\n"); 445 return -EIO; 446 } 447 448 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 449 if (!(nfc->data & RXH_IP_SRC) || !(nfc->data & RXH_IP_DST)) 450 return -EINVAL; 451 452 switch (nfc->flow_type) { 453 case TCP_V4_FLOW: 454 case TCP_V6_FLOW: 455 /* Different config for v4 and v6 is not supported. 456 * Both of them have to be either 4-tuple or 2-tuple. 457 */ 458 switch (nfc->data & rxh_l4) { 459 case 0: 460 rss_cfg &= ~NIX_FLOW_KEY_TYPE_TCP; 461 break; 462 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 463 rss_cfg |= NIX_FLOW_KEY_TYPE_TCP; 464 break; 465 default: 466 return -EINVAL; 467 } 468 break; 469 case UDP_V4_FLOW: 470 case UDP_V6_FLOW: 471 switch (nfc->data & rxh_l4) { 472 case 0: 473 rss_cfg &= ~NIX_FLOW_KEY_TYPE_UDP; 474 break; 475 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 476 rss_cfg |= NIX_FLOW_KEY_TYPE_UDP; 477 break; 478 default: 479 return -EINVAL; 480 } 481 break; 482 case SCTP_V4_FLOW: 483 case SCTP_V6_FLOW: 484 switch (nfc->data & rxh_l4) { 485 case 0: 486 rss_cfg &= ~NIX_FLOW_KEY_TYPE_SCTP; 487 break; 488 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 489 rss_cfg |= NIX_FLOW_KEY_TYPE_SCTP; 490 break; 491 default: 492 return -EINVAL; 493 } 494 break; 495 case IPV4_FLOW: 496 case IPV6_FLOW: 497 rss_cfg = NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6; 498 break; 499 default: 500 return -EINVAL; 501 } 502 503 rss->flowkey_cfg = rss_cfg; 504 otx2_set_flowkey_cfg(pfvf); 505 return 0; 506 } 507 508 static int otx2_get_rxnfc(struct net_device *dev, 509 struct ethtool_rxnfc *nfc, u32 *rules) 510 { 511 struct otx2_nic *pfvf = netdev_priv(dev); 512 int ret = -EOPNOTSUPP; 513 514 switch (nfc->cmd) { 515 case ETHTOOL_GRXRINGS: 516 nfc->data = pfvf->hw.rx_queues; 517 ret = 0; 518 break; 519 case ETHTOOL_GRXFH: 520 return otx2_get_rss_hash_opts(pfvf, nfc); 521 default: 522 break; 523 } 524 return ret; 525 } 526 527 static int otx2_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc) 528 { 529 struct otx2_nic *pfvf = netdev_priv(dev); 530 int ret = -EOPNOTSUPP; 531 532 switch (nfc->cmd) { 533 case ETHTOOL_SRXFH: 534 ret = otx2_set_rss_hash_opts(pfvf, nfc); 535 break; 536 default: 537 break; 538 } 539 540 return ret; 541 } 542 543 static u32 otx2_get_rxfh_key_size(struct net_device *netdev) 544 { 545 struct otx2_nic *pfvf = netdev_priv(netdev); 546 struct otx2_rss_info *rss; 547 548 rss = &pfvf->hw.rss_info; 549 550 return sizeof(rss->key); 551 } 552 553 static u32 otx2_get_rxfh_indir_size(struct net_device *dev) 554 { 555 struct otx2_nic *pfvf = netdev_priv(dev); 556 557 return pfvf->hw.rss_info.rss_size; 558 } 559 560 /* Get RSS configuration */ 561 static int otx2_get_rxfh(struct net_device *dev, u32 *indir, 562 u8 *hkey, u8 *hfunc) 563 { 564 struct otx2_nic *pfvf = netdev_priv(dev); 565 struct otx2_rss_info *rss; 566 int idx; 567 568 rss = &pfvf->hw.rss_info; 569 570 if (indir) { 571 for (idx = 0; idx < rss->rss_size; idx++) 572 indir[idx] = rss->ind_tbl[idx]; 573 } 574 575 if (hkey) 576 memcpy(hkey, rss->key, sizeof(rss->key)); 577 578 if (hfunc) 579 *hfunc = ETH_RSS_HASH_TOP; 580 581 return 0; 582 } 583 584 /* Configure RSS table and hash key */ 585 static int otx2_set_rxfh(struct net_device *dev, const u32 *indir, 586 const u8 *hkey, const u8 hfunc) 587 { 588 struct otx2_nic *pfvf = netdev_priv(dev); 589 struct otx2_rss_info *rss; 590 int idx; 591 592 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 593 return -EOPNOTSUPP; 594 595 rss = &pfvf->hw.rss_info; 596 597 if (!rss->enable) { 598 netdev_err(dev, "RSS is disabled, cannot change settings\n"); 599 return -EIO; 600 } 601 602 if (indir) { 603 for (idx = 0; idx < rss->rss_size; idx++) 604 rss->ind_tbl[idx] = indir[idx]; 605 } 606 607 if (hkey) { 608 memcpy(rss->key, hkey, sizeof(rss->key)); 609 otx2_set_rss_key(pfvf); 610 } 611 612 otx2_set_rss_table(pfvf); 613 return 0; 614 } 615 616 static u32 otx2_get_msglevel(struct net_device *netdev) 617 { 618 struct otx2_nic *pfvf = netdev_priv(netdev); 619 620 return pfvf->msg_enable; 621 } 622 623 static void otx2_set_msglevel(struct net_device *netdev, u32 val) 624 { 625 struct otx2_nic *pfvf = netdev_priv(netdev); 626 627 pfvf->msg_enable = val; 628 } 629 630 static u32 otx2_get_link(struct net_device *netdev) 631 { 632 struct otx2_nic *pfvf = netdev_priv(netdev); 633 634 return pfvf->linfo.link_up; 635 } 636 637 static const struct ethtool_ops otx2_ethtool_ops = { 638 .get_link = otx2_get_link, 639 .get_drvinfo = otx2_get_drvinfo, 640 .get_strings = otx2_get_strings, 641 .get_ethtool_stats = otx2_get_ethtool_stats, 642 .get_sset_count = otx2_get_sset_count, 643 .set_channels = otx2_set_channels, 644 .get_channels = otx2_get_channels, 645 .get_ringparam = otx2_get_ringparam, 646 .set_ringparam = otx2_set_ringparam, 647 .get_coalesce = otx2_get_coalesce, 648 .set_coalesce = otx2_set_coalesce, 649 .get_rxnfc = otx2_get_rxnfc, 650 .set_rxnfc = otx2_set_rxnfc, 651 .get_rxfh_key_size = otx2_get_rxfh_key_size, 652 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 653 .get_rxfh = otx2_get_rxfh, 654 .set_rxfh = otx2_set_rxfh, 655 .get_msglevel = otx2_get_msglevel, 656 .set_msglevel = otx2_set_msglevel, 657 }; 658 659 void otx2_set_ethtool_ops(struct net_device *netdev) 660 { 661 netdev->ethtool_ops = &otx2_ethtool_ops; 662 } 663