1 // SPDX-License-Identifier: GPL-2.0 2 /* Marvell RVU Ethernet driver 3 * 4 * Copyright (C) 2020 Marvell. 5 * 6 */ 7 8 #include <linux/pci.h> 9 #include <linux/ethtool.h> 10 #include <linux/stddef.h> 11 #include <linux/etherdevice.h> 12 #include <linux/log2.h> 13 #include <linux/net_tstamp.h> 14 #include <linux/linkmode.h> 15 16 #include "otx2_common.h" 17 #include "otx2_ptp.h" 18 19 #define DRV_NAME "rvu-nicpf" 20 #define DRV_VF_NAME "rvu-nicvf" 21 22 struct otx2_stat { 23 char name[ETH_GSTRING_LEN]; 24 unsigned int index; 25 }; 26 27 /* HW device stats */ 28 #define OTX2_DEV_STAT(stat) { \ 29 .name = #stat, \ 30 .index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \ 31 } 32 33 enum link_mode { 34 OTX2_MODE_SUPPORTED, 35 OTX2_MODE_ADVERTISED 36 }; 37 38 static const struct otx2_stat otx2_dev_stats[] = { 39 OTX2_DEV_STAT(rx_ucast_frames), 40 OTX2_DEV_STAT(rx_bcast_frames), 41 OTX2_DEV_STAT(rx_mcast_frames), 42 43 OTX2_DEV_STAT(tx_ucast_frames), 44 OTX2_DEV_STAT(tx_bcast_frames), 45 OTX2_DEV_STAT(tx_mcast_frames), 46 }; 47 48 /* Driver level stats */ 49 #define OTX2_DRV_STAT(stat) { \ 50 .name = #stat, \ 51 .index = offsetof(struct otx2_drv_stats, stat) / sizeof(atomic_t), \ 52 } 53 54 static const struct otx2_stat otx2_drv_stats[] = { 55 OTX2_DRV_STAT(rx_fcs_errs), 56 OTX2_DRV_STAT(rx_oversize_errs), 57 OTX2_DRV_STAT(rx_undersize_errs), 58 OTX2_DRV_STAT(rx_csum_errs), 59 OTX2_DRV_STAT(rx_len_errs), 60 OTX2_DRV_STAT(rx_other_errs), 61 }; 62 63 static const struct otx2_stat otx2_queue_stats[] = { 64 { "bytes", 0 }, 65 { "frames", 1 }, 66 }; 67 68 static const unsigned int otx2_n_dev_stats = ARRAY_SIZE(otx2_dev_stats); 69 static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats); 70 static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats); 71 72 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf); 73 74 static void otx2_get_drvinfo(struct net_device *netdev, 75 struct ethtool_drvinfo *info) 76 { 77 struct otx2_nic *pfvf = netdev_priv(netdev); 78 79 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); 80 strlcpy(info->bus_info, pci_name(pfvf->pdev), sizeof(info->bus_info)); 81 } 82 83 static void otx2_get_qset_strings(struct otx2_nic *pfvf, u8 **data, int qset) 84 { 85 int start_qidx = qset * pfvf->hw.rx_queues; 86 int qidx, stats; 87 88 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 89 for (stats = 0; stats < otx2_n_queue_stats; stats++) { 90 sprintf(*data, "rxq%d: %s", qidx + start_qidx, 91 otx2_queue_stats[stats].name); 92 *data += ETH_GSTRING_LEN; 93 } 94 } 95 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) { 96 for (stats = 0; stats < otx2_n_queue_stats; stats++) { 97 sprintf(*data, "txq%d: %s", qidx + start_qidx, 98 otx2_queue_stats[stats].name); 99 *data += ETH_GSTRING_LEN; 100 } 101 } 102 } 103 104 static void otx2_get_strings(struct net_device *netdev, u32 sset, u8 *data) 105 { 106 struct otx2_nic *pfvf = netdev_priv(netdev); 107 int stats; 108 109 if (sset != ETH_SS_STATS) 110 return; 111 112 for (stats = 0; stats < otx2_n_dev_stats; stats++) { 113 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN); 114 data += ETH_GSTRING_LEN; 115 } 116 117 for (stats = 0; stats < otx2_n_drv_stats; stats++) { 118 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN); 119 data += ETH_GSTRING_LEN; 120 } 121 122 otx2_get_qset_strings(pfvf, &data, 0); 123 124 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) { 125 for (stats = 0; stats < CGX_RX_STATS_COUNT; stats++) { 126 sprintf(data, "cgx_rxstat%d: ", stats); 127 data += ETH_GSTRING_LEN; 128 } 129 130 for (stats = 0; stats < CGX_TX_STATS_COUNT; stats++) { 131 sprintf(data, "cgx_txstat%d: ", stats); 132 data += ETH_GSTRING_LEN; 133 } 134 } 135 136 strcpy(data, "reset_count"); 137 data += ETH_GSTRING_LEN; 138 sprintf(data, "Fec Corrected Errors: "); 139 data += ETH_GSTRING_LEN; 140 sprintf(data, "Fec Uncorrected Errors: "); 141 data += ETH_GSTRING_LEN; 142 } 143 144 static void otx2_get_qset_stats(struct otx2_nic *pfvf, 145 struct ethtool_stats *stats, u64 **data) 146 { 147 int stat, qidx; 148 149 if (!pfvf) 150 return; 151 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 152 if (!otx2_update_rq_stats(pfvf, qidx)) { 153 for (stat = 0; stat < otx2_n_queue_stats; stat++) 154 *((*data)++) = 0; 155 continue; 156 } 157 for (stat = 0; stat < otx2_n_queue_stats; stat++) 158 *((*data)++) = ((u64 *)&pfvf->qset.rq[qidx].stats) 159 [otx2_queue_stats[stat].index]; 160 } 161 162 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) { 163 if (!otx2_update_sq_stats(pfvf, qidx)) { 164 for (stat = 0; stat < otx2_n_queue_stats; stat++) 165 *((*data)++) = 0; 166 continue; 167 } 168 for (stat = 0; stat < otx2_n_queue_stats; stat++) 169 *((*data)++) = ((u64 *)&pfvf->qset.sq[qidx].stats) 170 [otx2_queue_stats[stat].index]; 171 } 172 } 173 174 static int otx2_get_phy_fec_stats(struct otx2_nic *pfvf) 175 { 176 struct msg_req *req; 177 int rc = -ENOMEM; 178 179 mutex_lock(&pfvf->mbox.lock); 180 req = otx2_mbox_alloc_msg_cgx_get_phy_fec_stats(&pfvf->mbox); 181 if (!req) 182 goto end; 183 184 if (!otx2_sync_mbox_msg(&pfvf->mbox)) 185 rc = 0; 186 end: 187 mutex_unlock(&pfvf->mbox.lock); 188 return rc; 189 } 190 191 /* Get device and per queue statistics */ 192 static void otx2_get_ethtool_stats(struct net_device *netdev, 193 struct ethtool_stats *stats, u64 *data) 194 { 195 struct otx2_nic *pfvf = netdev_priv(netdev); 196 u64 fec_corr_blks, fec_uncorr_blks; 197 struct cgx_fw_data *rsp; 198 int stat; 199 200 otx2_get_dev_stats(pfvf); 201 for (stat = 0; stat < otx2_n_dev_stats; stat++) 202 *(data++) = ((u64 *)&pfvf->hw.dev_stats) 203 [otx2_dev_stats[stat].index]; 204 205 for (stat = 0; stat < otx2_n_drv_stats; stat++) 206 *(data++) = atomic_read(&((atomic_t *)&pfvf->hw.drv_stats) 207 [otx2_drv_stats[stat].index]); 208 209 otx2_get_qset_stats(pfvf, stats, &data); 210 211 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) { 212 otx2_update_lmac_stats(pfvf); 213 for (stat = 0; stat < CGX_RX_STATS_COUNT; stat++) 214 *(data++) = pfvf->hw.cgx_rx_stats[stat]; 215 for (stat = 0; stat < CGX_TX_STATS_COUNT; stat++) 216 *(data++) = pfvf->hw.cgx_tx_stats[stat]; 217 } 218 219 *(data++) = pfvf->reset_count; 220 221 fec_corr_blks = pfvf->hw.cgx_fec_corr_blks; 222 fec_uncorr_blks = pfvf->hw.cgx_fec_uncorr_blks; 223 224 rsp = otx2_get_fwdata(pfvf); 225 if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats && 226 !otx2_get_phy_fec_stats(pfvf)) { 227 /* Fetch fwdata again because it's been recently populated with 228 * latest PHY FEC stats. 229 */ 230 rsp = otx2_get_fwdata(pfvf); 231 if (!IS_ERR(rsp)) { 232 struct fec_stats_s *p = &rsp->fwdata.phy.fec_stats; 233 234 if (pfvf->linfo.fec == OTX2_FEC_BASER) { 235 fec_corr_blks = p->brfec_corr_blks; 236 fec_uncorr_blks = p->brfec_uncorr_blks; 237 } else { 238 fec_corr_blks = p->rsfec_corr_cws; 239 fec_uncorr_blks = p->rsfec_uncorr_cws; 240 } 241 } 242 } 243 244 *(data++) = fec_corr_blks; 245 *(data++) = fec_uncorr_blks; 246 } 247 248 static int otx2_get_sset_count(struct net_device *netdev, int sset) 249 { 250 struct otx2_nic *pfvf = netdev_priv(netdev); 251 int qstats_count, mac_stats = 0; 252 253 if (sset != ETH_SS_STATS) 254 return -EINVAL; 255 256 qstats_count = otx2_n_queue_stats * 257 (pfvf->hw.rx_queues + pfvf->hw.tx_queues); 258 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) 259 mac_stats = CGX_RX_STATS_COUNT + CGX_TX_STATS_COUNT; 260 otx2_update_lmac_fec_stats(pfvf); 261 262 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 263 mac_stats + OTX2_FEC_STATS_CNT + 1; 264 } 265 266 /* Get no of queues device supports and current queue count */ 267 static void otx2_get_channels(struct net_device *dev, 268 struct ethtool_channels *channel) 269 { 270 struct otx2_nic *pfvf = netdev_priv(dev); 271 272 channel->max_rx = pfvf->hw.max_queues; 273 channel->max_tx = pfvf->hw.max_queues; 274 275 channel->rx_count = pfvf->hw.rx_queues; 276 channel->tx_count = pfvf->hw.tx_queues; 277 } 278 279 /* Set no of Tx, Rx queues to be used */ 280 static int otx2_set_channels(struct net_device *dev, 281 struct ethtool_channels *channel) 282 { 283 struct otx2_nic *pfvf = netdev_priv(dev); 284 bool if_up = netif_running(dev); 285 int err = 0; 286 287 if (!channel->rx_count || !channel->tx_count) 288 return -EINVAL; 289 290 if (bitmap_weight(&pfvf->rq_bmap, pfvf->hw.rx_queues) > 1) { 291 netdev_err(dev, 292 "Receive queues are in use by TC police action\n"); 293 return -EINVAL; 294 } 295 296 if (if_up) 297 dev->netdev_ops->ndo_stop(dev); 298 299 err = otx2_set_real_num_queues(dev, channel->tx_count, 300 channel->rx_count); 301 if (err) 302 return err; 303 304 pfvf->hw.rx_queues = channel->rx_count; 305 pfvf->hw.tx_queues = channel->tx_count; 306 pfvf->qset.cq_cnt = pfvf->hw.tx_queues + pfvf->hw.rx_queues; 307 308 if (if_up) 309 err = dev->netdev_ops->ndo_open(dev); 310 311 netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n", 312 pfvf->hw.tx_queues, pfvf->hw.rx_queues); 313 314 return err; 315 } 316 317 static void otx2_get_pauseparam(struct net_device *netdev, 318 struct ethtool_pauseparam *pause) 319 { 320 struct otx2_nic *pfvf = netdev_priv(netdev); 321 struct cgx_pause_frm_cfg *req, *rsp; 322 323 if (is_otx2_lbkvf(pfvf->pdev)) 324 return; 325 326 req = otx2_mbox_alloc_msg_cgx_cfg_pause_frm(&pfvf->mbox); 327 if (!req) 328 return; 329 330 if (!otx2_sync_mbox_msg(&pfvf->mbox)) { 331 rsp = (struct cgx_pause_frm_cfg *) 332 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr); 333 pause->rx_pause = rsp->rx_pause; 334 pause->tx_pause = rsp->tx_pause; 335 } 336 } 337 338 static int otx2_set_pauseparam(struct net_device *netdev, 339 struct ethtool_pauseparam *pause) 340 { 341 struct otx2_nic *pfvf = netdev_priv(netdev); 342 343 if (pause->autoneg) 344 return -EOPNOTSUPP; 345 346 if (is_otx2_lbkvf(pfvf->pdev)) 347 return -EOPNOTSUPP; 348 349 if (pause->rx_pause) 350 pfvf->flags |= OTX2_FLAG_RX_PAUSE_ENABLED; 351 else 352 pfvf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED; 353 354 if (pause->tx_pause) 355 pfvf->flags |= OTX2_FLAG_TX_PAUSE_ENABLED; 356 else 357 pfvf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED; 358 359 return otx2_config_pause_frm(pfvf); 360 } 361 362 static void otx2_get_ringparam(struct net_device *netdev, 363 struct ethtool_ringparam *ring, 364 struct kernel_ethtool_ringparam *kernel_ring, 365 struct netlink_ext_ack *extack) 366 { 367 struct otx2_nic *pfvf = netdev_priv(netdev); 368 struct otx2_qset *qs = &pfvf->qset; 369 370 ring->rx_max_pending = Q_COUNT(Q_SIZE_MAX); 371 ring->rx_pending = qs->rqe_cnt ? qs->rqe_cnt : Q_COUNT(Q_SIZE_256); 372 ring->tx_max_pending = Q_COUNT(Q_SIZE_MAX); 373 ring->tx_pending = qs->sqe_cnt ? qs->sqe_cnt : Q_COUNT(Q_SIZE_4K); 374 } 375 376 static int otx2_set_ringparam(struct net_device *netdev, 377 struct ethtool_ringparam *ring, 378 struct kernel_ethtool_ringparam *kernel_ring, 379 struct netlink_ext_ack *extack) 380 { 381 struct otx2_nic *pfvf = netdev_priv(netdev); 382 bool if_up = netif_running(netdev); 383 struct otx2_qset *qs = &pfvf->qset; 384 u32 rx_count, tx_count; 385 386 if (ring->rx_mini_pending || ring->rx_jumbo_pending) 387 return -EINVAL; 388 389 /* Permitted lengths are 16 64 256 1K 4K 16K 64K 256K 1M */ 390 rx_count = ring->rx_pending; 391 /* On some silicon variants a skid or reserved CQEs are 392 * needed to avoid CQ overflow. 393 */ 394 if (rx_count < pfvf->hw.rq_skid) 395 rx_count = pfvf->hw.rq_skid; 396 rx_count = Q_COUNT(Q_SIZE(rx_count, 3)); 397 398 /* Due pipelining impact minimum 2000 unused SQ CQE's 399 * need to be maintained to avoid CQ overflow, hence the 400 * minimum 4K size. 401 */ 402 tx_count = clamp_t(u32, ring->tx_pending, 403 Q_COUNT(Q_SIZE_4K), Q_COUNT(Q_SIZE_MAX)); 404 tx_count = Q_COUNT(Q_SIZE(tx_count, 3)); 405 406 if (tx_count == qs->sqe_cnt && rx_count == qs->rqe_cnt) 407 return 0; 408 409 if (if_up) 410 netdev->netdev_ops->ndo_stop(netdev); 411 412 /* Assigned to the nearest possible exponent. */ 413 qs->sqe_cnt = tx_count; 414 qs->rqe_cnt = rx_count; 415 416 if (if_up) 417 return netdev->netdev_ops->ndo_open(netdev); 418 419 return 0; 420 } 421 422 static int otx2_get_coalesce(struct net_device *netdev, 423 struct ethtool_coalesce *cmd, 424 struct kernel_ethtool_coalesce *kernel_coal, 425 struct netlink_ext_ack *extack) 426 { 427 struct otx2_nic *pfvf = netdev_priv(netdev); 428 struct otx2_hw *hw = &pfvf->hw; 429 430 cmd->rx_coalesce_usecs = hw->cq_time_wait; 431 cmd->rx_max_coalesced_frames = hw->cq_ecount_wait; 432 cmd->tx_coalesce_usecs = hw->cq_time_wait; 433 cmd->tx_max_coalesced_frames = hw->cq_ecount_wait; 434 435 return 0; 436 } 437 438 static int otx2_set_coalesce(struct net_device *netdev, 439 struct ethtool_coalesce *ec, 440 struct kernel_ethtool_coalesce *kernel_coal, 441 struct netlink_ext_ack *extack) 442 { 443 struct otx2_nic *pfvf = netdev_priv(netdev); 444 struct otx2_hw *hw = &pfvf->hw; 445 int qidx; 446 447 if (!ec->rx_max_coalesced_frames || !ec->tx_max_coalesced_frames) 448 return 0; 449 450 /* 'cq_time_wait' is 8bit and is in multiple of 100ns, 451 * so clamp the user given value to the range of 1 to 25usec. 452 */ 453 ec->rx_coalesce_usecs = clamp_t(u32, ec->rx_coalesce_usecs, 454 1, CQ_TIMER_THRESH_MAX); 455 ec->tx_coalesce_usecs = clamp_t(u32, ec->tx_coalesce_usecs, 456 1, CQ_TIMER_THRESH_MAX); 457 458 /* Rx and Tx are mapped to same CQ, check which one 459 * is changed, if both then choose the min. 460 */ 461 if (hw->cq_time_wait == ec->rx_coalesce_usecs) 462 hw->cq_time_wait = ec->tx_coalesce_usecs; 463 else if (hw->cq_time_wait == ec->tx_coalesce_usecs) 464 hw->cq_time_wait = ec->rx_coalesce_usecs; 465 else 466 hw->cq_time_wait = min_t(u8, ec->rx_coalesce_usecs, 467 ec->tx_coalesce_usecs); 468 469 /* Max ecount_wait supported is 16bit, 470 * so clamp the user given value to the range of 1 to 64k. 471 */ 472 ec->rx_max_coalesced_frames = clamp_t(u32, ec->rx_max_coalesced_frames, 473 1, U16_MAX); 474 ec->tx_max_coalesced_frames = clamp_t(u32, ec->tx_max_coalesced_frames, 475 1, U16_MAX); 476 477 /* Rx and Tx are mapped to same CQ, check which one 478 * is changed, if both then choose the min. 479 */ 480 if (hw->cq_ecount_wait == ec->rx_max_coalesced_frames) 481 hw->cq_ecount_wait = ec->tx_max_coalesced_frames; 482 else if (hw->cq_ecount_wait == ec->tx_max_coalesced_frames) 483 hw->cq_ecount_wait = ec->rx_max_coalesced_frames; 484 else 485 hw->cq_ecount_wait = min_t(u16, ec->rx_max_coalesced_frames, 486 ec->tx_max_coalesced_frames); 487 488 if (netif_running(netdev)) { 489 for (qidx = 0; qidx < pfvf->hw.cint_cnt; qidx++) 490 otx2_config_irq_coalescing(pfvf, qidx); 491 } 492 493 return 0; 494 } 495 496 static int otx2_get_rss_hash_opts(struct otx2_nic *pfvf, 497 struct ethtool_rxnfc *nfc) 498 { 499 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 500 501 if (!(rss->flowkey_cfg & 502 (NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6))) 503 return 0; 504 505 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 506 nfc->data = RXH_IP_SRC | RXH_IP_DST; 507 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_VLAN) 508 nfc->data |= RXH_VLAN; 509 510 switch (nfc->flow_type) { 511 case TCP_V4_FLOW: 512 case TCP_V6_FLOW: 513 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_TCP) 514 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 515 break; 516 case UDP_V4_FLOW: 517 case UDP_V6_FLOW: 518 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_UDP) 519 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 520 break; 521 case SCTP_V4_FLOW: 522 case SCTP_V6_FLOW: 523 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_SCTP) 524 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 525 break; 526 case AH_ESP_V4_FLOW: 527 case AH_ESP_V6_FLOW: 528 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_ESP) 529 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 530 break; 531 case AH_V4_FLOW: 532 case ESP_V4_FLOW: 533 case IPV4_FLOW: 534 break; 535 case AH_V6_FLOW: 536 case ESP_V6_FLOW: 537 case IPV6_FLOW: 538 break; 539 default: 540 return -EINVAL; 541 } 542 543 return 0; 544 } 545 546 static int otx2_set_rss_hash_opts(struct otx2_nic *pfvf, 547 struct ethtool_rxnfc *nfc) 548 { 549 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 550 u32 rxh_l4 = RXH_L4_B_0_1 | RXH_L4_B_2_3; 551 u32 rss_cfg = rss->flowkey_cfg; 552 553 if (!rss->enable) { 554 netdev_err(pfvf->netdev, 555 "RSS is disabled, cannot change settings\n"); 556 return -EIO; 557 } 558 559 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 560 if (!(nfc->data & RXH_IP_SRC) || !(nfc->data & RXH_IP_DST)) 561 return -EINVAL; 562 563 if (nfc->data & RXH_VLAN) 564 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN; 565 else 566 rss_cfg &= ~NIX_FLOW_KEY_TYPE_VLAN; 567 568 switch (nfc->flow_type) { 569 case TCP_V4_FLOW: 570 case TCP_V6_FLOW: 571 /* Different config for v4 and v6 is not supported. 572 * Both of them have to be either 4-tuple or 2-tuple. 573 */ 574 switch (nfc->data & rxh_l4) { 575 case 0: 576 rss_cfg &= ~NIX_FLOW_KEY_TYPE_TCP; 577 break; 578 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 579 rss_cfg |= NIX_FLOW_KEY_TYPE_TCP; 580 break; 581 default: 582 return -EINVAL; 583 } 584 break; 585 case UDP_V4_FLOW: 586 case UDP_V6_FLOW: 587 switch (nfc->data & rxh_l4) { 588 case 0: 589 rss_cfg &= ~NIX_FLOW_KEY_TYPE_UDP; 590 break; 591 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 592 rss_cfg |= NIX_FLOW_KEY_TYPE_UDP; 593 break; 594 default: 595 return -EINVAL; 596 } 597 break; 598 case SCTP_V4_FLOW: 599 case SCTP_V6_FLOW: 600 switch (nfc->data & rxh_l4) { 601 case 0: 602 rss_cfg &= ~NIX_FLOW_KEY_TYPE_SCTP; 603 break; 604 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 605 rss_cfg |= NIX_FLOW_KEY_TYPE_SCTP; 606 break; 607 default: 608 return -EINVAL; 609 } 610 break; 611 case AH_ESP_V4_FLOW: 612 case AH_ESP_V6_FLOW: 613 switch (nfc->data & rxh_l4) { 614 case 0: 615 rss_cfg &= ~(NIX_FLOW_KEY_TYPE_ESP | 616 NIX_FLOW_KEY_TYPE_AH); 617 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN | 618 NIX_FLOW_KEY_TYPE_IPV4_PROTO; 619 break; 620 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 621 /* If VLAN hashing is also requested for ESP then do not 622 * allow because of hardware 40 bytes flow key limit. 623 */ 624 if (rss_cfg & NIX_FLOW_KEY_TYPE_VLAN) { 625 netdev_err(pfvf->netdev, 626 "RSS hash of ESP or AH with VLAN is not supported\n"); 627 return -EOPNOTSUPP; 628 } 629 630 rss_cfg |= NIX_FLOW_KEY_TYPE_ESP | NIX_FLOW_KEY_TYPE_AH; 631 /* Disable IPv4 proto hashing since IPv6 SA+DA(32 bytes) 632 * and ESP SPI+sequence(8 bytes) uses hardware maximum 633 * limit of 40 byte flow key. 634 */ 635 rss_cfg &= ~NIX_FLOW_KEY_TYPE_IPV4_PROTO; 636 break; 637 default: 638 return -EINVAL; 639 } 640 break; 641 case IPV4_FLOW: 642 case IPV6_FLOW: 643 rss_cfg = NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6; 644 break; 645 default: 646 return -EINVAL; 647 } 648 649 rss->flowkey_cfg = rss_cfg; 650 otx2_set_flowkey_cfg(pfvf); 651 return 0; 652 } 653 654 static int otx2_get_rxnfc(struct net_device *dev, 655 struct ethtool_rxnfc *nfc, u32 *rules) 656 { 657 bool ntuple = !!(dev->features & NETIF_F_NTUPLE); 658 struct otx2_nic *pfvf = netdev_priv(dev); 659 int ret = -EOPNOTSUPP; 660 661 switch (nfc->cmd) { 662 case ETHTOOL_GRXRINGS: 663 nfc->data = pfvf->hw.rx_queues; 664 ret = 0; 665 break; 666 case ETHTOOL_GRXCLSRLCNT: 667 if (netif_running(dev) && ntuple) { 668 nfc->rule_cnt = pfvf->flow_cfg->nr_flows; 669 ret = 0; 670 } 671 break; 672 case ETHTOOL_GRXCLSRULE: 673 if (netif_running(dev) && ntuple) 674 ret = otx2_get_flow(pfvf, nfc, nfc->fs.location); 675 break; 676 case ETHTOOL_GRXCLSRLALL: 677 if (netif_running(dev) && ntuple) 678 ret = otx2_get_all_flows(pfvf, nfc, rules); 679 break; 680 case ETHTOOL_GRXFH: 681 return otx2_get_rss_hash_opts(pfvf, nfc); 682 default: 683 break; 684 } 685 return ret; 686 } 687 688 static int otx2_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc) 689 { 690 bool ntuple = !!(dev->features & NETIF_F_NTUPLE); 691 struct otx2_nic *pfvf = netdev_priv(dev); 692 int ret = -EOPNOTSUPP; 693 694 switch (nfc->cmd) { 695 case ETHTOOL_SRXFH: 696 ret = otx2_set_rss_hash_opts(pfvf, nfc); 697 break; 698 case ETHTOOL_SRXCLSRLINS: 699 if (netif_running(dev) && ntuple) 700 ret = otx2_add_flow(pfvf, nfc); 701 break; 702 case ETHTOOL_SRXCLSRLDEL: 703 if (netif_running(dev) && ntuple) 704 ret = otx2_remove_flow(pfvf, nfc->fs.location); 705 break; 706 default: 707 break; 708 } 709 710 return ret; 711 } 712 713 static u32 otx2_get_rxfh_key_size(struct net_device *netdev) 714 { 715 struct otx2_nic *pfvf = netdev_priv(netdev); 716 struct otx2_rss_info *rss; 717 718 rss = &pfvf->hw.rss_info; 719 720 return sizeof(rss->key); 721 } 722 723 static u32 otx2_get_rxfh_indir_size(struct net_device *dev) 724 { 725 return MAX_RSS_INDIR_TBL_SIZE; 726 } 727 728 static int otx2_rss_ctx_delete(struct otx2_nic *pfvf, int ctx_id) 729 { 730 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 731 732 otx2_rss_ctx_flow_del(pfvf, ctx_id); 733 kfree(rss->rss_ctx[ctx_id]); 734 rss->rss_ctx[ctx_id] = NULL; 735 736 return 0; 737 } 738 739 static int otx2_rss_ctx_create(struct otx2_nic *pfvf, 740 u32 *rss_context) 741 { 742 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 743 u8 ctx; 744 745 for (ctx = 0; ctx < MAX_RSS_GROUPS; ctx++) { 746 if (!rss->rss_ctx[ctx]) 747 break; 748 } 749 if (ctx == MAX_RSS_GROUPS) 750 return -EINVAL; 751 752 rss->rss_ctx[ctx] = kzalloc(sizeof(*rss->rss_ctx[ctx]), GFP_KERNEL); 753 if (!rss->rss_ctx[ctx]) 754 return -ENOMEM; 755 *rss_context = ctx; 756 757 return 0; 758 } 759 760 /* RSS context configuration */ 761 static int otx2_set_rxfh_context(struct net_device *dev, const u32 *indir, 762 const u8 *hkey, const u8 hfunc, 763 u32 *rss_context, bool delete) 764 { 765 struct otx2_nic *pfvf = netdev_priv(dev); 766 struct otx2_rss_ctx *rss_ctx; 767 struct otx2_rss_info *rss; 768 int ret, idx; 769 770 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 771 return -EOPNOTSUPP; 772 773 if (*rss_context != ETH_RXFH_CONTEXT_ALLOC && 774 *rss_context >= MAX_RSS_GROUPS) 775 return -EINVAL; 776 777 rss = &pfvf->hw.rss_info; 778 779 if (!rss->enable) { 780 netdev_err(dev, "RSS is disabled, cannot change settings\n"); 781 return -EIO; 782 } 783 784 if (hkey) { 785 memcpy(rss->key, hkey, sizeof(rss->key)); 786 otx2_set_rss_key(pfvf); 787 } 788 if (delete) 789 return otx2_rss_ctx_delete(pfvf, *rss_context); 790 791 if (*rss_context == ETH_RXFH_CONTEXT_ALLOC) { 792 ret = otx2_rss_ctx_create(pfvf, rss_context); 793 if (ret) 794 return ret; 795 } 796 if (indir) { 797 rss_ctx = rss->rss_ctx[*rss_context]; 798 for (idx = 0; idx < rss->rss_size; idx++) 799 rss_ctx->ind_tbl[idx] = indir[idx]; 800 } 801 otx2_set_rss_table(pfvf, *rss_context); 802 803 return 0; 804 } 805 806 static int otx2_get_rxfh_context(struct net_device *dev, u32 *indir, 807 u8 *hkey, u8 *hfunc, u32 rss_context) 808 { 809 struct otx2_nic *pfvf = netdev_priv(dev); 810 struct otx2_rss_ctx *rss_ctx; 811 struct otx2_rss_info *rss; 812 int idx, rx_queues; 813 814 rss = &pfvf->hw.rss_info; 815 816 if (hfunc) 817 *hfunc = ETH_RSS_HASH_TOP; 818 819 if (!indir) 820 return 0; 821 822 if (!rss->enable && rss_context == DEFAULT_RSS_CONTEXT_GROUP) { 823 rx_queues = pfvf->hw.rx_queues; 824 for (idx = 0; idx < MAX_RSS_INDIR_TBL_SIZE; idx++) 825 indir[idx] = ethtool_rxfh_indir_default(idx, rx_queues); 826 return 0; 827 } 828 if (rss_context >= MAX_RSS_GROUPS) 829 return -ENOENT; 830 831 rss_ctx = rss->rss_ctx[rss_context]; 832 if (!rss_ctx) 833 return -ENOENT; 834 835 if (indir) { 836 for (idx = 0; idx < rss->rss_size; idx++) 837 indir[idx] = rss_ctx->ind_tbl[idx]; 838 } 839 if (hkey) 840 memcpy(hkey, rss->key, sizeof(rss->key)); 841 842 return 0; 843 } 844 845 /* Get RSS configuration */ 846 static int otx2_get_rxfh(struct net_device *dev, u32 *indir, 847 u8 *hkey, u8 *hfunc) 848 { 849 return otx2_get_rxfh_context(dev, indir, hkey, hfunc, 850 DEFAULT_RSS_CONTEXT_GROUP); 851 } 852 853 /* Configure RSS table and hash key */ 854 static int otx2_set_rxfh(struct net_device *dev, const u32 *indir, 855 const u8 *hkey, const u8 hfunc) 856 { 857 858 u32 rss_context = DEFAULT_RSS_CONTEXT_GROUP; 859 860 return otx2_set_rxfh_context(dev, indir, hkey, hfunc, &rss_context, 0); 861 } 862 863 static u32 otx2_get_msglevel(struct net_device *netdev) 864 { 865 struct otx2_nic *pfvf = netdev_priv(netdev); 866 867 return pfvf->msg_enable; 868 } 869 870 static void otx2_set_msglevel(struct net_device *netdev, u32 val) 871 { 872 struct otx2_nic *pfvf = netdev_priv(netdev); 873 874 pfvf->msg_enable = val; 875 } 876 877 static u32 otx2_get_link(struct net_device *netdev) 878 { 879 struct otx2_nic *pfvf = netdev_priv(netdev); 880 881 /* LBK link is internal and always UP */ 882 if (is_otx2_lbkvf(pfvf->pdev)) 883 return 1; 884 return pfvf->linfo.link_up; 885 } 886 887 static int otx2_get_ts_info(struct net_device *netdev, 888 struct ethtool_ts_info *info) 889 { 890 struct otx2_nic *pfvf = netdev_priv(netdev); 891 892 if (!pfvf->ptp) 893 return ethtool_op_get_ts_info(netdev, info); 894 895 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 896 SOF_TIMESTAMPING_RX_SOFTWARE | 897 SOF_TIMESTAMPING_SOFTWARE | 898 SOF_TIMESTAMPING_TX_HARDWARE | 899 SOF_TIMESTAMPING_RX_HARDWARE | 900 SOF_TIMESTAMPING_RAW_HARDWARE; 901 902 info->phc_index = otx2_ptp_clock_index(pfvf); 903 904 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 905 906 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 907 (1 << HWTSTAMP_FILTER_ALL); 908 909 return 0; 910 } 911 912 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf) 913 { 914 struct cgx_fw_data *rsp = NULL; 915 struct msg_req *req; 916 int err = 0; 917 918 mutex_lock(&pfvf->mbox.lock); 919 req = otx2_mbox_alloc_msg_cgx_get_aux_link_info(&pfvf->mbox); 920 if (!req) { 921 mutex_unlock(&pfvf->mbox.lock); 922 return ERR_PTR(-ENOMEM); 923 } 924 925 err = otx2_sync_mbox_msg(&pfvf->mbox); 926 if (!err) { 927 rsp = (struct cgx_fw_data *) 928 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr); 929 } else { 930 rsp = ERR_PTR(err); 931 } 932 933 mutex_unlock(&pfvf->mbox.lock); 934 return rsp; 935 } 936 937 static int otx2_get_fecparam(struct net_device *netdev, 938 struct ethtool_fecparam *fecparam) 939 { 940 struct otx2_nic *pfvf = netdev_priv(netdev); 941 struct cgx_fw_data *rsp; 942 const int fec[] = { 943 ETHTOOL_FEC_OFF, 944 ETHTOOL_FEC_BASER, 945 ETHTOOL_FEC_RS, 946 ETHTOOL_FEC_BASER | ETHTOOL_FEC_RS}; 947 #define FEC_MAX_INDEX 4 948 if (pfvf->linfo.fec < FEC_MAX_INDEX) 949 fecparam->active_fec = fec[pfvf->linfo.fec]; 950 951 rsp = otx2_get_fwdata(pfvf); 952 if (IS_ERR(rsp)) 953 return PTR_ERR(rsp); 954 955 if (rsp->fwdata.supported_fec < FEC_MAX_INDEX) { 956 if (!rsp->fwdata.supported_fec) 957 fecparam->fec = ETHTOOL_FEC_NONE; 958 else 959 fecparam->fec = fec[rsp->fwdata.supported_fec]; 960 } 961 return 0; 962 } 963 964 static int otx2_set_fecparam(struct net_device *netdev, 965 struct ethtool_fecparam *fecparam) 966 { 967 struct otx2_nic *pfvf = netdev_priv(netdev); 968 struct mbox *mbox = &pfvf->mbox; 969 struct fec_mode *req, *rsp; 970 int err = 0, fec = 0; 971 972 switch (fecparam->fec) { 973 /* Firmware does not support AUTO mode consider it as FEC_OFF */ 974 case ETHTOOL_FEC_OFF: 975 case ETHTOOL_FEC_AUTO: 976 fec = OTX2_FEC_OFF; 977 break; 978 case ETHTOOL_FEC_RS: 979 fec = OTX2_FEC_RS; 980 break; 981 case ETHTOOL_FEC_BASER: 982 fec = OTX2_FEC_BASER; 983 break; 984 default: 985 netdev_warn(pfvf->netdev, "Unsupported FEC mode: %d", 986 fecparam->fec); 987 return -EINVAL; 988 } 989 990 if (fec == pfvf->linfo.fec) 991 return 0; 992 993 mutex_lock(&mbox->lock); 994 req = otx2_mbox_alloc_msg_cgx_set_fec_param(&pfvf->mbox); 995 if (!req) { 996 err = -ENOMEM; 997 goto end; 998 } 999 req->fec = fec; 1000 err = otx2_sync_mbox_msg(&pfvf->mbox); 1001 if (err) 1002 goto end; 1003 1004 rsp = (struct fec_mode *)otx2_mbox_get_rsp(&pfvf->mbox.mbox, 1005 0, &req->hdr); 1006 if (rsp->fec >= 0) 1007 pfvf->linfo.fec = rsp->fec; 1008 else 1009 err = rsp->fec; 1010 end: 1011 mutex_unlock(&mbox->lock); 1012 return err; 1013 } 1014 1015 static void otx2_get_fec_info(u64 index, int req_mode, 1016 struct ethtool_link_ksettings *link_ksettings) 1017 { 1018 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, }; 1019 1020 switch (index) { 1021 case OTX2_FEC_NONE: 1022 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1023 otx2_fec_modes); 1024 break; 1025 case OTX2_FEC_BASER: 1026 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1027 otx2_fec_modes); 1028 break; 1029 case OTX2_FEC_RS: 1030 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1031 otx2_fec_modes); 1032 break; 1033 case OTX2_FEC_BASER | OTX2_FEC_RS: 1034 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1035 otx2_fec_modes); 1036 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1037 otx2_fec_modes); 1038 break; 1039 } 1040 1041 /* Add fec modes to existing modes */ 1042 if (req_mode == OTX2_MODE_ADVERTISED) 1043 linkmode_or(link_ksettings->link_modes.advertising, 1044 link_ksettings->link_modes.advertising, 1045 otx2_fec_modes); 1046 else 1047 linkmode_or(link_ksettings->link_modes.supported, 1048 link_ksettings->link_modes.supported, 1049 otx2_fec_modes); 1050 } 1051 1052 static void otx2_get_link_mode_info(u64 link_mode_bmap, 1053 bool req_mode, 1054 struct ethtool_link_ksettings 1055 *link_ksettings) 1056 { 1057 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, }; 1058 const int otx2_sgmii_features[6] = { 1059 ETHTOOL_LINK_MODE_10baseT_Half_BIT, 1060 ETHTOOL_LINK_MODE_10baseT_Full_BIT, 1061 ETHTOOL_LINK_MODE_100baseT_Half_BIT, 1062 ETHTOOL_LINK_MODE_100baseT_Full_BIT, 1063 ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1064 ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1065 }; 1066 /* CGX link modes to Ethtool link mode mapping */ 1067 const int cgx_link_mode[27] = { 1068 0, /* SGMII Mode */ 1069 ETHTOOL_LINK_MODE_1000baseX_Full_BIT, 1070 ETHTOOL_LINK_MODE_10000baseT_Full_BIT, 1071 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, 1072 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, 1073 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, 1074 0, 1075 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, 1076 0, 1077 0, 1078 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, 1079 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, 1080 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, 1081 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, 1082 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, 1083 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, 1084 0, 1085 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, 1086 0, 1087 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 1088 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, 1089 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, 1090 0, 1091 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, 1092 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 1093 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, 1094 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 1095 }; 1096 u8 bit; 1097 1098 for_each_set_bit(bit, (unsigned long *)&link_mode_bmap, 27) { 1099 /* SGMII mode is set */ 1100 if (bit == 0) 1101 linkmode_set_bit_array(otx2_sgmii_features, 1102 ARRAY_SIZE(otx2_sgmii_features), 1103 otx2_link_modes); 1104 else 1105 linkmode_set_bit(cgx_link_mode[bit], otx2_link_modes); 1106 } 1107 1108 if (req_mode == OTX2_MODE_ADVERTISED) 1109 linkmode_copy(link_ksettings->link_modes.advertising, 1110 otx2_link_modes); 1111 else 1112 linkmode_copy(link_ksettings->link_modes.supported, 1113 otx2_link_modes); 1114 } 1115 1116 static int otx2_get_link_ksettings(struct net_device *netdev, 1117 struct ethtool_link_ksettings *cmd) 1118 { 1119 struct otx2_nic *pfvf = netdev_priv(netdev); 1120 struct cgx_fw_data *rsp = NULL; 1121 1122 cmd->base.duplex = pfvf->linfo.full_duplex; 1123 cmd->base.speed = pfvf->linfo.speed; 1124 cmd->base.autoneg = pfvf->linfo.an; 1125 1126 rsp = otx2_get_fwdata(pfvf); 1127 if (IS_ERR(rsp)) 1128 return PTR_ERR(rsp); 1129 1130 if (rsp->fwdata.supported_an) 1131 ethtool_link_ksettings_add_link_mode(cmd, 1132 supported, 1133 Autoneg); 1134 1135 otx2_get_link_mode_info(rsp->fwdata.advertised_link_modes, 1136 OTX2_MODE_ADVERTISED, cmd); 1137 otx2_get_fec_info(rsp->fwdata.advertised_fec, 1138 OTX2_MODE_ADVERTISED, cmd); 1139 otx2_get_link_mode_info(rsp->fwdata.supported_link_modes, 1140 OTX2_MODE_SUPPORTED, cmd); 1141 otx2_get_fec_info(rsp->fwdata.supported_fec, 1142 OTX2_MODE_SUPPORTED, cmd); 1143 return 0; 1144 } 1145 1146 static void otx2_get_advertised_mode(const struct ethtool_link_ksettings *cmd, 1147 u64 *mode) 1148 { 1149 u32 bit_pos; 1150 1151 /* Firmware does not support requesting multiple advertised modes 1152 * return first set bit 1153 */ 1154 bit_pos = find_first_bit(cmd->link_modes.advertising, 1155 __ETHTOOL_LINK_MODE_MASK_NBITS); 1156 if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS) 1157 *mode = bit_pos; 1158 } 1159 1160 static int otx2_set_link_ksettings(struct net_device *netdev, 1161 const struct ethtool_link_ksettings *cmd) 1162 { 1163 struct otx2_nic *pf = netdev_priv(netdev); 1164 struct ethtool_link_ksettings cur_ks; 1165 struct cgx_set_link_mode_req *req; 1166 struct mbox *mbox = &pf->mbox; 1167 int err = 0; 1168 1169 memset(&cur_ks, 0, sizeof(struct ethtool_link_ksettings)); 1170 1171 if (!ethtool_validate_speed(cmd->base.speed) || 1172 !ethtool_validate_duplex(cmd->base.duplex)) 1173 return -EINVAL; 1174 1175 if (cmd->base.autoneg != AUTONEG_ENABLE && 1176 cmd->base.autoneg != AUTONEG_DISABLE) 1177 return -EINVAL; 1178 1179 otx2_get_link_ksettings(netdev, &cur_ks); 1180 1181 /* Check requested modes against supported modes by hardware */ 1182 if (!linkmode_subset(cmd->link_modes.advertising, 1183 cur_ks.link_modes.supported)) 1184 return -EINVAL; 1185 1186 mutex_lock(&mbox->lock); 1187 req = otx2_mbox_alloc_msg_cgx_set_link_mode(&pf->mbox); 1188 if (!req) { 1189 err = -ENOMEM; 1190 goto end; 1191 } 1192 1193 req->args.speed = cmd->base.speed; 1194 /* firmware expects 1 for half duplex and 0 for full duplex 1195 * hence inverting 1196 */ 1197 req->args.duplex = cmd->base.duplex ^ 0x1; 1198 req->args.an = cmd->base.autoneg; 1199 otx2_get_advertised_mode(cmd, &req->args.mode); 1200 1201 err = otx2_sync_mbox_msg(&pf->mbox); 1202 end: 1203 mutex_unlock(&mbox->lock); 1204 return err; 1205 } 1206 1207 static const struct ethtool_ops otx2_ethtool_ops = { 1208 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1209 ETHTOOL_COALESCE_MAX_FRAMES, 1210 .get_link = otx2_get_link, 1211 .get_drvinfo = otx2_get_drvinfo, 1212 .get_strings = otx2_get_strings, 1213 .get_ethtool_stats = otx2_get_ethtool_stats, 1214 .get_sset_count = otx2_get_sset_count, 1215 .set_channels = otx2_set_channels, 1216 .get_channels = otx2_get_channels, 1217 .get_ringparam = otx2_get_ringparam, 1218 .set_ringparam = otx2_set_ringparam, 1219 .get_coalesce = otx2_get_coalesce, 1220 .set_coalesce = otx2_set_coalesce, 1221 .get_rxnfc = otx2_get_rxnfc, 1222 .set_rxnfc = otx2_set_rxnfc, 1223 .get_rxfh_key_size = otx2_get_rxfh_key_size, 1224 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 1225 .get_rxfh = otx2_get_rxfh, 1226 .set_rxfh = otx2_set_rxfh, 1227 .get_rxfh_context = otx2_get_rxfh_context, 1228 .set_rxfh_context = otx2_set_rxfh_context, 1229 .get_msglevel = otx2_get_msglevel, 1230 .set_msglevel = otx2_set_msglevel, 1231 .get_pauseparam = otx2_get_pauseparam, 1232 .set_pauseparam = otx2_set_pauseparam, 1233 .get_ts_info = otx2_get_ts_info, 1234 .get_fecparam = otx2_get_fecparam, 1235 .set_fecparam = otx2_set_fecparam, 1236 .get_link_ksettings = otx2_get_link_ksettings, 1237 .set_link_ksettings = otx2_set_link_ksettings, 1238 }; 1239 1240 void otx2_set_ethtool_ops(struct net_device *netdev) 1241 { 1242 netdev->ethtool_ops = &otx2_ethtool_ops; 1243 } 1244 1245 /* VF's ethtool APIs */ 1246 static void otx2vf_get_drvinfo(struct net_device *netdev, 1247 struct ethtool_drvinfo *info) 1248 { 1249 struct otx2_nic *vf = netdev_priv(netdev); 1250 1251 strlcpy(info->driver, DRV_VF_NAME, sizeof(info->driver)); 1252 strlcpy(info->bus_info, pci_name(vf->pdev), sizeof(info->bus_info)); 1253 } 1254 1255 static void otx2vf_get_strings(struct net_device *netdev, u32 sset, u8 *data) 1256 { 1257 struct otx2_nic *vf = netdev_priv(netdev); 1258 int stats; 1259 1260 if (sset != ETH_SS_STATS) 1261 return; 1262 1263 for (stats = 0; stats < otx2_n_dev_stats; stats++) { 1264 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN); 1265 data += ETH_GSTRING_LEN; 1266 } 1267 1268 for (stats = 0; stats < otx2_n_drv_stats; stats++) { 1269 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN); 1270 data += ETH_GSTRING_LEN; 1271 } 1272 1273 otx2_get_qset_strings(vf, &data, 0); 1274 1275 strcpy(data, "reset_count"); 1276 data += ETH_GSTRING_LEN; 1277 } 1278 1279 static void otx2vf_get_ethtool_stats(struct net_device *netdev, 1280 struct ethtool_stats *stats, u64 *data) 1281 { 1282 struct otx2_nic *vf = netdev_priv(netdev); 1283 int stat; 1284 1285 otx2_get_dev_stats(vf); 1286 for (stat = 0; stat < otx2_n_dev_stats; stat++) 1287 *(data++) = ((u64 *)&vf->hw.dev_stats) 1288 [otx2_dev_stats[stat].index]; 1289 1290 for (stat = 0; stat < otx2_n_drv_stats; stat++) 1291 *(data++) = atomic_read(&((atomic_t *)&vf->hw.drv_stats) 1292 [otx2_drv_stats[stat].index]); 1293 1294 otx2_get_qset_stats(vf, stats, &data); 1295 *(data++) = vf->reset_count; 1296 } 1297 1298 static int otx2vf_get_sset_count(struct net_device *netdev, int sset) 1299 { 1300 struct otx2_nic *vf = netdev_priv(netdev); 1301 int qstats_count; 1302 1303 if (sset != ETH_SS_STATS) 1304 return -EINVAL; 1305 1306 qstats_count = otx2_n_queue_stats * 1307 (vf->hw.rx_queues + vf->hw.tx_queues); 1308 1309 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 1; 1310 } 1311 1312 static int otx2vf_get_link_ksettings(struct net_device *netdev, 1313 struct ethtool_link_ksettings *cmd) 1314 { 1315 struct otx2_nic *pfvf = netdev_priv(netdev); 1316 1317 if (is_otx2_lbkvf(pfvf->pdev)) { 1318 cmd->base.duplex = DUPLEX_FULL; 1319 cmd->base.speed = SPEED_100000; 1320 } else { 1321 return otx2_get_link_ksettings(netdev, cmd); 1322 } 1323 return 0; 1324 } 1325 1326 static const struct ethtool_ops otx2vf_ethtool_ops = { 1327 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1328 ETHTOOL_COALESCE_MAX_FRAMES, 1329 .get_link = otx2_get_link, 1330 .get_drvinfo = otx2vf_get_drvinfo, 1331 .get_strings = otx2vf_get_strings, 1332 .get_ethtool_stats = otx2vf_get_ethtool_stats, 1333 .get_sset_count = otx2vf_get_sset_count, 1334 .set_channels = otx2_set_channels, 1335 .get_channels = otx2_get_channels, 1336 .get_rxnfc = otx2_get_rxnfc, 1337 .set_rxnfc = otx2_set_rxnfc, 1338 .get_rxfh_key_size = otx2_get_rxfh_key_size, 1339 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 1340 .get_rxfh = otx2_get_rxfh, 1341 .set_rxfh = otx2_set_rxfh, 1342 .get_rxfh_context = otx2_get_rxfh_context, 1343 .set_rxfh_context = otx2_set_rxfh_context, 1344 .get_ringparam = otx2_get_ringparam, 1345 .set_ringparam = otx2_set_ringparam, 1346 .get_coalesce = otx2_get_coalesce, 1347 .set_coalesce = otx2_set_coalesce, 1348 .get_msglevel = otx2_get_msglevel, 1349 .set_msglevel = otx2_set_msglevel, 1350 .get_pauseparam = otx2_get_pauseparam, 1351 .set_pauseparam = otx2_set_pauseparam, 1352 .get_link_ksettings = otx2vf_get_link_ksettings, 1353 .get_ts_info = otx2_get_ts_info, 1354 }; 1355 1356 void otx2vf_set_ethtool_ops(struct net_device *netdev) 1357 { 1358 netdev->ethtool_ops = &otx2vf_ethtool_ops; 1359 } 1360 EXPORT_SYMBOL(otx2vf_set_ethtool_ops); 1361