1 // SPDX-License-Identifier: GPL-2.0 2 /* Marvell OcteonTx2 RVU Ethernet driver 3 * 4 * Copyright (C) 2020 Marvell International Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #include <linux/pci.h> 12 #include <linux/ethtool.h> 13 #include <linux/stddef.h> 14 #include <linux/etherdevice.h> 15 #include <linux/log2.h> 16 17 #include "otx2_common.h" 18 19 #define DRV_NAME "octeontx2-nicpf" 20 #define DRV_VF_NAME "octeontx2-nicvf" 21 22 struct otx2_stat { 23 char name[ETH_GSTRING_LEN]; 24 unsigned int index; 25 }; 26 27 /* HW device stats */ 28 #define OTX2_DEV_STAT(stat) { \ 29 .name = #stat, \ 30 .index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \ 31 } 32 33 static const struct otx2_stat otx2_dev_stats[] = { 34 OTX2_DEV_STAT(rx_ucast_frames), 35 OTX2_DEV_STAT(rx_bcast_frames), 36 OTX2_DEV_STAT(rx_mcast_frames), 37 38 OTX2_DEV_STAT(tx_ucast_frames), 39 OTX2_DEV_STAT(tx_bcast_frames), 40 OTX2_DEV_STAT(tx_mcast_frames), 41 }; 42 43 /* Driver level stats */ 44 #define OTX2_DRV_STAT(stat) { \ 45 .name = #stat, \ 46 .index = offsetof(struct otx2_drv_stats, stat) / sizeof(atomic_t), \ 47 } 48 49 static const struct otx2_stat otx2_drv_stats[] = { 50 OTX2_DRV_STAT(rx_fcs_errs), 51 OTX2_DRV_STAT(rx_oversize_errs), 52 OTX2_DRV_STAT(rx_undersize_errs), 53 OTX2_DRV_STAT(rx_csum_errs), 54 OTX2_DRV_STAT(rx_len_errs), 55 OTX2_DRV_STAT(rx_other_errs), 56 }; 57 58 static const struct otx2_stat otx2_queue_stats[] = { 59 { "bytes", 0 }, 60 { "frames", 1 }, 61 }; 62 63 static const unsigned int otx2_n_dev_stats = ARRAY_SIZE(otx2_dev_stats); 64 static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats); 65 static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats); 66 67 static void otx2_get_drvinfo(struct net_device *netdev, 68 struct ethtool_drvinfo *info) 69 { 70 struct otx2_nic *pfvf = netdev_priv(netdev); 71 72 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); 73 strlcpy(info->bus_info, pci_name(pfvf->pdev), sizeof(info->bus_info)); 74 } 75 76 static void otx2_get_qset_strings(struct otx2_nic *pfvf, u8 **data, int qset) 77 { 78 int start_qidx = qset * pfvf->hw.rx_queues; 79 int qidx, stats; 80 81 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 82 for (stats = 0; stats < otx2_n_queue_stats; stats++) { 83 sprintf(*data, "rxq%d: %s", qidx + start_qidx, 84 otx2_queue_stats[stats].name); 85 *data += ETH_GSTRING_LEN; 86 } 87 } 88 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) { 89 for (stats = 0; stats < otx2_n_queue_stats; stats++) { 90 sprintf(*data, "txq%d: %s", qidx + start_qidx, 91 otx2_queue_stats[stats].name); 92 *data += ETH_GSTRING_LEN; 93 } 94 } 95 } 96 97 static void otx2_get_strings(struct net_device *netdev, u32 sset, u8 *data) 98 { 99 struct otx2_nic *pfvf = netdev_priv(netdev); 100 int stats; 101 102 if (sset != ETH_SS_STATS) 103 return; 104 105 for (stats = 0; stats < otx2_n_dev_stats; stats++) { 106 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN); 107 data += ETH_GSTRING_LEN; 108 } 109 110 for (stats = 0; stats < otx2_n_drv_stats; stats++) { 111 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN); 112 data += ETH_GSTRING_LEN; 113 } 114 115 otx2_get_qset_strings(pfvf, &data, 0); 116 117 for (stats = 0; stats < CGX_RX_STATS_COUNT; stats++) { 118 sprintf(data, "cgx_rxstat%d: ", stats); 119 data += ETH_GSTRING_LEN; 120 } 121 122 for (stats = 0; stats < CGX_TX_STATS_COUNT; stats++) { 123 sprintf(data, "cgx_txstat%d: ", stats); 124 data += ETH_GSTRING_LEN; 125 } 126 127 strcpy(data, "reset_count"); 128 data += ETH_GSTRING_LEN; 129 } 130 131 static void otx2_get_qset_stats(struct otx2_nic *pfvf, 132 struct ethtool_stats *stats, u64 **data) 133 { 134 int stat, qidx; 135 136 if (!pfvf) 137 return; 138 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 139 if (!otx2_update_rq_stats(pfvf, qidx)) { 140 for (stat = 0; stat < otx2_n_queue_stats; stat++) 141 *((*data)++) = 0; 142 continue; 143 } 144 for (stat = 0; stat < otx2_n_queue_stats; stat++) 145 *((*data)++) = ((u64 *)&pfvf->qset.rq[qidx].stats) 146 [otx2_queue_stats[stat].index]; 147 } 148 149 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) { 150 if (!otx2_update_sq_stats(pfvf, qidx)) { 151 for (stat = 0; stat < otx2_n_queue_stats; stat++) 152 *((*data)++) = 0; 153 continue; 154 } 155 for (stat = 0; stat < otx2_n_queue_stats; stat++) 156 *((*data)++) = ((u64 *)&pfvf->qset.sq[qidx].stats) 157 [otx2_queue_stats[stat].index]; 158 } 159 } 160 161 /* Get device and per queue statistics */ 162 static void otx2_get_ethtool_stats(struct net_device *netdev, 163 struct ethtool_stats *stats, u64 *data) 164 { 165 struct otx2_nic *pfvf = netdev_priv(netdev); 166 int stat; 167 168 otx2_get_dev_stats(pfvf); 169 for (stat = 0; stat < otx2_n_dev_stats; stat++) 170 *(data++) = ((u64 *)&pfvf->hw.dev_stats) 171 [otx2_dev_stats[stat].index]; 172 173 for (stat = 0; stat < otx2_n_drv_stats; stat++) 174 *(data++) = atomic_read(&((atomic_t *)&pfvf->hw.drv_stats) 175 [otx2_drv_stats[stat].index]); 176 177 otx2_get_qset_stats(pfvf, stats, &data); 178 otx2_update_lmac_stats(pfvf); 179 for (stat = 0; stat < CGX_RX_STATS_COUNT; stat++) 180 *(data++) = pfvf->hw.cgx_rx_stats[stat]; 181 for (stat = 0; stat < CGX_TX_STATS_COUNT; stat++) 182 *(data++) = pfvf->hw.cgx_tx_stats[stat]; 183 *(data++) = pfvf->reset_count; 184 } 185 186 static int otx2_get_sset_count(struct net_device *netdev, int sset) 187 { 188 struct otx2_nic *pfvf = netdev_priv(netdev); 189 int qstats_count; 190 191 if (sset != ETH_SS_STATS) 192 return -EINVAL; 193 194 qstats_count = otx2_n_queue_stats * 195 (pfvf->hw.rx_queues + pfvf->hw.tx_queues); 196 197 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 198 CGX_RX_STATS_COUNT + CGX_TX_STATS_COUNT + 1; 199 } 200 201 /* Get no of queues device supports and current queue count */ 202 static void otx2_get_channels(struct net_device *dev, 203 struct ethtool_channels *channel) 204 { 205 struct otx2_nic *pfvf = netdev_priv(dev); 206 207 channel->max_rx = pfvf->hw.max_queues; 208 channel->max_tx = pfvf->hw.max_queues; 209 210 channel->rx_count = pfvf->hw.rx_queues; 211 channel->tx_count = pfvf->hw.tx_queues; 212 } 213 214 /* Set no of Tx, Rx queues to be used */ 215 static int otx2_set_channels(struct net_device *dev, 216 struct ethtool_channels *channel) 217 { 218 struct otx2_nic *pfvf = netdev_priv(dev); 219 bool if_up = netif_running(dev); 220 int err = 0; 221 222 if (!channel->rx_count || !channel->tx_count) 223 return -EINVAL; 224 225 if (if_up) 226 dev->netdev_ops->ndo_stop(dev); 227 228 err = otx2_set_real_num_queues(dev, channel->tx_count, 229 channel->rx_count); 230 if (err) 231 goto fail; 232 233 pfvf->hw.rx_queues = channel->rx_count; 234 pfvf->hw.tx_queues = channel->tx_count; 235 pfvf->qset.cq_cnt = pfvf->hw.tx_queues + pfvf->hw.rx_queues; 236 237 fail: 238 if (if_up) 239 dev->netdev_ops->ndo_open(dev); 240 241 netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n", 242 pfvf->hw.tx_queues, pfvf->hw.rx_queues); 243 244 return err; 245 } 246 247 static void otx2_get_pauseparam(struct net_device *netdev, 248 struct ethtool_pauseparam *pause) 249 { 250 struct otx2_nic *pfvf = netdev_priv(netdev); 251 struct cgx_pause_frm_cfg *req, *rsp; 252 253 if (is_otx2_lbkvf(pfvf->pdev)) 254 return; 255 256 req = otx2_mbox_alloc_msg_cgx_cfg_pause_frm(&pfvf->mbox); 257 if (!req) 258 return; 259 260 if (!otx2_sync_mbox_msg(&pfvf->mbox)) { 261 rsp = (struct cgx_pause_frm_cfg *) 262 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr); 263 pause->rx_pause = rsp->rx_pause; 264 pause->tx_pause = rsp->tx_pause; 265 } 266 } 267 268 static int otx2_set_pauseparam(struct net_device *netdev, 269 struct ethtool_pauseparam *pause) 270 { 271 struct otx2_nic *pfvf = netdev_priv(netdev); 272 273 if (pause->autoneg) 274 return -EOPNOTSUPP; 275 276 if (is_otx2_lbkvf(pfvf->pdev)) 277 return -EOPNOTSUPP; 278 279 if (pause->rx_pause) 280 pfvf->flags |= OTX2_FLAG_RX_PAUSE_ENABLED; 281 else 282 pfvf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED; 283 284 if (pause->tx_pause) 285 pfvf->flags |= OTX2_FLAG_TX_PAUSE_ENABLED; 286 else 287 pfvf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED; 288 289 return otx2_config_pause_frm(pfvf); 290 } 291 292 static void otx2_get_ringparam(struct net_device *netdev, 293 struct ethtool_ringparam *ring) 294 { 295 struct otx2_nic *pfvf = netdev_priv(netdev); 296 struct otx2_qset *qs = &pfvf->qset; 297 298 ring->rx_max_pending = Q_COUNT(Q_SIZE_MAX); 299 ring->rx_pending = qs->rqe_cnt ? qs->rqe_cnt : Q_COUNT(Q_SIZE_256); 300 ring->tx_max_pending = Q_COUNT(Q_SIZE_MAX); 301 ring->tx_pending = qs->sqe_cnt ? qs->sqe_cnt : Q_COUNT(Q_SIZE_4K); 302 } 303 304 static int otx2_set_ringparam(struct net_device *netdev, 305 struct ethtool_ringparam *ring) 306 { 307 struct otx2_nic *pfvf = netdev_priv(netdev); 308 bool if_up = netif_running(netdev); 309 struct otx2_qset *qs = &pfvf->qset; 310 u32 rx_count, tx_count; 311 312 if (ring->rx_mini_pending || ring->rx_jumbo_pending) 313 return -EINVAL; 314 315 /* Permitted lengths are 16 64 256 1K 4K 16K 64K 256K 1M */ 316 rx_count = ring->rx_pending; 317 /* On some silicon variants a skid or reserved CQEs are 318 * needed to avoid CQ overflow. 319 */ 320 if (rx_count < pfvf->hw.rq_skid) 321 rx_count = pfvf->hw.rq_skid; 322 rx_count = Q_COUNT(Q_SIZE(rx_count, 3)); 323 324 /* Due pipelining impact minimum 2000 unused SQ CQE's 325 * need to be maintained to avoid CQ overflow, hence the 326 * minimum 4K size. 327 */ 328 tx_count = clamp_t(u32, ring->tx_pending, 329 Q_COUNT(Q_SIZE_4K), Q_COUNT(Q_SIZE_MAX)); 330 tx_count = Q_COUNT(Q_SIZE(tx_count, 3)); 331 332 if (tx_count == qs->sqe_cnt && rx_count == qs->rqe_cnt) 333 return 0; 334 335 if (if_up) 336 netdev->netdev_ops->ndo_stop(netdev); 337 338 /* Assigned to the nearest possible exponent. */ 339 qs->sqe_cnt = tx_count; 340 qs->rqe_cnt = rx_count; 341 342 if (if_up) 343 netdev->netdev_ops->ndo_open(netdev); 344 345 return 0; 346 } 347 348 static int otx2_get_coalesce(struct net_device *netdev, 349 struct ethtool_coalesce *cmd) 350 { 351 struct otx2_nic *pfvf = netdev_priv(netdev); 352 struct otx2_hw *hw = &pfvf->hw; 353 354 cmd->rx_coalesce_usecs = hw->cq_time_wait; 355 cmd->rx_max_coalesced_frames = hw->cq_ecount_wait; 356 cmd->tx_coalesce_usecs = hw->cq_time_wait; 357 cmd->tx_max_coalesced_frames = hw->cq_ecount_wait; 358 359 return 0; 360 } 361 362 static int otx2_set_coalesce(struct net_device *netdev, 363 struct ethtool_coalesce *ec) 364 { 365 struct otx2_nic *pfvf = netdev_priv(netdev); 366 struct otx2_hw *hw = &pfvf->hw; 367 int qidx; 368 369 if (!ec->rx_max_coalesced_frames || !ec->tx_max_coalesced_frames) 370 return 0; 371 372 /* 'cq_time_wait' is 8bit and is in multiple of 100ns, 373 * so clamp the user given value to the range of 1 to 25usec. 374 */ 375 ec->rx_coalesce_usecs = clamp_t(u32, ec->rx_coalesce_usecs, 376 1, CQ_TIMER_THRESH_MAX); 377 ec->tx_coalesce_usecs = clamp_t(u32, ec->tx_coalesce_usecs, 378 1, CQ_TIMER_THRESH_MAX); 379 380 /* Rx and Tx are mapped to same CQ, check which one 381 * is changed, if both then choose the min. 382 */ 383 if (hw->cq_time_wait == ec->rx_coalesce_usecs) 384 hw->cq_time_wait = ec->tx_coalesce_usecs; 385 else if (hw->cq_time_wait == ec->tx_coalesce_usecs) 386 hw->cq_time_wait = ec->rx_coalesce_usecs; 387 else 388 hw->cq_time_wait = min_t(u8, ec->rx_coalesce_usecs, 389 ec->tx_coalesce_usecs); 390 391 /* Max ecount_wait supported is 16bit, 392 * so clamp the user given value to the range of 1 to 64k. 393 */ 394 ec->rx_max_coalesced_frames = clamp_t(u32, ec->rx_max_coalesced_frames, 395 1, U16_MAX); 396 ec->tx_max_coalesced_frames = clamp_t(u32, ec->tx_max_coalesced_frames, 397 1, U16_MAX); 398 399 /* Rx and Tx are mapped to same CQ, check which one 400 * is changed, if both then choose the min. 401 */ 402 if (hw->cq_ecount_wait == ec->rx_max_coalesced_frames) 403 hw->cq_ecount_wait = ec->tx_max_coalesced_frames; 404 else if (hw->cq_ecount_wait == ec->tx_max_coalesced_frames) 405 hw->cq_ecount_wait = ec->rx_max_coalesced_frames; 406 else 407 hw->cq_ecount_wait = min_t(u16, ec->rx_max_coalesced_frames, 408 ec->tx_max_coalesced_frames); 409 410 if (netif_running(netdev)) { 411 for (qidx = 0; qidx < pfvf->hw.cint_cnt; qidx++) 412 otx2_config_irq_coalescing(pfvf, qidx); 413 } 414 415 return 0; 416 } 417 418 static int otx2_get_rss_hash_opts(struct otx2_nic *pfvf, 419 struct ethtool_rxnfc *nfc) 420 { 421 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 422 423 if (!(rss->flowkey_cfg & 424 (NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6))) 425 return 0; 426 427 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 428 nfc->data = RXH_IP_SRC | RXH_IP_DST; 429 430 switch (nfc->flow_type) { 431 case TCP_V4_FLOW: 432 case TCP_V6_FLOW: 433 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_TCP) 434 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 435 break; 436 case UDP_V4_FLOW: 437 case UDP_V6_FLOW: 438 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_UDP) 439 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 440 break; 441 case SCTP_V4_FLOW: 442 case SCTP_V6_FLOW: 443 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_SCTP) 444 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 445 break; 446 case AH_ESP_V4_FLOW: 447 case AH_V4_FLOW: 448 case ESP_V4_FLOW: 449 case IPV4_FLOW: 450 case AH_ESP_V6_FLOW: 451 case AH_V6_FLOW: 452 case ESP_V6_FLOW: 453 case IPV6_FLOW: 454 break; 455 default: 456 return -EINVAL; 457 } 458 return 0; 459 } 460 461 static int otx2_set_rss_hash_opts(struct otx2_nic *pfvf, 462 struct ethtool_rxnfc *nfc) 463 { 464 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 465 u32 rxh_l4 = RXH_L4_B_0_1 | RXH_L4_B_2_3; 466 u32 rss_cfg = rss->flowkey_cfg; 467 468 if (!rss->enable) { 469 netdev_err(pfvf->netdev, 470 "RSS is disabled, cannot change settings\n"); 471 return -EIO; 472 } 473 474 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 475 if (!(nfc->data & RXH_IP_SRC) || !(nfc->data & RXH_IP_DST)) 476 return -EINVAL; 477 478 switch (nfc->flow_type) { 479 case TCP_V4_FLOW: 480 case TCP_V6_FLOW: 481 /* Different config for v4 and v6 is not supported. 482 * Both of them have to be either 4-tuple or 2-tuple. 483 */ 484 switch (nfc->data & rxh_l4) { 485 case 0: 486 rss_cfg &= ~NIX_FLOW_KEY_TYPE_TCP; 487 break; 488 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 489 rss_cfg |= NIX_FLOW_KEY_TYPE_TCP; 490 break; 491 default: 492 return -EINVAL; 493 } 494 break; 495 case UDP_V4_FLOW: 496 case UDP_V6_FLOW: 497 switch (nfc->data & rxh_l4) { 498 case 0: 499 rss_cfg &= ~NIX_FLOW_KEY_TYPE_UDP; 500 break; 501 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 502 rss_cfg |= NIX_FLOW_KEY_TYPE_UDP; 503 break; 504 default: 505 return -EINVAL; 506 } 507 break; 508 case SCTP_V4_FLOW: 509 case SCTP_V6_FLOW: 510 switch (nfc->data & rxh_l4) { 511 case 0: 512 rss_cfg &= ~NIX_FLOW_KEY_TYPE_SCTP; 513 break; 514 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 515 rss_cfg |= NIX_FLOW_KEY_TYPE_SCTP; 516 break; 517 default: 518 return -EINVAL; 519 } 520 break; 521 case IPV4_FLOW: 522 case IPV6_FLOW: 523 rss_cfg = NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6; 524 break; 525 default: 526 return -EINVAL; 527 } 528 529 rss->flowkey_cfg = rss_cfg; 530 otx2_set_flowkey_cfg(pfvf); 531 return 0; 532 } 533 534 static int otx2_get_rxnfc(struct net_device *dev, 535 struct ethtool_rxnfc *nfc, u32 *rules) 536 { 537 struct otx2_nic *pfvf = netdev_priv(dev); 538 int ret = -EOPNOTSUPP; 539 540 switch (nfc->cmd) { 541 case ETHTOOL_GRXRINGS: 542 nfc->data = pfvf->hw.rx_queues; 543 ret = 0; 544 break; 545 case ETHTOOL_GRXFH: 546 return otx2_get_rss_hash_opts(pfvf, nfc); 547 default: 548 break; 549 } 550 return ret; 551 } 552 553 static int otx2_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc) 554 { 555 struct otx2_nic *pfvf = netdev_priv(dev); 556 int ret = -EOPNOTSUPP; 557 558 switch (nfc->cmd) { 559 case ETHTOOL_SRXFH: 560 ret = otx2_set_rss_hash_opts(pfvf, nfc); 561 break; 562 default: 563 break; 564 } 565 566 return ret; 567 } 568 569 static u32 otx2_get_rxfh_key_size(struct net_device *netdev) 570 { 571 struct otx2_nic *pfvf = netdev_priv(netdev); 572 struct otx2_rss_info *rss; 573 574 rss = &pfvf->hw.rss_info; 575 576 return sizeof(rss->key); 577 } 578 579 static u32 otx2_get_rxfh_indir_size(struct net_device *dev) 580 { 581 struct otx2_nic *pfvf = netdev_priv(dev); 582 583 return pfvf->hw.rss_info.rss_size; 584 } 585 586 /* Get RSS configuration */ 587 static int otx2_get_rxfh(struct net_device *dev, u32 *indir, 588 u8 *hkey, u8 *hfunc) 589 { 590 struct otx2_nic *pfvf = netdev_priv(dev); 591 struct otx2_rss_info *rss; 592 int idx; 593 594 rss = &pfvf->hw.rss_info; 595 596 if (indir) { 597 for (idx = 0; idx < rss->rss_size; idx++) 598 indir[idx] = rss->ind_tbl[idx]; 599 } 600 601 if (hkey) 602 memcpy(hkey, rss->key, sizeof(rss->key)); 603 604 if (hfunc) 605 *hfunc = ETH_RSS_HASH_TOP; 606 607 return 0; 608 } 609 610 /* Configure RSS table and hash key */ 611 static int otx2_set_rxfh(struct net_device *dev, const u32 *indir, 612 const u8 *hkey, const u8 hfunc) 613 { 614 struct otx2_nic *pfvf = netdev_priv(dev); 615 struct otx2_rss_info *rss; 616 int idx; 617 618 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 619 return -EOPNOTSUPP; 620 621 rss = &pfvf->hw.rss_info; 622 623 if (!rss->enable) { 624 netdev_err(dev, "RSS is disabled, cannot change settings\n"); 625 return -EIO; 626 } 627 628 if (indir) { 629 for (idx = 0; idx < rss->rss_size; idx++) 630 rss->ind_tbl[idx] = indir[idx]; 631 } 632 633 if (hkey) { 634 memcpy(rss->key, hkey, sizeof(rss->key)); 635 otx2_set_rss_key(pfvf); 636 } 637 638 otx2_set_rss_table(pfvf); 639 return 0; 640 } 641 642 static u32 otx2_get_msglevel(struct net_device *netdev) 643 { 644 struct otx2_nic *pfvf = netdev_priv(netdev); 645 646 return pfvf->msg_enable; 647 } 648 649 static void otx2_set_msglevel(struct net_device *netdev, u32 val) 650 { 651 struct otx2_nic *pfvf = netdev_priv(netdev); 652 653 pfvf->msg_enable = val; 654 } 655 656 static u32 otx2_get_link(struct net_device *netdev) 657 { 658 struct otx2_nic *pfvf = netdev_priv(netdev); 659 660 /* LBK link is internal and always UP */ 661 if (is_otx2_lbkvf(pfvf->pdev)) 662 return 1; 663 return pfvf->linfo.link_up; 664 } 665 666 static const struct ethtool_ops otx2_ethtool_ops = { 667 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 668 ETHTOOL_COALESCE_MAX_FRAMES, 669 .get_link = otx2_get_link, 670 .get_drvinfo = otx2_get_drvinfo, 671 .get_strings = otx2_get_strings, 672 .get_ethtool_stats = otx2_get_ethtool_stats, 673 .get_sset_count = otx2_get_sset_count, 674 .set_channels = otx2_set_channels, 675 .get_channels = otx2_get_channels, 676 .get_ringparam = otx2_get_ringparam, 677 .set_ringparam = otx2_set_ringparam, 678 .get_coalesce = otx2_get_coalesce, 679 .set_coalesce = otx2_set_coalesce, 680 .get_rxnfc = otx2_get_rxnfc, 681 .set_rxnfc = otx2_set_rxnfc, 682 .get_rxfh_key_size = otx2_get_rxfh_key_size, 683 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 684 .get_rxfh = otx2_get_rxfh, 685 .set_rxfh = otx2_set_rxfh, 686 .get_msglevel = otx2_get_msglevel, 687 .set_msglevel = otx2_set_msglevel, 688 .get_pauseparam = otx2_get_pauseparam, 689 .set_pauseparam = otx2_set_pauseparam, 690 }; 691 692 void otx2_set_ethtool_ops(struct net_device *netdev) 693 { 694 netdev->ethtool_ops = &otx2_ethtool_ops; 695 } 696 697 /* VF's ethtool APIs */ 698 static void otx2vf_get_drvinfo(struct net_device *netdev, 699 struct ethtool_drvinfo *info) 700 { 701 struct otx2_nic *vf = netdev_priv(netdev); 702 703 strlcpy(info->driver, DRV_VF_NAME, sizeof(info->driver)); 704 strlcpy(info->bus_info, pci_name(vf->pdev), sizeof(info->bus_info)); 705 } 706 707 static void otx2vf_get_strings(struct net_device *netdev, u32 sset, u8 *data) 708 { 709 struct otx2_nic *vf = netdev_priv(netdev); 710 int stats; 711 712 if (sset != ETH_SS_STATS) 713 return; 714 715 for (stats = 0; stats < otx2_n_dev_stats; stats++) { 716 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN); 717 data += ETH_GSTRING_LEN; 718 } 719 720 for (stats = 0; stats < otx2_n_drv_stats; stats++) { 721 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN); 722 data += ETH_GSTRING_LEN; 723 } 724 725 otx2_get_qset_strings(vf, &data, 0); 726 727 strcpy(data, "reset_count"); 728 data += ETH_GSTRING_LEN; 729 } 730 731 static void otx2vf_get_ethtool_stats(struct net_device *netdev, 732 struct ethtool_stats *stats, u64 *data) 733 { 734 struct otx2_nic *vf = netdev_priv(netdev); 735 int stat; 736 737 otx2_get_dev_stats(vf); 738 for (stat = 0; stat < otx2_n_dev_stats; stat++) 739 *(data++) = ((u64 *)&vf->hw.dev_stats) 740 [otx2_dev_stats[stat].index]; 741 742 for (stat = 0; stat < otx2_n_drv_stats; stat++) 743 *(data++) = atomic_read(&((atomic_t *)&vf->hw.drv_stats) 744 [otx2_drv_stats[stat].index]); 745 746 otx2_get_qset_stats(vf, stats, &data); 747 *(data++) = vf->reset_count; 748 } 749 750 static int otx2vf_get_sset_count(struct net_device *netdev, int sset) 751 { 752 struct otx2_nic *vf = netdev_priv(netdev); 753 int qstats_count; 754 755 if (sset != ETH_SS_STATS) 756 return -EINVAL; 757 758 qstats_count = otx2_n_queue_stats * 759 (vf->hw.rx_queues + vf->hw.tx_queues); 760 761 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 1; 762 } 763 764 static const struct ethtool_ops otx2vf_ethtool_ops = { 765 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 766 ETHTOOL_COALESCE_MAX_FRAMES, 767 .get_link = otx2_get_link, 768 .get_drvinfo = otx2vf_get_drvinfo, 769 .get_strings = otx2vf_get_strings, 770 .get_ethtool_stats = otx2vf_get_ethtool_stats, 771 .get_sset_count = otx2vf_get_sset_count, 772 .set_channels = otx2_set_channels, 773 .get_channels = otx2_get_channels, 774 .get_rxnfc = otx2_get_rxnfc, 775 .set_rxnfc = otx2_set_rxnfc, 776 .get_rxfh_key_size = otx2_get_rxfh_key_size, 777 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 778 .get_rxfh = otx2_get_rxfh, 779 .set_rxfh = otx2_set_rxfh, 780 .get_ringparam = otx2_get_ringparam, 781 .set_ringparam = otx2_set_ringparam, 782 .get_coalesce = otx2_get_coalesce, 783 .set_coalesce = otx2_set_coalesce, 784 .get_msglevel = otx2_get_msglevel, 785 .set_msglevel = otx2_set_msglevel, 786 .get_pauseparam = otx2_get_pauseparam, 787 .set_pauseparam = otx2_set_pauseparam, 788 }; 789 790 void otx2vf_set_ethtool_ops(struct net_device *netdev) 791 { 792 netdev->ethtool_ops = &otx2vf_ethtool_ops; 793 } 794 EXPORT_SYMBOL(otx2vf_set_ethtool_ops); 795