1 // SPDX-License-Identifier: GPL-2.0
2 /* Marvell RVU Ethernet driver
3  *
4  * Copyright (C) 2021 Marvell.
5  *
6  */
7 
8 #include "otx2_common.h"
9 
10 int otx2_config_priority_flow_ctrl(struct otx2_nic *pfvf)
11 {
12 	struct cgx_pfc_cfg *req;
13 	struct cgx_pfc_rsp *rsp;
14 	int err = 0;
15 
16 	if (is_otx2_lbkvf(pfvf->pdev))
17 		return 0;
18 
19 	mutex_lock(&pfvf->mbox.lock);
20 	req = otx2_mbox_alloc_msg_cgx_prio_flow_ctrl_cfg(&pfvf->mbox);
21 	if (!req) {
22 		err = -ENOMEM;
23 		goto unlock;
24 	}
25 
26 	if (pfvf->pfc_en) {
27 		req->rx_pause = true;
28 		req->tx_pause = true;
29 	} else {
30 		req->rx_pause = false;
31 		req->tx_pause = false;
32 	}
33 	req->pfc_en = pfvf->pfc_en;
34 
35 	if (!otx2_sync_mbox_msg(&pfvf->mbox)) {
36 		rsp = (struct cgx_pfc_rsp *)
37 		       otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr);
38 		if (req->rx_pause != rsp->rx_pause || req->tx_pause != rsp->tx_pause) {
39 			dev_warn(pfvf->dev,
40 				 "Failed to config PFC\n");
41 			err = -EPERM;
42 		}
43 	}
44 unlock:
45 	mutex_unlock(&pfvf->mbox.lock);
46 	return err;
47 }
48 
49 void otx2_update_bpid_in_rqctx(struct otx2_nic *pfvf, int vlan_prio, int qidx,
50 			       bool pfc_enable)
51 {
52 	bool if_up = netif_running(pfvf->netdev);
53 	struct npa_aq_enq_req *npa_aq;
54 	struct nix_aq_enq_req *aq;
55 	int err = 0;
56 
57 	if (pfvf->queue_to_pfc_map[qidx] && pfc_enable) {
58 		dev_warn(pfvf->dev,
59 			 "PFC enable not permitted as Priority %d already mapped to Queue %d\n",
60 			 pfvf->queue_to_pfc_map[qidx], qidx);
61 		return;
62 	}
63 
64 	if (if_up) {
65 		netif_tx_stop_all_queues(pfvf->netdev);
66 		netif_carrier_off(pfvf->netdev);
67 	}
68 
69 	pfvf->queue_to_pfc_map[qidx] = vlan_prio;
70 
71 	aq = otx2_mbox_alloc_msg_nix_aq_enq(&pfvf->mbox);
72 	if (!aq) {
73 		err = -ENOMEM;
74 		goto out;
75 	}
76 
77 	aq->cq.bpid = pfvf->bpid[vlan_prio];
78 	aq->cq_mask.bpid = GENMASK(8, 0);
79 
80 	/* Fill AQ info */
81 	aq->qidx = qidx;
82 	aq->ctype = NIX_AQ_CTYPE_CQ;
83 	aq->op = NIX_AQ_INSTOP_WRITE;
84 
85 	otx2_sync_mbox_msg(&pfvf->mbox);
86 
87 	npa_aq = otx2_mbox_alloc_msg_npa_aq_enq(&pfvf->mbox);
88 	if (!npa_aq) {
89 		err = -ENOMEM;
90 		goto out;
91 	}
92 	npa_aq->aura.nix0_bpid = pfvf->bpid[vlan_prio];
93 	npa_aq->aura_mask.nix0_bpid = GENMASK(8, 0);
94 
95 	/* Fill NPA AQ info */
96 	npa_aq->aura_id = qidx;
97 	npa_aq->ctype = NPA_AQ_CTYPE_AURA;
98 	npa_aq->op = NPA_AQ_INSTOP_WRITE;
99 	otx2_sync_mbox_msg(&pfvf->mbox);
100 
101 out:
102 	if (if_up) {
103 		netif_carrier_on(pfvf->netdev);
104 		netif_tx_start_all_queues(pfvf->netdev);
105 	}
106 
107 	if (err)
108 		dev_warn(pfvf->dev,
109 			 "Updating BPIDs in CQ and Aura contexts of RQ%d failed with err %d\n",
110 			 qidx, err);
111 }
112 
113 static int otx2_dcbnl_ieee_getpfc(struct net_device *dev, struct ieee_pfc *pfc)
114 {
115 	struct otx2_nic *pfvf = netdev_priv(dev);
116 
117 	pfc->pfc_cap = IEEE_8021QAZ_MAX_TCS;
118 	pfc->pfc_en = pfvf->pfc_en;
119 
120 	return 0;
121 }
122 
123 static int otx2_dcbnl_ieee_setpfc(struct net_device *dev, struct ieee_pfc *pfc)
124 {
125 	struct otx2_nic *pfvf = netdev_priv(dev);
126 	int err;
127 
128 	/* Save PFC configuration to interface */
129 	pfvf->pfc_en = pfc->pfc_en;
130 
131 	err = otx2_config_priority_flow_ctrl(pfvf);
132 	if (err)
133 		return err;
134 
135 	/* Request Per channel Bpids */
136 	if (pfc->pfc_en)
137 		otx2_nix_config_bp(pfvf, true);
138 
139 	return 0;
140 }
141 
142 static u8 otx2_dcbnl_getdcbx(struct net_device __always_unused *dev)
143 {
144 	return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE;
145 }
146 
147 static u8 otx2_dcbnl_setdcbx(struct net_device __always_unused *dev, u8 mode)
148 {
149 	return (mode != (DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE)) ? 1 : 0;
150 }
151 
152 static const struct dcbnl_rtnl_ops otx2_dcbnl_ops = {
153 	.ieee_getpfc	= otx2_dcbnl_ieee_getpfc,
154 	.ieee_setpfc	= otx2_dcbnl_ieee_setpfc,
155 	.getdcbx	= otx2_dcbnl_getdcbx,
156 	.setdcbx	= otx2_dcbnl_setdcbx,
157 };
158 
159 int otx2_dcbnl_set_ops(struct net_device *dev)
160 {
161 	struct otx2_nic *pfvf = netdev_priv(dev);
162 
163 	pfvf->queue_to_pfc_map = devm_kzalloc(pfvf->dev, pfvf->hw.rx_queues,
164 					      GFP_KERNEL);
165 	if (!pfvf->queue_to_pfc_map)
166 		return -ENOMEM;
167 	dev->dcbnl_ops = &otx2_dcbnl_ops;
168 
169 	return 0;
170 }
171