191c6945eSHariprasad Kelam // SPDX-License-Identifier: GPL-2.0
2c7cd6c5aSSunil Goutham /* Marvell CN10K RPM driver
391c6945eSHariprasad Kelam *
491c6945eSHariprasad Kelam * Copyright (C) 2020 Marvell.
591c6945eSHariprasad Kelam *
691c6945eSHariprasad Kelam */
791c6945eSHariprasad Kelam
891c6945eSHariprasad Kelam #include "cgx.h"
991c6945eSHariprasad Kelam #include "lmac_common.h"
1091c6945eSHariprasad Kelam
1191c6945eSHariprasad Kelam static struct mac_ops rpm_mac_ops = {
1291c6945eSHariprasad Kelam .name = "rpm",
1391c6945eSHariprasad Kelam .csr_offset = 0x4e00,
1491c6945eSHariprasad Kelam .lmac_offset = 20,
1591c6945eSHariprasad Kelam .int_register = RPMX_CMRX_SW_INT,
1691c6945eSHariprasad Kelam .int_set_reg = RPMX_CMRX_SW_INT_ENA_W1S,
1791c6945eSHariprasad Kelam .irq_offset = 1,
1891c6945eSHariprasad Kelam .int_ena_bit = BIT_ULL(0),
1991c6945eSHariprasad Kelam .lmac_fwi = RPM_LMAC_FWI,
2091c6945eSHariprasad Kelam .non_contiguous_serdes_lane = true,
21ce7a6c31SHariprasad Kelam .rx_stats_cnt = 43,
22ce7a6c31SHariprasad Kelam .tx_stats_cnt = 34,
23b9d0fedcSHariprasad Kelam .dmac_filter_count = 32,
2491c6945eSHariprasad Kelam .get_nr_lmacs = rpm_get_nr_lmacs,
253ad3f8f9SHariprasad Kelam .get_lmac_type = rpm_get_lmac_type,
26459f326eSSunil Goutham .lmac_fifo_len = rpm_get_lmac_fifo_len,
273ad3f8f9SHariprasad Kelam .mac_lmac_intl_lbk = rpm_lmac_internal_loopback,
28ce7a6c31SHariprasad Kelam .mac_get_rx_stats = rpm_get_rx_stats,
29ce7a6c31SHariprasad Kelam .mac_get_tx_stats = rpm_get_tx_stats,
3084ad3642SHariprasad Kelam .get_fec_stats = rpm_get_fec_stats,
311845ada4SRakesh Babu .mac_enadis_rx_pause_fwding = rpm_lmac_enadis_rx_pause_fwding,
321845ada4SRakesh Babu .mac_get_pause_frm_status = rpm_lmac_get_pause_frm_status,
331845ada4SRakesh Babu .mac_enadis_pause_frm = rpm_lmac_enadis_pause_frm,
341845ada4SRakesh Babu .mac_pause_frm_config = rpm_lmac_pause_frm_config,
35d1489208SHariprasad Kelam .mac_enadis_ptp_config = rpm_lmac_ptp_config,
36fae80edeSGeetha sowjanya .mac_rx_tx_enable = rpm_lmac_rx_tx_enable,
37fae80edeSGeetha sowjanya .mac_tx_enable = rpm_lmac_tx_enable,
381121f6b0SSunil Kumar Kori .pfc_config = rpm_lmac_pfc_config,
39e7400038SHariprasad Kelam .mac_get_pfc_frm_cfg = rpm_lmac_get_pfc_frm_cfg,
402e3e94c2SHariprasad Kelam .mac_reset = rpm_lmac_reset,
4191c6945eSHariprasad Kelam };
4291c6945eSHariprasad Kelam
43b9d0fedcSHariprasad Kelam static struct mac_ops rpm2_mac_ops = {
44b9d0fedcSHariprasad Kelam .name = "rpm",
45b9d0fedcSHariprasad Kelam .csr_offset = RPM2_CSR_OFFSET,
46b9d0fedcSHariprasad Kelam .lmac_offset = 20,
47b9d0fedcSHariprasad Kelam .int_register = RPM2_CMRX_SW_INT,
48b9d0fedcSHariprasad Kelam .int_set_reg = RPM2_CMRX_SW_INT_ENA_W1S,
49b9d0fedcSHariprasad Kelam .irq_offset = 1,
50b9d0fedcSHariprasad Kelam .int_ena_bit = BIT_ULL(0),
514c5a331cSHariprasad Kelam .lmac_fwi = RPM2_LMAC_FWI,
52b9d0fedcSHariprasad Kelam .non_contiguous_serdes_lane = true,
53b9d0fedcSHariprasad Kelam .rx_stats_cnt = 43,
54b9d0fedcSHariprasad Kelam .tx_stats_cnt = 34,
55b9d0fedcSHariprasad Kelam .dmac_filter_count = 64,
56b9d0fedcSHariprasad Kelam .get_nr_lmacs = rpm2_get_nr_lmacs,
57b9d0fedcSHariprasad Kelam .get_lmac_type = rpm_get_lmac_type,
58b9d0fedcSHariprasad Kelam .lmac_fifo_len = rpm2_get_lmac_fifo_len,
59b9d0fedcSHariprasad Kelam .mac_lmac_intl_lbk = rpm_lmac_internal_loopback,
60b9d0fedcSHariprasad Kelam .mac_get_rx_stats = rpm_get_rx_stats,
61b9d0fedcSHariprasad Kelam .mac_get_tx_stats = rpm_get_tx_stats,
6284ad3642SHariprasad Kelam .get_fec_stats = rpm_get_fec_stats,
63b9d0fedcSHariprasad Kelam .mac_enadis_rx_pause_fwding = rpm_lmac_enadis_rx_pause_fwding,
64b9d0fedcSHariprasad Kelam .mac_get_pause_frm_status = rpm_lmac_get_pause_frm_status,
65b9d0fedcSHariprasad Kelam .mac_enadis_pause_frm = rpm_lmac_enadis_pause_frm,
66b9d0fedcSHariprasad Kelam .mac_pause_frm_config = rpm_lmac_pause_frm_config,
67b9d0fedcSHariprasad Kelam .mac_enadis_ptp_config = rpm_lmac_ptp_config,
68b9d0fedcSHariprasad Kelam .mac_rx_tx_enable = rpm_lmac_rx_tx_enable,
69b9d0fedcSHariprasad Kelam .mac_tx_enable = rpm_lmac_tx_enable,
70b9d0fedcSHariprasad Kelam .pfc_config = rpm_lmac_pfc_config,
71b9d0fedcSHariprasad Kelam .mac_get_pfc_frm_cfg = rpm_lmac_get_pfc_frm_cfg,
722e3e94c2SHariprasad Kelam .mac_reset = rpm_lmac_reset,
73b9d0fedcSHariprasad Kelam };
74b9d0fedcSHariprasad Kelam
is_dev_rpm2(void * rpmd)75b9d0fedcSHariprasad Kelam bool is_dev_rpm2(void *rpmd)
7691c6945eSHariprasad Kelam {
77b9d0fedcSHariprasad Kelam rpm_t *rpm = rpmd;
78b9d0fedcSHariprasad Kelam
79b9d0fedcSHariprasad Kelam return (rpm->pdev->device == PCI_DEVID_CN10KB_RPM);
80b9d0fedcSHariprasad Kelam }
81b9d0fedcSHariprasad Kelam
rpm_get_mac_ops(rpm_t * rpm)82b9d0fedcSHariprasad Kelam struct mac_ops *rpm_get_mac_ops(rpm_t *rpm)
83b9d0fedcSHariprasad Kelam {
84b9d0fedcSHariprasad Kelam if (is_dev_rpm2(rpm))
85b9d0fedcSHariprasad Kelam return &rpm2_mac_ops;
86b9d0fedcSHariprasad Kelam else
8791c6945eSHariprasad Kelam return &rpm_mac_ops;
8891c6945eSHariprasad Kelam }
8991c6945eSHariprasad Kelam
rpm_write(rpm_t * rpm,u64 lmac,u64 offset,u64 val)901845ada4SRakesh Babu static void rpm_write(rpm_t *rpm, u64 lmac, u64 offset, u64 val)
911845ada4SRakesh Babu {
921845ada4SRakesh Babu cgx_write(rpm, lmac, offset, val);
931845ada4SRakesh Babu }
941845ada4SRakesh Babu
rpm_read(rpm_t * rpm,u64 lmac,u64 offset)9591c6945eSHariprasad Kelam static u64 rpm_read(rpm_t *rpm, u64 lmac, u64 offset)
9691c6945eSHariprasad Kelam {
9791c6945eSHariprasad Kelam return cgx_read(rpm, lmac, offset);
9891c6945eSHariprasad Kelam }
9991c6945eSHariprasad Kelam
100b9d0fedcSHariprasad Kelam /* Read HW major version to determine RPM
101b9d0fedcSHariprasad Kelam * MAC type 100/USX
102b9d0fedcSHariprasad Kelam */
is_mac_rpmusx(void * rpmd)103b9d0fedcSHariprasad Kelam static bool is_mac_rpmusx(void *rpmd)
104b9d0fedcSHariprasad Kelam {
105b9d0fedcSHariprasad Kelam rpm_t *rpm = rpmd;
106b9d0fedcSHariprasad Kelam
107b9d0fedcSHariprasad Kelam return rpm_read(rpm, 0, RPMX_CONST1) & 0x700ULL;
108b9d0fedcSHariprasad Kelam }
109b9d0fedcSHariprasad Kelam
rpm_get_nr_lmacs(void * rpmd)11091c6945eSHariprasad Kelam int rpm_get_nr_lmacs(void *rpmd)
11191c6945eSHariprasad Kelam {
11291c6945eSHariprasad Kelam rpm_t *rpm = rpmd;
11391c6945eSHariprasad Kelam
11491c6945eSHariprasad Kelam return hweight8(rpm_read(rpm, 0, CGXX_CMRX_RX_LMACS) & 0xFULL);
11591c6945eSHariprasad Kelam }
1161845ada4SRakesh Babu
rpm2_get_nr_lmacs(void * rpmd)117b9d0fedcSHariprasad Kelam int rpm2_get_nr_lmacs(void *rpmd)
118b9d0fedcSHariprasad Kelam {
119b9d0fedcSHariprasad Kelam rpm_t *rpm = rpmd;
120b9d0fedcSHariprasad Kelam
121b9d0fedcSHariprasad Kelam return hweight8(rpm_read(rpm, 0, RPM2_CMRX_RX_LMACS) & 0xFFULL);
122b9d0fedcSHariprasad Kelam }
123b9d0fedcSHariprasad Kelam
rpm_lmac_tx_enable(void * rpmd,int lmac_id,bool enable)124fae80edeSGeetha sowjanya int rpm_lmac_tx_enable(void *rpmd, int lmac_id, bool enable)
125fae80edeSGeetha sowjanya {
126fae80edeSGeetha sowjanya rpm_t *rpm = rpmd;
127fae80edeSGeetha sowjanya u64 cfg, last;
128fae80edeSGeetha sowjanya
129fae80edeSGeetha sowjanya if (!is_lmac_valid(rpm, lmac_id))
130fae80edeSGeetha sowjanya return -ENODEV;
131fae80edeSGeetha sowjanya
132fae80edeSGeetha sowjanya cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
133fae80edeSGeetha sowjanya last = cfg;
134fae80edeSGeetha sowjanya if (enable)
135fae80edeSGeetha sowjanya cfg |= RPM_TX_EN;
136fae80edeSGeetha sowjanya else
137fae80edeSGeetha sowjanya cfg &= ~(RPM_TX_EN);
138fae80edeSGeetha sowjanya
139fae80edeSGeetha sowjanya if (cfg != last)
140fae80edeSGeetha sowjanya rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
141fae80edeSGeetha sowjanya return !!(last & RPM_TX_EN);
142fae80edeSGeetha sowjanya }
143fae80edeSGeetha sowjanya
rpm_lmac_rx_tx_enable(void * rpmd,int lmac_id,bool enable)144fae80edeSGeetha sowjanya int rpm_lmac_rx_tx_enable(void *rpmd, int lmac_id, bool enable)
145fae80edeSGeetha sowjanya {
146fae80edeSGeetha sowjanya rpm_t *rpm = rpmd;
147fae80edeSGeetha sowjanya u64 cfg;
148fae80edeSGeetha sowjanya
149fae80edeSGeetha sowjanya if (!is_lmac_valid(rpm, lmac_id))
150fae80edeSGeetha sowjanya return -ENODEV;
151fae80edeSGeetha sowjanya
152fae80edeSGeetha sowjanya cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
153fae80edeSGeetha sowjanya if (enable)
154fae80edeSGeetha sowjanya cfg |= RPM_RX_EN | RPM_TX_EN;
155fae80edeSGeetha sowjanya else
156fae80edeSGeetha sowjanya cfg &= ~(RPM_RX_EN | RPM_TX_EN);
157fae80edeSGeetha sowjanya rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
158fae80edeSGeetha sowjanya return 0;
159fae80edeSGeetha sowjanya }
160fae80edeSGeetha sowjanya
rpm_lmac_enadis_rx_pause_fwding(void * rpmd,int lmac_id,bool enable)1611845ada4SRakesh Babu void rpm_lmac_enadis_rx_pause_fwding(void *rpmd, int lmac_id, bool enable)
1621845ada4SRakesh Babu {
163ce7a6c31SHariprasad Kelam rpm_t *rpm = rpmd;
164e7400038SHariprasad Kelam struct lmac *lmac;
1651845ada4SRakesh Babu u64 cfg;
1661845ada4SRakesh Babu
1671845ada4SRakesh Babu if (!rpm)
1681845ada4SRakesh Babu return;
1691845ada4SRakesh Babu
170e7400038SHariprasad Kelam lmac = lmac_pdata(lmac_id, rpm);
171e7400038SHariprasad Kelam if (!lmac)
172e7400038SHariprasad Kelam return;
173e7400038SHariprasad Kelam
174e7400038SHariprasad Kelam /* Pause frames are not enabled just return */
175e7400038SHariprasad Kelam if (!bitmap_weight(lmac->rx_fc_pfvf_bmap.bmap, lmac->rx_fc_pfvf_bmap.max))
176e7400038SHariprasad Kelam return;
177e7400038SHariprasad Kelam
1781845ada4SRakesh Babu if (enable) {
1791845ada4SRakesh Babu cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
1801845ada4SRakesh Babu cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
1811845ada4SRakesh Babu rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
1821845ada4SRakesh Babu } else {
1831845ada4SRakesh Babu cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
1841845ada4SRakesh Babu cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
1851845ada4SRakesh Babu rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
1861845ada4SRakesh Babu }
1871845ada4SRakesh Babu }
1881845ada4SRakesh Babu
rpm_lmac_get_pause_frm_status(void * rpmd,int lmac_id,u8 * tx_pause,u8 * rx_pause)1891845ada4SRakesh Babu int rpm_lmac_get_pause_frm_status(void *rpmd, int lmac_id,
1901845ada4SRakesh Babu u8 *tx_pause, u8 *rx_pause)
1911845ada4SRakesh Babu {
1921845ada4SRakesh Babu rpm_t *rpm = rpmd;
1931845ada4SRakesh Babu u64 cfg;
1941845ada4SRakesh Babu
1951845ada4SRakesh Babu if (!is_lmac_valid(rpm, lmac_id))
1961845ada4SRakesh Babu return -ENODEV;
1971845ada4SRakesh Babu
1981845ada4SRakesh Babu cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
199e7400038SHariprasad Kelam if (!(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_PFC_MODE)) {
2001845ada4SRakesh Babu *rx_pause = !(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE);
2011845ada4SRakesh Babu *tx_pause = !(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE);
202e7400038SHariprasad Kelam }
203e7400038SHariprasad Kelam
2041845ada4SRakesh Babu return 0;
2051845ada4SRakesh Babu }
2061845ada4SRakesh Babu
rpm_cfg_pfc_quanta_thresh(rpm_t * rpm,int lmac_id,unsigned long pfc_en,bool enable)2075f7dc7d4SHariprasad Kelam static void rpm_cfg_pfc_quanta_thresh(rpm_t *rpm, int lmac_id,
2085f7dc7d4SHariprasad Kelam unsigned long pfc_en,
2091121f6b0SSunil Kumar Kori bool enable)
2101121f6b0SSunil Kumar Kori {
2111121f6b0SSunil Kumar Kori u64 quanta_offset = 0, quanta_thresh = 0, cfg;
2121121f6b0SSunil Kumar Kori int i, shift;
2131121f6b0SSunil Kumar Kori
2141121f6b0SSunil Kumar Kori /* Set pause time and interval */
2155f7dc7d4SHariprasad Kelam for_each_set_bit(i, &pfc_en, 16) {
2161121f6b0SSunil Kumar Kori switch (i) {
2171121f6b0SSunil Kumar Kori case 0:
2181121f6b0SSunil Kumar Kori case 1:
2191121f6b0SSunil Kumar Kori quanta_offset = RPMX_MTI_MAC100X_CL01_PAUSE_QUANTA;
2201121f6b0SSunil Kumar Kori quanta_thresh = RPMX_MTI_MAC100X_CL01_QUANTA_THRESH;
2211121f6b0SSunil Kumar Kori break;
2221121f6b0SSunil Kumar Kori case 2:
2231121f6b0SSunil Kumar Kori case 3:
2241121f6b0SSunil Kumar Kori quanta_offset = RPMX_MTI_MAC100X_CL23_PAUSE_QUANTA;
2251121f6b0SSunil Kumar Kori quanta_thresh = RPMX_MTI_MAC100X_CL23_QUANTA_THRESH;
2261121f6b0SSunil Kumar Kori break;
2271121f6b0SSunil Kumar Kori case 4:
2281121f6b0SSunil Kumar Kori case 5:
2291121f6b0SSunil Kumar Kori quanta_offset = RPMX_MTI_MAC100X_CL45_PAUSE_QUANTA;
2301121f6b0SSunil Kumar Kori quanta_thresh = RPMX_MTI_MAC100X_CL45_QUANTA_THRESH;
2311121f6b0SSunil Kumar Kori break;
2321121f6b0SSunil Kumar Kori case 6:
2331121f6b0SSunil Kumar Kori case 7:
2341121f6b0SSunil Kumar Kori quanta_offset = RPMX_MTI_MAC100X_CL67_PAUSE_QUANTA;
2351121f6b0SSunil Kumar Kori quanta_thresh = RPMX_MTI_MAC100X_CL67_QUANTA_THRESH;
2361121f6b0SSunil Kumar Kori break;
2371121f6b0SSunil Kumar Kori case 8:
2381121f6b0SSunil Kumar Kori case 9:
2391121f6b0SSunil Kumar Kori quanta_offset = RPMX_MTI_MAC100X_CL89_PAUSE_QUANTA;
2401121f6b0SSunil Kumar Kori quanta_thresh = RPMX_MTI_MAC100X_CL89_QUANTA_THRESH;
2411121f6b0SSunil Kumar Kori break;
2421121f6b0SSunil Kumar Kori case 10:
2431121f6b0SSunil Kumar Kori case 11:
2441121f6b0SSunil Kumar Kori quanta_offset = RPMX_MTI_MAC100X_CL1011_PAUSE_QUANTA;
2451121f6b0SSunil Kumar Kori quanta_thresh = RPMX_MTI_MAC100X_CL1011_QUANTA_THRESH;
2461121f6b0SSunil Kumar Kori break;
2471121f6b0SSunil Kumar Kori case 12:
2481121f6b0SSunil Kumar Kori case 13:
2491121f6b0SSunil Kumar Kori quanta_offset = RPMX_MTI_MAC100X_CL1213_PAUSE_QUANTA;
2501121f6b0SSunil Kumar Kori quanta_thresh = RPMX_MTI_MAC100X_CL1213_QUANTA_THRESH;
2511121f6b0SSunil Kumar Kori break;
2521121f6b0SSunil Kumar Kori case 14:
2531121f6b0SSunil Kumar Kori case 15:
2541121f6b0SSunil Kumar Kori quanta_offset = RPMX_MTI_MAC100X_CL1415_PAUSE_QUANTA;
2551121f6b0SSunil Kumar Kori quanta_thresh = RPMX_MTI_MAC100X_CL1415_QUANTA_THRESH;
2561121f6b0SSunil Kumar Kori break;
2571121f6b0SSunil Kumar Kori }
2581121f6b0SSunil Kumar Kori
2591121f6b0SSunil Kumar Kori if (!quanta_offset || !quanta_thresh)
2601121f6b0SSunil Kumar Kori continue;
2611121f6b0SSunil Kumar Kori
2621121f6b0SSunil Kumar Kori shift = (i % 2) ? 1 : 0;
2631121f6b0SSunil Kumar Kori cfg = rpm_read(rpm, lmac_id, quanta_offset);
2641121f6b0SSunil Kumar Kori if (enable) {
2651121f6b0SSunil Kumar Kori cfg |= ((u64)RPM_DEFAULT_PAUSE_TIME << shift * 16);
2661121f6b0SSunil Kumar Kori } else {
2671121f6b0SSunil Kumar Kori if (!shift)
2681121f6b0SSunil Kumar Kori cfg &= ~GENMASK_ULL(15, 0);
2691121f6b0SSunil Kumar Kori else
2701121f6b0SSunil Kumar Kori cfg &= ~GENMASK_ULL(31, 16);
2711121f6b0SSunil Kumar Kori }
2721121f6b0SSunil Kumar Kori rpm_write(rpm, lmac_id, quanta_offset, cfg);
2731121f6b0SSunil Kumar Kori
2741121f6b0SSunil Kumar Kori cfg = rpm_read(rpm, lmac_id, quanta_thresh);
2751121f6b0SSunil Kumar Kori if (enable) {
2761121f6b0SSunil Kumar Kori cfg |= ((u64)(RPM_DEFAULT_PAUSE_TIME / 2) << shift * 16);
2771121f6b0SSunil Kumar Kori } else {
2781121f6b0SSunil Kumar Kori if (!shift)
2791121f6b0SSunil Kumar Kori cfg &= ~GENMASK_ULL(15, 0);
2801121f6b0SSunil Kumar Kori else
2811121f6b0SSunil Kumar Kori cfg &= ~GENMASK_ULL(31, 16);
2821121f6b0SSunil Kumar Kori }
2831121f6b0SSunil Kumar Kori rpm_write(rpm, lmac_id, quanta_thresh, cfg);
2841121f6b0SSunil Kumar Kori }
2851121f6b0SSunil Kumar Kori }
2861121f6b0SSunil Kumar Kori
rpm2_lmac_cfg_bp(rpm_t * rpm,int lmac_id,u8 tx_pause,u8 rx_pause)287b9d0fedcSHariprasad Kelam static void rpm2_lmac_cfg_bp(rpm_t *rpm, int lmac_id, u8 tx_pause, u8 rx_pause)
288b9d0fedcSHariprasad Kelam {
289b9d0fedcSHariprasad Kelam u64 cfg;
290b9d0fedcSHariprasad Kelam
291b9d0fedcSHariprasad Kelam cfg = rpm_read(rpm, lmac_id, RPM2_CMR_RX_OVR_BP);
292b9d0fedcSHariprasad Kelam if (tx_pause) {
293b9d0fedcSHariprasad Kelam /* Configure CL0 Pause Quanta & threshold
294b9d0fedcSHariprasad Kelam * for 802.3X frames
295b9d0fedcSHariprasad Kelam */
296b9d0fedcSHariprasad Kelam rpm_cfg_pfc_quanta_thresh(rpm, lmac_id, 1, true);
297b9d0fedcSHariprasad Kelam cfg &= ~RPM2_CMR_RX_OVR_BP_EN;
298b9d0fedcSHariprasad Kelam } else {
299b9d0fedcSHariprasad Kelam /* Disable all Pause Quanta & threshold values */
300b9d0fedcSHariprasad Kelam rpm_cfg_pfc_quanta_thresh(rpm, lmac_id, 0xffff, false);
301b9d0fedcSHariprasad Kelam cfg |= RPM2_CMR_RX_OVR_BP_EN;
302b9d0fedcSHariprasad Kelam cfg &= ~RPM2_CMR_RX_OVR_BP_BP;
303b9d0fedcSHariprasad Kelam }
304b9d0fedcSHariprasad Kelam rpm_write(rpm, lmac_id, RPM2_CMR_RX_OVR_BP, cfg);
305b9d0fedcSHariprasad Kelam }
306b9d0fedcSHariprasad Kelam
rpm_lmac_cfg_bp(rpm_t * rpm,int lmac_id,u8 tx_pause,u8 rx_pause)307b9d0fedcSHariprasad Kelam static void rpm_lmac_cfg_bp(rpm_t *rpm, int lmac_id, u8 tx_pause, u8 rx_pause)
308b9d0fedcSHariprasad Kelam {
309b9d0fedcSHariprasad Kelam u64 cfg;
310b9d0fedcSHariprasad Kelam
311b9d0fedcSHariprasad Kelam cfg = rpm_read(rpm, 0, RPMX_CMR_RX_OVR_BP);
312b9d0fedcSHariprasad Kelam if (tx_pause) {
313b9d0fedcSHariprasad Kelam /* Configure CL0 Pause Quanta & threshold for
314b9d0fedcSHariprasad Kelam * 802.3X frames
315b9d0fedcSHariprasad Kelam */
316b9d0fedcSHariprasad Kelam rpm_cfg_pfc_quanta_thresh(rpm, lmac_id, 1, true);
317b9d0fedcSHariprasad Kelam cfg &= ~RPMX_CMR_RX_OVR_BP_EN(lmac_id);
318b9d0fedcSHariprasad Kelam } else {
319b9d0fedcSHariprasad Kelam /* Disable all Pause Quanta & threshold values */
320b9d0fedcSHariprasad Kelam rpm_cfg_pfc_quanta_thresh(rpm, lmac_id, 0xffff, false);
321b9d0fedcSHariprasad Kelam cfg |= RPMX_CMR_RX_OVR_BP_EN(lmac_id);
322b9d0fedcSHariprasad Kelam cfg &= ~RPMX_CMR_RX_OVR_BP_BP(lmac_id);
323b9d0fedcSHariprasad Kelam }
324b9d0fedcSHariprasad Kelam rpm_write(rpm, 0, RPMX_CMR_RX_OVR_BP, cfg);
325b9d0fedcSHariprasad Kelam }
326b9d0fedcSHariprasad Kelam
rpm_lmac_enadis_pause_frm(void * rpmd,int lmac_id,u8 tx_pause,u8 rx_pause)3271845ada4SRakesh Babu int rpm_lmac_enadis_pause_frm(void *rpmd, int lmac_id, u8 tx_pause,
3281845ada4SRakesh Babu u8 rx_pause)
3291845ada4SRakesh Babu {
3301845ada4SRakesh Babu rpm_t *rpm = rpmd;
3311845ada4SRakesh Babu u64 cfg;
3321845ada4SRakesh Babu
3331845ada4SRakesh Babu if (!is_lmac_valid(rpm, lmac_id))
3341845ada4SRakesh Babu return -ENODEV;
3351845ada4SRakesh Babu
3361845ada4SRakesh Babu cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
3371845ada4SRakesh Babu cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE;
3381845ada4SRakesh Babu cfg |= rx_pause ? 0x0 : RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE;
3391845ada4SRakesh Babu cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
3401845ada4SRakesh Babu cfg |= rx_pause ? 0x0 : RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
3411845ada4SRakesh Babu rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
3421845ada4SRakesh Babu
3431845ada4SRakesh Babu cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
3441845ada4SRakesh Babu cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;
3451845ada4SRakesh Babu cfg |= tx_pause ? 0x0 : RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;
3461845ada4SRakesh Babu rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
3471845ada4SRakesh Babu
348b9d0fedcSHariprasad Kelam if (is_dev_rpm2(rpm))
349b9d0fedcSHariprasad Kelam rpm2_lmac_cfg_bp(rpm, lmac_id, tx_pause, rx_pause);
350b9d0fedcSHariprasad Kelam else
351b9d0fedcSHariprasad Kelam rpm_lmac_cfg_bp(rpm, lmac_id, tx_pause, rx_pause);
352b9d0fedcSHariprasad Kelam
3531845ada4SRakesh Babu return 0;
3541845ada4SRakesh Babu }
3551845ada4SRakesh Babu
rpm_lmac_pause_frm_config(void * rpmd,int lmac_id,bool enable)3561845ada4SRakesh Babu void rpm_lmac_pause_frm_config(void *rpmd, int lmac_id, bool enable)
3571845ada4SRakesh Babu {
35847bcc9c1SHariprasad Kelam u64 cfg, pfc_class_mask_cfg;
3591845ada4SRakesh Babu rpm_t *rpm = rpmd;
3601845ada4SRakesh Babu
3611845ada4SRakesh Babu /* ALL pause frames received are completely ignored */
3621845ada4SRakesh Babu cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
3631845ada4SRakesh Babu cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE;
3641845ada4SRakesh Babu rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
3651845ada4SRakesh Babu
3661845ada4SRakesh Babu /* Disable forward pause to TX block */
3671845ada4SRakesh Babu cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
3681845ada4SRakesh Babu cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
3691845ada4SRakesh Babu rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
3701845ada4SRakesh Babu
3711845ada4SRakesh Babu /* Disable pause frames transmission */
3721845ada4SRakesh Babu cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
3731845ada4SRakesh Babu cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;
3741845ada4SRakesh Babu rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
3758e151457SHariprasad Kelam
376f115b31dSHariprasad Kelam /* Disable forward pause to driver */
377f115b31dSHariprasad Kelam cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
378f115b31dSHariprasad Kelam cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_FWD;
379f115b31dSHariprasad Kelam rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
380f115b31dSHariprasad Kelam
381b9d0fedcSHariprasad Kelam /* Enable channel mask for all LMACS */
382b9d0fedcSHariprasad Kelam if (is_dev_rpm2(rpm))
383b9d0fedcSHariprasad Kelam rpm_write(rpm, lmac_id, RPM2_CMR_CHAN_MSK_OR, 0xffff);
384b9d0fedcSHariprasad Kelam else
385b9d0fedcSHariprasad Kelam rpm_write(rpm, 0, RPMX_CMR_CHAN_MSK_OR, ~0ULL);
386b9d0fedcSHariprasad Kelam
3878e151457SHariprasad Kelam /* Disable all PFC classes */
38847bcc9c1SHariprasad Kelam pfc_class_mask_cfg = is_dev_rpm2(rpm) ? RPM2_CMRX_PRT_CBFC_CTL :
38947bcc9c1SHariprasad Kelam RPMX_CMRX_PRT_CBFC_CTL;
39047bcc9c1SHariprasad Kelam cfg = rpm_read(rpm, lmac_id, pfc_class_mask_cfg);
3918e151457SHariprasad Kelam cfg = FIELD_SET(RPM_PFC_CLASS_MASK, 0, cfg);
39247bcc9c1SHariprasad Kelam rpm_write(rpm, lmac_id, pfc_class_mask_cfg, cfg);
3931845ada4SRakesh Babu }
394ce7a6c31SHariprasad Kelam
rpm_get_rx_stats(void * rpmd,int lmac_id,int idx,u64 * rx_stat)395ce7a6c31SHariprasad Kelam int rpm_get_rx_stats(void *rpmd, int lmac_id, int idx, u64 *rx_stat)
396ce7a6c31SHariprasad Kelam {
397ce7a6c31SHariprasad Kelam rpm_t *rpm = rpmd;
398ce7a6c31SHariprasad Kelam u64 val_lo, val_hi;
399ce7a6c31SHariprasad Kelam
400b9d0fedcSHariprasad Kelam if (!is_lmac_valid(rpm, lmac_id))
401ce7a6c31SHariprasad Kelam return -ENODEV;
402ce7a6c31SHariprasad Kelam
403ce7a6c31SHariprasad Kelam mutex_lock(&rpm->lock);
404ce7a6c31SHariprasad Kelam
405ce7a6c31SHariprasad Kelam /* Update idx to point per lmac Rx statistics page */
406ce7a6c31SHariprasad Kelam idx += lmac_id * rpm->mac_ops->rx_stats_cnt;
407ce7a6c31SHariprasad Kelam
408ce7a6c31SHariprasad Kelam /* Read lower 32 bits of counter */
409ce7a6c31SHariprasad Kelam val_lo = rpm_read(rpm, 0, RPMX_MTI_STAT_RX_STAT_PAGES_COUNTERX +
410ce7a6c31SHariprasad Kelam (idx * 8));
411ce7a6c31SHariprasad Kelam
412ce7a6c31SHariprasad Kelam /* upon read of lower 32 bits, higher 32 bits are written
413ce7a6c31SHariprasad Kelam * to RPMX_MTI_STAT_DATA_HI_CDC
414ce7a6c31SHariprasad Kelam */
415ce7a6c31SHariprasad Kelam val_hi = rpm_read(rpm, 0, RPMX_MTI_STAT_DATA_HI_CDC);
416ce7a6c31SHariprasad Kelam
417ce7a6c31SHariprasad Kelam *rx_stat = (val_hi << 32 | val_lo);
418ce7a6c31SHariprasad Kelam
419ce7a6c31SHariprasad Kelam mutex_unlock(&rpm->lock);
420ce7a6c31SHariprasad Kelam return 0;
421ce7a6c31SHariprasad Kelam }
422ce7a6c31SHariprasad Kelam
rpm_get_tx_stats(void * rpmd,int lmac_id,int idx,u64 * tx_stat)423ce7a6c31SHariprasad Kelam int rpm_get_tx_stats(void *rpmd, int lmac_id, int idx, u64 *tx_stat)
424ce7a6c31SHariprasad Kelam {
425ce7a6c31SHariprasad Kelam rpm_t *rpm = rpmd;
426ce7a6c31SHariprasad Kelam u64 val_lo, val_hi;
427ce7a6c31SHariprasad Kelam
428b9d0fedcSHariprasad Kelam if (!is_lmac_valid(rpm, lmac_id))
429ce7a6c31SHariprasad Kelam return -ENODEV;
430ce7a6c31SHariprasad Kelam
431ce7a6c31SHariprasad Kelam mutex_lock(&rpm->lock);
432ce7a6c31SHariprasad Kelam
433ce7a6c31SHariprasad Kelam /* Update idx to point per lmac Tx statistics page */
434ce7a6c31SHariprasad Kelam idx += lmac_id * rpm->mac_ops->tx_stats_cnt;
435ce7a6c31SHariprasad Kelam
436ce7a6c31SHariprasad Kelam val_lo = rpm_read(rpm, 0, RPMX_MTI_STAT_TX_STAT_PAGES_COUNTERX +
437ce7a6c31SHariprasad Kelam (idx * 8));
438ce7a6c31SHariprasad Kelam val_hi = rpm_read(rpm, 0, RPMX_MTI_STAT_DATA_HI_CDC);
439ce7a6c31SHariprasad Kelam
440ce7a6c31SHariprasad Kelam *tx_stat = (val_hi << 32 | val_lo);
441ce7a6c31SHariprasad Kelam
442ce7a6c31SHariprasad Kelam mutex_unlock(&rpm->lock);
443ce7a6c31SHariprasad Kelam return 0;
444ce7a6c31SHariprasad Kelam }
4453ad3f8f9SHariprasad Kelam
rpm_get_lmac_type(void * rpmd,int lmac_id)4463ad3f8f9SHariprasad Kelam u8 rpm_get_lmac_type(void *rpmd, int lmac_id)
4473ad3f8f9SHariprasad Kelam {
4483ad3f8f9SHariprasad Kelam rpm_t *rpm = rpmd;
4493ad3f8f9SHariprasad Kelam u64 req = 0, resp;
4503ad3f8f9SHariprasad Kelam int err;
4513ad3f8f9SHariprasad Kelam
4523ad3f8f9SHariprasad Kelam req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_LINK_STS, req);
4533ad3f8f9SHariprasad Kelam err = cgx_fwi_cmd_generic(req, &resp, rpm, 0);
4543ad3f8f9SHariprasad Kelam if (!err)
4553ad3f8f9SHariprasad Kelam return FIELD_GET(RESP_LINKSTAT_LMAC_TYPE, resp);
4563ad3f8f9SHariprasad Kelam return err;
4573ad3f8f9SHariprasad Kelam }
4583ad3f8f9SHariprasad Kelam
rpm_get_lmac_fifo_len(void * rpmd,int lmac_id)459459f326eSSunil Goutham u32 rpm_get_lmac_fifo_len(void *rpmd, int lmac_id)
460459f326eSSunil Goutham {
461459f326eSSunil Goutham rpm_t *rpm = rpmd;
462459f326eSSunil Goutham u64 hi_perf_lmac;
463459f326eSSunil Goutham u8 num_lmacs;
464459f326eSSunil Goutham u32 fifo_len;
465459f326eSSunil Goutham
466459f326eSSunil Goutham fifo_len = rpm->mac_ops->fifo_len;
467459f326eSSunil Goutham num_lmacs = rpm->mac_ops->get_nr_lmacs(rpm);
468459f326eSSunil Goutham
469459f326eSSunil Goutham switch (num_lmacs) {
470459f326eSSunil Goutham case 1:
471459f326eSSunil Goutham return fifo_len;
472459f326eSSunil Goutham case 2:
473459f326eSSunil Goutham return fifo_len / 2;
474459f326eSSunil Goutham case 3:
475459f326eSSunil Goutham /* LMAC marked as hi_perf gets half of the FIFO and rest 1/4th */
476459f326eSSunil Goutham hi_perf_lmac = rpm_read(rpm, 0, CGXX_CMRX_RX_LMACS);
477459f326eSSunil Goutham hi_perf_lmac = (hi_perf_lmac >> 4) & 0x3ULL;
478459f326eSSunil Goutham if (lmac_id == hi_perf_lmac)
479459f326eSSunil Goutham return fifo_len / 2;
480459f326eSSunil Goutham return fifo_len / 4;
481459f326eSSunil Goutham case 4:
482459f326eSSunil Goutham default:
483459f326eSSunil Goutham return fifo_len / 4;
484459f326eSSunil Goutham }
485459f326eSSunil Goutham return 0;
486459f326eSSunil Goutham }
487459f326eSSunil Goutham
rpmusx_lmac_internal_loopback(rpm_t * rpm,int lmac_id,bool enable)488b9d0fedcSHariprasad Kelam static int rpmusx_lmac_internal_loopback(rpm_t *rpm, int lmac_id, bool enable)
489b9d0fedcSHariprasad Kelam {
490b9d0fedcSHariprasad Kelam u64 cfg;
491b9d0fedcSHariprasad Kelam
492b9d0fedcSHariprasad Kelam cfg = rpm_read(rpm, lmac_id, RPM2_USX_PCSX_CONTROL1);
493b9d0fedcSHariprasad Kelam
494b9d0fedcSHariprasad Kelam if (enable)
495b9d0fedcSHariprasad Kelam cfg |= RPM2_USX_PCS_LBK;
496b9d0fedcSHariprasad Kelam else
497b9d0fedcSHariprasad Kelam cfg &= ~RPM2_USX_PCS_LBK;
498b9d0fedcSHariprasad Kelam rpm_write(rpm, lmac_id, RPM2_USX_PCSX_CONTROL1, cfg);
499b9d0fedcSHariprasad Kelam
500b9d0fedcSHariprasad Kelam return 0;
501b9d0fedcSHariprasad Kelam }
502b9d0fedcSHariprasad Kelam
rpm2_get_lmac_fifo_len(void * rpmd,int lmac_id)503b9d0fedcSHariprasad Kelam u32 rpm2_get_lmac_fifo_len(void *rpmd, int lmac_id)
504b9d0fedcSHariprasad Kelam {
505b9d0fedcSHariprasad Kelam u64 hi_perf_lmac, lmac_info;
506b9d0fedcSHariprasad Kelam rpm_t *rpm = rpmd;
507b9d0fedcSHariprasad Kelam u8 num_lmacs;
508b9d0fedcSHariprasad Kelam u32 fifo_len;
509*fcaa3a2cSNithin Dabilpuram u16 max_lmac;
510b9d0fedcSHariprasad Kelam
511b9d0fedcSHariprasad Kelam lmac_info = rpm_read(rpm, 0, RPM2_CMRX_RX_LMACS);
512b9d0fedcSHariprasad Kelam /* LMACs are divided into two groups and each group
513b9d0fedcSHariprasad Kelam * gets half of the FIFO
514b9d0fedcSHariprasad Kelam * Group0 lmac_id range {0..3}
515b9d0fedcSHariprasad Kelam * Group1 lmac_id range {4..7}
516b9d0fedcSHariprasad Kelam */
517*fcaa3a2cSNithin Dabilpuram max_lmac = (rpm_read(rpm, 0, CGX_CONST) >> 24) & 0xFF;
518*fcaa3a2cSNithin Dabilpuram if (max_lmac > 4)
519b9d0fedcSHariprasad Kelam fifo_len = rpm->mac_ops->fifo_len / 2;
520*fcaa3a2cSNithin Dabilpuram else
521*fcaa3a2cSNithin Dabilpuram fifo_len = rpm->mac_ops->fifo_len;
522b9d0fedcSHariprasad Kelam
523b9d0fedcSHariprasad Kelam if (lmac_id < 4) {
524b9d0fedcSHariprasad Kelam num_lmacs = hweight8(lmac_info & 0xF);
525b9d0fedcSHariprasad Kelam hi_perf_lmac = (lmac_info >> 8) & 0x3ULL;
526b9d0fedcSHariprasad Kelam } else {
527b9d0fedcSHariprasad Kelam num_lmacs = hweight8(lmac_info & 0xF0);
528b9d0fedcSHariprasad Kelam hi_perf_lmac = (lmac_info >> 10) & 0x3ULL;
529b9d0fedcSHariprasad Kelam hi_perf_lmac += 4;
530b9d0fedcSHariprasad Kelam }
531b9d0fedcSHariprasad Kelam
532b9d0fedcSHariprasad Kelam switch (num_lmacs) {
533b9d0fedcSHariprasad Kelam case 1:
534b9d0fedcSHariprasad Kelam return fifo_len;
535b9d0fedcSHariprasad Kelam case 2:
536b9d0fedcSHariprasad Kelam return fifo_len / 2;
537b9d0fedcSHariprasad Kelam case 3:
538b9d0fedcSHariprasad Kelam /* LMAC marked as hi_perf gets half of the FIFO
539b9d0fedcSHariprasad Kelam * and rest 1/4th
540b9d0fedcSHariprasad Kelam */
541b9d0fedcSHariprasad Kelam if (lmac_id == hi_perf_lmac)
542b9d0fedcSHariprasad Kelam return fifo_len / 2;
543b9d0fedcSHariprasad Kelam return fifo_len / 4;
544b9d0fedcSHariprasad Kelam case 4:
545b9d0fedcSHariprasad Kelam default:
546b9d0fedcSHariprasad Kelam return fifo_len / 4;
547b9d0fedcSHariprasad Kelam }
548b9d0fedcSHariprasad Kelam return 0;
549b9d0fedcSHariprasad Kelam }
550b9d0fedcSHariprasad Kelam
rpm_lmac_internal_loopback(void * rpmd,int lmac_id,bool enable)5513ad3f8f9SHariprasad Kelam int rpm_lmac_internal_loopback(void *rpmd, int lmac_id, bool enable)
5523ad3f8f9SHariprasad Kelam {
5533ad3f8f9SHariprasad Kelam rpm_t *rpm = rpmd;
5542e3e94c2SHariprasad Kelam struct lmac *lmac;
5553ad3f8f9SHariprasad Kelam u64 cfg;
5563ad3f8f9SHariprasad Kelam
557b9d0fedcSHariprasad Kelam if (!is_lmac_valid(rpm, lmac_id))
5583ad3f8f9SHariprasad Kelam return -ENODEV;
559df66b6ebSGeetha sowjanya
5602e3e94c2SHariprasad Kelam lmac = lmac_pdata(lmac_id, rpm);
5612e3e94c2SHariprasad Kelam if (lmac->lmac_type == LMAC_MODE_QSGMII ||
5622e3e94c2SHariprasad Kelam lmac->lmac_type == LMAC_MODE_SGMII) {
563df66b6ebSGeetha sowjanya dev_err(&rpm->pdev->dev, "loopback not supported for LPC mode\n");
564df66b6ebSGeetha sowjanya return 0;
565df66b6ebSGeetha sowjanya }
566df66b6ebSGeetha sowjanya
567b9d0fedcSHariprasad Kelam if (is_dev_rpm2(rpm) && is_mac_rpmusx(rpm))
568b9d0fedcSHariprasad Kelam return rpmusx_lmac_internal_loopback(rpm, lmac_id, enable);
569b9d0fedcSHariprasad Kelam
5703ad3f8f9SHariprasad Kelam cfg = rpm_read(rpm, lmac_id, RPMX_MTI_PCS100X_CONTROL1);
5713ad3f8f9SHariprasad Kelam
5723ad3f8f9SHariprasad Kelam if (enable)
5733ad3f8f9SHariprasad Kelam cfg |= RPMX_MTI_PCS_LBK;
5743ad3f8f9SHariprasad Kelam else
5753ad3f8f9SHariprasad Kelam cfg &= ~RPMX_MTI_PCS_LBK;
5763ad3f8f9SHariprasad Kelam rpm_write(rpm, lmac_id, RPMX_MTI_PCS100X_CONTROL1, cfg);
5773ad3f8f9SHariprasad Kelam
5783ad3f8f9SHariprasad Kelam return 0;
5793ad3f8f9SHariprasad Kelam }
580d1489208SHariprasad Kelam
rpm_lmac_ptp_config(void * rpmd,int lmac_id,bool enable)581d1489208SHariprasad Kelam void rpm_lmac_ptp_config(void *rpmd, int lmac_id, bool enable)
582d1489208SHariprasad Kelam {
583d1489208SHariprasad Kelam rpm_t *rpm = rpmd;
584d1489208SHariprasad Kelam u64 cfg;
585d1489208SHariprasad Kelam
586d1489208SHariprasad Kelam if (!is_lmac_valid(rpm, lmac_id))
587d1489208SHariprasad Kelam return;
588d1489208SHariprasad Kelam
589d1489208SHariprasad Kelam cfg = rpm_read(rpm, lmac_id, RPMX_CMRX_CFG);
5902958d17aSHariprasad Kelam if (enable) {
591d1489208SHariprasad Kelam cfg |= RPMX_RX_TS_PREPEND;
5922958d17aSHariprasad Kelam cfg |= RPMX_TX_PTP_1S_SUPPORT;
5932958d17aSHariprasad Kelam } else {
594d1489208SHariprasad Kelam cfg &= ~RPMX_RX_TS_PREPEND;
5952958d17aSHariprasad Kelam cfg &= ~RPMX_TX_PTP_1S_SUPPORT;
5962958d17aSHariprasad Kelam }
5972958d17aSHariprasad Kelam
598d1489208SHariprasad Kelam rpm_write(rpm, lmac_id, RPMX_CMRX_CFG, cfg);
5992958d17aSHariprasad Kelam
6002958d17aSHariprasad Kelam cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_XIF_MODE);
6012958d17aSHariprasad Kelam
6022958d17aSHariprasad Kelam if (enable) {
6032958d17aSHariprasad Kelam cfg |= RPMX_ONESTEP_ENABLE;
6042958d17aSHariprasad Kelam cfg &= ~RPMX_TS_BINARY_MODE;
6052958d17aSHariprasad Kelam } else {
6062958d17aSHariprasad Kelam cfg &= ~RPMX_ONESTEP_ENABLE;
6072958d17aSHariprasad Kelam }
6082958d17aSHariprasad Kelam
6092958d17aSHariprasad Kelam rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_XIF_MODE, cfg);
610d1489208SHariprasad Kelam }
6111121f6b0SSunil Kumar Kori
rpm_lmac_pfc_config(void * rpmd,int lmac_id,u8 tx_pause,u8 rx_pause,u16 pfc_en)6121121f6b0SSunil Kumar Kori int rpm_lmac_pfc_config(void *rpmd, int lmac_id, u8 tx_pause, u8 rx_pause, u16 pfc_en)
6131121f6b0SSunil Kumar Kori {
614b9d0fedcSHariprasad Kelam u64 cfg, class_en, pfc_class_mask_cfg;
6151121f6b0SSunil Kumar Kori rpm_t *rpm = rpmd;
6161121f6b0SSunil Kumar Kori
6171121f6b0SSunil Kumar Kori if (!is_lmac_valid(rpm, lmac_id))
6181121f6b0SSunil Kumar Kori return -ENODEV;
6191121f6b0SSunil Kumar Kori
62047bcc9c1SHariprasad Kelam pfc_class_mask_cfg = is_dev_rpm2(rpm) ? RPM2_CMRX_PRT_CBFC_CTL :
62147bcc9c1SHariprasad Kelam RPMX_CMRX_PRT_CBFC_CTL;
62247bcc9c1SHariprasad Kelam
6231121f6b0SSunil Kumar Kori cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
62447bcc9c1SHariprasad Kelam class_en = rpm_read(rpm, lmac_id, pfc_class_mask_cfg);
6258e151457SHariprasad Kelam pfc_en |= FIELD_GET(RPM_PFC_CLASS_MASK, class_en);
6261121f6b0SSunil Kumar Kori
6271121f6b0SSunil Kumar Kori if (rx_pause) {
6281121f6b0SSunil Kumar Kori cfg &= ~(RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE |
629f115b31dSHariprasad Kelam RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE);
6301121f6b0SSunil Kumar Kori } else {
6311121f6b0SSunil Kumar Kori cfg |= (RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE |
632f115b31dSHariprasad Kelam RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE);
6331121f6b0SSunil Kumar Kori }
6341121f6b0SSunil Kumar Kori
6351121f6b0SSunil Kumar Kori if (tx_pause) {
6361121f6b0SSunil Kumar Kori rpm_cfg_pfc_quanta_thresh(rpm, lmac_id, pfc_en, true);
6371121f6b0SSunil Kumar Kori cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;
6388e151457SHariprasad Kelam class_en = FIELD_SET(RPM_PFC_CLASS_MASK, pfc_en, class_en);
6391121f6b0SSunil Kumar Kori } else {
6401121f6b0SSunil Kumar Kori rpm_cfg_pfc_quanta_thresh(rpm, lmac_id, 0xfff, false);
6411121f6b0SSunil Kumar Kori cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;
6428e151457SHariprasad Kelam class_en = FIELD_SET(RPM_PFC_CLASS_MASK, 0, class_en);
6431121f6b0SSunil Kumar Kori }
6441121f6b0SSunil Kumar Kori
6451121f6b0SSunil Kumar Kori if (!rx_pause && !tx_pause)
6461121f6b0SSunil Kumar Kori cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PFC_MODE;
6471121f6b0SSunil Kumar Kori else
6481121f6b0SSunil Kumar Kori cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_PFC_MODE;
6491121f6b0SSunil Kumar Kori
6501121f6b0SSunil Kumar Kori rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
651b9d0fedcSHariprasad Kelam rpm_write(rpm, lmac_id, pfc_class_mask_cfg, class_en);
6521121f6b0SSunil Kumar Kori
6531121f6b0SSunil Kumar Kori return 0;
6541121f6b0SSunil Kumar Kori }
655e7400038SHariprasad Kelam
rpm_lmac_get_pfc_frm_cfg(void * rpmd,int lmac_id,u8 * tx_pause,u8 * rx_pause)656e7400038SHariprasad Kelam int rpm_lmac_get_pfc_frm_cfg(void *rpmd, int lmac_id, u8 *tx_pause, u8 *rx_pause)
657e7400038SHariprasad Kelam {
658e7400038SHariprasad Kelam rpm_t *rpm = rpmd;
659e7400038SHariprasad Kelam u64 cfg;
660e7400038SHariprasad Kelam
661e7400038SHariprasad Kelam if (!is_lmac_valid(rpm, lmac_id))
662e7400038SHariprasad Kelam return -ENODEV;
663e7400038SHariprasad Kelam
664e7400038SHariprasad Kelam cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
665e7400038SHariprasad Kelam if (cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_PFC_MODE) {
666e7400038SHariprasad Kelam *rx_pause = !(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE);
667e7400038SHariprasad Kelam *tx_pause = !(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE);
668e7400038SHariprasad Kelam }
669e7400038SHariprasad Kelam
670e7400038SHariprasad Kelam return 0;
671e7400038SHariprasad Kelam }
67284ad3642SHariprasad Kelam
rpm_get_fec_stats(void * rpmd,int lmac_id,struct cgx_fec_stats_rsp * rsp)67384ad3642SHariprasad Kelam int rpm_get_fec_stats(void *rpmd, int lmac_id, struct cgx_fec_stats_rsp *rsp)
67484ad3642SHariprasad Kelam {
67584ad3642SHariprasad Kelam u64 val_lo, val_hi;
67684ad3642SHariprasad Kelam rpm_t *rpm = rpmd;
67784ad3642SHariprasad Kelam u64 cfg;
67884ad3642SHariprasad Kelam
67984ad3642SHariprasad Kelam if (!is_lmac_valid(rpm, lmac_id))
68084ad3642SHariprasad Kelam return -ENODEV;
68184ad3642SHariprasad Kelam
68284ad3642SHariprasad Kelam if (rpm->lmac_idmap[lmac_id]->link_info.fec == OTX2_FEC_NONE)
68384ad3642SHariprasad Kelam return 0;
68484ad3642SHariprasad Kelam
68584ad3642SHariprasad Kelam if (rpm->lmac_idmap[lmac_id]->link_info.fec == OTX2_FEC_BASER) {
68684ad3642SHariprasad Kelam val_lo = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_VL0_CCW_LO);
68784ad3642SHariprasad Kelam val_hi = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_CW_HI);
68884ad3642SHariprasad Kelam rsp->fec_corr_blks = (val_hi << 16 | val_lo);
68984ad3642SHariprasad Kelam
69084ad3642SHariprasad Kelam val_lo = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_VL0_NCCW_LO);
69184ad3642SHariprasad Kelam val_hi = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_CW_HI);
69284ad3642SHariprasad Kelam rsp->fec_uncorr_blks = (val_hi << 16 | val_lo);
69384ad3642SHariprasad Kelam
69484ad3642SHariprasad Kelam /* 50G uses 2 Physical serdes lines */
69584ad3642SHariprasad Kelam if (rpm->lmac_idmap[lmac_id]->link_info.lmac_type_id ==
69684ad3642SHariprasad Kelam LMAC_MODE_50G_R) {
69784ad3642SHariprasad Kelam val_lo = rpm_read(rpm, lmac_id,
69884ad3642SHariprasad Kelam RPMX_MTI_FCFECX_VL1_CCW_LO);
69984ad3642SHariprasad Kelam val_hi = rpm_read(rpm, lmac_id,
70084ad3642SHariprasad Kelam RPMX_MTI_FCFECX_CW_HI);
70184ad3642SHariprasad Kelam rsp->fec_corr_blks += (val_hi << 16 | val_lo);
70284ad3642SHariprasad Kelam
70384ad3642SHariprasad Kelam val_lo = rpm_read(rpm, lmac_id,
70484ad3642SHariprasad Kelam RPMX_MTI_FCFECX_VL1_NCCW_LO);
70584ad3642SHariprasad Kelam val_hi = rpm_read(rpm, lmac_id,
70684ad3642SHariprasad Kelam RPMX_MTI_FCFECX_CW_HI);
70784ad3642SHariprasad Kelam rsp->fec_uncorr_blks += (val_hi << 16 | val_lo);
70884ad3642SHariprasad Kelam }
70984ad3642SHariprasad Kelam } else {
71084ad3642SHariprasad Kelam /* enable RS-FEC capture */
71184ad3642SHariprasad Kelam cfg = rpm_read(rpm, 0, RPMX_MTI_STAT_STATN_CONTROL);
71284ad3642SHariprasad Kelam cfg |= RPMX_RSFEC_RX_CAPTURE | BIT(lmac_id);
71384ad3642SHariprasad Kelam rpm_write(rpm, 0, RPMX_MTI_STAT_STATN_CONTROL, cfg);
71484ad3642SHariprasad Kelam
71584ad3642SHariprasad Kelam val_lo = rpm_read(rpm, 0,
71684ad3642SHariprasad Kelam RPMX_MTI_RSFEC_STAT_COUNTER_CAPTURE_2);
71784ad3642SHariprasad Kelam val_hi = rpm_read(rpm, 0, RPMX_MTI_STAT_DATA_HI_CDC);
71884ad3642SHariprasad Kelam rsp->fec_corr_blks = (val_hi << 32 | val_lo);
71984ad3642SHariprasad Kelam
72084ad3642SHariprasad Kelam val_lo = rpm_read(rpm, 0,
72184ad3642SHariprasad Kelam RPMX_MTI_RSFEC_STAT_COUNTER_CAPTURE_3);
72284ad3642SHariprasad Kelam val_hi = rpm_read(rpm, 0, RPMX_MTI_STAT_DATA_HI_CDC);
72384ad3642SHariprasad Kelam rsp->fec_uncorr_blks = (val_hi << 32 | val_lo);
72484ad3642SHariprasad Kelam }
72584ad3642SHariprasad Kelam
72684ad3642SHariprasad Kelam return 0;
72784ad3642SHariprasad Kelam }
7282e3e94c2SHariprasad Kelam
rpm_lmac_reset(void * rpmd,int lmac_id,u8 pf_req_flr)7292e3e94c2SHariprasad Kelam int rpm_lmac_reset(void *rpmd, int lmac_id, u8 pf_req_flr)
7302e3e94c2SHariprasad Kelam {
7312e3e94c2SHariprasad Kelam u64 rx_logl_xon, cfg;
7322e3e94c2SHariprasad Kelam rpm_t *rpm = rpmd;
7332e3e94c2SHariprasad Kelam
7342e3e94c2SHariprasad Kelam if (!is_lmac_valid(rpm, lmac_id))
7352e3e94c2SHariprasad Kelam return -ENODEV;
7362e3e94c2SHariprasad Kelam
7372e3e94c2SHariprasad Kelam /* Resetting PFC related CSRs */
7382e3e94c2SHariprasad Kelam rx_logl_xon = is_dev_rpm2(rpm) ? RPM2_CMRX_RX_LOGL_XON :
7392e3e94c2SHariprasad Kelam RPMX_CMRX_RX_LOGL_XON;
7402e3e94c2SHariprasad Kelam cfg = 0xff;
7412e3e94c2SHariprasad Kelam
7422e3e94c2SHariprasad Kelam rpm_write(rpm, lmac_id, rx_logl_xon, cfg);
7432e3e94c2SHariprasad Kelam
7442e3e94c2SHariprasad Kelam if (pf_req_flr)
7452e3e94c2SHariprasad Kelam rpm_lmac_internal_loopback(rpm, lmac_id, false);
7462e3e94c2SHariprasad Kelam
7472e3e94c2SHariprasad Kelam return 0;
7482e3e94c2SHariprasad Kelam }
749