1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Marvell OcteonTx2 RVU Admin Function driver 3 * 4 * Copyright (C) 2018 Marvell International Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #ifndef NPC_H 12 #define NPC_H 13 14 enum NPC_LID_E { 15 NPC_LID_LA = 0, 16 NPC_LID_LB, 17 NPC_LID_LC, 18 NPC_LID_LD, 19 NPC_LID_LE, 20 NPC_LID_LF, 21 NPC_LID_LG, 22 NPC_LID_LH, 23 }; 24 25 #define NPC_LT_NA 0 26 27 enum npc_kpu_la_ltype { 28 NPC_LT_LA_8023 = 1, 29 NPC_LT_LA_ETHER, 30 NPC_LT_LA_IH_NIX_ETHER, 31 NPC_LT_LA_IH_8_ETHER, 32 NPC_LT_LA_IH_4_ETHER, 33 NPC_LT_LA_IH_2_ETHER, 34 NPC_LT_LA_HIGIG2_ETHER, 35 NPC_LT_LA_IH_NIX_HIGIG2_ETHER, 36 NPC_LT_LA_CUSTOM0 = 0xE, 37 NPC_LT_LA_CUSTOM1 = 0xF, 38 }; 39 40 enum npc_kpu_lb_ltype { 41 NPC_LT_LB_ETAG = 1, 42 NPC_LT_LB_CTAG, 43 NPC_LT_LB_STAG_QINQ, 44 NPC_LT_LB_BTAG, 45 NPC_LT_LB_ITAG, 46 NPC_LT_LB_DSA, 47 NPC_LT_LB_DSA_VLAN, 48 NPC_LT_LB_EDSA, 49 NPC_LT_LB_EDSA_VLAN, 50 NPC_LT_LB_EXDSA, 51 NPC_LT_LB_EXDSA_VLAN, 52 NPC_LT_LB_CUSTOM0 = 0xE, 53 NPC_LT_LB_CUSTOM1 = 0xF, 54 }; 55 56 enum npc_kpu_lc_ltype { 57 NPC_LT_LC_IP = 1, 58 NPC_LT_LC_IP_OPT, 59 NPC_LT_LC_IP6, 60 NPC_LT_LC_IP6_EXT, 61 NPC_LT_LC_ARP, 62 NPC_LT_LC_RARP, 63 NPC_LT_LC_MPLS, 64 NPC_LT_LC_NSH, 65 NPC_LT_LC_PTP, 66 NPC_LT_LC_FCOE, 67 NPC_LT_LC_CUSTOM0 = 0xE, 68 NPC_LT_LC_CUSTOM1 = 0xF, 69 }; 70 71 /* Don't modify Ltypes upto SCTP, otherwise it will 72 * effect flow tag calculation and thus RSS. 73 */ 74 enum npc_kpu_ld_ltype { 75 NPC_LT_LD_TCP = 1, 76 NPC_LT_LD_UDP, 77 NPC_LT_LD_ICMP, 78 NPC_LT_LD_SCTP, 79 NPC_LT_LD_ICMP6, 80 NPC_LT_LD_IGMP = 8, 81 NPC_LT_LD_ESP, 82 NPC_LT_LD_AH, 83 NPC_LT_LD_GRE, 84 NPC_LT_LD_NVGRE, 85 NPC_LT_LD_NSH, 86 NPC_LT_LD_TU_MPLS_IN_NSH, 87 NPC_LT_LD_TU_MPLS_IN_IP, 88 NPC_LT_LD_CUSTOM0 = 0xE, 89 NPC_LT_LD_CUSTOM1 = 0xF, 90 }; 91 92 enum npc_kpu_le_ltype { 93 NPC_LT_LE_VXLAN = 1, 94 NPC_LT_LE_GENEVE, 95 NPC_LT_LE_GTPU = 4, 96 NPC_LT_LE_VXLANGPE, 97 NPC_LT_LE_GTPC, 98 NPC_LT_LE_NSH, 99 NPC_LT_LE_TU_MPLS_IN_GRE, 100 NPC_LT_LE_TU_NSH_IN_GRE, 101 NPC_LT_LE_TU_MPLS_IN_UDP, 102 NPC_LT_LE_CUSTOM0 = 0xE, 103 NPC_LT_LE_CUSTOM1 = 0xF, 104 }; 105 106 enum npc_kpu_lf_ltype { 107 NPC_LT_LF_TU_ETHER = 1, 108 NPC_LT_LF_TU_PPP, 109 NPC_LT_LF_TU_MPLS_IN_VXLANGPE, 110 NPC_LT_LF_TU_NSH_IN_VXLANGPE, 111 NPC_LT_LF_TU_MPLS_IN_NSH, 112 NPC_LT_LF_TU_3RD_NSH, 113 NPC_LT_LF_CUSTOM0 = 0xE, 114 NPC_LT_LF_CUSTOM1 = 0xF, 115 }; 116 117 enum npc_kpu_lg_ltype { 118 NPC_LT_LG_TU_IP = 1, 119 NPC_LT_LG_TU_IP6, 120 NPC_LT_LG_TU_ARP, 121 NPC_LT_LG_TU_ETHER_IN_NSH, 122 NPC_LT_LG_CUSTOM0 = 0xE, 123 NPC_LT_LG_CUSTOM1 = 0xF, 124 }; 125 126 /* Don't modify Ltypes upto SCTP, otherwise it will 127 * effect flow tag calculation and thus RSS. 128 */ 129 enum npc_kpu_lh_ltype { 130 NPC_LT_LH_TU_TCP = 1, 131 NPC_LT_LH_TU_UDP, 132 NPC_LT_LH_TU_ICMP, 133 NPC_LT_LH_TU_SCTP, 134 NPC_LT_LH_TU_ICMP6, 135 NPC_LT_LH_TU_IGMP = 8, 136 NPC_LT_LH_TU_ESP, 137 NPC_LT_LH_TU_AH, 138 NPC_LT_LH_CUSTOM0 = 0xE, 139 NPC_LT_LH_CUSTOM1 = 0xF, 140 }; 141 142 struct npc_kpu_profile_cam { 143 u8 state; 144 u8 state_mask; 145 u16 dp0; 146 u16 dp0_mask; 147 u16 dp1; 148 u16 dp1_mask; 149 u16 dp2; 150 u16 dp2_mask; 151 }; 152 153 struct npc_kpu_profile_action { 154 u8 errlev; 155 u8 errcode; 156 u8 dp0_offset; 157 u8 dp1_offset; 158 u8 dp2_offset; 159 u8 bypass_count; 160 u8 parse_done; 161 u8 next_state; 162 u8 ptr_advance; 163 u8 cap_ena; 164 u8 lid; 165 u8 ltype; 166 u8 flags; 167 u8 offset; 168 u8 mask; 169 u8 right; 170 u8 shift; 171 }; 172 173 struct npc_kpu_profile { 174 int cam_entries; 175 int action_entries; 176 struct npc_kpu_profile_cam *cam; 177 struct npc_kpu_profile_action *action; 178 }; 179 180 /* NPC KPU register formats */ 181 struct npc_kpu_cam { 182 #if defined(__BIG_ENDIAN_BITFIELD) 183 u64 rsvd_63_56 : 8; 184 u64 state : 8; 185 u64 dp2_data : 16; 186 u64 dp1_data : 16; 187 u64 dp0_data : 16; 188 #else 189 u64 dp0_data : 16; 190 u64 dp1_data : 16; 191 u64 dp2_data : 16; 192 u64 state : 8; 193 u64 rsvd_63_56 : 8; 194 #endif 195 }; 196 197 struct npc_kpu_action0 { 198 #if defined(__BIG_ENDIAN_BITFIELD) 199 u64 rsvd_63_57 : 7; 200 u64 byp_count : 3; 201 u64 capture_ena : 1; 202 u64 parse_done : 1; 203 u64 next_state : 8; 204 u64 rsvd_43 : 1; 205 u64 capture_lid : 3; 206 u64 capture_ltype : 4; 207 u64 capture_flags : 8; 208 u64 ptr_advance : 8; 209 u64 var_len_offset : 8; 210 u64 var_len_mask : 8; 211 u64 var_len_right : 1; 212 u64 var_len_shift : 3; 213 #else 214 u64 var_len_shift : 3; 215 u64 var_len_right : 1; 216 u64 var_len_mask : 8; 217 u64 var_len_offset : 8; 218 u64 ptr_advance : 8; 219 u64 capture_flags : 8; 220 u64 capture_ltype : 4; 221 u64 capture_lid : 3; 222 u64 rsvd_43 : 1; 223 u64 next_state : 8; 224 u64 parse_done : 1; 225 u64 capture_ena : 1; 226 u64 byp_count : 3; 227 u64 rsvd_63_57 : 7; 228 #endif 229 }; 230 231 struct npc_kpu_action1 { 232 #if defined(__BIG_ENDIAN_BITFIELD) 233 u64 rsvd_63_36 : 28; 234 u64 errlev : 4; 235 u64 errcode : 8; 236 u64 dp2_offset : 8; 237 u64 dp1_offset : 8; 238 u64 dp0_offset : 8; 239 #else 240 u64 dp0_offset : 8; 241 u64 dp1_offset : 8; 242 u64 dp2_offset : 8; 243 u64 errcode : 8; 244 u64 errlev : 4; 245 u64 rsvd_63_36 : 28; 246 #endif 247 }; 248 249 struct npc_kpu_pkind_cpi_def { 250 #if defined(__BIG_ENDIAN_BITFIELD) 251 u64 ena : 1; 252 u64 rsvd_62_59 : 4; 253 u64 lid : 3; 254 u64 ltype_match : 4; 255 u64 ltype_mask : 4; 256 u64 flags_match : 8; 257 u64 flags_mask : 8; 258 u64 add_offset : 8; 259 u64 add_mask : 8; 260 u64 rsvd_15 : 1; 261 u64 add_shift : 3; 262 u64 rsvd_11_10 : 2; 263 u64 cpi_base : 10; 264 #else 265 u64 cpi_base : 10; 266 u64 rsvd_11_10 : 2; 267 u64 add_shift : 3; 268 u64 rsvd_15 : 1; 269 u64 add_mask : 8; 270 u64 add_offset : 8; 271 u64 flags_mask : 8; 272 u64 flags_match : 8; 273 u64 ltype_mask : 4; 274 u64 ltype_match : 4; 275 u64 lid : 3; 276 u64 rsvd_62_59 : 4; 277 u64 ena : 1; 278 #endif 279 }; 280 281 struct nix_rx_action { 282 #if defined(__BIG_ENDIAN_BITFIELD) 283 u64 rsvd_63_61 :3; 284 u64 flow_key_alg :5; 285 u64 match_id :16; 286 u64 index :20; 287 u64 pf_func :16; 288 u64 op :4; 289 #else 290 u64 op :4; 291 u64 pf_func :16; 292 u64 index :20; 293 u64 match_id :16; 294 u64 flow_key_alg :5; 295 u64 rsvd_63_61 :3; 296 #endif 297 }; 298 299 /* NIX Receive Vtag Action Structure */ 300 #define VTAG0_VALID_BIT BIT_ULL(15) 301 #define VTAG0_TYPE_MASK GENMASK_ULL(14, 12) 302 #define VTAG0_LID_MASK GENMASK_ULL(10, 8) 303 #define VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 304 305 struct npc_mcam_kex { 306 /* MKEX Profle Header */ 307 u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */ 308 u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */ 309 u64 cpu_model; /* Format as profiled by CPU hardware */ 310 u64 kpu_version; /* KPU firmware/profile version */ 311 u64 reserved; /* Reserved for extension */ 312 313 /* MKEX Profle Data */ 314 u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */ 315 /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */ 316 u64 kex_ld_flags[NPC_MAX_LD]; 317 /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */ 318 u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD]; 319 /* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */ 320 u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL]; 321 } __packed; 322 323 #endif /* NPC_H */ 324