1 // SPDX-License-Identifier: GPL-2.0 2 /* Marvell Octeon EP (EndPoint) Ethernet Driver 3 * 4 * Copyright (C) 2020 Marvell. 5 * 6 */ 7 8 #include <linux/pci.h> 9 #include <linux/etherdevice.h> 10 #include <linux/vmalloc.h> 11 12 #include "octep_config.h" 13 #include "octep_main.h" 14 15 static void octep_oq_reset_indices(struct octep_oq *oq) 16 { 17 oq->host_read_idx = 0; 18 oq->host_refill_idx = 0; 19 oq->refill_count = 0; 20 oq->last_pkt_count = 0; 21 oq->pkts_pending = 0; 22 } 23 24 /** 25 * octep_oq_fill_ring_buffers() - fill initial receive buffers for Rx ring. 26 * 27 * @oq: Octeon Rx queue data structure. 28 * 29 * Return: 0, if successfully filled receive buffers for all descriptors. 30 * -1, if failed to allocate a buffer or failed to map for DMA. 31 */ 32 static int octep_oq_fill_ring_buffers(struct octep_oq *oq) 33 { 34 struct octep_oq_desc_hw *desc_ring = oq->desc_ring; 35 struct page *page; 36 u32 i; 37 38 for (i = 0; i < oq->max_count; i++) { 39 page = dev_alloc_page(); 40 if (unlikely(!page)) { 41 dev_err(oq->dev, "Rx buffer alloc failed\n"); 42 goto rx_buf_alloc_err; 43 } 44 desc_ring[i].buffer_ptr = dma_map_page(oq->dev, page, 0, 45 PAGE_SIZE, 46 DMA_FROM_DEVICE); 47 if (dma_mapping_error(oq->dev, desc_ring[i].buffer_ptr)) { 48 dev_err(oq->dev, 49 "OQ-%d buffer alloc: DMA mapping error!\n", 50 oq->q_no); 51 put_page(page); 52 goto dma_map_err; 53 } 54 oq->buff_info[i].page = page; 55 } 56 57 return 0; 58 59 dma_map_err: 60 rx_buf_alloc_err: 61 while (i) { 62 i--; 63 dma_unmap_page(oq->dev, desc_ring[i].buffer_ptr, PAGE_SIZE, DMA_FROM_DEVICE); 64 put_page(oq->buff_info[i].page); 65 oq->buff_info[i].page = NULL; 66 } 67 68 return -1; 69 } 70 71 /** 72 * octep_oq_refill() - refill buffers for used Rx ring descriptors. 73 * 74 * @oct: Octeon device private data structure. 75 * @oq: Octeon Rx queue data structure. 76 * 77 * Return: number of descriptors successfully refilled with receive buffers. 78 */ 79 static int octep_oq_refill(struct octep_device *oct, struct octep_oq *oq) 80 { 81 struct octep_oq_desc_hw *desc_ring = oq->desc_ring; 82 struct page *page; 83 u32 refill_idx, i; 84 85 refill_idx = oq->host_refill_idx; 86 for (i = 0; i < oq->refill_count; i++) { 87 page = dev_alloc_page(); 88 if (unlikely(!page)) { 89 dev_err(oq->dev, "refill: rx buffer alloc failed\n"); 90 oq->stats.alloc_failures++; 91 break; 92 } 93 94 desc_ring[refill_idx].buffer_ptr = dma_map_page(oq->dev, page, 0, 95 PAGE_SIZE, DMA_FROM_DEVICE); 96 if (dma_mapping_error(oq->dev, desc_ring[refill_idx].buffer_ptr)) { 97 dev_err(oq->dev, 98 "OQ-%d buffer refill: DMA mapping error!\n", 99 oq->q_no); 100 put_page(page); 101 oq->stats.alloc_failures++; 102 break; 103 } 104 oq->buff_info[refill_idx].page = page; 105 refill_idx++; 106 if (refill_idx == oq->max_count) 107 refill_idx = 0; 108 } 109 oq->host_refill_idx = refill_idx; 110 oq->refill_count -= i; 111 112 return i; 113 } 114 115 /** 116 * octep_setup_oq() - Setup a Rx queue. 117 * 118 * @oct: Octeon device private data structure. 119 * @q_no: Rx queue number to be setup. 120 * 121 * Allocate resources for a Rx queue. 122 */ 123 static int octep_setup_oq(struct octep_device *oct, int q_no) 124 { 125 struct octep_oq *oq; 126 u32 desc_ring_size; 127 128 oq = vzalloc(sizeof(*oq)); 129 if (!oq) 130 goto create_oq_fail; 131 oct->oq[q_no] = oq; 132 133 oq->octep_dev = oct; 134 oq->netdev = oct->netdev; 135 oq->dev = &oct->pdev->dev; 136 oq->q_no = q_no; 137 oq->max_count = CFG_GET_OQ_NUM_DESC(oct->conf); 138 oq->ring_size_mask = oq->max_count - 1; 139 oq->buffer_size = CFG_GET_OQ_BUF_SIZE(oct->conf); 140 oq->max_single_buffer_size = oq->buffer_size - OCTEP_OQ_RESP_HW_SIZE; 141 142 /* When the hardware/firmware supports additional capabilities, 143 * additional header is filled-in by Octeon after length field in 144 * Rx packets. this header contains additional packet information. 145 */ 146 if (oct->caps_enabled) 147 oq->max_single_buffer_size -= OCTEP_OQ_RESP_HW_EXT_SIZE; 148 149 oq->refill_threshold = CFG_GET_OQ_REFILL_THRESHOLD(oct->conf); 150 151 desc_ring_size = oq->max_count * OCTEP_OQ_DESC_SIZE; 152 oq->desc_ring = dma_alloc_coherent(oq->dev, desc_ring_size, 153 &oq->desc_ring_dma, GFP_KERNEL); 154 155 if (unlikely(!oq->desc_ring)) { 156 dev_err(oq->dev, 157 "Failed to allocate DMA memory for OQ-%d !!\n", q_no); 158 goto desc_dma_alloc_err; 159 } 160 161 oq->buff_info = (struct octep_rx_buffer *) 162 vzalloc(oq->max_count * OCTEP_OQ_RECVBUF_SIZE); 163 if (unlikely(!oq->buff_info)) { 164 dev_err(&oct->pdev->dev, 165 "Failed to allocate buffer info for OQ-%d\n", q_no); 166 goto buf_list_err; 167 } 168 169 if (octep_oq_fill_ring_buffers(oq)) 170 goto oq_fill_buff_err; 171 172 octep_oq_reset_indices(oq); 173 oct->hw_ops.setup_oq_regs(oct, q_no); 174 oct->num_oqs++; 175 176 return 0; 177 178 oq_fill_buff_err: 179 vfree(oq->buff_info); 180 oq->buff_info = NULL; 181 buf_list_err: 182 dma_free_coherent(oq->dev, desc_ring_size, 183 oq->desc_ring, oq->desc_ring_dma); 184 oq->desc_ring = NULL; 185 desc_dma_alloc_err: 186 vfree(oq); 187 oct->oq[q_no] = NULL; 188 create_oq_fail: 189 return -1; 190 } 191 192 /** 193 * octep_oq_free_ring_buffers() - Free ring buffers. 194 * 195 * @oq: Octeon Rx queue data structure. 196 * 197 * Free receive buffers in unused Rx queue descriptors. 198 */ 199 static void octep_oq_free_ring_buffers(struct octep_oq *oq) 200 { 201 struct octep_oq_desc_hw *desc_ring = oq->desc_ring; 202 int i; 203 204 if (!oq->desc_ring || !oq->buff_info) 205 return; 206 207 for (i = 0; i < oq->max_count; i++) { 208 if (oq->buff_info[i].page) { 209 dma_unmap_page(oq->dev, desc_ring[i].buffer_ptr, 210 PAGE_SIZE, DMA_FROM_DEVICE); 211 put_page(oq->buff_info[i].page); 212 oq->buff_info[i].page = NULL; 213 desc_ring[i].buffer_ptr = 0; 214 } 215 } 216 octep_oq_reset_indices(oq); 217 } 218 219 /** 220 * octep_free_oq() - Free Rx queue resources. 221 * 222 * @oq: Octeon Rx queue data structure. 223 * 224 * Free all resources of a Rx queue. 225 */ 226 static int octep_free_oq(struct octep_oq *oq) 227 { 228 struct octep_device *oct = oq->octep_dev; 229 int q_no = oq->q_no; 230 231 octep_oq_free_ring_buffers(oq); 232 233 vfree(oq->buff_info); 234 235 if (oq->desc_ring) 236 dma_free_coherent(oq->dev, 237 oq->max_count * OCTEP_OQ_DESC_SIZE, 238 oq->desc_ring, oq->desc_ring_dma); 239 240 vfree(oq); 241 oct->oq[q_no] = NULL; 242 oct->num_oqs--; 243 return 0; 244 } 245 246 /** 247 * octep_setup_oqs() - setup resources for all Rx queues. 248 * 249 * @oct: Octeon device private data structure. 250 */ 251 int octep_setup_oqs(struct octep_device *oct) 252 { 253 int i, retval = 0; 254 255 oct->num_oqs = 0; 256 for (i = 0; i < CFG_GET_PORTS_ACTIVE_IO_RINGS(oct->conf); i++) { 257 retval = octep_setup_oq(oct, i); 258 if (retval) { 259 dev_err(&oct->pdev->dev, 260 "Failed to setup OQ(RxQ)-%d.\n", i); 261 goto oq_setup_err; 262 } 263 dev_dbg(&oct->pdev->dev, "Successfully setup OQ(RxQ)-%d.\n", i); 264 } 265 266 return 0; 267 268 oq_setup_err: 269 while (i) { 270 i--; 271 octep_free_oq(oct->oq[i]); 272 } 273 return -1; 274 } 275 276 /** 277 * octep_oq_dbell_init() - Initialize Rx queue doorbell. 278 * 279 * @oct: Octeon device private data structure. 280 * 281 * Write number of descriptors to Rx queue doorbell register. 282 */ 283 void octep_oq_dbell_init(struct octep_device *oct) 284 { 285 int i; 286 287 for (i = 0; i < oct->num_oqs; i++) 288 writel(oct->oq[i]->max_count, oct->oq[i]->pkts_credit_reg); 289 } 290 291 /** 292 * octep_free_oqs() - Free resources of all Rx queues. 293 * 294 * @oct: Octeon device private data structure. 295 */ 296 void octep_free_oqs(struct octep_device *oct) 297 { 298 int i; 299 300 for (i = 0; i < CFG_GET_PORTS_ACTIVE_IO_RINGS(oct->conf); i++) { 301 if (!oct->oq[i]) 302 continue; 303 octep_free_oq(oct->oq[i]); 304 dev_dbg(&oct->pdev->dev, 305 "Successfully freed OQ(RxQ)-%d.\n", i); 306 } 307 } 308 309 /** 310 * octep_oq_check_hw_for_pkts() - Check for new Rx packets. 311 * 312 * @oct: Octeon device private data structure. 313 * @oq: Octeon Rx queue data structure. 314 * 315 * Return: packets received after previous check. 316 */ 317 static int octep_oq_check_hw_for_pkts(struct octep_device *oct, 318 struct octep_oq *oq) 319 { 320 u32 pkt_count, new_pkts; 321 322 pkt_count = readl(oq->pkts_sent_reg); 323 new_pkts = pkt_count - oq->last_pkt_count; 324 325 /* Clear the hardware packets counter register if the rx queue is 326 * being processed continuously with-in a single interrupt and 327 * reached half its max value. 328 * this counter is not cleared every time read, to save write cycles. 329 */ 330 if (unlikely(pkt_count > 0xF0000000U)) { 331 writel(pkt_count, oq->pkts_sent_reg); 332 pkt_count = readl(oq->pkts_sent_reg); 333 new_pkts += pkt_count; 334 } 335 oq->last_pkt_count = pkt_count; 336 oq->pkts_pending += new_pkts; 337 return new_pkts; 338 } 339 340 /** 341 * __octep_oq_process_rx() - Process hardware Rx queue and push to stack. 342 * 343 * @oct: Octeon device private data structure. 344 * @oq: Octeon Rx queue data structure. 345 * @pkts_to_process: number of packets to be processed. 346 * 347 * Process the new packets in Rx queue. 348 * Packets larger than single Rx buffer arrive in consecutive descriptors. 349 * But, count returned by the API only accounts full packets, not fragments. 350 * 351 * Return: number of packets processed and pushed to stack. 352 */ 353 static int __octep_oq_process_rx(struct octep_device *oct, 354 struct octep_oq *oq, u16 pkts_to_process) 355 { 356 struct octep_oq_resp_hw_ext *resp_hw_ext = NULL; 357 struct octep_rx_buffer *buff_info; 358 struct octep_oq_resp_hw *resp_hw; 359 u32 pkt, rx_bytes, desc_used; 360 struct sk_buff *skb; 361 u16 data_offset; 362 u32 read_idx; 363 364 read_idx = oq->host_read_idx; 365 rx_bytes = 0; 366 desc_used = 0; 367 for (pkt = 0; pkt < pkts_to_process; pkt++) { 368 buff_info = (struct octep_rx_buffer *)&oq->buff_info[read_idx]; 369 dma_unmap_page(oq->dev, oq->desc_ring[read_idx].buffer_ptr, 370 PAGE_SIZE, DMA_FROM_DEVICE); 371 resp_hw = page_address(buff_info->page); 372 buff_info->page = NULL; 373 374 /* Swap the length field that is in Big-Endian to CPU */ 375 buff_info->len = be64_to_cpu(resp_hw->length); 376 if (oct->caps_enabled & OCTEP_CAP_RX_CHECKSUM) { 377 /* Extended response header is immediately after 378 * response header (resp_hw) 379 */ 380 resp_hw_ext = (struct octep_oq_resp_hw_ext *) 381 (resp_hw + 1); 382 buff_info->len -= OCTEP_OQ_RESP_HW_EXT_SIZE; 383 /* Packet Data is immediately after 384 * extended response header. 385 */ 386 data_offset = OCTEP_OQ_RESP_HW_SIZE + 387 OCTEP_OQ_RESP_HW_EXT_SIZE; 388 } else { 389 /* Data is immediately after 390 * Hardware Rx response header. 391 */ 392 data_offset = OCTEP_OQ_RESP_HW_SIZE; 393 } 394 rx_bytes += buff_info->len; 395 396 if (buff_info->len <= oq->max_single_buffer_size) { 397 skb = build_skb((void *)resp_hw, PAGE_SIZE); 398 skb_reserve(skb, data_offset); 399 skb_put(skb, buff_info->len); 400 read_idx++; 401 desc_used++; 402 if (read_idx == oq->max_count) 403 read_idx = 0; 404 } else { 405 struct skb_shared_info *shinfo; 406 u16 data_len; 407 408 skb = build_skb((void *)resp_hw, PAGE_SIZE); 409 skb_reserve(skb, data_offset); 410 /* Head fragment includes response header(s); 411 * subsequent fragments contains only data. 412 */ 413 skb_put(skb, oq->max_single_buffer_size); 414 read_idx++; 415 desc_used++; 416 if (read_idx == oq->max_count) 417 read_idx = 0; 418 419 shinfo = skb_shinfo(skb); 420 data_len = buff_info->len - oq->max_single_buffer_size; 421 while (data_len) { 422 dma_unmap_page(oq->dev, oq->desc_ring[read_idx].buffer_ptr, 423 PAGE_SIZE, DMA_FROM_DEVICE); 424 buff_info = (struct octep_rx_buffer *) 425 &oq->buff_info[read_idx]; 426 if (data_len < oq->buffer_size) { 427 buff_info->len = data_len; 428 data_len = 0; 429 } else { 430 buff_info->len = oq->buffer_size; 431 data_len -= oq->buffer_size; 432 } 433 434 skb_add_rx_frag(skb, shinfo->nr_frags, 435 buff_info->page, 0, 436 buff_info->len, 437 buff_info->len); 438 buff_info->page = NULL; 439 read_idx++; 440 desc_used++; 441 if (read_idx == oq->max_count) 442 read_idx = 0; 443 } 444 } 445 446 skb->dev = oq->netdev; 447 skb->protocol = eth_type_trans(skb, skb->dev); 448 if (resp_hw_ext && 449 resp_hw_ext->csum_verified == OCTEP_CSUM_VERIFIED) 450 skb->ip_summed = CHECKSUM_UNNECESSARY; 451 else 452 skb->ip_summed = CHECKSUM_NONE; 453 napi_gro_receive(oq->napi, skb); 454 } 455 456 oq->host_read_idx = read_idx; 457 oq->refill_count += desc_used; 458 oq->stats.packets += pkt; 459 oq->stats.bytes += rx_bytes; 460 461 return pkt; 462 } 463 464 /** 465 * octep_oq_process_rx() - Process Rx queue. 466 * 467 * @oq: Octeon Rx queue data structure. 468 * @budget: max number of packets can be processed in one invocation. 469 * 470 * Check for newly received packets and process them. 471 * Keeps checking for new packets until budget is used or no new packets seen. 472 * 473 * Return: number of packets processed. 474 */ 475 int octep_oq_process_rx(struct octep_oq *oq, int budget) 476 { 477 u32 pkts_available, pkts_processed, total_pkts_processed; 478 struct octep_device *oct = oq->octep_dev; 479 480 pkts_available = 0; 481 pkts_processed = 0; 482 total_pkts_processed = 0; 483 while (total_pkts_processed < budget) { 484 /* update pending count only when current one exhausted */ 485 if (oq->pkts_pending == 0) 486 octep_oq_check_hw_for_pkts(oct, oq); 487 pkts_available = min(budget - total_pkts_processed, 488 oq->pkts_pending); 489 if (!pkts_available) 490 break; 491 492 pkts_processed = __octep_oq_process_rx(oct, oq, 493 pkts_available); 494 oq->pkts_pending -= pkts_processed; 495 total_pkts_processed += pkts_processed; 496 } 497 498 if (oq->refill_count >= oq->refill_threshold) { 499 u32 desc_refilled = octep_oq_refill(oct, oq); 500 501 /* flush pending writes before updating credits */ 502 wmb(); 503 writel(desc_refilled, oq->pkts_credit_reg); 504 } 505 506 return total_pkts_processed; 507 } 508