1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * RSS and Classifier definitions for Marvell PPv2 Network Controller 4 * 5 * Copyright (C) 2014 Marvell 6 * 7 * Marcin Wojtas <mw@semihalf.com> 8 */ 9 10 #ifndef _MVPP2_CLS_H_ 11 #define _MVPP2_CLS_H_ 12 13 #include "mvpp2.h" 14 #include "mvpp2_prs.h" 15 16 /* Classifier constants */ 17 #define MVPP2_CLS_FLOWS_TBL_SIZE 512 18 #define MVPP2_CLS_FLOWS_TBL_DATA_WORDS 3 19 #define MVPP2_CLS_LKP_TBL_SIZE 64 20 #define MVPP2_CLS_RX_QUEUES 256 21 22 /* Classifier flow constants */ 23 24 #define MVPP2_FLOW_N_FIELDS 4 25 26 enum mvpp2_cls_engine { 27 MVPP22_CLS_ENGINE_C2 = 1, 28 MVPP22_CLS_ENGINE_C3A, 29 MVPP22_CLS_ENGINE_C3B, 30 MVPP22_CLS_ENGINE_C4, 31 MVPP22_CLS_ENGINE_C3HA = 6, 32 MVPP22_CLS_ENGINE_C3HB = 7, 33 }; 34 35 #define MVPP22_CLS_HEK_OPT_MAC_DA BIT(0) 36 #define MVPP22_CLS_HEK_OPT_VLAN BIT(1) 37 #define MVPP22_CLS_HEK_OPT_L3_PROTO BIT(2) 38 #define MVPP22_CLS_HEK_OPT_IP4SA BIT(3) 39 #define MVPP22_CLS_HEK_OPT_IP4DA BIT(4) 40 #define MVPP22_CLS_HEK_OPT_IP6SA BIT(5) 41 #define MVPP22_CLS_HEK_OPT_IP6DA BIT(6) 42 #define MVPP22_CLS_HEK_OPT_L4SIP BIT(7) 43 #define MVPP22_CLS_HEK_OPT_L4DIP BIT(8) 44 #define MVPP22_CLS_HEK_N_FIELDS 9 45 46 #define MVPP22_CLS_HEK_L4_OPTS (MVPP22_CLS_HEK_OPT_L4SIP | \ 47 MVPP22_CLS_HEK_OPT_L4DIP) 48 49 #define MVPP22_CLS_HEK_IP4_2T (MVPP22_CLS_HEK_OPT_IP4SA | \ 50 MVPP22_CLS_HEK_OPT_IP4DA) 51 52 #define MVPP22_CLS_HEK_IP6_2T (MVPP22_CLS_HEK_OPT_IP6SA | \ 53 MVPP22_CLS_HEK_OPT_IP6DA) 54 55 /* The fifth tuple in "5T" is the L4_Info field */ 56 #define MVPP22_CLS_HEK_IP4_5T (MVPP22_CLS_HEK_IP4_2T | \ 57 MVPP22_CLS_HEK_L4_OPTS) 58 59 #define MVPP22_CLS_HEK_IP6_5T (MVPP22_CLS_HEK_IP6_2T | \ 60 MVPP22_CLS_HEK_L4_OPTS) 61 62 enum mvpp2_cls_field_id { 63 MVPP22_CLS_FIELD_MAC_DA = 0x03, 64 MVPP22_CLS_FIELD_VLAN = 0x06, 65 MVPP22_CLS_FIELD_L3_PROTO = 0x0f, 66 MVPP22_CLS_FIELD_IP4SA = 0x10, 67 MVPP22_CLS_FIELD_IP4DA = 0x11, 68 MVPP22_CLS_FIELD_IP6SA = 0x17, 69 MVPP22_CLS_FIELD_IP6DA = 0x1a, 70 MVPP22_CLS_FIELD_L4SIP = 0x1d, 71 MVPP22_CLS_FIELD_L4DIP = 0x1e, 72 }; 73 74 /* Classifier C2 engine constants */ 75 #define MVPP22_CLS_C2_TCAM_EN(data) ((data) << 16) 76 77 enum mvpp22_cls_c2_action { 78 MVPP22_C2_NO_UPD = 0, 79 MVPP22_C2_NO_UPD_LOCK, 80 MVPP22_C2_UPD, 81 MVPP22_C2_UPD_LOCK, 82 }; 83 84 enum mvpp22_cls_c2_fwd_action { 85 MVPP22_C2_FWD_NO_UPD = 0, 86 MVPP22_C2_FWD_NO_UPD_LOCK, 87 MVPP22_C2_FWD_SW, 88 MVPP22_C2_FWD_SW_LOCK, 89 MVPP22_C2_FWD_HW, 90 MVPP22_C2_FWD_HW_LOCK, 91 MVPP22_C2_FWD_HW_LOW_LAT, 92 MVPP22_C2_FWD_HW_LOW_LAT_LOCK, 93 }; 94 95 enum mvpp22_cls_c2_color_action { 96 MVPP22_C2_COL_NO_UPD = 0, 97 MVPP22_C2_COL_NO_UPD_LOCK, 98 MVPP22_C2_COL_GREEN, 99 MVPP22_C2_COL_GREEN_LOCK, 100 MVPP22_C2_COL_YELLOW, 101 MVPP22_C2_COL_YELLOW_LOCK, 102 MVPP22_C2_COL_RED, /* Drop */ 103 MVPP22_C2_COL_RED_LOCK, /* Drop */ 104 }; 105 106 #define MVPP2_CLS_C2_TCAM_WORDS 5 107 #define MVPP2_CLS_C2_ATTR_WORDS 5 108 109 struct mvpp2_cls_c2_entry { 110 u32 index; 111 /* TCAM lookup key */ 112 u32 tcam[MVPP2_CLS_C2_TCAM_WORDS]; 113 /* Actions to perform upon TCAM match */ 114 u32 act; 115 /* Attributes relative to the actions to perform */ 116 u32 attr[MVPP2_CLS_C2_ATTR_WORDS]; 117 /* Entry validity */ 118 u8 valid; 119 }; 120 121 #define MVPP22_FLOW_ETHER_BIT BIT(0) 122 #define MVPP22_FLOW_IP4_BIT BIT(1) 123 #define MVPP22_FLOW_IP6_BIT BIT(2) 124 #define MVPP22_FLOW_TCP_BIT BIT(3) 125 #define MVPP22_FLOW_UDP_BIT BIT(4) 126 127 #define MVPP22_FLOW_TCP4 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP4_BIT | MVPP22_FLOW_TCP_BIT) 128 #define MVPP22_FLOW_TCP6 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP6_BIT | MVPP22_FLOW_TCP_BIT) 129 #define MVPP22_FLOW_UDP4 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP4_BIT | MVPP22_FLOW_UDP_BIT) 130 #define MVPP22_FLOW_UDP6 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP6_BIT | MVPP22_FLOW_UDP_BIT) 131 #define MVPP22_FLOW_IP4 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP4_BIT) 132 #define MVPP22_FLOW_IP6 (MVPP22_FLOW_ETHER_BIT | MVPP22_FLOW_IP6_BIT) 133 #define MVPP22_FLOW_ETHERNET (MVPP22_FLOW_ETHER_BIT) 134 135 /* Classifier C2 engine entries */ 136 #define MVPP22_CLS_C2_N_ENTRIES 256 137 138 /* Number of per-port dedicated entries in the C2 TCAM */ 139 #define MVPP22_CLS_C2_PORT_N_FLOWS MVPP2_N_RFS_ENTRIES_PER_FLOW 140 141 /* Each port has oen range per flow type + one entry controling the global RSS 142 * setting and the default rx queue 143 */ 144 #define MVPP22_CLS_C2_PORT_RANGE (MVPP22_CLS_C2_PORT_N_FLOWS + 1) 145 #define MVPP22_CLS_C2_PORT_FIRST(p) ((p) * MVPP22_CLS_C2_PORT_RANGE) 146 #define MVPP22_CLS_C2_RSS_ENTRY(p) (MVPP22_CLS_C2_PORT_FIRST((p) + 1) - 1) 147 148 #define MVPP22_CLS_C2_PORT_FLOW_FIRST(p) (MVPP22_CLS_C2_PORT_FIRST(p)) 149 150 #define MVPP22_CLS_C2_RFS_LOC(p, loc) (MVPP22_CLS_C2_PORT_FLOW_FIRST(p) + (loc)) 151 152 /* Packet flow ID */ 153 enum mvpp2_prs_flow { 154 MVPP2_FL_START = 8, 155 MVPP2_FL_IP4_TCP_NF_UNTAG = MVPP2_FL_START, 156 MVPP2_FL_IP4_UDP_NF_UNTAG, 157 MVPP2_FL_IP4_TCP_NF_TAG, 158 MVPP2_FL_IP4_UDP_NF_TAG, 159 MVPP2_FL_IP6_TCP_NF_UNTAG, 160 MVPP2_FL_IP6_UDP_NF_UNTAG, 161 MVPP2_FL_IP6_TCP_NF_TAG, 162 MVPP2_FL_IP6_UDP_NF_TAG, 163 MVPP2_FL_IP4_TCP_FRAG_UNTAG, 164 MVPP2_FL_IP4_UDP_FRAG_UNTAG, 165 MVPP2_FL_IP4_TCP_FRAG_TAG, 166 MVPP2_FL_IP4_UDP_FRAG_TAG, 167 MVPP2_FL_IP6_TCP_FRAG_UNTAG, 168 MVPP2_FL_IP6_UDP_FRAG_UNTAG, 169 MVPP2_FL_IP6_TCP_FRAG_TAG, 170 MVPP2_FL_IP6_UDP_FRAG_TAG, 171 MVPP2_FL_IP4_UNTAG, /* non-TCP, non-UDP, same for below */ 172 MVPP2_FL_IP4_TAG, 173 MVPP2_FL_IP6_UNTAG, 174 MVPP2_FL_IP6_TAG, 175 MVPP2_FL_NON_IP_UNTAG, 176 MVPP2_FL_NON_IP_TAG, 177 MVPP2_FL_LAST, 178 }; 179 180 /* LU Type defined for all engines, and specified in the flow table */ 181 #define MVPP2_CLS_LU_TYPE_MASK 0x3f 182 183 #define MVPP2_N_FLOWS (MVPP2_FL_LAST - MVPP2_FL_START) 184 185 struct mvpp2_cls_flow { 186 /* The L2-L4 traffic flow type */ 187 int flow_type; 188 189 /* The first id in the flow table for this flow */ 190 u16 flow_id; 191 192 /* The supported HEK fields for this flow */ 193 u16 supported_hash_opts; 194 195 /* The Header Parser result_info that matches this flow */ 196 struct mvpp2_prs_result_info prs_ri; 197 }; 198 199 #define MVPP2_CLS_FLT_ENTRIES_PER_FLOW (MVPP2_MAX_PORTS + 1 + 16) 200 #define MVPP2_CLS_FLT_FIRST(id) (((id) - MVPP2_FL_START) * \ 201 MVPP2_CLS_FLT_ENTRIES_PER_FLOW) 202 203 #define MVPP2_CLS_FLT_C2_RFS(port, id, rfs_n) (MVPP2_CLS_FLT_FIRST(id) + \ 204 ((port) * MVPP2_MAX_PORTS) + \ 205 (rfs_n)) 206 207 #define MVPP2_CLS_FLT_C2_RSS_ENTRY(id) (MVPP2_CLS_FLT_C2_RFS(MVPP2_MAX_PORTS, id, 0)) 208 #define MVPP2_CLS_FLT_HASH_ENTRY(port, id) (MVPP2_CLS_FLT_C2_RSS_ENTRY(id) + 1 + (port)) 209 #define MVPP2_CLS_FLT_LAST(id) (MVPP2_CLS_FLT_FIRST(id) + \ 210 MVPP2_CLS_FLT_ENTRIES_PER_FLOW - 1) 211 212 /* Iterate on each classifier flow id. Sets 'i' to be the index of the first 213 * entry in the cls_flows table for each different flow_id. 214 * This relies on entries having the same flow_id in the cls_flows table being 215 * contiguous. 216 */ 217 #define for_each_cls_flow_id(i) \ 218 for ((i) = 0; (i) < MVPP2_N_PRS_FLOWS; (i)++) \ 219 if ((i) > 0 && \ 220 cls_flows[(i)].flow_id == cls_flows[(i) - 1].flow_id) \ 221 continue; \ 222 else 223 224 /* Iterate on each classifier flow that has a given flow_type. Sets 'i' to be 225 * the index of the first entry in the cls_flow table for each different flow_id 226 * that has the given flow_type. This allows to operate on all flows that 227 * matches a given ethtool flow type. 228 */ 229 #define for_each_cls_flow_id_with_type(i, type) \ 230 for_each_cls_flow_id((i)) \ 231 if (cls_flows[(i)].flow_type != (type)) \ 232 continue; \ 233 else 234 235 #define for_each_cls_flow_id_containing_type(i, type) \ 236 for_each_cls_flow_id((i)) \ 237 if ((cls_flows[(i)].flow_type & (type)) != (type)) \ 238 continue; \ 239 else 240 241 struct mvpp2_cls_flow_entry { 242 u32 index; 243 u32 data[MVPP2_CLS_FLOWS_TBL_DATA_WORDS]; 244 }; 245 246 struct mvpp2_cls_lookup_entry { 247 u32 lkpid; 248 u32 way; 249 u32 data; 250 }; 251 252 void mvpp22_rss_fill_table(struct mvpp2_port *port, u32 table); 253 void mvpp22_port_rss_init(struct mvpp2_port *port); 254 255 void mvpp22_port_rss_enable(struct mvpp2_port *port); 256 void mvpp22_port_rss_disable(struct mvpp2_port *port); 257 258 int mvpp2_ethtool_rxfh_get(struct mvpp2_port *port, struct ethtool_rxnfc *info); 259 int mvpp2_ethtool_rxfh_set(struct mvpp2_port *port, struct ethtool_rxnfc *info); 260 261 void mvpp2_cls_init(struct mvpp2 *priv); 262 263 void mvpp2_cls_port_config(struct mvpp2_port *port); 264 265 void mvpp2_cls_oversize_rxq_set(struct mvpp2_port *port); 266 267 int mvpp2_cls_flow_eng_get(struct mvpp2_cls_flow_entry *fe); 268 269 u16 mvpp2_flow_get_hek_fields(struct mvpp2_cls_flow_entry *fe); 270 271 const struct mvpp2_cls_flow *mvpp2_cls_flow_get(int flow); 272 273 u32 mvpp2_cls_flow_hits(struct mvpp2 *priv, int index); 274 275 void mvpp2_cls_flow_read(struct mvpp2 *priv, int index, 276 struct mvpp2_cls_flow_entry *fe); 277 278 u32 mvpp2_cls_lookup_hits(struct mvpp2 *priv, int index); 279 280 void mvpp2_cls_lookup_read(struct mvpp2 *priv, int lkpid, int way, 281 struct mvpp2_cls_lookup_entry *le); 282 283 u32 mvpp2_cls_c2_hit_count(struct mvpp2 *priv, int c2_index); 284 285 void mvpp2_cls_c2_read(struct mvpp2 *priv, int index, 286 struct mvpp2_cls_c2_entry *c2); 287 288 int mvpp2_ethtool_cls_rule_get(struct mvpp2_port *port, 289 struct ethtool_rxnfc *rxnfc); 290 291 int mvpp2_ethtool_cls_rule_ins(struct mvpp2_port *port, 292 struct ethtool_rxnfc *info); 293 294 int mvpp2_ethtool_cls_rule_del(struct mvpp2_port *port, 295 struct ethtool_rxnfc *info); 296 297 #endif 298