1ae7668d0SJeff Kirsher /* 2ae7668d0SJeff Kirsher * This program is free software; you can redistribute it and/or modify it 3ae7668d0SJeff Kirsher * under the terms of the GNU General Public License version 2 as published 4ae7668d0SJeff Kirsher * by the Free Software Foundation. 5ae7668d0SJeff Kirsher * 6ae7668d0SJeff Kirsher * This program is distributed in the hope that it will be useful, 7ae7668d0SJeff Kirsher * but WITHOUT ANY WARRANTY; without even the implied warranty of 8ae7668d0SJeff Kirsher * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9ae7668d0SJeff Kirsher * GNU General Public License for more details. 10ae7668d0SJeff Kirsher * 11ae7668d0SJeff Kirsher * You should have received a copy of the GNU General Public License 12ae7668d0SJeff Kirsher * along with this program; if not, write to the Free Software 13ae7668d0SJeff Kirsher * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. 14ae7668d0SJeff Kirsher * 15ae7668d0SJeff Kirsher * Copyright (C) 2011 John Crispin <blogic@openwrt.org> 16ae7668d0SJeff Kirsher */ 17ae7668d0SJeff Kirsher 18ae7668d0SJeff Kirsher #include <linux/kernel.h> 19ae7668d0SJeff Kirsher #include <linux/slab.h> 20ae7668d0SJeff Kirsher #include <linux/errno.h> 21ae7668d0SJeff Kirsher #include <linux/types.h> 22ae7668d0SJeff Kirsher #include <linux/interrupt.h> 23ae7668d0SJeff Kirsher #include <linux/uaccess.h> 24ae7668d0SJeff Kirsher #include <linux/in.h> 25ae7668d0SJeff Kirsher #include <linux/netdevice.h> 26ae7668d0SJeff Kirsher #include <linux/etherdevice.h> 27ae7668d0SJeff Kirsher #include <linux/phy.h> 28ae7668d0SJeff Kirsher #include <linux/ip.h> 29ae7668d0SJeff Kirsher #include <linux/tcp.h> 30ae7668d0SJeff Kirsher #include <linux/skbuff.h> 31ae7668d0SJeff Kirsher #include <linux/mm.h> 32ae7668d0SJeff Kirsher #include <linux/platform_device.h> 33ae7668d0SJeff Kirsher #include <linux/ethtool.h> 34ae7668d0SJeff Kirsher #include <linux/init.h> 35ae7668d0SJeff Kirsher #include <linux/delay.h> 36ae7668d0SJeff Kirsher #include <linux/io.h> 37a32fd63dSJohn Crispin #include <linux/dma-mapping.h> 38a32fd63dSJohn Crispin #include <linux/module.h> 39ae7668d0SJeff Kirsher 40ae7668d0SJeff Kirsher #include <asm/checksum.h> 41ae7668d0SJeff Kirsher 42ae7668d0SJeff Kirsher #include <lantiq_soc.h> 43ae7668d0SJeff Kirsher #include <xway_dma.h> 44ae7668d0SJeff Kirsher #include <lantiq_platform.h> 45ae7668d0SJeff Kirsher 46ae7668d0SJeff Kirsher #define LTQ_ETOP_MDIO 0x11804 47ae7668d0SJeff Kirsher #define MDIO_REQUEST 0x80000000 48ae7668d0SJeff Kirsher #define MDIO_READ 0x40000000 49ae7668d0SJeff Kirsher #define MDIO_ADDR_MASK 0x1f 50ae7668d0SJeff Kirsher #define MDIO_ADDR_OFFSET 0x15 51ae7668d0SJeff Kirsher #define MDIO_REG_MASK 0x1f 52ae7668d0SJeff Kirsher #define MDIO_REG_OFFSET 0x10 53ae7668d0SJeff Kirsher #define MDIO_VAL_MASK 0xffff 54ae7668d0SJeff Kirsher 55ae7668d0SJeff Kirsher #define PPE32_CGEN 0x800 56ae7668d0SJeff Kirsher #define LQ_PPE32_ENET_MAC_CFG 0x1840 57ae7668d0SJeff Kirsher 58ae7668d0SJeff Kirsher #define LTQ_ETOP_ENETS0 0x11850 59ae7668d0SJeff Kirsher #define LTQ_ETOP_MAC_DA0 0x1186C 60ae7668d0SJeff Kirsher #define LTQ_ETOP_MAC_DA1 0x11870 61ae7668d0SJeff Kirsher #define LTQ_ETOP_CFG 0x16020 62ae7668d0SJeff Kirsher #define LTQ_ETOP_IGPLEN 0x16080 63ae7668d0SJeff Kirsher 64ae7668d0SJeff Kirsher #define MAX_DMA_CHAN 0x8 65ae7668d0SJeff Kirsher #define MAX_DMA_CRC_LEN 0x4 66ae7668d0SJeff Kirsher #define MAX_DMA_DATA_LEN 0x600 67ae7668d0SJeff Kirsher 68ae7668d0SJeff Kirsher #define ETOP_FTCU BIT(28) 69ae7668d0SJeff Kirsher #define ETOP_MII_MASK 0xf 70ae7668d0SJeff Kirsher #define ETOP_MII_NORMAL 0xd 71ae7668d0SJeff Kirsher #define ETOP_MII_REVERSE 0xe 72ae7668d0SJeff Kirsher #define ETOP_PLEN_UNDER 0x40 73ae7668d0SJeff Kirsher #define ETOP_CGEN 0x800 74ae7668d0SJeff Kirsher 75ae7668d0SJeff Kirsher /* use 2 static channels for TX/RX */ 76ae7668d0SJeff Kirsher #define LTQ_ETOP_TX_CHANNEL 1 77ae7668d0SJeff Kirsher #define LTQ_ETOP_RX_CHANNEL 6 78ae7668d0SJeff Kirsher #define IS_TX(x) (x == LTQ_ETOP_TX_CHANNEL) 79ae7668d0SJeff Kirsher #define IS_RX(x) (x == LTQ_ETOP_RX_CHANNEL) 80ae7668d0SJeff Kirsher 81ae7668d0SJeff Kirsher #define ltq_etop_r32(x) ltq_r32(ltq_etop_membase + (x)) 82ae7668d0SJeff Kirsher #define ltq_etop_w32(x, y) ltq_w32(x, ltq_etop_membase + (y)) 83ae7668d0SJeff Kirsher #define ltq_etop_w32_mask(x, y, z) \ 84ae7668d0SJeff Kirsher ltq_w32_mask(x, y, ltq_etop_membase + (z)) 85ae7668d0SJeff Kirsher 86ae7668d0SJeff Kirsher #define DRV_VERSION "1.0" 87ae7668d0SJeff Kirsher 88ae7668d0SJeff Kirsher static void __iomem *ltq_etop_membase; 89ae7668d0SJeff Kirsher 90ae7668d0SJeff Kirsher struct ltq_etop_chan { 91ae7668d0SJeff Kirsher int idx; 92ae7668d0SJeff Kirsher int tx_free; 93ae7668d0SJeff Kirsher struct net_device *netdev; 94ae7668d0SJeff Kirsher struct napi_struct napi; 95ae7668d0SJeff Kirsher struct ltq_dma_channel dma; 96ae7668d0SJeff Kirsher struct sk_buff *skb[LTQ_DESC_NUM]; 97ae7668d0SJeff Kirsher }; 98ae7668d0SJeff Kirsher 99ae7668d0SJeff Kirsher struct ltq_etop_priv { 100ae7668d0SJeff Kirsher struct net_device *netdev; 101d1b86507SFlorian Fainelli struct platform_device *pdev; 102ae7668d0SJeff Kirsher struct ltq_eth_data *pldata; 103ae7668d0SJeff Kirsher struct resource *res; 104ae7668d0SJeff Kirsher 105ae7668d0SJeff Kirsher struct mii_bus *mii_bus; 106ae7668d0SJeff Kirsher struct phy_device *phydev; 107ae7668d0SJeff Kirsher 108ae7668d0SJeff Kirsher struct ltq_etop_chan ch[MAX_DMA_CHAN]; 109ae7668d0SJeff Kirsher int tx_free[MAX_DMA_CHAN >> 1]; 110ae7668d0SJeff Kirsher 111ae7668d0SJeff Kirsher spinlock_t lock; 112ae7668d0SJeff Kirsher }; 113ae7668d0SJeff Kirsher 114ae7668d0SJeff Kirsher static int 115ae7668d0SJeff Kirsher ltq_etop_alloc_skb(struct ltq_etop_chan *ch) 116ae7668d0SJeff Kirsher { 117c056b734SPradeep A Dalvi ch->skb[ch->dma.desc] = netdev_alloc_skb(ch->netdev, MAX_DMA_DATA_LEN); 118ae7668d0SJeff Kirsher if (!ch->skb[ch->dma.desc]) 119ae7668d0SJeff Kirsher return -ENOMEM; 120ae7668d0SJeff Kirsher ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(NULL, 121ae7668d0SJeff Kirsher ch->skb[ch->dma.desc]->data, MAX_DMA_DATA_LEN, 122ae7668d0SJeff Kirsher DMA_FROM_DEVICE); 123ae7668d0SJeff Kirsher ch->dma.desc_base[ch->dma.desc].addr = 124ae7668d0SJeff Kirsher CPHYSADDR(ch->skb[ch->dma.desc]->data); 125ae7668d0SJeff Kirsher ch->dma.desc_base[ch->dma.desc].ctl = 126ae7668d0SJeff Kirsher LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | 127ae7668d0SJeff Kirsher MAX_DMA_DATA_LEN; 128ae7668d0SJeff Kirsher skb_reserve(ch->skb[ch->dma.desc], NET_IP_ALIGN); 129ae7668d0SJeff Kirsher return 0; 130ae7668d0SJeff Kirsher } 131ae7668d0SJeff Kirsher 132ae7668d0SJeff Kirsher static void 133ae7668d0SJeff Kirsher ltq_etop_hw_receive(struct ltq_etop_chan *ch) 134ae7668d0SJeff Kirsher { 135ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(ch->netdev); 136ae7668d0SJeff Kirsher struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; 137ae7668d0SJeff Kirsher struct sk_buff *skb = ch->skb[ch->dma.desc]; 138ae7668d0SJeff Kirsher int len = (desc->ctl & LTQ_DMA_SIZE_MASK) - MAX_DMA_CRC_LEN; 139ae7668d0SJeff Kirsher unsigned long flags; 140ae7668d0SJeff Kirsher 141ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 142ae7668d0SJeff Kirsher if (ltq_etop_alloc_skb(ch)) { 143ae7668d0SJeff Kirsher netdev_err(ch->netdev, 144ae7668d0SJeff Kirsher "failed to allocate new rx buffer, stopping DMA\n"); 145ae7668d0SJeff Kirsher ltq_dma_close(&ch->dma); 146ae7668d0SJeff Kirsher } 147ae7668d0SJeff Kirsher ch->dma.desc++; 148ae7668d0SJeff Kirsher ch->dma.desc %= LTQ_DESC_NUM; 149ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 150ae7668d0SJeff Kirsher 151ae7668d0SJeff Kirsher skb_put(skb, len); 152ae7668d0SJeff Kirsher skb->dev = ch->netdev; 153ae7668d0SJeff Kirsher skb->protocol = eth_type_trans(skb, ch->netdev); 154ae7668d0SJeff Kirsher netif_receive_skb(skb); 155ae7668d0SJeff Kirsher } 156ae7668d0SJeff Kirsher 157ae7668d0SJeff Kirsher static int 158ae7668d0SJeff Kirsher ltq_etop_poll_rx(struct napi_struct *napi, int budget) 159ae7668d0SJeff Kirsher { 160ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = container_of(napi, 161ae7668d0SJeff Kirsher struct ltq_etop_chan, napi); 162ae7668d0SJeff Kirsher int rx = 0; 163ae7668d0SJeff Kirsher int complete = 0; 164ae7668d0SJeff Kirsher 165ae7668d0SJeff Kirsher while ((rx < budget) && !complete) { 166ae7668d0SJeff Kirsher struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; 167ae7668d0SJeff Kirsher 168ae7668d0SJeff Kirsher if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) { 169ae7668d0SJeff Kirsher ltq_etop_hw_receive(ch); 170ae7668d0SJeff Kirsher rx++; 171ae7668d0SJeff Kirsher } else { 172ae7668d0SJeff Kirsher complete = 1; 173ae7668d0SJeff Kirsher } 174ae7668d0SJeff Kirsher } 175ae7668d0SJeff Kirsher if (complete || !rx) { 176ae7668d0SJeff Kirsher napi_complete(&ch->napi); 177ae7668d0SJeff Kirsher ltq_dma_ack_irq(&ch->dma); 178ae7668d0SJeff Kirsher } 179ae7668d0SJeff Kirsher return rx; 180ae7668d0SJeff Kirsher } 181ae7668d0SJeff Kirsher 182ae7668d0SJeff Kirsher static int 183ae7668d0SJeff Kirsher ltq_etop_poll_tx(struct napi_struct *napi, int budget) 184ae7668d0SJeff Kirsher { 185ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = 186ae7668d0SJeff Kirsher container_of(napi, struct ltq_etop_chan, napi); 187ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(ch->netdev); 188ae7668d0SJeff Kirsher struct netdev_queue *txq = 189ae7668d0SJeff Kirsher netdev_get_tx_queue(ch->netdev, ch->idx >> 1); 190ae7668d0SJeff Kirsher unsigned long flags; 191ae7668d0SJeff Kirsher 192ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 193ae7668d0SJeff Kirsher while ((ch->dma.desc_base[ch->tx_free].ctl & 194ae7668d0SJeff Kirsher (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) { 195ae7668d0SJeff Kirsher dev_kfree_skb_any(ch->skb[ch->tx_free]); 196ae7668d0SJeff Kirsher ch->skb[ch->tx_free] = NULL; 197ae7668d0SJeff Kirsher memset(&ch->dma.desc_base[ch->tx_free], 0, 198ae7668d0SJeff Kirsher sizeof(struct ltq_dma_desc)); 199ae7668d0SJeff Kirsher ch->tx_free++; 200ae7668d0SJeff Kirsher ch->tx_free %= LTQ_DESC_NUM; 201ae7668d0SJeff Kirsher } 202ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 203ae7668d0SJeff Kirsher 204ae7668d0SJeff Kirsher if (netif_tx_queue_stopped(txq)) 205ae7668d0SJeff Kirsher netif_tx_start_queue(txq); 206ae7668d0SJeff Kirsher napi_complete(&ch->napi); 207ae7668d0SJeff Kirsher ltq_dma_ack_irq(&ch->dma); 208ae7668d0SJeff Kirsher return 1; 209ae7668d0SJeff Kirsher } 210ae7668d0SJeff Kirsher 211ae7668d0SJeff Kirsher static irqreturn_t 212ae7668d0SJeff Kirsher ltq_etop_dma_irq(int irq, void *_priv) 213ae7668d0SJeff Kirsher { 214ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = _priv; 215ae7668d0SJeff Kirsher int ch = irq - LTQ_DMA_CH0_INT; 216ae7668d0SJeff Kirsher 217ae7668d0SJeff Kirsher napi_schedule(&priv->ch[ch].napi); 218ae7668d0SJeff Kirsher return IRQ_HANDLED; 219ae7668d0SJeff Kirsher } 220ae7668d0SJeff Kirsher 221ae7668d0SJeff Kirsher static void 222ae7668d0SJeff Kirsher ltq_etop_free_channel(struct net_device *dev, struct ltq_etop_chan *ch) 223ae7668d0SJeff Kirsher { 224ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 225ae7668d0SJeff Kirsher 226ae7668d0SJeff Kirsher ltq_dma_free(&ch->dma); 227ae7668d0SJeff Kirsher if (ch->dma.irq) 228ae7668d0SJeff Kirsher free_irq(ch->dma.irq, priv); 229ae7668d0SJeff Kirsher if (IS_RX(ch->idx)) { 230ae7668d0SJeff Kirsher int desc; 231ae7668d0SJeff Kirsher for (desc = 0; desc < LTQ_DESC_NUM; desc++) 232ae7668d0SJeff Kirsher dev_kfree_skb_any(ch->skb[ch->dma.desc]); 233ae7668d0SJeff Kirsher } 234ae7668d0SJeff Kirsher } 235ae7668d0SJeff Kirsher 236ae7668d0SJeff Kirsher static void 237ae7668d0SJeff Kirsher ltq_etop_hw_exit(struct net_device *dev) 238ae7668d0SJeff Kirsher { 239ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 240ae7668d0SJeff Kirsher int i; 241ae7668d0SJeff Kirsher 242ae7668d0SJeff Kirsher ltq_pmu_disable(PMU_PPE); 243ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) 244ae7668d0SJeff Kirsher if (IS_TX(i) || IS_RX(i)) 245ae7668d0SJeff Kirsher ltq_etop_free_channel(dev, &priv->ch[i]); 246ae7668d0SJeff Kirsher } 247ae7668d0SJeff Kirsher 248ae7668d0SJeff Kirsher static int 249ae7668d0SJeff Kirsher ltq_etop_hw_init(struct net_device *dev) 250ae7668d0SJeff Kirsher { 251ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 252ae7668d0SJeff Kirsher int i; 253ae7668d0SJeff Kirsher 254ae7668d0SJeff Kirsher ltq_pmu_enable(PMU_PPE); 255ae7668d0SJeff Kirsher 256ae7668d0SJeff Kirsher switch (priv->pldata->mii_mode) { 257ae7668d0SJeff Kirsher case PHY_INTERFACE_MODE_RMII: 258ae7668d0SJeff Kirsher ltq_etop_w32_mask(ETOP_MII_MASK, 259ae7668d0SJeff Kirsher ETOP_MII_REVERSE, LTQ_ETOP_CFG); 260ae7668d0SJeff Kirsher break; 261ae7668d0SJeff Kirsher 262ae7668d0SJeff Kirsher case PHY_INTERFACE_MODE_MII: 263ae7668d0SJeff Kirsher ltq_etop_w32_mask(ETOP_MII_MASK, 264ae7668d0SJeff Kirsher ETOP_MII_NORMAL, LTQ_ETOP_CFG); 265ae7668d0SJeff Kirsher break; 266ae7668d0SJeff Kirsher 267ae7668d0SJeff Kirsher default: 268ae7668d0SJeff Kirsher netdev_err(dev, "unknown mii mode %d\n", 269ae7668d0SJeff Kirsher priv->pldata->mii_mode); 270ae7668d0SJeff Kirsher return -ENOTSUPP; 271ae7668d0SJeff Kirsher } 272ae7668d0SJeff Kirsher 273ae7668d0SJeff Kirsher /* enable crc generation */ 274ae7668d0SJeff Kirsher ltq_etop_w32(PPE32_CGEN, LQ_PPE32_ENET_MAC_CFG); 275ae7668d0SJeff Kirsher 276ae7668d0SJeff Kirsher ltq_dma_init_port(DMA_PORT_ETOP); 277ae7668d0SJeff Kirsher 278ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 279ae7668d0SJeff Kirsher int irq = LTQ_DMA_CH0_INT + i; 280ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[i]; 281ae7668d0SJeff Kirsher 282ae7668d0SJeff Kirsher ch->idx = ch->dma.nr = i; 283ae7668d0SJeff Kirsher 284ae7668d0SJeff Kirsher if (IS_TX(i)) { 285ae7668d0SJeff Kirsher ltq_dma_alloc_tx(&ch->dma); 286ae7668d0SJeff Kirsher request_irq(irq, ltq_etop_dma_irq, IRQF_DISABLED, 287ae7668d0SJeff Kirsher "etop_tx", priv); 288ae7668d0SJeff Kirsher } else if (IS_RX(i)) { 289ae7668d0SJeff Kirsher ltq_dma_alloc_rx(&ch->dma); 290ae7668d0SJeff Kirsher for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM; 291ae7668d0SJeff Kirsher ch->dma.desc++) 292ae7668d0SJeff Kirsher if (ltq_etop_alloc_skb(ch)) 293ae7668d0SJeff Kirsher return -ENOMEM; 294ae7668d0SJeff Kirsher ch->dma.desc = 0; 295ae7668d0SJeff Kirsher request_irq(irq, ltq_etop_dma_irq, IRQF_DISABLED, 296ae7668d0SJeff Kirsher "etop_rx", priv); 297ae7668d0SJeff Kirsher } 298ae7668d0SJeff Kirsher ch->dma.irq = irq; 299ae7668d0SJeff Kirsher } 300ae7668d0SJeff Kirsher return 0; 301ae7668d0SJeff Kirsher } 302ae7668d0SJeff Kirsher 303ae7668d0SJeff Kirsher static void 304ae7668d0SJeff Kirsher ltq_etop_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 305ae7668d0SJeff Kirsher { 306ae7668d0SJeff Kirsher strcpy(info->driver, "Lantiq ETOP"); 307ae7668d0SJeff Kirsher strcpy(info->bus_info, "internal"); 308ae7668d0SJeff Kirsher strcpy(info->version, DRV_VERSION); 309ae7668d0SJeff Kirsher } 310ae7668d0SJeff Kirsher 311ae7668d0SJeff Kirsher static int 312ae7668d0SJeff Kirsher ltq_etop_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) 313ae7668d0SJeff Kirsher { 314ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 315ae7668d0SJeff Kirsher 316ae7668d0SJeff Kirsher return phy_ethtool_gset(priv->phydev, cmd); 317ae7668d0SJeff Kirsher } 318ae7668d0SJeff Kirsher 319ae7668d0SJeff Kirsher static int 320ae7668d0SJeff Kirsher ltq_etop_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) 321ae7668d0SJeff Kirsher { 322ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 323ae7668d0SJeff Kirsher 324ae7668d0SJeff Kirsher return phy_ethtool_sset(priv->phydev, cmd); 325ae7668d0SJeff Kirsher } 326ae7668d0SJeff Kirsher 327ae7668d0SJeff Kirsher static int 328ae7668d0SJeff Kirsher ltq_etop_nway_reset(struct net_device *dev) 329ae7668d0SJeff Kirsher { 330ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 331ae7668d0SJeff Kirsher 332ae7668d0SJeff Kirsher return phy_start_aneg(priv->phydev); 333ae7668d0SJeff Kirsher } 334ae7668d0SJeff Kirsher 335ae7668d0SJeff Kirsher static const struct ethtool_ops ltq_etop_ethtool_ops = { 336ae7668d0SJeff Kirsher .get_drvinfo = ltq_etop_get_drvinfo, 337ae7668d0SJeff Kirsher .get_settings = ltq_etop_get_settings, 338ae7668d0SJeff Kirsher .set_settings = ltq_etop_set_settings, 339ae7668d0SJeff Kirsher .nway_reset = ltq_etop_nway_reset, 340ae7668d0SJeff Kirsher }; 341ae7668d0SJeff Kirsher 342ae7668d0SJeff Kirsher static int 343ae7668d0SJeff Kirsher ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data) 344ae7668d0SJeff Kirsher { 345ae7668d0SJeff Kirsher u32 val = MDIO_REQUEST | 346ae7668d0SJeff Kirsher ((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) | 347ae7668d0SJeff Kirsher ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) | 348ae7668d0SJeff Kirsher phy_data; 349ae7668d0SJeff Kirsher 350ae7668d0SJeff Kirsher while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) 351ae7668d0SJeff Kirsher ; 352ae7668d0SJeff Kirsher ltq_etop_w32(val, LTQ_ETOP_MDIO); 353ae7668d0SJeff Kirsher return 0; 354ae7668d0SJeff Kirsher } 355ae7668d0SJeff Kirsher 356ae7668d0SJeff Kirsher static int 357ae7668d0SJeff Kirsher ltq_etop_mdio_rd(struct mii_bus *bus, int phy_addr, int phy_reg) 358ae7668d0SJeff Kirsher { 359ae7668d0SJeff Kirsher u32 val = MDIO_REQUEST | MDIO_READ | 360ae7668d0SJeff Kirsher ((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) | 361ae7668d0SJeff Kirsher ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET); 362ae7668d0SJeff Kirsher 363ae7668d0SJeff Kirsher while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) 364ae7668d0SJeff Kirsher ; 365ae7668d0SJeff Kirsher ltq_etop_w32(val, LTQ_ETOP_MDIO); 366ae7668d0SJeff Kirsher while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) 367ae7668d0SJeff Kirsher ; 368ae7668d0SJeff Kirsher val = ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_VAL_MASK; 369ae7668d0SJeff Kirsher return val; 370ae7668d0SJeff Kirsher } 371ae7668d0SJeff Kirsher 372ae7668d0SJeff Kirsher static void 373ae7668d0SJeff Kirsher ltq_etop_mdio_link(struct net_device *dev) 374ae7668d0SJeff Kirsher { 375ae7668d0SJeff Kirsher /* nothing to do */ 376ae7668d0SJeff Kirsher } 377ae7668d0SJeff Kirsher 378ae7668d0SJeff Kirsher static int 379ae7668d0SJeff Kirsher ltq_etop_mdio_probe(struct net_device *dev) 380ae7668d0SJeff Kirsher { 381ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 382ae7668d0SJeff Kirsher struct phy_device *phydev = NULL; 383ae7668d0SJeff Kirsher int phy_addr; 384ae7668d0SJeff Kirsher 385ae7668d0SJeff Kirsher for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { 386ae7668d0SJeff Kirsher if (priv->mii_bus->phy_map[phy_addr]) { 387ae7668d0SJeff Kirsher phydev = priv->mii_bus->phy_map[phy_addr]; 388ae7668d0SJeff Kirsher break; 389ae7668d0SJeff Kirsher } 390ae7668d0SJeff Kirsher } 391ae7668d0SJeff Kirsher 392ae7668d0SJeff Kirsher if (!phydev) { 393ae7668d0SJeff Kirsher netdev_err(dev, "no PHY found\n"); 394ae7668d0SJeff Kirsher return -ENODEV; 395ae7668d0SJeff Kirsher } 396ae7668d0SJeff Kirsher 397ae7668d0SJeff Kirsher phydev = phy_connect(dev, dev_name(&phydev->dev), <q_etop_mdio_link, 398ae7668d0SJeff Kirsher 0, priv->pldata->mii_mode); 399ae7668d0SJeff Kirsher 400ae7668d0SJeff Kirsher if (IS_ERR(phydev)) { 401ae7668d0SJeff Kirsher netdev_err(dev, "Could not attach to PHY\n"); 402ae7668d0SJeff Kirsher return PTR_ERR(phydev); 403ae7668d0SJeff Kirsher } 404ae7668d0SJeff Kirsher 405ae7668d0SJeff Kirsher phydev->supported &= (SUPPORTED_10baseT_Half 406ae7668d0SJeff Kirsher | SUPPORTED_10baseT_Full 407ae7668d0SJeff Kirsher | SUPPORTED_100baseT_Half 408ae7668d0SJeff Kirsher | SUPPORTED_100baseT_Full 409ae7668d0SJeff Kirsher | SUPPORTED_Autoneg 410ae7668d0SJeff Kirsher | SUPPORTED_MII 411ae7668d0SJeff Kirsher | SUPPORTED_TP); 412ae7668d0SJeff Kirsher 413ae7668d0SJeff Kirsher phydev->advertising = phydev->supported; 414ae7668d0SJeff Kirsher priv->phydev = phydev; 415ae7668d0SJeff Kirsher pr_info("%s: attached PHY [%s] (phy_addr=%s, irq=%d)\n", 416ae7668d0SJeff Kirsher dev->name, phydev->drv->name, 417ae7668d0SJeff Kirsher dev_name(&phydev->dev), phydev->irq); 418ae7668d0SJeff Kirsher 419ae7668d0SJeff Kirsher return 0; 420ae7668d0SJeff Kirsher } 421ae7668d0SJeff Kirsher 422ae7668d0SJeff Kirsher static int 423ae7668d0SJeff Kirsher ltq_etop_mdio_init(struct net_device *dev) 424ae7668d0SJeff Kirsher { 425ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 426ae7668d0SJeff Kirsher int i; 427ae7668d0SJeff Kirsher int err; 428ae7668d0SJeff Kirsher 429ae7668d0SJeff Kirsher priv->mii_bus = mdiobus_alloc(); 430ae7668d0SJeff Kirsher if (!priv->mii_bus) { 431ae7668d0SJeff Kirsher netdev_err(dev, "failed to allocate mii bus\n"); 432ae7668d0SJeff Kirsher err = -ENOMEM; 433ae7668d0SJeff Kirsher goto err_out; 434ae7668d0SJeff Kirsher } 435ae7668d0SJeff Kirsher 436ae7668d0SJeff Kirsher priv->mii_bus->priv = dev; 437ae7668d0SJeff Kirsher priv->mii_bus->read = ltq_etop_mdio_rd; 438ae7668d0SJeff Kirsher priv->mii_bus->write = ltq_etop_mdio_wr; 439ae7668d0SJeff Kirsher priv->mii_bus->name = "ltq_mii"; 440d1b86507SFlorian Fainelli snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", 441d1b86507SFlorian Fainelli priv->pdev->name, priv->pdev->id); 442ae7668d0SJeff Kirsher priv->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); 443ae7668d0SJeff Kirsher if (!priv->mii_bus->irq) { 444ae7668d0SJeff Kirsher err = -ENOMEM; 445ae7668d0SJeff Kirsher goto err_out_free_mdiobus; 446ae7668d0SJeff Kirsher } 447ae7668d0SJeff Kirsher 448ae7668d0SJeff Kirsher for (i = 0; i < PHY_MAX_ADDR; ++i) 449ae7668d0SJeff Kirsher priv->mii_bus->irq[i] = PHY_POLL; 450ae7668d0SJeff Kirsher 451ae7668d0SJeff Kirsher if (mdiobus_register(priv->mii_bus)) { 452ae7668d0SJeff Kirsher err = -ENXIO; 453ae7668d0SJeff Kirsher goto err_out_free_mdio_irq; 454ae7668d0SJeff Kirsher } 455ae7668d0SJeff Kirsher 456ae7668d0SJeff Kirsher if (ltq_etop_mdio_probe(dev)) { 457ae7668d0SJeff Kirsher err = -ENXIO; 458ae7668d0SJeff Kirsher goto err_out_unregister_bus; 459ae7668d0SJeff Kirsher } 460ae7668d0SJeff Kirsher return 0; 461ae7668d0SJeff Kirsher 462ae7668d0SJeff Kirsher err_out_unregister_bus: 463ae7668d0SJeff Kirsher mdiobus_unregister(priv->mii_bus); 464ae7668d0SJeff Kirsher err_out_free_mdio_irq: 465ae7668d0SJeff Kirsher kfree(priv->mii_bus->irq); 466ae7668d0SJeff Kirsher err_out_free_mdiobus: 467ae7668d0SJeff Kirsher mdiobus_free(priv->mii_bus); 468ae7668d0SJeff Kirsher err_out: 469ae7668d0SJeff Kirsher return err; 470ae7668d0SJeff Kirsher } 471ae7668d0SJeff Kirsher 472ae7668d0SJeff Kirsher static void 473ae7668d0SJeff Kirsher ltq_etop_mdio_cleanup(struct net_device *dev) 474ae7668d0SJeff Kirsher { 475ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 476ae7668d0SJeff Kirsher 477ae7668d0SJeff Kirsher phy_disconnect(priv->phydev); 478ae7668d0SJeff Kirsher mdiobus_unregister(priv->mii_bus); 479ae7668d0SJeff Kirsher kfree(priv->mii_bus->irq); 480ae7668d0SJeff Kirsher mdiobus_free(priv->mii_bus); 481ae7668d0SJeff Kirsher } 482ae7668d0SJeff Kirsher 483ae7668d0SJeff Kirsher static int 484ae7668d0SJeff Kirsher ltq_etop_open(struct net_device *dev) 485ae7668d0SJeff Kirsher { 486ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 487ae7668d0SJeff Kirsher int i; 488ae7668d0SJeff Kirsher 489ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 490ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[i]; 491ae7668d0SJeff Kirsher 492ae7668d0SJeff Kirsher if (!IS_TX(i) && (!IS_RX(i))) 493ae7668d0SJeff Kirsher continue; 494ae7668d0SJeff Kirsher ltq_dma_open(&ch->dma); 495ae7668d0SJeff Kirsher napi_enable(&ch->napi); 496ae7668d0SJeff Kirsher } 497ae7668d0SJeff Kirsher phy_start(priv->phydev); 498ae7668d0SJeff Kirsher netif_tx_start_all_queues(dev); 499ae7668d0SJeff Kirsher return 0; 500ae7668d0SJeff Kirsher } 501ae7668d0SJeff Kirsher 502ae7668d0SJeff Kirsher static int 503ae7668d0SJeff Kirsher ltq_etop_stop(struct net_device *dev) 504ae7668d0SJeff Kirsher { 505ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 506ae7668d0SJeff Kirsher int i; 507ae7668d0SJeff Kirsher 508ae7668d0SJeff Kirsher netif_tx_stop_all_queues(dev); 509ae7668d0SJeff Kirsher phy_stop(priv->phydev); 510ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 511ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[i]; 512ae7668d0SJeff Kirsher 513ae7668d0SJeff Kirsher if (!IS_RX(i) && !IS_TX(i)) 514ae7668d0SJeff Kirsher continue; 515ae7668d0SJeff Kirsher napi_disable(&ch->napi); 516ae7668d0SJeff Kirsher ltq_dma_close(&ch->dma); 517ae7668d0SJeff Kirsher } 518ae7668d0SJeff Kirsher return 0; 519ae7668d0SJeff Kirsher } 520ae7668d0SJeff Kirsher 521ae7668d0SJeff Kirsher static int 522ae7668d0SJeff Kirsher ltq_etop_tx(struct sk_buff *skb, struct net_device *dev) 523ae7668d0SJeff Kirsher { 524ae7668d0SJeff Kirsher int queue = skb_get_queue_mapping(skb); 525ae7668d0SJeff Kirsher struct netdev_queue *txq = netdev_get_tx_queue(dev, queue); 526ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 527ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[(queue << 1) | 1]; 528ae7668d0SJeff Kirsher struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; 529ae7668d0SJeff Kirsher int len; 530ae7668d0SJeff Kirsher unsigned long flags; 531ae7668d0SJeff Kirsher u32 byte_offset; 532ae7668d0SJeff Kirsher 533ae7668d0SJeff Kirsher len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len; 534ae7668d0SJeff Kirsher 535ae7668d0SJeff Kirsher if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) { 536ae7668d0SJeff Kirsher dev_kfree_skb_any(skb); 537ae7668d0SJeff Kirsher netdev_err(dev, "tx ring full\n"); 538ae7668d0SJeff Kirsher netif_tx_stop_queue(txq); 539ae7668d0SJeff Kirsher return NETDEV_TX_BUSY; 540ae7668d0SJeff Kirsher } 541ae7668d0SJeff Kirsher 542ae7668d0SJeff Kirsher /* dma needs to start on a 16 byte aligned address */ 543ae7668d0SJeff Kirsher byte_offset = CPHYSADDR(skb->data) % 16; 544ae7668d0SJeff Kirsher ch->skb[ch->dma.desc] = skb; 545ae7668d0SJeff Kirsher 546ae7668d0SJeff Kirsher dev->trans_start = jiffies; 547ae7668d0SJeff Kirsher 548ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 549ae7668d0SJeff Kirsher desc->addr = ((unsigned int) dma_map_single(NULL, skb->data, len, 550ae7668d0SJeff Kirsher DMA_TO_DEVICE)) - byte_offset; 551ae7668d0SJeff Kirsher wmb(); 552ae7668d0SJeff Kirsher desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP | 553ae7668d0SJeff Kirsher LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK); 554ae7668d0SJeff Kirsher ch->dma.desc++; 555ae7668d0SJeff Kirsher ch->dma.desc %= LTQ_DESC_NUM; 556ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 557ae7668d0SJeff Kirsher 558ae7668d0SJeff Kirsher if (ch->dma.desc_base[ch->dma.desc].ctl & LTQ_DMA_OWN) 559ae7668d0SJeff Kirsher netif_tx_stop_queue(txq); 560ae7668d0SJeff Kirsher 561ae7668d0SJeff Kirsher return NETDEV_TX_OK; 562ae7668d0SJeff Kirsher } 563ae7668d0SJeff Kirsher 564ae7668d0SJeff Kirsher static int 565ae7668d0SJeff Kirsher ltq_etop_change_mtu(struct net_device *dev, int new_mtu) 566ae7668d0SJeff Kirsher { 567ae7668d0SJeff Kirsher int ret = eth_change_mtu(dev, new_mtu); 568ae7668d0SJeff Kirsher 569ae7668d0SJeff Kirsher if (!ret) { 570ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 571ae7668d0SJeff Kirsher unsigned long flags; 572ae7668d0SJeff Kirsher 573ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 574ae7668d0SJeff Kirsher ltq_etop_w32((ETOP_PLEN_UNDER << 16) | new_mtu, 575ae7668d0SJeff Kirsher LTQ_ETOP_IGPLEN); 576ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 577ae7668d0SJeff Kirsher } 578ae7668d0SJeff Kirsher return ret; 579ae7668d0SJeff Kirsher } 580ae7668d0SJeff Kirsher 581ae7668d0SJeff Kirsher static int 582ae7668d0SJeff Kirsher ltq_etop_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 583ae7668d0SJeff Kirsher { 584ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 585ae7668d0SJeff Kirsher 586ae7668d0SJeff Kirsher /* TODO: mii-toll reports "No MII transceiver present!." ?!*/ 587ae7668d0SJeff Kirsher return phy_mii_ioctl(priv->phydev, rq, cmd); 588ae7668d0SJeff Kirsher } 589ae7668d0SJeff Kirsher 590ae7668d0SJeff Kirsher static int 591ae7668d0SJeff Kirsher ltq_etop_set_mac_address(struct net_device *dev, void *p) 592ae7668d0SJeff Kirsher { 593ae7668d0SJeff Kirsher int ret = eth_mac_addr(dev, p); 594ae7668d0SJeff Kirsher 595ae7668d0SJeff Kirsher if (!ret) { 596ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 597ae7668d0SJeff Kirsher unsigned long flags; 598ae7668d0SJeff Kirsher 599ae7668d0SJeff Kirsher /* store the mac for the unicast filter */ 600ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 601ae7668d0SJeff Kirsher ltq_etop_w32(*((u32 *)dev->dev_addr), LTQ_ETOP_MAC_DA0); 602ae7668d0SJeff Kirsher ltq_etop_w32(*((u16 *)&dev->dev_addr[4]) << 16, 603ae7668d0SJeff Kirsher LTQ_ETOP_MAC_DA1); 604ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 605ae7668d0SJeff Kirsher } 606ae7668d0SJeff Kirsher return ret; 607ae7668d0SJeff Kirsher } 608ae7668d0SJeff Kirsher 609ae7668d0SJeff Kirsher static void 610ae7668d0SJeff Kirsher ltq_etop_set_multicast_list(struct net_device *dev) 611ae7668d0SJeff Kirsher { 612ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 613ae7668d0SJeff Kirsher unsigned long flags; 614ae7668d0SJeff Kirsher 615ae7668d0SJeff Kirsher /* ensure that the unicast filter is not enabled in promiscious mode */ 616ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 617ae7668d0SJeff Kirsher if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI)) 618ae7668d0SJeff Kirsher ltq_etop_w32_mask(ETOP_FTCU, 0, LTQ_ETOP_ENETS0); 619ae7668d0SJeff Kirsher else 620ae7668d0SJeff Kirsher ltq_etop_w32_mask(0, ETOP_FTCU, LTQ_ETOP_ENETS0); 621ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 622ae7668d0SJeff Kirsher } 623ae7668d0SJeff Kirsher 624ae7668d0SJeff Kirsher static u16 625ae7668d0SJeff Kirsher ltq_etop_select_queue(struct net_device *dev, struct sk_buff *skb) 626ae7668d0SJeff Kirsher { 627ae7668d0SJeff Kirsher /* we are currently only using the first queue */ 628ae7668d0SJeff Kirsher return 0; 629ae7668d0SJeff Kirsher } 630ae7668d0SJeff Kirsher 631ae7668d0SJeff Kirsher static int 632ae7668d0SJeff Kirsher ltq_etop_init(struct net_device *dev) 633ae7668d0SJeff Kirsher { 634ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 635ae7668d0SJeff Kirsher struct sockaddr mac; 636ae7668d0SJeff Kirsher int err; 637ae7668d0SJeff Kirsher 638ae7668d0SJeff Kirsher ether_setup(dev); 639ae7668d0SJeff Kirsher dev->watchdog_timeo = 10 * HZ; 640ae7668d0SJeff Kirsher err = ltq_etop_hw_init(dev); 641ae7668d0SJeff Kirsher if (err) 642ae7668d0SJeff Kirsher goto err_hw; 643ae7668d0SJeff Kirsher ltq_etop_change_mtu(dev, 1500); 644ae7668d0SJeff Kirsher 645ae7668d0SJeff Kirsher memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr)); 646ae7668d0SJeff Kirsher if (!is_valid_ether_addr(mac.sa_data)) { 647ae7668d0SJeff Kirsher pr_warn("etop: invalid MAC, using random\n"); 648ae7668d0SJeff Kirsher random_ether_addr(mac.sa_data); 649ae7668d0SJeff Kirsher } 650ae7668d0SJeff Kirsher 651ae7668d0SJeff Kirsher err = ltq_etop_set_mac_address(dev, &mac); 652ae7668d0SJeff Kirsher if (err) 653ae7668d0SJeff Kirsher goto err_netdev; 654ae7668d0SJeff Kirsher ltq_etop_set_multicast_list(dev); 655ae7668d0SJeff Kirsher err = ltq_etop_mdio_init(dev); 656ae7668d0SJeff Kirsher if (err) 657ae7668d0SJeff Kirsher goto err_netdev; 658ae7668d0SJeff Kirsher return 0; 659ae7668d0SJeff Kirsher 660ae7668d0SJeff Kirsher err_netdev: 661ae7668d0SJeff Kirsher unregister_netdev(dev); 662ae7668d0SJeff Kirsher free_netdev(dev); 663ae7668d0SJeff Kirsher err_hw: 664ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 665ae7668d0SJeff Kirsher return err; 666ae7668d0SJeff Kirsher } 667ae7668d0SJeff Kirsher 668ae7668d0SJeff Kirsher static void 669ae7668d0SJeff Kirsher ltq_etop_tx_timeout(struct net_device *dev) 670ae7668d0SJeff Kirsher { 671ae7668d0SJeff Kirsher int err; 672ae7668d0SJeff Kirsher 673ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 674ae7668d0SJeff Kirsher err = ltq_etop_hw_init(dev); 675ae7668d0SJeff Kirsher if (err) 676ae7668d0SJeff Kirsher goto err_hw; 677ae7668d0SJeff Kirsher dev->trans_start = jiffies; 678ae7668d0SJeff Kirsher netif_wake_queue(dev); 679ae7668d0SJeff Kirsher return; 680ae7668d0SJeff Kirsher 681ae7668d0SJeff Kirsher err_hw: 682ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 683ae7668d0SJeff Kirsher netdev_err(dev, "failed to restart etop after TX timeout\n"); 684ae7668d0SJeff Kirsher } 685ae7668d0SJeff Kirsher 686ae7668d0SJeff Kirsher static const struct net_device_ops ltq_eth_netdev_ops = { 687ae7668d0SJeff Kirsher .ndo_open = ltq_etop_open, 688ae7668d0SJeff Kirsher .ndo_stop = ltq_etop_stop, 689ae7668d0SJeff Kirsher .ndo_start_xmit = ltq_etop_tx, 690ae7668d0SJeff Kirsher .ndo_change_mtu = ltq_etop_change_mtu, 691ae7668d0SJeff Kirsher .ndo_do_ioctl = ltq_etop_ioctl, 692ae7668d0SJeff Kirsher .ndo_set_mac_address = ltq_etop_set_mac_address, 693ae7668d0SJeff Kirsher .ndo_validate_addr = eth_validate_addr, 694afc4b13dSJiri Pirko .ndo_set_rx_mode = ltq_etop_set_multicast_list, 695ae7668d0SJeff Kirsher .ndo_select_queue = ltq_etop_select_queue, 696ae7668d0SJeff Kirsher .ndo_init = ltq_etop_init, 697ae7668d0SJeff Kirsher .ndo_tx_timeout = ltq_etop_tx_timeout, 698ae7668d0SJeff Kirsher }; 699ae7668d0SJeff Kirsher 700ae7668d0SJeff Kirsher static int __init 701ae7668d0SJeff Kirsher ltq_etop_probe(struct platform_device *pdev) 702ae7668d0SJeff Kirsher { 703ae7668d0SJeff Kirsher struct net_device *dev; 704ae7668d0SJeff Kirsher struct ltq_etop_priv *priv; 705ae7668d0SJeff Kirsher struct resource *res; 706ae7668d0SJeff Kirsher int err; 707ae7668d0SJeff Kirsher int i; 708ae7668d0SJeff Kirsher 709ae7668d0SJeff Kirsher res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 710ae7668d0SJeff Kirsher if (!res) { 711ae7668d0SJeff Kirsher dev_err(&pdev->dev, "failed to get etop resource\n"); 712ae7668d0SJeff Kirsher err = -ENOENT; 713ae7668d0SJeff Kirsher goto err_out; 714ae7668d0SJeff Kirsher } 715ae7668d0SJeff Kirsher 716ae7668d0SJeff Kirsher res = devm_request_mem_region(&pdev->dev, res->start, 717ae7668d0SJeff Kirsher resource_size(res), dev_name(&pdev->dev)); 718ae7668d0SJeff Kirsher if (!res) { 719ae7668d0SJeff Kirsher dev_err(&pdev->dev, "failed to request etop resource\n"); 720ae7668d0SJeff Kirsher err = -EBUSY; 721ae7668d0SJeff Kirsher goto err_out; 722ae7668d0SJeff Kirsher } 723ae7668d0SJeff Kirsher 724ae7668d0SJeff Kirsher ltq_etop_membase = devm_ioremap_nocache(&pdev->dev, 725ae7668d0SJeff Kirsher res->start, resource_size(res)); 726ae7668d0SJeff Kirsher if (!ltq_etop_membase) { 727ae7668d0SJeff Kirsher dev_err(&pdev->dev, "failed to remap etop engine %d\n", 728ae7668d0SJeff Kirsher pdev->id); 729ae7668d0SJeff Kirsher err = -ENOMEM; 730ae7668d0SJeff Kirsher goto err_out; 731ae7668d0SJeff Kirsher } 732ae7668d0SJeff Kirsher 733ae7668d0SJeff Kirsher dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4); 73441de8d4cSJoe Perches if (!dev) { 73541de8d4cSJoe Perches err = -ENOMEM; 73641de8d4cSJoe Perches goto err_out; 73741de8d4cSJoe Perches } 738ae7668d0SJeff Kirsher strcpy(dev->name, "eth%d"); 739ae7668d0SJeff Kirsher dev->netdev_ops = <q_eth_netdev_ops; 740ae7668d0SJeff Kirsher dev->ethtool_ops = <q_etop_ethtool_ops; 741ae7668d0SJeff Kirsher priv = netdev_priv(dev); 742ae7668d0SJeff Kirsher priv->res = res; 743d1b86507SFlorian Fainelli priv->pdev = pdev; 744ae7668d0SJeff Kirsher priv->pldata = dev_get_platdata(&pdev->dev); 745ae7668d0SJeff Kirsher priv->netdev = dev; 746ae7668d0SJeff Kirsher spin_lock_init(&priv->lock); 747ae7668d0SJeff Kirsher 748ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 749ae7668d0SJeff Kirsher if (IS_TX(i)) 750ae7668d0SJeff Kirsher netif_napi_add(dev, &priv->ch[i].napi, 751ae7668d0SJeff Kirsher ltq_etop_poll_tx, 8); 752ae7668d0SJeff Kirsher else if (IS_RX(i)) 753ae7668d0SJeff Kirsher netif_napi_add(dev, &priv->ch[i].napi, 754ae7668d0SJeff Kirsher ltq_etop_poll_rx, 32); 755ae7668d0SJeff Kirsher priv->ch[i].netdev = dev; 756ae7668d0SJeff Kirsher } 757ae7668d0SJeff Kirsher 758ae7668d0SJeff Kirsher err = register_netdev(dev); 759ae7668d0SJeff Kirsher if (err) 760ae7668d0SJeff Kirsher goto err_free; 761ae7668d0SJeff Kirsher 762ae7668d0SJeff Kirsher platform_set_drvdata(pdev, dev); 763ae7668d0SJeff Kirsher return 0; 764ae7668d0SJeff Kirsher 765ae7668d0SJeff Kirsher err_free: 766ae7668d0SJeff Kirsher kfree(dev); 767ae7668d0SJeff Kirsher err_out: 768ae7668d0SJeff Kirsher return err; 769ae7668d0SJeff Kirsher } 770ae7668d0SJeff Kirsher 771ae7668d0SJeff Kirsher static int __devexit 772ae7668d0SJeff Kirsher ltq_etop_remove(struct platform_device *pdev) 773ae7668d0SJeff Kirsher { 774ae7668d0SJeff Kirsher struct net_device *dev = platform_get_drvdata(pdev); 775ae7668d0SJeff Kirsher 776ae7668d0SJeff Kirsher if (dev) { 777ae7668d0SJeff Kirsher netif_tx_stop_all_queues(dev); 778ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 779ae7668d0SJeff Kirsher ltq_etop_mdio_cleanup(dev); 780ae7668d0SJeff Kirsher unregister_netdev(dev); 781ae7668d0SJeff Kirsher } 782ae7668d0SJeff Kirsher return 0; 783ae7668d0SJeff Kirsher } 784ae7668d0SJeff Kirsher 785ae7668d0SJeff Kirsher static struct platform_driver ltq_mii_driver = { 786ae7668d0SJeff Kirsher .remove = __devexit_p(ltq_etop_remove), 787ae7668d0SJeff Kirsher .driver = { 788ae7668d0SJeff Kirsher .name = "ltq_etop", 789ae7668d0SJeff Kirsher .owner = THIS_MODULE, 790ae7668d0SJeff Kirsher }, 791ae7668d0SJeff Kirsher }; 792ae7668d0SJeff Kirsher 793ae7668d0SJeff Kirsher int __init 794ae7668d0SJeff Kirsher init_ltq_etop(void) 795ae7668d0SJeff Kirsher { 796ae7668d0SJeff Kirsher int ret = platform_driver_probe(<q_mii_driver, ltq_etop_probe); 797ae7668d0SJeff Kirsher 798ae7668d0SJeff Kirsher if (ret) 799ae7668d0SJeff Kirsher pr_err("ltq_etop: Error registering platfom driver!"); 800ae7668d0SJeff Kirsher return ret; 801ae7668d0SJeff Kirsher } 802ae7668d0SJeff Kirsher 803ae7668d0SJeff Kirsher static void __exit 804ae7668d0SJeff Kirsher exit_ltq_etop(void) 805ae7668d0SJeff Kirsher { 806ae7668d0SJeff Kirsher platform_driver_unregister(<q_mii_driver); 807ae7668d0SJeff Kirsher } 808ae7668d0SJeff Kirsher 809ae7668d0SJeff Kirsher module_init(init_ltq_etop); 810ae7668d0SJeff Kirsher module_exit(exit_ltq_etop); 811ae7668d0SJeff Kirsher 812ae7668d0SJeff Kirsher MODULE_AUTHOR("John Crispin <blogic@openwrt.org>"); 813ae7668d0SJeff Kirsher MODULE_DESCRIPTION("Lantiq SoC ETOP"); 814ae7668d0SJeff Kirsher MODULE_LICENSE("GPL"); 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