1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2ae7668d0SJeff Kirsher /* 3ae7668d0SJeff Kirsher * 4ae7668d0SJeff Kirsher * Copyright (C) 2011 John Crispin <blogic@openwrt.org> 5ae7668d0SJeff Kirsher */ 6ae7668d0SJeff Kirsher 7ae7668d0SJeff Kirsher #include <linux/kernel.h> 8ae7668d0SJeff Kirsher #include <linux/slab.h> 9ae7668d0SJeff Kirsher #include <linux/errno.h> 10ae7668d0SJeff Kirsher #include <linux/types.h> 11ae7668d0SJeff Kirsher #include <linux/interrupt.h> 12ae7668d0SJeff Kirsher #include <linux/uaccess.h> 13ae7668d0SJeff Kirsher #include <linux/in.h> 14ae7668d0SJeff Kirsher #include <linux/netdevice.h> 15ae7668d0SJeff Kirsher #include <linux/etherdevice.h> 16ae7668d0SJeff Kirsher #include <linux/phy.h> 17ae7668d0SJeff Kirsher #include <linux/ip.h> 18ae7668d0SJeff Kirsher #include <linux/tcp.h> 19ae7668d0SJeff Kirsher #include <linux/skbuff.h> 20ae7668d0SJeff Kirsher #include <linux/mm.h> 21ae7668d0SJeff Kirsher #include <linux/platform_device.h> 22ae7668d0SJeff Kirsher #include <linux/ethtool.h> 23ae7668d0SJeff Kirsher #include <linux/init.h> 24ae7668d0SJeff Kirsher #include <linux/delay.h> 25ae7668d0SJeff Kirsher #include <linux/io.h> 26a32fd63dSJohn Crispin #include <linux/dma-mapping.h> 27a32fd63dSJohn Crispin #include <linux/module.h> 28ae7668d0SJeff Kirsher 29ae7668d0SJeff Kirsher #include <asm/checksum.h> 30ae7668d0SJeff Kirsher 31ae7668d0SJeff Kirsher #include <lantiq_soc.h> 32ae7668d0SJeff Kirsher #include <xway_dma.h> 33ae7668d0SJeff Kirsher #include <lantiq_platform.h> 34ae7668d0SJeff Kirsher 35ae7668d0SJeff Kirsher #define LTQ_ETOP_MDIO 0x11804 36ae7668d0SJeff Kirsher #define MDIO_REQUEST 0x80000000 37ae7668d0SJeff Kirsher #define MDIO_READ 0x40000000 38ae7668d0SJeff Kirsher #define MDIO_ADDR_MASK 0x1f 39ae7668d0SJeff Kirsher #define MDIO_ADDR_OFFSET 0x15 40ae7668d0SJeff Kirsher #define MDIO_REG_MASK 0x1f 41ae7668d0SJeff Kirsher #define MDIO_REG_OFFSET 0x10 42ae7668d0SJeff Kirsher #define MDIO_VAL_MASK 0xffff 43ae7668d0SJeff Kirsher 44ae7668d0SJeff Kirsher #define PPE32_CGEN 0x800 45ae7668d0SJeff Kirsher #define LQ_PPE32_ENET_MAC_CFG 0x1840 46ae7668d0SJeff Kirsher 47ae7668d0SJeff Kirsher #define LTQ_ETOP_ENETS0 0x11850 48ae7668d0SJeff Kirsher #define LTQ_ETOP_MAC_DA0 0x1186C 49ae7668d0SJeff Kirsher #define LTQ_ETOP_MAC_DA1 0x11870 50ae7668d0SJeff Kirsher #define LTQ_ETOP_CFG 0x16020 51ae7668d0SJeff Kirsher #define LTQ_ETOP_IGPLEN 0x16080 52ae7668d0SJeff Kirsher 53ae7668d0SJeff Kirsher #define MAX_DMA_CHAN 0x8 54ae7668d0SJeff Kirsher #define MAX_DMA_CRC_LEN 0x4 55ae7668d0SJeff Kirsher #define MAX_DMA_DATA_LEN 0x600 56ae7668d0SJeff Kirsher 57ae7668d0SJeff Kirsher #define ETOP_FTCU BIT(28) 58ae7668d0SJeff Kirsher #define ETOP_MII_MASK 0xf 59ae7668d0SJeff Kirsher #define ETOP_MII_NORMAL 0xd 60ae7668d0SJeff Kirsher #define ETOP_MII_REVERSE 0xe 61ae7668d0SJeff Kirsher #define ETOP_PLEN_UNDER 0x40 62ae7668d0SJeff Kirsher #define ETOP_CGEN 0x800 63ae7668d0SJeff Kirsher 64ae7668d0SJeff Kirsher /* use 2 static channels for TX/RX */ 65ae7668d0SJeff Kirsher #define LTQ_ETOP_TX_CHANNEL 1 66ae7668d0SJeff Kirsher #define LTQ_ETOP_RX_CHANNEL 6 67ae7668d0SJeff Kirsher #define IS_TX(x) (x == LTQ_ETOP_TX_CHANNEL) 68ae7668d0SJeff Kirsher #define IS_RX(x) (x == LTQ_ETOP_RX_CHANNEL) 69ae7668d0SJeff Kirsher 70ae7668d0SJeff Kirsher #define ltq_etop_r32(x) ltq_r32(ltq_etop_membase + (x)) 71ae7668d0SJeff Kirsher #define ltq_etop_w32(x, y) ltq_w32(x, ltq_etop_membase + (y)) 72ae7668d0SJeff Kirsher #define ltq_etop_w32_mask(x, y, z) \ 73ae7668d0SJeff Kirsher ltq_w32_mask(x, y, ltq_etop_membase + (z)) 74ae7668d0SJeff Kirsher 75ae7668d0SJeff Kirsher #define DRV_VERSION "1.0" 76ae7668d0SJeff Kirsher 77ae7668d0SJeff Kirsher static void __iomem *ltq_etop_membase; 78ae7668d0SJeff Kirsher 79ae7668d0SJeff Kirsher struct ltq_etop_chan { 80ae7668d0SJeff Kirsher int idx; 81ae7668d0SJeff Kirsher int tx_free; 82ae7668d0SJeff Kirsher struct net_device *netdev; 83ae7668d0SJeff Kirsher struct napi_struct napi; 84ae7668d0SJeff Kirsher struct ltq_dma_channel dma; 85ae7668d0SJeff Kirsher struct sk_buff *skb[LTQ_DESC_NUM]; 86ae7668d0SJeff Kirsher }; 87ae7668d0SJeff Kirsher 88ae7668d0SJeff Kirsher struct ltq_etop_priv { 89ae7668d0SJeff Kirsher struct net_device *netdev; 90d1b86507SFlorian Fainelli struct platform_device *pdev; 91ae7668d0SJeff Kirsher struct ltq_eth_data *pldata; 92ae7668d0SJeff Kirsher struct resource *res; 93ae7668d0SJeff Kirsher 94ae7668d0SJeff Kirsher struct mii_bus *mii_bus; 95ae7668d0SJeff Kirsher 96ae7668d0SJeff Kirsher struct ltq_etop_chan ch[MAX_DMA_CHAN]; 97ae7668d0SJeff Kirsher int tx_free[MAX_DMA_CHAN >> 1]; 98ae7668d0SJeff Kirsher 99ae7668d0SJeff Kirsher spinlock_t lock; 100ae7668d0SJeff Kirsher }; 101ae7668d0SJeff Kirsher 102ae7668d0SJeff Kirsher static int 103ae7668d0SJeff Kirsher ltq_etop_alloc_skb(struct ltq_etop_chan *ch) 104ae7668d0SJeff Kirsher { 10574e0deb8SChristoph Hellwig struct ltq_etop_priv *priv = netdev_priv(ch->netdev); 10674e0deb8SChristoph Hellwig 107c056b734SPradeep A Dalvi ch->skb[ch->dma.desc] = netdev_alloc_skb(ch->netdev, MAX_DMA_DATA_LEN); 108ae7668d0SJeff Kirsher if (!ch->skb[ch->dma.desc]) 109ae7668d0SJeff Kirsher return -ENOMEM; 11074e0deb8SChristoph Hellwig ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(&priv->pdev->dev, 111ae7668d0SJeff Kirsher ch->skb[ch->dma.desc]->data, MAX_DMA_DATA_LEN, 112ae7668d0SJeff Kirsher DMA_FROM_DEVICE); 113ae7668d0SJeff Kirsher ch->dma.desc_base[ch->dma.desc].addr = 114ae7668d0SJeff Kirsher CPHYSADDR(ch->skb[ch->dma.desc]->data); 115ae7668d0SJeff Kirsher ch->dma.desc_base[ch->dma.desc].ctl = 116ae7668d0SJeff Kirsher LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | 117ae7668d0SJeff Kirsher MAX_DMA_DATA_LEN; 118ae7668d0SJeff Kirsher skb_reserve(ch->skb[ch->dma.desc], NET_IP_ALIGN); 119ae7668d0SJeff Kirsher return 0; 120ae7668d0SJeff Kirsher } 121ae7668d0SJeff Kirsher 122ae7668d0SJeff Kirsher static void 123ae7668d0SJeff Kirsher ltq_etop_hw_receive(struct ltq_etop_chan *ch) 124ae7668d0SJeff Kirsher { 125ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(ch->netdev); 126ae7668d0SJeff Kirsher struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; 127ae7668d0SJeff Kirsher struct sk_buff *skb = ch->skb[ch->dma.desc]; 128ae7668d0SJeff Kirsher int len = (desc->ctl & LTQ_DMA_SIZE_MASK) - MAX_DMA_CRC_LEN; 129ae7668d0SJeff Kirsher unsigned long flags; 130ae7668d0SJeff Kirsher 131ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 132ae7668d0SJeff Kirsher if (ltq_etop_alloc_skb(ch)) { 133ae7668d0SJeff Kirsher netdev_err(ch->netdev, 134ae7668d0SJeff Kirsher "failed to allocate new rx buffer, stopping DMA\n"); 135ae7668d0SJeff Kirsher ltq_dma_close(&ch->dma); 136ae7668d0SJeff Kirsher } 137ae7668d0SJeff Kirsher ch->dma.desc++; 138ae7668d0SJeff Kirsher ch->dma.desc %= LTQ_DESC_NUM; 139ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 140ae7668d0SJeff Kirsher 141ae7668d0SJeff Kirsher skb_put(skb, len); 142ae7668d0SJeff Kirsher skb->protocol = eth_type_trans(skb, ch->netdev); 143ae7668d0SJeff Kirsher netif_receive_skb(skb); 144ae7668d0SJeff Kirsher } 145ae7668d0SJeff Kirsher 146ae7668d0SJeff Kirsher static int 147ae7668d0SJeff Kirsher ltq_etop_poll_rx(struct napi_struct *napi, int budget) 148ae7668d0SJeff Kirsher { 149ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = container_of(napi, 150ae7668d0SJeff Kirsher struct ltq_etop_chan, napi); 1516ad20165SEric Dumazet int work_done = 0; 152ae7668d0SJeff Kirsher 1536ad20165SEric Dumazet while (work_done < budget) { 154ae7668d0SJeff Kirsher struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; 155ae7668d0SJeff Kirsher 1566ad20165SEric Dumazet if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) != LTQ_DMA_C) 1576ad20165SEric Dumazet break; 158ae7668d0SJeff Kirsher ltq_etop_hw_receive(ch); 1596ad20165SEric Dumazet work_done++; 160ae7668d0SJeff Kirsher } 1616ad20165SEric Dumazet if (work_done < budget) { 1626ad20165SEric Dumazet napi_complete_done(&ch->napi, work_done); 163ae7668d0SJeff Kirsher ltq_dma_ack_irq(&ch->dma); 164ae7668d0SJeff Kirsher } 1656ad20165SEric Dumazet return work_done; 166ae7668d0SJeff Kirsher } 167ae7668d0SJeff Kirsher 168ae7668d0SJeff Kirsher static int 169ae7668d0SJeff Kirsher ltq_etop_poll_tx(struct napi_struct *napi, int budget) 170ae7668d0SJeff Kirsher { 171ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = 172ae7668d0SJeff Kirsher container_of(napi, struct ltq_etop_chan, napi); 173ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(ch->netdev); 174ae7668d0SJeff Kirsher struct netdev_queue *txq = 175ae7668d0SJeff Kirsher netdev_get_tx_queue(ch->netdev, ch->idx >> 1); 176ae7668d0SJeff Kirsher unsigned long flags; 177ae7668d0SJeff Kirsher 178ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 179ae7668d0SJeff Kirsher while ((ch->dma.desc_base[ch->tx_free].ctl & 180ae7668d0SJeff Kirsher (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) { 181ae7668d0SJeff Kirsher dev_kfree_skb_any(ch->skb[ch->tx_free]); 182ae7668d0SJeff Kirsher ch->skb[ch->tx_free] = NULL; 183ae7668d0SJeff Kirsher memset(&ch->dma.desc_base[ch->tx_free], 0, 184ae7668d0SJeff Kirsher sizeof(struct ltq_dma_desc)); 185ae7668d0SJeff Kirsher ch->tx_free++; 186ae7668d0SJeff Kirsher ch->tx_free %= LTQ_DESC_NUM; 187ae7668d0SJeff Kirsher } 188ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 189ae7668d0SJeff Kirsher 190ae7668d0SJeff Kirsher if (netif_tx_queue_stopped(txq)) 191ae7668d0SJeff Kirsher netif_tx_start_queue(txq); 192ae7668d0SJeff Kirsher napi_complete(&ch->napi); 193ae7668d0SJeff Kirsher ltq_dma_ack_irq(&ch->dma); 194ae7668d0SJeff Kirsher return 1; 195ae7668d0SJeff Kirsher } 196ae7668d0SJeff Kirsher 197ae7668d0SJeff Kirsher static irqreturn_t 198ae7668d0SJeff Kirsher ltq_etop_dma_irq(int irq, void *_priv) 199ae7668d0SJeff Kirsher { 200ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = _priv; 201ae7668d0SJeff Kirsher int ch = irq - LTQ_DMA_CH0_INT; 202ae7668d0SJeff Kirsher 203ae7668d0SJeff Kirsher napi_schedule(&priv->ch[ch].napi); 204ae7668d0SJeff Kirsher return IRQ_HANDLED; 205ae7668d0SJeff Kirsher } 206ae7668d0SJeff Kirsher 207ae7668d0SJeff Kirsher static void 208ae7668d0SJeff Kirsher ltq_etop_free_channel(struct net_device *dev, struct ltq_etop_chan *ch) 209ae7668d0SJeff Kirsher { 210ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 211ae7668d0SJeff Kirsher 212ae7668d0SJeff Kirsher ltq_dma_free(&ch->dma); 213ae7668d0SJeff Kirsher if (ch->dma.irq) 214ae7668d0SJeff Kirsher free_irq(ch->dma.irq, priv); 215ae7668d0SJeff Kirsher if (IS_RX(ch->idx)) { 216ae7668d0SJeff Kirsher int desc; 217ae7668d0SJeff Kirsher for (desc = 0; desc < LTQ_DESC_NUM; desc++) 218ae7668d0SJeff Kirsher dev_kfree_skb_any(ch->skb[ch->dma.desc]); 219ae7668d0SJeff Kirsher } 220ae7668d0SJeff Kirsher } 221ae7668d0SJeff Kirsher 222ae7668d0SJeff Kirsher static void 223ae7668d0SJeff Kirsher ltq_etop_hw_exit(struct net_device *dev) 224ae7668d0SJeff Kirsher { 225ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 226ae7668d0SJeff Kirsher int i; 227ae7668d0SJeff Kirsher 228ae7668d0SJeff Kirsher ltq_pmu_disable(PMU_PPE); 229ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) 230ae7668d0SJeff Kirsher if (IS_TX(i) || IS_RX(i)) 231ae7668d0SJeff Kirsher ltq_etop_free_channel(dev, &priv->ch[i]); 232ae7668d0SJeff Kirsher } 233ae7668d0SJeff Kirsher 234ae7668d0SJeff Kirsher static int 235ae7668d0SJeff Kirsher ltq_etop_hw_init(struct net_device *dev) 236ae7668d0SJeff Kirsher { 237ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 238ae7668d0SJeff Kirsher int i; 239ae7668d0SJeff Kirsher 240ae7668d0SJeff Kirsher ltq_pmu_enable(PMU_PPE); 241ae7668d0SJeff Kirsher 242ae7668d0SJeff Kirsher switch (priv->pldata->mii_mode) { 243ae7668d0SJeff Kirsher case PHY_INTERFACE_MODE_RMII: 244ae7668d0SJeff Kirsher ltq_etop_w32_mask(ETOP_MII_MASK, 245ae7668d0SJeff Kirsher ETOP_MII_REVERSE, LTQ_ETOP_CFG); 246ae7668d0SJeff Kirsher break; 247ae7668d0SJeff Kirsher 248ae7668d0SJeff Kirsher case PHY_INTERFACE_MODE_MII: 249ae7668d0SJeff Kirsher ltq_etop_w32_mask(ETOP_MII_MASK, 250ae7668d0SJeff Kirsher ETOP_MII_NORMAL, LTQ_ETOP_CFG); 251ae7668d0SJeff Kirsher break; 252ae7668d0SJeff Kirsher 253ae7668d0SJeff Kirsher default: 254ae7668d0SJeff Kirsher netdev_err(dev, "unknown mii mode %d\n", 255ae7668d0SJeff Kirsher priv->pldata->mii_mode); 256ae7668d0SJeff Kirsher return -ENOTSUPP; 257ae7668d0SJeff Kirsher } 258ae7668d0SJeff Kirsher 259ae7668d0SJeff Kirsher /* enable crc generation */ 260ae7668d0SJeff Kirsher ltq_etop_w32(PPE32_CGEN, LQ_PPE32_ENET_MAC_CFG); 261ae7668d0SJeff Kirsher 262ae7668d0SJeff Kirsher ltq_dma_init_port(DMA_PORT_ETOP); 263ae7668d0SJeff Kirsher 264ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 265ae7668d0SJeff Kirsher int irq = LTQ_DMA_CH0_INT + i; 266ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[i]; 267ae7668d0SJeff Kirsher 268ae7668d0SJeff Kirsher ch->idx = ch->dma.nr = i; 2692d946e5bSHauke Mehrtens ch->dma.dev = &priv->pdev->dev; 270ae7668d0SJeff Kirsher 271ae7668d0SJeff Kirsher if (IS_TX(i)) { 272ae7668d0SJeff Kirsher ltq_dma_alloc_tx(&ch->dma); 273dddb29e4SMichael Opdenacker request_irq(irq, ltq_etop_dma_irq, 0, "etop_tx", priv); 274ae7668d0SJeff Kirsher } else if (IS_RX(i)) { 275ae7668d0SJeff Kirsher ltq_dma_alloc_rx(&ch->dma); 276ae7668d0SJeff Kirsher for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM; 277ae7668d0SJeff Kirsher ch->dma.desc++) 278ae7668d0SJeff Kirsher if (ltq_etop_alloc_skb(ch)) 279ae7668d0SJeff Kirsher return -ENOMEM; 280ae7668d0SJeff Kirsher ch->dma.desc = 0; 281dddb29e4SMichael Opdenacker request_irq(irq, ltq_etop_dma_irq, 0, "etop_rx", priv); 282ae7668d0SJeff Kirsher } 283ae7668d0SJeff Kirsher ch->dma.irq = irq; 284ae7668d0SJeff Kirsher } 285ae7668d0SJeff Kirsher return 0; 286ae7668d0SJeff Kirsher } 287ae7668d0SJeff Kirsher 288ae7668d0SJeff Kirsher static void 289ae7668d0SJeff Kirsher ltq_etop_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 290ae7668d0SJeff Kirsher { 2917826d43fSJiri Pirko strlcpy(info->driver, "Lantiq ETOP", sizeof(info->driver)); 2927826d43fSJiri Pirko strlcpy(info->bus_info, "internal", sizeof(info->bus_info)); 2937826d43fSJiri Pirko strlcpy(info->version, DRV_VERSION, sizeof(info->version)); 294ae7668d0SJeff Kirsher } 295ae7668d0SJeff Kirsher 296ae7668d0SJeff Kirsher static const struct ethtool_ops ltq_etop_ethtool_ops = { 297ae7668d0SJeff Kirsher .get_drvinfo = ltq_etop_get_drvinfo, 298e3979ce9SFlorian Fainelli .nway_reset = phy_ethtool_nway_reset, 2995376d95fSPhilippe Reynes .get_link_ksettings = phy_ethtool_get_link_ksettings, 3005376d95fSPhilippe Reynes .set_link_ksettings = phy_ethtool_set_link_ksettings, 301ae7668d0SJeff Kirsher }; 302ae7668d0SJeff Kirsher 303ae7668d0SJeff Kirsher static int 304ae7668d0SJeff Kirsher ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data) 305ae7668d0SJeff Kirsher { 306ae7668d0SJeff Kirsher u32 val = MDIO_REQUEST | 307ae7668d0SJeff Kirsher ((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) | 308ae7668d0SJeff Kirsher ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) | 309ae7668d0SJeff Kirsher phy_data; 310ae7668d0SJeff Kirsher 311ae7668d0SJeff Kirsher while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) 312ae7668d0SJeff Kirsher ; 313ae7668d0SJeff Kirsher ltq_etop_w32(val, LTQ_ETOP_MDIO); 314ae7668d0SJeff Kirsher return 0; 315ae7668d0SJeff Kirsher } 316ae7668d0SJeff Kirsher 317ae7668d0SJeff Kirsher static int 318ae7668d0SJeff Kirsher ltq_etop_mdio_rd(struct mii_bus *bus, int phy_addr, int phy_reg) 319ae7668d0SJeff Kirsher { 320ae7668d0SJeff Kirsher u32 val = MDIO_REQUEST | MDIO_READ | 321ae7668d0SJeff Kirsher ((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) | 322ae7668d0SJeff Kirsher ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET); 323ae7668d0SJeff Kirsher 324ae7668d0SJeff Kirsher while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) 325ae7668d0SJeff Kirsher ; 326ae7668d0SJeff Kirsher ltq_etop_w32(val, LTQ_ETOP_MDIO); 327ae7668d0SJeff Kirsher while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) 328ae7668d0SJeff Kirsher ; 329ae7668d0SJeff Kirsher val = ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_VAL_MASK; 330ae7668d0SJeff Kirsher return val; 331ae7668d0SJeff Kirsher } 332ae7668d0SJeff Kirsher 333ae7668d0SJeff Kirsher static void 334ae7668d0SJeff Kirsher ltq_etop_mdio_link(struct net_device *dev) 335ae7668d0SJeff Kirsher { 336ae7668d0SJeff Kirsher /* nothing to do */ 337ae7668d0SJeff Kirsher } 338ae7668d0SJeff Kirsher 339ae7668d0SJeff Kirsher static int 340ae7668d0SJeff Kirsher ltq_etop_mdio_probe(struct net_device *dev) 341ae7668d0SJeff Kirsher { 342ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 3432a4fc4eaSAndrew Lunn struct phy_device *phydev; 344ae7668d0SJeff Kirsher 3452a4fc4eaSAndrew Lunn phydev = phy_find_first(priv->mii_bus); 346ae7668d0SJeff Kirsher 347ae7668d0SJeff Kirsher if (!phydev) { 348ae7668d0SJeff Kirsher netdev_err(dev, "no PHY found\n"); 349ae7668d0SJeff Kirsher return -ENODEV; 350ae7668d0SJeff Kirsher } 351ae7668d0SJeff Kirsher 35284eff6d1SAndrew Lunn phydev = phy_connect(dev, phydev_name(phydev), 353f9a8f83bSFlorian Fainelli <q_etop_mdio_link, priv->pldata->mii_mode); 354ae7668d0SJeff Kirsher 355ae7668d0SJeff Kirsher if (IS_ERR(phydev)) { 356ae7668d0SJeff Kirsher netdev_err(dev, "Could not attach to PHY\n"); 357ae7668d0SJeff Kirsher return PTR_ERR(phydev); 358ae7668d0SJeff Kirsher } 359ae7668d0SJeff Kirsher 36058056c1eSAndrew Lunn phy_set_max_speed(phydev, SPEED_100); 361ae7668d0SJeff Kirsher 3622220943aSAndrew Lunn phy_attached_info(phydev); 363ae7668d0SJeff Kirsher 364ae7668d0SJeff Kirsher return 0; 365ae7668d0SJeff Kirsher } 366ae7668d0SJeff Kirsher 367ae7668d0SJeff Kirsher static int 368ae7668d0SJeff Kirsher ltq_etop_mdio_init(struct net_device *dev) 369ae7668d0SJeff Kirsher { 370ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 371ae7668d0SJeff Kirsher int err; 372ae7668d0SJeff Kirsher 373ae7668d0SJeff Kirsher priv->mii_bus = mdiobus_alloc(); 374ae7668d0SJeff Kirsher if (!priv->mii_bus) { 375ae7668d0SJeff Kirsher netdev_err(dev, "failed to allocate mii bus\n"); 376ae7668d0SJeff Kirsher err = -ENOMEM; 377ae7668d0SJeff Kirsher goto err_out; 378ae7668d0SJeff Kirsher } 379ae7668d0SJeff Kirsher 380ae7668d0SJeff Kirsher priv->mii_bus->priv = dev; 381ae7668d0SJeff Kirsher priv->mii_bus->read = ltq_etop_mdio_rd; 382ae7668d0SJeff Kirsher priv->mii_bus->write = ltq_etop_mdio_wr; 383ae7668d0SJeff Kirsher priv->mii_bus->name = "ltq_mii"; 384d1b86507SFlorian Fainelli snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", 385d1b86507SFlorian Fainelli priv->pdev->name, priv->pdev->id); 386ae7668d0SJeff Kirsher if (mdiobus_register(priv->mii_bus)) { 387ae7668d0SJeff Kirsher err = -ENXIO; 388e7f4dc35SAndrew Lunn goto err_out_free_mdiobus; 389ae7668d0SJeff Kirsher } 390ae7668d0SJeff Kirsher 391ae7668d0SJeff Kirsher if (ltq_etop_mdio_probe(dev)) { 392ae7668d0SJeff Kirsher err = -ENXIO; 393ae7668d0SJeff Kirsher goto err_out_unregister_bus; 394ae7668d0SJeff Kirsher } 395ae7668d0SJeff Kirsher return 0; 396ae7668d0SJeff Kirsher 397ae7668d0SJeff Kirsher err_out_unregister_bus: 398ae7668d0SJeff Kirsher mdiobus_unregister(priv->mii_bus); 399ae7668d0SJeff Kirsher err_out_free_mdiobus: 400ae7668d0SJeff Kirsher mdiobus_free(priv->mii_bus); 401ae7668d0SJeff Kirsher err_out: 402ae7668d0SJeff Kirsher return err; 403ae7668d0SJeff Kirsher } 404ae7668d0SJeff Kirsher 405ae7668d0SJeff Kirsher static void 406ae7668d0SJeff Kirsher ltq_etop_mdio_cleanup(struct net_device *dev) 407ae7668d0SJeff Kirsher { 408ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 409ae7668d0SJeff Kirsher 410d1e3a356SPhilippe Reynes phy_disconnect(dev->phydev); 411ae7668d0SJeff Kirsher mdiobus_unregister(priv->mii_bus); 412ae7668d0SJeff Kirsher mdiobus_free(priv->mii_bus); 413ae7668d0SJeff Kirsher } 414ae7668d0SJeff Kirsher 415ae7668d0SJeff Kirsher static int 416ae7668d0SJeff Kirsher ltq_etop_open(struct net_device *dev) 417ae7668d0SJeff Kirsher { 418ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 419ae7668d0SJeff Kirsher int i; 420ae7668d0SJeff Kirsher 421ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 422ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[i]; 423ae7668d0SJeff Kirsher 424ae7668d0SJeff Kirsher if (!IS_TX(i) && (!IS_RX(i))) 425ae7668d0SJeff Kirsher continue; 426ae7668d0SJeff Kirsher ltq_dma_open(&ch->dma); 427cc973aecSHauke Mehrtens ltq_dma_enable_irq(&ch->dma); 428ae7668d0SJeff Kirsher napi_enable(&ch->napi); 429ae7668d0SJeff Kirsher } 430d1e3a356SPhilippe Reynes phy_start(dev->phydev); 431ae7668d0SJeff Kirsher netif_tx_start_all_queues(dev); 432ae7668d0SJeff Kirsher return 0; 433ae7668d0SJeff Kirsher } 434ae7668d0SJeff Kirsher 435ae7668d0SJeff Kirsher static int 436ae7668d0SJeff Kirsher ltq_etop_stop(struct net_device *dev) 437ae7668d0SJeff Kirsher { 438ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 439ae7668d0SJeff Kirsher int i; 440ae7668d0SJeff Kirsher 441ae7668d0SJeff Kirsher netif_tx_stop_all_queues(dev); 442d1e3a356SPhilippe Reynes phy_stop(dev->phydev); 443ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 444ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[i]; 445ae7668d0SJeff Kirsher 446ae7668d0SJeff Kirsher if (!IS_RX(i) && !IS_TX(i)) 447ae7668d0SJeff Kirsher continue; 448ae7668d0SJeff Kirsher napi_disable(&ch->napi); 449ae7668d0SJeff Kirsher ltq_dma_close(&ch->dma); 450ae7668d0SJeff Kirsher } 451ae7668d0SJeff Kirsher return 0; 452ae7668d0SJeff Kirsher } 453ae7668d0SJeff Kirsher 454ae7668d0SJeff Kirsher static int 455ae7668d0SJeff Kirsher ltq_etop_tx(struct sk_buff *skb, struct net_device *dev) 456ae7668d0SJeff Kirsher { 457ae7668d0SJeff Kirsher int queue = skb_get_queue_mapping(skb); 458ae7668d0SJeff Kirsher struct netdev_queue *txq = netdev_get_tx_queue(dev, queue); 459ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 460ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[(queue << 1) | 1]; 461ae7668d0SJeff Kirsher struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; 462ae7668d0SJeff Kirsher int len; 463ae7668d0SJeff Kirsher unsigned long flags; 464ae7668d0SJeff Kirsher u32 byte_offset; 465ae7668d0SJeff Kirsher 466ae7668d0SJeff Kirsher len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len; 467ae7668d0SJeff Kirsher 468ae7668d0SJeff Kirsher if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) { 469ae7668d0SJeff Kirsher dev_kfree_skb_any(skb); 470ae7668d0SJeff Kirsher netdev_err(dev, "tx ring full\n"); 471ae7668d0SJeff Kirsher netif_tx_stop_queue(txq); 472ae7668d0SJeff Kirsher return NETDEV_TX_BUSY; 473ae7668d0SJeff Kirsher } 474ae7668d0SJeff Kirsher 475ae7668d0SJeff Kirsher /* dma needs to start on a 16 byte aligned address */ 476ae7668d0SJeff Kirsher byte_offset = CPHYSADDR(skb->data) % 16; 477ae7668d0SJeff Kirsher ch->skb[ch->dma.desc] = skb; 478ae7668d0SJeff Kirsher 479860e9538SFlorian Westphal netif_trans_update(dev); 480ae7668d0SJeff Kirsher 481ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 48274e0deb8SChristoph Hellwig desc->addr = ((unsigned int) dma_map_single(&priv->pdev->dev, skb->data, len, 483ae7668d0SJeff Kirsher DMA_TO_DEVICE)) - byte_offset; 484ae7668d0SJeff Kirsher wmb(); 485ae7668d0SJeff Kirsher desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP | 486ae7668d0SJeff Kirsher LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK); 487ae7668d0SJeff Kirsher ch->dma.desc++; 488ae7668d0SJeff Kirsher ch->dma.desc %= LTQ_DESC_NUM; 489ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 490ae7668d0SJeff Kirsher 491ae7668d0SJeff Kirsher if (ch->dma.desc_base[ch->dma.desc].ctl & LTQ_DMA_OWN) 492ae7668d0SJeff Kirsher netif_tx_stop_queue(txq); 493ae7668d0SJeff Kirsher 494ae7668d0SJeff Kirsher return NETDEV_TX_OK; 495ae7668d0SJeff Kirsher } 496ae7668d0SJeff Kirsher 497ae7668d0SJeff Kirsher static int 498ae7668d0SJeff Kirsher ltq_etop_change_mtu(struct net_device *dev, int new_mtu) 499ae7668d0SJeff Kirsher { 500ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 501ae7668d0SJeff Kirsher unsigned long flags; 502ae7668d0SJeff Kirsher 503a52ad514SJarod Wilson dev->mtu = new_mtu; 504a52ad514SJarod Wilson 505ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 506a52ad514SJarod Wilson ltq_etop_w32((ETOP_PLEN_UNDER << 16) | new_mtu, LTQ_ETOP_IGPLEN); 507ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 508a52ad514SJarod Wilson 509a52ad514SJarod Wilson return 0; 510ae7668d0SJeff Kirsher } 511ae7668d0SJeff Kirsher 512ae7668d0SJeff Kirsher static int 513ae7668d0SJeff Kirsher ltq_etop_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 514ae7668d0SJeff Kirsher { 515ae7668d0SJeff Kirsher /* TODO: mii-toll reports "No MII transceiver present!." ?!*/ 516d1e3a356SPhilippe Reynes return phy_mii_ioctl(dev->phydev, rq, cmd); 517ae7668d0SJeff Kirsher } 518ae7668d0SJeff Kirsher 519ae7668d0SJeff Kirsher static int 520ae7668d0SJeff Kirsher ltq_etop_set_mac_address(struct net_device *dev, void *p) 521ae7668d0SJeff Kirsher { 522ae7668d0SJeff Kirsher int ret = eth_mac_addr(dev, p); 523ae7668d0SJeff Kirsher 524ae7668d0SJeff Kirsher if (!ret) { 525ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 526ae7668d0SJeff Kirsher unsigned long flags; 527ae7668d0SJeff Kirsher 528ae7668d0SJeff Kirsher /* store the mac for the unicast filter */ 529ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 530ae7668d0SJeff Kirsher ltq_etop_w32(*((u32 *)dev->dev_addr), LTQ_ETOP_MAC_DA0); 531ae7668d0SJeff Kirsher ltq_etop_w32(*((u16 *)&dev->dev_addr[4]) << 16, 532ae7668d0SJeff Kirsher LTQ_ETOP_MAC_DA1); 533ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 534ae7668d0SJeff Kirsher } 535ae7668d0SJeff Kirsher return ret; 536ae7668d0SJeff Kirsher } 537ae7668d0SJeff Kirsher 538ae7668d0SJeff Kirsher static void 539ae7668d0SJeff Kirsher ltq_etop_set_multicast_list(struct net_device *dev) 540ae7668d0SJeff Kirsher { 541ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 542ae7668d0SJeff Kirsher unsigned long flags; 543ae7668d0SJeff Kirsher 544ae7668d0SJeff Kirsher /* ensure that the unicast filter is not enabled in promiscious mode */ 545ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 546ae7668d0SJeff Kirsher if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI)) 547ae7668d0SJeff Kirsher ltq_etop_w32_mask(ETOP_FTCU, 0, LTQ_ETOP_ENETS0); 548ae7668d0SJeff Kirsher else 549ae7668d0SJeff Kirsher ltq_etop_w32_mask(0, ETOP_FTCU, LTQ_ETOP_ENETS0); 550ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 551ae7668d0SJeff Kirsher } 552ae7668d0SJeff Kirsher 553ae7668d0SJeff Kirsher static int 554ae7668d0SJeff Kirsher ltq_etop_init(struct net_device *dev) 555ae7668d0SJeff Kirsher { 556ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 557ae7668d0SJeff Kirsher struct sockaddr mac; 558ae7668d0SJeff Kirsher int err; 55943aabec5SDanny Kukawka bool random_mac = false; 560ae7668d0SJeff Kirsher 561ae7668d0SJeff Kirsher dev->watchdog_timeo = 10 * HZ; 562ae7668d0SJeff Kirsher err = ltq_etop_hw_init(dev); 563ae7668d0SJeff Kirsher if (err) 564ae7668d0SJeff Kirsher goto err_hw; 565ae7668d0SJeff Kirsher ltq_etop_change_mtu(dev, 1500); 566ae7668d0SJeff Kirsher 567ae7668d0SJeff Kirsher memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr)); 568ae7668d0SJeff Kirsher if (!is_valid_ether_addr(mac.sa_data)) { 569ae7668d0SJeff Kirsher pr_warn("etop: invalid MAC, using random\n"); 5707efd26d0SJoe Perches eth_random_addr(mac.sa_data); 57143aabec5SDanny Kukawka random_mac = true; 572ae7668d0SJeff Kirsher } 573ae7668d0SJeff Kirsher 574ae7668d0SJeff Kirsher err = ltq_etop_set_mac_address(dev, &mac); 575ae7668d0SJeff Kirsher if (err) 576ae7668d0SJeff Kirsher goto err_netdev; 57743aabec5SDanny Kukawka 57843aabec5SDanny Kukawka /* Set addr_assign_type here, ltq_etop_set_mac_address would reset it. */ 57943aabec5SDanny Kukawka if (random_mac) 580e41b2d7fSJiri Pirko dev->addr_assign_type = NET_ADDR_RANDOM; 58143aabec5SDanny Kukawka 582ae7668d0SJeff Kirsher ltq_etop_set_multicast_list(dev); 583ae7668d0SJeff Kirsher err = ltq_etop_mdio_init(dev); 584ae7668d0SJeff Kirsher if (err) 585ae7668d0SJeff Kirsher goto err_netdev; 586ae7668d0SJeff Kirsher return 0; 587ae7668d0SJeff Kirsher 588ae7668d0SJeff Kirsher err_netdev: 589ae7668d0SJeff Kirsher unregister_netdev(dev); 590ae7668d0SJeff Kirsher free_netdev(dev); 591ae7668d0SJeff Kirsher err_hw: 592ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 593ae7668d0SJeff Kirsher return err; 594ae7668d0SJeff Kirsher } 595ae7668d0SJeff Kirsher 596ae7668d0SJeff Kirsher static void 597ae7668d0SJeff Kirsher ltq_etop_tx_timeout(struct net_device *dev) 598ae7668d0SJeff Kirsher { 599ae7668d0SJeff Kirsher int err; 600ae7668d0SJeff Kirsher 601ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 602ae7668d0SJeff Kirsher err = ltq_etop_hw_init(dev); 603ae7668d0SJeff Kirsher if (err) 604ae7668d0SJeff Kirsher goto err_hw; 605860e9538SFlorian Westphal netif_trans_update(dev); 606ae7668d0SJeff Kirsher netif_wake_queue(dev); 607ae7668d0SJeff Kirsher return; 608ae7668d0SJeff Kirsher 609ae7668d0SJeff Kirsher err_hw: 610ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 611ae7668d0SJeff Kirsher netdev_err(dev, "failed to restart etop after TX timeout\n"); 612ae7668d0SJeff Kirsher } 613ae7668d0SJeff Kirsher 614ae7668d0SJeff Kirsher static const struct net_device_ops ltq_eth_netdev_ops = { 615ae7668d0SJeff Kirsher .ndo_open = ltq_etop_open, 616ae7668d0SJeff Kirsher .ndo_stop = ltq_etop_stop, 617ae7668d0SJeff Kirsher .ndo_start_xmit = ltq_etop_tx, 618ae7668d0SJeff Kirsher .ndo_change_mtu = ltq_etop_change_mtu, 619ae7668d0SJeff Kirsher .ndo_do_ioctl = ltq_etop_ioctl, 620ae7668d0SJeff Kirsher .ndo_set_mac_address = ltq_etop_set_mac_address, 621ae7668d0SJeff Kirsher .ndo_validate_addr = eth_validate_addr, 622afc4b13dSJiri Pirko .ndo_set_rx_mode = ltq_etop_set_multicast_list, 623a4ea8a3dSAlexander Duyck .ndo_select_queue = dev_pick_tx_zero, 624ae7668d0SJeff Kirsher .ndo_init = ltq_etop_init, 625ae7668d0SJeff Kirsher .ndo_tx_timeout = ltq_etop_tx_timeout, 626ae7668d0SJeff Kirsher }; 627ae7668d0SJeff Kirsher 628ae7668d0SJeff Kirsher static int __init 629ae7668d0SJeff Kirsher ltq_etop_probe(struct platform_device *pdev) 630ae7668d0SJeff Kirsher { 631ae7668d0SJeff Kirsher struct net_device *dev; 632ae7668d0SJeff Kirsher struct ltq_etop_priv *priv; 633ae7668d0SJeff Kirsher struct resource *res; 634ae7668d0SJeff Kirsher int err; 635ae7668d0SJeff Kirsher int i; 636ae7668d0SJeff Kirsher 637ae7668d0SJeff Kirsher res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 638ae7668d0SJeff Kirsher if (!res) { 639ae7668d0SJeff Kirsher dev_err(&pdev->dev, "failed to get etop resource\n"); 640ae7668d0SJeff Kirsher err = -ENOENT; 641ae7668d0SJeff Kirsher goto err_out; 642ae7668d0SJeff Kirsher } 643ae7668d0SJeff Kirsher 644ae7668d0SJeff Kirsher res = devm_request_mem_region(&pdev->dev, res->start, 645ae7668d0SJeff Kirsher resource_size(res), dev_name(&pdev->dev)); 646ae7668d0SJeff Kirsher if (!res) { 647ae7668d0SJeff Kirsher dev_err(&pdev->dev, "failed to request etop resource\n"); 648ae7668d0SJeff Kirsher err = -EBUSY; 649ae7668d0SJeff Kirsher goto err_out; 650ae7668d0SJeff Kirsher } 651ae7668d0SJeff Kirsher 6524bdc0d67SChristoph Hellwig ltq_etop_membase = devm_ioremap(&pdev->dev, 653ae7668d0SJeff Kirsher res->start, resource_size(res)); 654ae7668d0SJeff Kirsher if (!ltq_etop_membase) { 655ae7668d0SJeff Kirsher dev_err(&pdev->dev, "failed to remap etop engine %d\n", 656ae7668d0SJeff Kirsher pdev->id); 657ae7668d0SJeff Kirsher err = -ENOMEM; 658ae7668d0SJeff Kirsher goto err_out; 659ae7668d0SJeff Kirsher } 660ae7668d0SJeff Kirsher 661ae7668d0SJeff Kirsher dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4); 66241de8d4cSJoe Perches if (!dev) { 66341de8d4cSJoe Perches err = -ENOMEM; 66441de8d4cSJoe Perches goto err_out; 66541de8d4cSJoe Perches } 666ae7668d0SJeff Kirsher strcpy(dev->name, "eth%d"); 667ae7668d0SJeff Kirsher dev->netdev_ops = <q_eth_netdev_ops; 668ae7668d0SJeff Kirsher dev->ethtool_ops = <q_etop_ethtool_ops; 669ae7668d0SJeff Kirsher priv = netdev_priv(dev); 670ae7668d0SJeff Kirsher priv->res = res; 671d1b86507SFlorian Fainelli priv->pdev = pdev; 672ae7668d0SJeff Kirsher priv->pldata = dev_get_platdata(&pdev->dev); 673ae7668d0SJeff Kirsher priv->netdev = dev; 674ae7668d0SJeff Kirsher spin_lock_init(&priv->lock); 6759cecb138SFlorian Fainelli SET_NETDEV_DEV(dev, &pdev->dev); 676ae7668d0SJeff Kirsher 677ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 678ae7668d0SJeff Kirsher if (IS_TX(i)) 679ae7668d0SJeff Kirsher netif_napi_add(dev, &priv->ch[i].napi, 680ae7668d0SJeff Kirsher ltq_etop_poll_tx, 8); 681ae7668d0SJeff Kirsher else if (IS_RX(i)) 682ae7668d0SJeff Kirsher netif_napi_add(dev, &priv->ch[i].napi, 683ae7668d0SJeff Kirsher ltq_etop_poll_rx, 32); 684ae7668d0SJeff Kirsher priv->ch[i].netdev = dev; 685ae7668d0SJeff Kirsher } 686ae7668d0SJeff Kirsher 687ae7668d0SJeff Kirsher err = register_netdev(dev); 688ae7668d0SJeff Kirsher if (err) 689ae7668d0SJeff Kirsher goto err_free; 690ae7668d0SJeff Kirsher 691ae7668d0SJeff Kirsher platform_set_drvdata(pdev, dev); 692ae7668d0SJeff Kirsher return 0; 693ae7668d0SJeff Kirsher 694ae7668d0SJeff Kirsher err_free: 695cb0e51d8SWei Yongjun free_netdev(dev); 696ae7668d0SJeff Kirsher err_out: 697ae7668d0SJeff Kirsher return err; 698ae7668d0SJeff Kirsher } 699ae7668d0SJeff Kirsher 700a0a4efedSBill Pemberton static int 701ae7668d0SJeff Kirsher ltq_etop_remove(struct platform_device *pdev) 702ae7668d0SJeff Kirsher { 703ae7668d0SJeff Kirsher struct net_device *dev = platform_get_drvdata(pdev); 704ae7668d0SJeff Kirsher 705ae7668d0SJeff Kirsher if (dev) { 706ae7668d0SJeff Kirsher netif_tx_stop_all_queues(dev); 707ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 708ae7668d0SJeff Kirsher ltq_etop_mdio_cleanup(dev); 709ae7668d0SJeff Kirsher unregister_netdev(dev); 710ae7668d0SJeff Kirsher } 711ae7668d0SJeff Kirsher return 0; 712ae7668d0SJeff Kirsher } 713ae7668d0SJeff Kirsher 714ae7668d0SJeff Kirsher static struct platform_driver ltq_mii_driver = { 715a0a4efedSBill Pemberton .remove = ltq_etop_remove, 716ae7668d0SJeff Kirsher .driver = { 717ae7668d0SJeff Kirsher .name = "ltq_etop", 718ae7668d0SJeff Kirsher }, 719ae7668d0SJeff Kirsher }; 720ae7668d0SJeff Kirsher 721ae7668d0SJeff Kirsher int __init 722ae7668d0SJeff Kirsher init_ltq_etop(void) 723ae7668d0SJeff Kirsher { 724ae7668d0SJeff Kirsher int ret = platform_driver_probe(<q_mii_driver, ltq_etop_probe); 725ae7668d0SJeff Kirsher 726ae7668d0SJeff Kirsher if (ret) 727772301b6SMasanari Iida pr_err("ltq_etop: Error registering platform driver!"); 728ae7668d0SJeff Kirsher return ret; 729ae7668d0SJeff Kirsher } 730ae7668d0SJeff Kirsher 731ae7668d0SJeff Kirsher static void __exit 732ae7668d0SJeff Kirsher exit_ltq_etop(void) 733ae7668d0SJeff Kirsher { 734ae7668d0SJeff Kirsher platform_driver_unregister(<q_mii_driver); 735ae7668d0SJeff Kirsher } 736ae7668d0SJeff Kirsher 737ae7668d0SJeff Kirsher module_init(init_ltq_etop); 738ae7668d0SJeff Kirsher module_exit(exit_ltq_etop); 739ae7668d0SJeff Kirsher 740ae7668d0SJeff Kirsher MODULE_AUTHOR("John Crispin <blogic@openwrt.org>"); 741ae7668d0SJeff Kirsher MODULE_DESCRIPTION("Lantiq SoC ETOP"); 742ae7668d0SJeff Kirsher MODULE_LICENSE("GPL"); 743