1ae7668d0SJeff Kirsher /* 2ae7668d0SJeff Kirsher * This program is free software; you can redistribute it and/or modify it 3ae7668d0SJeff Kirsher * under the terms of the GNU General Public License version 2 as published 4ae7668d0SJeff Kirsher * by the Free Software Foundation. 5ae7668d0SJeff Kirsher * 6ae7668d0SJeff Kirsher * This program is distributed in the hope that it will be useful, 7ae7668d0SJeff Kirsher * but WITHOUT ANY WARRANTY; without even the implied warranty of 8ae7668d0SJeff Kirsher * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9ae7668d0SJeff Kirsher * GNU General Public License for more details. 10ae7668d0SJeff Kirsher * 11ae7668d0SJeff Kirsher * You should have received a copy of the GNU General Public License 120ab75ae8SJeff Kirsher * along with this program; if not, see <http://www.gnu.org/licenses/>. 13ae7668d0SJeff Kirsher * 14ae7668d0SJeff Kirsher * Copyright (C) 2011 John Crispin <blogic@openwrt.org> 15ae7668d0SJeff Kirsher */ 16ae7668d0SJeff Kirsher 17ae7668d0SJeff Kirsher #include <linux/kernel.h> 18ae7668d0SJeff Kirsher #include <linux/slab.h> 19ae7668d0SJeff Kirsher #include <linux/errno.h> 20ae7668d0SJeff Kirsher #include <linux/types.h> 21ae7668d0SJeff Kirsher #include <linux/interrupt.h> 22ae7668d0SJeff Kirsher #include <linux/uaccess.h> 23ae7668d0SJeff Kirsher #include <linux/in.h> 24ae7668d0SJeff Kirsher #include <linux/netdevice.h> 25ae7668d0SJeff Kirsher #include <linux/etherdevice.h> 26ae7668d0SJeff Kirsher #include <linux/phy.h> 27ae7668d0SJeff Kirsher #include <linux/ip.h> 28ae7668d0SJeff Kirsher #include <linux/tcp.h> 29ae7668d0SJeff Kirsher #include <linux/skbuff.h> 30ae7668d0SJeff Kirsher #include <linux/mm.h> 31ae7668d0SJeff Kirsher #include <linux/platform_device.h> 32ae7668d0SJeff Kirsher #include <linux/ethtool.h> 33ae7668d0SJeff Kirsher #include <linux/init.h> 34ae7668d0SJeff Kirsher #include <linux/delay.h> 35ae7668d0SJeff Kirsher #include <linux/io.h> 36a32fd63dSJohn Crispin #include <linux/dma-mapping.h> 37a32fd63dSJohn Crispin #include <linux/module.h> 38ae7668d0SJeff Kirsher 39ae7668d0SJeff Kirsher #include <asm/checksum.h> 40ae7668d0SJeff Kirsher 41ae7668d0SJeff Kirsher #include <lantiq_soc.h> 42ae7668d0SJeff Kirsher #include <xway_dma.h> 43ae7668d0SJeff Kirsher #include <lantiq_platform.h> 44ae7668d0SJeff Kirsher 45ae7668d0SJeff Kirsher #define LTQ_ETOP_MDIO 0x11804 46ae7668d0SJeff Kirsher #define MDIO_REQUEST 0x80000000 47ae7668d0SJeff Kirsher #define MDIO_READ 0x40000000 48ae7668d0SJeff Kirsher #define MDIO_ADDR_MASK 0x1f 49ae7668d0SJeff Kirsher #define MDIO_ADDR_OFFSET 0x15 50ae7668d0SJeff Kirsher #define MDIO_REG_MASK 0x1f 51ae7668d0SJeff Kirsher #define MDIO_REG_OFFSET 0x10 52ae7668d0SJeff Kirsher #define MDIO_VAL_MASK 0xffff 53ae7668d0SJeff Kirsher 54ae7668d0SJeff Kirsher #define PPE32_CGEN 0x800 55ae7668d0SJeff Kirsher #define LQ_PPE32_ENET_MAC_CFG 0x1840 56ae7668d0SJeff Kirsher 57ae7668d0SJeff Kirsher #define LTQ_ETOP_ENETS0 0x11850 58ae7668d0SJeff Kirsher #define LTQ_ETOP_MAC_DA0 0x1186C 59ae7668d0SJeff Kirsher #define LTQ_ETOP_MAC_DA1 0x11870 60ae7668d0SJeff Kirsher #define LTQ_ETOP_CFG 0x16020 61ae7668d0SJeff Kirsher #define LTQ_ETOP_IGPLEN 0x16080 62ae7668d0SJeff Kirsher 63ae7668d0SJeff Kirsher #define MAX_DMA_CHAN 0x8 64ae7668d0SJeff Kirsher #define MAX_DMA_CRC_LEN 0x4 65ae7668d0SJeff Kirsher #define MAX_DMA_DATA_LEN 0x600 66ae7668d0SJeff Kirsher 67ae7668d0SJeff Kirsher #define ETOP_FTCU BIT(28) 68ae7668d0SJeff Kirsher #define ETOP_MII_MASK 0xf 69ae7668d0SJeff Kirsher #define ETOP_MII_NORMAL 0xd 70ae7668d0SJeff Kirsher #define ETOP_MII_REVERSE 0xe 71ae7668d0SJeff Kirsher #define ETOP_PLEN_UNDER 0x40 72ae7668d0SJeff Kirsher #define ETOP_CGEN 0x800 73ae7668d0SJeff Kirsher 74ae7668d0SJeff Kirsher /* use 2 static channels for TX/RX */ 75ae7668d0SJeff Kirsher #define LTQ_ETOP_TX_CHANNEL 1 76ae7668d0SJeff Kirsher #define LTQ_ETOP_RX_CHANNEL 6 77ae7668d0SJeff Kirsher #define IS_TX(x) (x == LTQ_ETOP_TX_CHANNEL) 78ae7668d0SJeff Kirsher #define IS_RX(x) (x == LTQ_ETOP_RX_CHANNEL) 79ae7668d0SJeff Kirsher 80ae7668d0SJeff Kirsher #define ltq_etop_r32(x) ltq_r32(ltq_etop_membase + (x)) 81ae7668d0SJeff Kirsher #define ltq_etop_w32(x, y) ltq_w32(x, ltq_etop_membase + (y)) 82ae7668d0SJeff Kirsher #define ltq_etop_w32_mask(x, y, z) \ 83ae7668d0SJeff Kirsher ltq_w32_mask(x, y, ltq_etop_membase + (z)) 84ae7668d0SJeff Kirsher 85ae7668d0SJeff Kirsher #define DRV_VERSION "1.0" 86ae7668d0SJeff Kirsher 87ae7668d0SJeff Kirsher static void __iomem *ltq_etop_membase; 88ae7668d0SJeff Kirsher 89ae7668d0SJeff Kirsher struct ltq_etop_chan { 90ae7668d0SJeff Kirsher int idx; 91ae7668d0SJeff Kirsher int tx_free; 92ae7668d0SJeff Kirsher struct net_device *netdev; 93ae7668d0SJeff Kirsher struct napi_struct napi; 94ae7668d0SJeff Kirsher struct ltq_dma_channel dma; 95ae7668d0SJeff Kirsher struct sk_buff *skb[LTQ_DESC_NUM]; 96ae7668d0SJeff Kirsher }; 97ae7668d0SJeff Kirsher 98ae7668d0SJeff Kirsher struct ltq_etop_priv { 99ae7668d0SJeff Kirsher struct net_device *netdev; 100d1b86507SFlorian Fainelli struct platform_device *pdev; 101ae7668d0SJeff Kirsher struct ltq_eth_data *pldata; 102ae7668d0SJeff Kirsher struct resource *res; 103ae7668d0SJeff Kirsher 104ae7668d0SJeff Kirsher struct mii_bus *mii_bus; 105ae7668d0SJeff Kirsher struct phy_device *phydev; 106ae7668d0SJeff Kirsher 107ae7668d0SJeff Kirsher struct ltq_etop_chan ch[MAX_DMA_CHAN]; 108ae7668d0SJeff Kirsher int tx_free[MAX_DMA_CHAN >> 1]; 109ae7668d0SJeff Kirsher 110ae7668d0SJeff Kirsher spinlock_t lock; 111ae7668d0SJeff Kirsher }; 112ae7668d0SJeff Kirsher 113ae7668d0SJeff Kirsher static int 114ae7668d0SJeff Kirsher ltq_etop_alloc_skb(struct ltq_etop_chan *ch) 115ae7668d0SJeff Kirsher { 116c056b734SPradeep A Dalvi ch->skb[ch->dma.desc] = netdev_alloc_skb(ch->netdev, MAX_DMA_DATA_LEN); 117ae7668d0SJeff Kirsher if (!ch->skb[ch->dma.desc]) 118ae7668d0SJeff Kirsher return -ENOMEM; 119ae7668d0SJeff Kirsher ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(NULL, 120ae7668d0SJeff Kirsher ch->skb[ch->dma.desc]->data, MAX_DMA_DATA_LEN, 121ae7668d0SJeff Kirsher DMA_FROM_DEVICE); 122ae7668d0SJeff Kirsher ch->dma.desc_base[ch->dma.desc].addr = 123ae7668d0SJeff Kirsher CPHYSADDR(ch->skb[ch->dma.desc]->data); 124ae7668d0SJeff Kirsher ch->dma.desc_base[ch->dma.desc].ctl = 125ae7668d0SJeff Kirsher LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | 126ae7668d0SJeff Kirsher MAX_DMA_DATA_LEN; 127ae7668d0SJeff Kirsher skb_reserve(ch->skb[ch->dma.desc], NET_IP_ALIGN); 128ae7668d0SJeff Kirsher return 0; 129ae7668d0SJeff Kirsher } 130ae7668d0SJeff Kirsher 131ae7668d0SJeff Kirsher static void 132ae7668d0SJeff Kirsher ltq_etop_hw_receive(struct ltq_etop_chan *ch) 133ae7668d0SJeff Kirsher { 134ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(ch->netdev); 135ae7668d0SJeff Kirsher struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; 136ae7668d0SJeff Kirsher struct sk_buff *skb = ch->skb[ch->dma.desc]; 137ae7668d0SJeff Kirsher int len = (desc->ctl & LTQ_DMA_SIZE_MASK) - MAX_DMA_CRC_LEN; 138ae7668d0SJeff Kirsher unsigned long flags; 139ae7668d0SJeff Kirsher 140ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 141ae7668d0SJeff Kirsher if (ltq_etop_alloc_skb(ch)) { 142ae7668d0SJeff Kirsher netdev_err(ch->netdev, 143ae7668d0SJeff Kirsher "failed to allocate new rx buffer, stopping DMA\n"); 144ae7668d0SJeff Kirsher ltq_dma_close(&ch->dma); 145ae7668d0SJeff Kirsher } 146ae7668d0SJeff Kirsher ch->dma.desc++; 147ae7668d0SJeff Kirsher ch->dma.desc %= LTQ_DESC_NUM; 148ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 149ae7668d0SJeff Kirsher 150ae7668d0SJeff Kirsher skb_put(skb, len); 151ae7668d0SJeff Kirsher skb->protocol = eth_type_trans(skb, ch->netdev); 152ae7668d0SJeff Kirsher netif_receive_skb(skb); 153ae7668d0SJeff Kirsher } 154ae7668d0SJeff Kirsher 155ae7668d0SJeff Kirsher static int 156ae7668d0SJeff Kirsher ltq_etop_poll_rx(struct napi_struct *napi, int budget) 157ae7668d0SJeff Kirsher { 158ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = container_of(napi, 159ae7668d0SJeff Kirsher struct ltq_etop_chan, napi); 160ae7668d0SJeff Kirsher int rx = 0; 161ae7668d0SJeff Kirsher int complete = 0; 162ae7668d0SJeff Kirsher 163ae7668d0SJeff Kirsher while ((rx < budget) && !complete) { 164ae7668d0SJeff Kirsher struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; 165ae7668d0SJeff Kirsher 166ae7668d0SJeff Kirsher if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) { 167ae7668d0SJeff Kirsher ltq_etop_hw_receive(ch); 168ae7668d0SJeff Kirsher rx++; 169ae7668d0SJeff Kirsher } else { 170ae7668d0SJeff Kirsher complete = 1; 171ae7668d0SJeff Kirsher } 172ae7668d0SJeff Kirsher } 173ae7668d0SJeff Kirsher if (complete || !rx) { 174ae7668d0SJeff Kirsher napi_complete(&ch->napi); 175ae7668d0SJeff Kirsher ltq_dma_ack_irq(&ch->dma); 176ae7668d0SJeff Kirsher } 177ae7668d0SJeff Kirsher return rx; 178ae7668d0SJeff Kirsher } 179ae7668d0SJeff Kirsher 180ae7668d0SJeff Kirsher static int 181ae7668d0SJeff Kirsher ltq_etop_poll_tx(struct napi_struct *napi, int budget) 182ae7668d0SJeff Kirsher { 183ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = 184ae7668d0SJeff Kirsher container_of(napi, struct ltq_etop_chan, napi); 185ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(ch->netdev); 186ae7668d0SJeff Kirsher struct netdev_queue *txq = 187ae7668d0SJeff Kirsher netdev_get_tx_queue(ch->netdev, ch->idx >> 1); 188ae7668d0SJeff Kirsher unsigned long flags; 189ae7668d0SJeff Kirsher 190ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 191ae7668d0SJeff Kirsher while ((ch->dma.desc_base[ch->tx_free].ctl & 192ae7668d0SJeff Kirsher (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) { 193ae7668d0SJeff Kirsher dev_kfree_skb_any(ch->skb[ch->tx_free]); 194ae7668d0SJeff Kirsher ch->skb[ch->tx_free] = NULL; 195ae7668d0SJeff Kirsher memset(&ch->dma.desc_base[ch->tx_free], 0, 196ae7668d0SJeff Kirsher sizeof(struct ltq_dma_desc)); 197ae7668d0SJeff Kirsher ch->tx_free++; 198ae7668d0SJeff Kirsher ch->tx_free %= LTQ_DESC_NUM; 199ae7668d0SJeff Kirsher } 200ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 201ae7668d0SJeff Kirsher 202ae7668d0SJeff Kirsher if (netif_tx_queue_stopped(txq)) 203ae7668d0SJeff Kirsher netif_tx_start_queue(txq); 204ae7668d0SJeff Kirsher napi_complete(&ch->napi); 205ae7668d0SJeff Kirsher ltq_dma_ack_irq(&ch->dma); 206ae7668d0SJeff Kirsher return 1; 207ae7668d0SJeff Kirsher } 208ae7668d0SJeff Kirsher 209ae7668d0SJeff Kirsher static irqreturn_t 210ae7668d0SJeff Kirsher ltq_etop_dma_irq(int irq, void *_priv) 211ae7668d0SJeff Kirsher { 212ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = _priv; 213ae7668d0SJeff Kirsher int ch = irq - LTQ_DMA_CH0_INT; 214ae7668d0SJeff Kirsher 215ae7668d0SJeff Kirsher napi_schedule(&priv->ch[ch].napi); 216ae7668d0SJeff Kirsher return IRQ_HANDLED; 217ae7668d0SJeff Kirsher } 218ae7668d0SJeff Kirsher 219ae7668d0SJeff Kirsher static void 220ae7668d0SJeff Kirsher ltq_etop_free_channel(struct net_device *dev, struct ltq_etop_chan *ch) 221ae7668d0SJeff Kirsher { 222ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 223ae7668d0SJeff Kirsher 224ae7668d0SJeff Kirsher ltq_dma_free(&ch->dma); 225ae7668d0SJeff Kirsher if (ch->dma.irq) 226ae7668d0SJeff Kirsher free_irq(ch->dma.irq, priv); 227ae7668d0SJeff Kirsher if (IS_RX(ch->idx)) { 228ae7668d0SJeff Kirsher int desc; 229ae7668d0SJeff Kirsher for (desc = 0; desc < LTQ_DESC_NUM; desc++) 230ae7668d0SJeff Kirsher dev_kfree_skb_any(ch->skb[ch->dma.desc]); 231ae7668d0SJeff Kirsher } 232ae7668d0SJeff Kirsher } 233ae7668d0SJeff Kirsher 234ae7668d0SJeff Kirsher static void 235ae7668d0SJeff Kirsher ltq_etop_hw_exit(struct net_device *dev) 236ae7668d0SJeff Kirsher { 237ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 238ae7668d0SJeff Kirsher int i; 239ae7668d0SJeff Kirsher 240ae7668d0SJeff Kirsher ltq_pmu_disable(PMU_PPE); 241ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) 242ae7668d0SJeff Kirsher if (IS_TX(i) || IS_RX(i)) 243ae7668d0SJeff Kirsher ltq_etop_free_channel(dev, &priv->ch[i]); 244ae7668d0SJeff Kirsher } 245ae7668d0SJeff Kirsher 246ae7668d0SJeff Kirsher static int 247ae7668d0SJeff Kirsher ltq_etop_hw_init(struct net_device *dev) 248ae7668d0SJeff Kirsher { 249ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 250ae7668d0SJeff Kirsher int i; 251ae7668d0SJeff Kirsher 252ae7668d0SJeff Kirsher ltq_pmu_enable(PMU_PPE); 253ae7668d0SJeff Kirsher 254ae7668d0SJeff Kirsher switch (priv->pldata->mii_mode) { 255ae7668d0SJeff Kirsher case PHY_INTERFACE_MODE_RMII: 256ae7668d0SJeff Kirsher ltq_etop_w32_mask(ETOP_MII_MASK, 257ae7668d0SJeff Kirsher ETOP_MII_REVERSE, LTQ_ETOP_CFG); 258ae7668d0SJeff Kirsher break; 259ae7668d0SJeff Kirsher 260ae7668d0SJeff Kirsher case PHY_INTERFACE_MODE_MII: 261ae7668d0SJeff Kirsher ltq_etop_w32_mask(ETOP_MII_MASK, 262ae7668d0SJeff Kirsher ETOP_MII_NORMAL, LTQ_ETOP_CFG); 263ae7668d0SJeff Kirsher break; 264ae7668d0SJeff Kirsher 265ae7668d0SJeff Kirsher default: 266ae7668d0SJeff Kirsher netdev_err(dev, "unknown mii mode %d\n", 267ae7668d0SJeff Kirsher priv->pldata->mii_mode); 268ae7668d0SJeff Kirsher return -ENOTSUPP; 269ae7668d0SJeff Kirsher } 270ae7668d0SJeff Kirsher 271ae7668d0SJeff Kirsher /* enable crc generation */ 272ae7668d0SJeff Kirsher ltq_etop_w32(PPE32_CGEN, LQ_PPE32_ENET_MAC_CFG); 273ae7668d0SJeff Kirsher 274ae7668d0SJeff Kirsher ltq_dma_init_port(DMA_PORT_ETOP); 275ae7668d0SJeff Kirsher 276ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 277ae7668d0SJeff Kirsher int irq = LTQ_DMA_CH0_INT + i; 278ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[i]; 279ae7668d0SJeff Kirsher 280ae7668d0SJeff Kirsher ch->idx = ch->dma.nr = i; 281ae7668d0SJeff Kirsher 282ae7668d0SJeff Kirsher if (IS_TX(i)) { 283ae7668d0SJeff Kirsher ltq_dma_alloc_tx(&ch->dma); 284dddb29e4SMichael Opdenacker request_irq(irq, ltq_etop_dma_irq, 0, "etop_tx", priv); 285ae7668d0SJeff Kirsher } else if (IS_RX(i)) { 286ae7668d0SJeff Kirsher ltq_dma_alloc_rx(&ch->dma); 287ae7668d0SJeff Kirsher for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM; 288ae7668d0SJeff Kirsher ch->dma.desc++) 289ae7668d0SJeff Kirsher if (ltq_etop_alloc_skb(ch)) 290ae7668d0SJeff Kirsher return -ENOMEM; 291ae7668d0SJeff Kirsher ch->dma.desc = 0; 292dddb29e4SMichael Opdenacker request_irq(irq, ltq_etop_dma_irq, 0, "etop_rx", priv); 293ae7668d0SJeff Kirsher } 294ae7668d0SJeff Kirsher ch->dma.irq = irq; 295ae7668d0SJeff Kirsher } 296ae7668d0SJeff Kirsher return 0; 297ae7668d0SJeff Kirsher } 298ae7668d0SJeff Kirsher 299ae7668d0SJeff Kirsher static void 300ae7668d0SJeff Kirsher ltq_etop_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 301ae7668d0SJeff Kirsher { 3027826d43fSJiri Pirko strlcpy(info->driver, "Lantiq ETOP", sizeof(info->driver)); 3037826d43fSJiri Pirko strlcpy(info->bus_info, "internal", sizeof(info->bus_info)); 3047826d43fSJiri Pirko strlcpy(info->version, DRV_VERSION, sizeof(info->version)); 305ae7668d0SJeff Kirsher } 306ae7668d0SJeff Kirsher 307ae7668d0SJeff Kirsher static int 308ae7668d0SJeff Kirsher ltq_etop_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) 309ae7668d0SJeff Kirsher { 310ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 311ae7668d0SJeff Kirsher 312ae7668d0SJeff Kirsher return phy_ethtool_gset(priv->phydev, cmd); 313ae7668d0SJeff Kirsher } 314ae7668d0SJeff Kirsher 315ae7668d0SJeff Kirsher static int 316ae7668d0SJeff Kirsher ltq_etop_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) 317ae7668d0SJeff Kirsher { 318ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 319ae7668d0SJeff Kirsher 320ae7668d0SJeff Kirsher return phy_ethtool_sset(priv->phydev, cmd); 321ae7668d0SJeff Kirsher } 322ae7668d0SJeff Kirsher 323ae7668d0SJeff Kirsher static int 324ae7668d0SJeff Kirsher ltq_etop_nway_reset(struct net_device *dev) 325ae7668d0SJeff Kirsher { 326ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 327ae7668d0SJeff Kirsher 328ae7668d0SJeff Kirsher return phy_start_aneg(priv->phydev); 329ae7668d0SJeff Kirsher } 330ae7668d0SJeff Kirsher 331ae7668d0SJeff Kirsher static const struct ethtool_ops ltq_etop_ethtool_ops = { 332ae7668d0SJeff Kirsher .get_drvinfo = ltq_etop_get_drvinfo, 333ae7668d0SJeff Kirsher .get_settings = ltq_etop_get_settings, 334ae7668d0SJeff Kirsher .set_settings = ltq_etop_set_settings, 335ae7668d0SJeff Kirsher .nway_reset = ltq_etop_nway_reset, 336ae7668d0SJeff Kirsher }; 337ae7668d0SJeff Kirsher 338ae7668d0SJeff Kirsher static int 339ae7668d0SJeff Kirsher ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data) 340ae7668d0SJeff Kirsher { 341ae7668d0SJeff Kirsher u32 val = MDIO_REQUEST | 342ae7668d0SJeff Kirsher ((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) | 343ae7668d0SJeff Kirsher ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) | 344ae7668d0SJeff Kirsher phy_data; 345ae7668d0SJeff Kirsher 346ae7668d0SJeff Kirsher while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) 347ae7668d0SJeff Kirsher ; 348ae7668d0SJeff Kirsher ltq_etop_w32(val, LTQ_ETOP_MDIO); 349ae7668d0SJeff Kirsher return 0; 350ae7668d0SJeff Kirsher } 351ae7668d0SJeff Kirsher 352ae7668d0SJeff Kirsher static int 353ae7668d0SJeff Kirsher ltq_etop_mdio_rd(struct mii_bus *bus, int phy_addr, int phy_reg) 354ae7668d0SJeff Kirsher { 355ae7668d0SJeff Kirsher u32 val = MDIO_REQUEST | MDIO_READ | 356ae7668d0SJeff Kirsher ((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) | 357ae7668d0SJeff Kirsher ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET); 358ae7668d0SJeff Kirsher 359ae7668d0SJeff Kirsher while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) 360ae7668d0SJeff Kirsher ; 361ae7668d0SJeff Kirsher ltq_etop_w32(val, LTQ_ETOP_MDIO); 362ae7668d0SJeff Kirsher while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) 363ae7668d0SJeff Kirsher ; 364ae7668d0SJeff Kirsher val = ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_VAL_MASK; 365ae7668d0SJeff Kirsher return val; 366ae7668d0SJeff Kirsher } 367ae7668d0SJeff Kirsher 368ae7668d0SJeff Kirsher static void 369ae7668d0SJeff Kirsher ltq_etop_mdio_link(struct net_device *dev) 370ae7668d0SJeff Kirsher { 371ae7668d0SJeff Kirsher /* nothing to do */ 372ae7668d0SJeff Kirsher } 373ae7668d0SJeff Kirsher 374ae7668d0SJeff Kirsher static int 375ae7668d0SJeff Kirsher ltq_etop_mdio_probe(struct net_device *dev) 376ae7668d0SJeff Kirsher { 377ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 3782a4fc4eaSAndrew Lunn struct phy_device *phydev; 379ae7668d0SJeff Kirsher 3802a4fc4eaSAndrew Lunn phydev = phy_find_first(priv->mii_bus); 381ae7668d0SJeff Kirsher 382ae7668d0SJeff Kirsher if (!phydev) { 383ae7668d0SJeff Kirsher netdev_err(dev, "no PHY found\n"); 384ae7668d0SJeff Kirsher return -ENODEV; 385ae7668d0SJeff Kirsher } 386ae7668d0SJeff Kirsher 38784eff6d1SAndrew Lunn phydev = phy_connect(dev, phydev_name(phydev), 388f9a8f83bSFlorian Fainelli <q_etop_mdio_link, priv->pldata->mii_mode); 389ae7668d0SJeff Kirsher 390ae7668d0SJeff Kirsher if (IS_ERR(phydev)) { 391ae7668d0SJeff Kirsher netdev_err(dev, "Could not attach to PHY\n"); 392ae7668d0SJeff Kirsher return PTR_ERR(phydev); 393ae7668d0SJeff Kirsher } 394ae7668d0SJeff Kirsher 395ae7668d0SJeff Kirsher phydev->supported &= (SUPPORTED_10baseT_Half 396ae7668d0SJeff Kirsher | SUPPORTED_10baseT_Full 397ae7668d0SJeff Kirsher | SUPPORTED_100baseT_Half 398ae7668d0SJeff Kirsher | SUPPORTED_100baseT_Full 399ae7668d0SJeff Kirsher | SUPPORTED_Autoneg 400ae7668d0SJeff Kirsher | SUPPORTED_MII 401ae7668d0SJeff Kirsher | SUPPORTED_TP); 402ae7668d0SJeff Kirsher 403ae7668d0SJeff Kirsher phydev->advertising = phydev->supported; 404ae7668d0SJeff Kirsher priv->phydev = phydev; 4052220943aSAndrew Lunn phy_attached_info(phydev); 406ae7668d0SJeff Kirsher 407ae7668d0SJeff Kirsher return 0; 408ae7668d0SJeff Kirsher } 409ae7668d0SJeff Kirsher 410ae7668d0SJeff Kirsher static int 411ae7668d0SJeff Kirsher ltq_etop_mdio_init(struct net_device *dev) 412ae7668d0SJeff Kirsher { 413ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 414ae7668d0SJeff Kirsher int i; 415ae7668d0SJeff Kirsher int err; 416ae7668d0SJeff Kirsher 417ae7668d0SJeff Kirsher priv->mii_bus = mdiobus_alloc(); 418ae7668d0SJeff Kirsher if (!priv->mii_bus) { 419ae7668d0SJeff Kirsher netdev_err(dev, "failed to allocate mii bus\n"); 420ae7668d0SJeff Kirsher err = -ENOMEM; 421ae7668d0SJeff Kirsher goto err_out; 422ae7668d0SJeff Kirsher } 423ae7668d0SJeff Kirsher 424ae7668d0SJeff Kirsher priv->mii_bus->priv = dev; 425ae7668d0SJeff Kirsher priv->mii_bus->read = ltq_etop_mdio_rd; 426ae7668d0SJeff Kirsher priv->mii_bus->write = ltq_etop_mdio_wr; 427ae7668d0SJeff Kirsher priv->mii_bus->name = "ltq_mii"; 428d1b86507SFlorian Fainelli snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", 429d1b86507SFlorian Fainelli priv->pdev->name, priv->pdev->id); 430ae7668d0SJeff Kirsher if (mdiobus_register(priv->mii_bus)) { 431ae7668d0SJeff Kirsher err = -ENXIO; 432e7f4dc35SAndrew Lunn goto err_out_free_mdiobus; 433ae7668d0SJeff Kirsher } 434ae7668d0SJeff Kirsher 435ae7668d0SJeff Kirsher if (ltq_etop_mdio_probe(dev)) { 436ae7668d0SJeff Kirsher err = -ENXIO; 437ae7668d0SJeff Kirsher goto err_out_unregister_bus; 438ae7668d0SJeff Kirsher } 439ae7668d0SJeff Kirsher return 0; 440ae7668d0SJeff Kirsher 441ae7668d0SJeff Kirsher err_out_unregister_bus: 442ae7668d0SJeff Kirsher mdiobus_unregister(priv->mii_bus); 443ae7668d0SJeff Kirsher err_out_free_mdiobus: 444ae7668d0SJeff Kirsher mdiobus_free(priv->mii_bus); 445ae7668d0SJeff Kirsher err_out: 446ae7668d0SJeff Kirsher return err; 447ae7668d0SJeff Kirsher } 448ae7668d0SJeff Kirsher 449ae7668d0SJeff Kirsher static void 450ae7668d0SJeff Kirsher ltq_etop_mdio_cleanup(struct net_device *dev) 451ae7668d0SJeff Kirsher { 452ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 453ae7668d0SJeff Kirsher 454ae7668d0SJeff Kirsher phy_disconnect(priv->phydev); 455ae7668d0SJeff Kirsher mdiobus_unregister(priv->mii_bus); 456ae7668d0SJeff Kirsher mdiobus_free(priv->mii_bus); 457ae7668d0SJeff Kirsher } 458ae7668d0SJeff Kirsher 459ae7668d0SJeff Kirsher static int 460ae7668d0SJeff Kirsher ltq_etop_open(struct net_device *dev) 461ae7668d0SJeff Kirsher { 462ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 463ae7668d0SJeff Kirsher int i; 464ae7668d0SJeff Kirsher 465ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 466ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[i]; 467ae7668d0SJeff Kirsher 468ae7668d0SJeff Kirsher if (!IS_TX(i) && (!IS_RX(i))) 469ae7668d0SJeff Kirsher continue; 470ae7668d0SJeff Kirsher ltq_dma_open(&ch->dma); 471ae7668d0SJeff Kirsher napi_enable(&ch->napi); 472ae7668d0SJeff Kirsher } 473ae7668d0SJeff Kirsher phy_start(priv->phydev); 474ae7668d0SJeff Kirsher netif_tx_start_all_queues(dev); 475ae7668d0SJeff Kirsher return 0; 476ae7668d0SJeff Kirsher } 477ae7668d0SJeff Kirsher 478ae7668d0SJeff Kirsher static int 479ae7668d0SJeff Kirsher ltq_etop_stop(struct net_device *dev) 480ae7668d0SJeff Kirsher { 481ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 482ae7668d0SJeff Kirsher int i; 483ae7668d0SJeff Kirsher 484ae7668d0SJeff Kirsher netif_tx_stop_all_queues(dev); 485ae7668d0SJeff Kirsher phy_stop(priv->phydev); 486ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 487ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[i]; 488ae7668d0SJeff Kirsher 489ae7668d0SJeff Kirsher if (!IS_RX(i) && !IS_TX(i)) 490ae7668d0SJeff Kirsher continue; 491ae7668d0SJeff Kirsher napi_disable(&ch->napi); 492ae7668d0SJeff Kirsher ltq_dma_close(&ch->dma); 493ae7668d0SJeff Kirsher } 494ae7668d0SJeff Kirsher return 0; 495ae7668d0SJeff Kirsher } 496ae7668d0SJeff Kirsher 497ae7668d0SJeff Kirsher static int 498ae7668d0SJeff Kirsher ltq_etop_tx(struct sk_buff *skb, struct net_device *dev) 499ae7668d0SJeff Kirsher { 500ae7668d0SJeff Kirsher int queue = skb_get_queue_mapping(skb); 501ae7668d0SJeff Kirsher struct netdev_queue *txq = netdev_get_tx_queue(dev, queue); 502ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 503ae7668d0SJeff Kirsher struct ltq_etop_chan *ch = &priv->ch[(queue << 1) | 1]; 504ae7668d0SJeff Kirsher struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; 505ae7668d0SJeff Kirsher int len; 506ae7668d0SJeff Kirsher unsigned long flags; 507ae7668d0SJeff Kirsher u32 byte_offset; 508ae7668d0SJeff Kirsher 509ae7668d0SJeff Kirsher len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len; 510ae7668d0SJeff Kirsher 511ae7668d0SJeff Kirsher if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) { 512ae7668d0SJeff Kirsher dev_kfree_skb_any(skb); 513ae7668d0SJeff Kirsher netdev_err(dev, "tx ring full\n"); 514ae7668d0SJeff Kirsher netif_tx_stop_queue(txq); 515ae7668d0SJeff Kirsher return NETDEV_TX_BUSY; 516ae7668d0SJeff Kirsher } 517ae7668d0SJeff Kirsher 518ae7668d0SJeff Kirsher /* dma needs to start on a 16 byte aligned address */ 519ae7668d0SJeff Kirsher byte_offset = CPHYSADDR(skb->data) % 16; 520ae7668d0SJeff Kirsher ch->skb[ch->dma.desc] = skb; 521ae7668d0SJeff Kirsher 522ae7668d0SJeff Kirsher dev->trans_start = jiffies; 523ae7668d0SJeff Kirsher 524ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 525ae7668d0SJeff Kirsher desc->addr = ((unsigned int) dma_map_single(NULL, skb->data, len, 526ae7668d0SJeff Kirsher DMA_TO_DEVICE)) - byte_offset; 527ae7668d0SJeff Kirsher wmb(); 528ae7668d0SJeff Kirsher desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP | 529ae7668d0SJeff Kirsher LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK); 530ae7668d0SJeff Kirsher ch->dma.desc++; 531ae7668d0SJeff Kirsher ch->dma.desc %= LTQ_DESC_NUM; 532ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 533ae7668d0SJeff Kirsher 534ae7668d0SJeff Kirsher if (ch->dma.desc_base[ch->dma.desc].ctl & LTQ_DMA_OWN) 535ae7668d0SJeff Kirsher netif_tx_stop_queue(txq); 536ae7668d0SJeff Kirsher 537ae7668d0SJeff Kirsher return NETDEV_TX_OK; 538ae7668d0SJeff Kirsher } 539ae7668d0SJeff Kirsher 540ae7668d0SJeff Kirsher static int 541ae7668d0SJeff Kirsher ltq_etop_change_mtu(struct net_device *dev, int new_mtu) 542ae7668d0SJeff Kirsher { 543ae7668d0SJeff Kirsher int ret = eth_change_mtu(dev, new_mtu); 544ae7668d0SJeff Kirsher 545ae7668d0SJeff Kirsher if (!ret) { 546ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 547ae7668d0SJeff Kirsher unsigned long flags; 548ae7668d0SJeff Kirsher 549ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 550ae7668d0SJeff Kirsher ltq_etop_w32((ETOP_PLEN_UNDER << 16) | new_mtu, 551ae7668d0SJeff Kirsher LTQ_ETOP_IGPLEN); 552ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 553ae7668d0SJeff Kirsher } 554ae7668d0SJeff Kirsher return ret; 555ae7668d0SJeff Kirsher } 556ae7668d0SJeff Kirsher 557ae7668d0SJeff Kirsher static int 558ae7668d0SJeff Kirsher ltq_etop_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 559ae7668d0SJeff Kirsher { 560ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 561ae7668d0SJeff Kirsher 562ae7668d0SJeff Kirsher /* TODO: mii-toll reports "No MII transceiver present!." ?!*/ 563ae7668d0SJeff Kirsher return phy_mii_ioctl(priv->phydev, rq, cmd); 564ae7668d0SJeff Kirsher } 565ae7668d0SJeff Kirsher 566ae7668d0SJeff Kirsher static int 567ae7668d0SJeff Kirsher ltq_etop_set_mac_address(struct net_device *dev, void *p) 568ae7668d0SJeff Kirsher { 569ae7668d0SJeff Kirsher int ret = eth_mac_addr(dev, p); 570ae7668d0SJeff Kirsher 571ae7668d0SJeff Kirsher if (!ret) { 572ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 573ae7668d0SJeff Kirsher unsigned long flags; 574ae7668d0SJeff Kirsher 575ae7668d0SJeff Kirsher /* store the mac for the unicast filter */ 576ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 577ae7668d0SJeff Kirsher ltq_etop_w32(*((u32 *)dev->dev_addr), LTQ_ETOP_MAC_DA0); 578ae7668d0SJeff Kirsher ltq_etop_w32(*((u16 *)&dev->dev_addr[4]) << 16, 579ae7668d0SJeff Kirsher LTQ_ETOP_MAC_DA1); 580ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 581ae7668d0SJeff Kirsher } 582ae7668d0SJeff Kirsher return ret; 583ae7668d0SJeff Kirsher } 584ae7668d0SJeff Kirsher 585ae7668d0SJeff Kirsher static void 586ae7668d0SJeff Kirsher ltq_etop_set_multicast_list(struct net_device *dev) 587ae7668d0SJeff Kirsher { 588ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 589ae7668d0SJeff Kirsher unsigned long flags; 590ae7668d0SJeff Kirsher 591ae7668d0SJeff Kirsher /* ensure that the unicast filter is not enabled in promiscious mode */ 592ae7668d0SJeff Kirsher spin_lock_irqsave(&priv->lock, flags); 593ae7668d0SJeff Kirsher if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI)) 594ae7668d0SJeff Kirsher ltq_etop_w32_mask(ETOP_FTCU, 0, LTQ_ETOP_ENETS0); 595ae7668d0SJeff Kirsher else 596ae7668d0SJeff Kirsher ltq_etop_w32_mask(0, ETOP_FTCU, LTQ_ETOP_ENETS0); 597ae7668d0SJeff Kirsher spin_unlock_irqrestore(&priv->lock, flags); 598ae7668d0SJeff Kirsher } 599ae7668d0SJeff Kirsher 600ae7668d0SJeff Kirsher static u16 601f663dd9aSJason Wang ltq_etop_select_queue(struct net_device *dev, struct sk_buff *skb, 60299932d4fSDaniel Borkmann void *accel_priv, select_queue_fallback_t fallback) 603ae7668d0SJeff Kirsher { 604ae7668d0SJeff Kirsher /* we are currently only using the first queue */ 605ae7668d0SJeff Kirsher return 0; 606ae7668d0SJeff Kirsher } 607ae7668d0SJeff Kirsher 608ae7668d0SJeff Kirsher static int 609ae7668d0SJeff Kirsher ltq_etop_init(struct net_device *dev) 610ae7668d0SJeff Kirsher { 611ae7668d0SJeff Kirsher struct ltq_etop_priv *priv = netdev_priv(dev); 612ae7668d0SJeff Kirsher struct sockaddr mac; 613ae7668d0SJeff Kirsher int err; 61443aabec5SDanny Kukawka bool random_mac = false; 615ae7668d0SJeff Kirsher 616ae7668d0SJeff Kirsher dev->watchdog_timeo = 10 * HZ; 617ae7668d0SJeff Kirsher err = ltq_etop_hw_init(dev); 618ae7668d0SJeff Kirsher if (err) 619ae7668d0SJeff Kirsher goto err_hw; 620ae7668d0SJeff Kirsher ltq_etop_change_mtu(dev, 1500); 621ae7668d0SJeff Kirsher 622ae7668d0SJeff Kirsher memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr)); 623ae7668d0SJeff Kirsher if (!is_valid_ether_addr(mac.sa_data)) { 624ae7668d0SJeff Kirsher pr_warn("etop: invalid MAC, using random\n"); 6257efd26d0SJoe Perches eth_random_addr(mac.sa_data); 62643aabec5SDanny Kukawka random_mac = true; 627ae7668d0SJeff Kirsher } 628ae7668d0SJeff Kirsher 629ae7668d0SJeff Kirsher err = ltq_etop_set_mac_address(dev, &mac); 630ae7668d0SJeff Kirsher if (err) 631ae7668d0SJeff Kirsher goto err_netdev; 63243aabec5SDanny Kukawka 63343aabec5SDanny Kukawka /* Set addr_assign_type here, ltq_etop_set_mac_address would reset it. */ 63443aabec5SDanny Kukawka if (random_mac) 635e41b2d7fSJiri Pirko dev->addr_assign_type = NET_ADDR_RANDOM; 63643aabec5SDanny Kukawka 637ae7668d0SJeff Kirsher ltq_etop_set_multicast_list(dev); 638ae7668d0SJeff Kirsher err = ltq_etop_mdio_init(dev); 639ae7668d0SJeff Kirsher if (err) 640ae7668d0SJeff Kirsher goto err_netdev; 641ae7668d0SJeff Kirsher return 0; 642ae7668d0SJeff Kirsher 643ae7668d0SJeff Kirsher err_netdev: 644ae7668d0SJeff Kirsher unregister_netdev(dev); 645ae7668d0SJeff Kirsher free_netdev(dev); 646ae7668d0SJeff Kirsher err_hw: 647ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 648ae7668d0SJeff Kirsher return err; 649ae7668d0SJeff Kirsher } 650ae7668d0SJeff Kirsher 651ae7668d0SJeff Kirsher static void 652ae7668d0SJeff Kirsher ltq_etop_tx_timeout(struct net_device *dev) 653ae7668d0SJeff Kirsher { 654ae7668d0SJeff Kirsher int err; 655ae7668d0SJeff Kirsher 656ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 657ae7668d0SJeff Kirsher err = ltq_etop_hw_init(dev); 658ae7668d0SJeff Kirsher if (err) 659ae7668d0SJeff Kirsher goto err_hw; 660ae7668d0SJeff Kirsher dev->trans_start = jiffies; 661ae7668d0SJeff Kirsher netif_wake_queue(dev); 662ae7668d0SJeff Kirsher return; 663ae7668d0SJeff Kirsher 664ae7668d0SJeff Kirsher err_hw: 665ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 666ae7668d0SJeff Kirsher netdev_err(dev, "failed to restart etop after TX timeout\n"); 667ae7668d0SJeff Kirsher } 668ae7668d0SJeff Kirsher 669ae7668d0SJeff Kirsher static const struct net_device_ops ltq_eth_netdev_ops = { 670ae7668d0SJeff Kirsher .ndo_open = ltq_etop_open, 671ae7668d0SJeff Kirsher .ndo_stop = ltq_etop_stop, 672ae7668d0SJeff Kirsher .ndo_start_xmit = ltq_etop_tx, 673ae7668d0SJeff Kirsher .ndo_change_mtu = ltq_etop_change_mtu, 674ae7668d0SJeff Kirsher .ndo_do_ioctl = ltq_etop_ioctl, 675ae7668d0SJeff Kirsher .ndo_set_mac_address = ltq_etop_set_mac_address, 676ae7668d0SJeff Kirsher .ndo_validate_addr = eth_validate_addr, 677afc4b13dSJiri Pirko .ndo_set_rx_mode = ltq_etop_set_multicast_list, 678ae7668d0SJeff Kirsher .ndo_select_queue = ltq_etop_select_queue, 679ae7668d0SJeff Kirsher .ndo_init = ltq_etop_init, 680ae7668d0SJeff Kirsher .ndo_tx_timeout = ltq_etop_tx_timeout, 681ae7668d0SJeff Kirsher }; 682ae7668d0SJeff Kirsher 683ae7668d0SJeff Kirsher static int __init 684ae7668d0SJeff Kirsher ltq_etop_probe(struct platform_device *pdev) 685ae7668d0SJeff Kirsher { 686ae7668d0SJeff Kirsher struct net_device *dev; 687ae7668d0SJeff Kirsher struct ltq_etop_priv *priv; 688ae7668d0SJeff Kirsher struct resource *res; 689ae7668d0SJeff Kirsher int err; 690ae7668d0SJeff Kirsher int i; 691ae7668d0SJeff Kirsher 692ae7668d0SJeff Kirsher res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 693ae7668d0SJeff Kirsher if (!res) { 694ae7668d0SJeff Kirsher dev_err(&pdev->dev, "failed to get etop resource\n"); 695ae7668d0SJeff Kirsher err = -ENOENT; 696ae7668d0SJeff Kirsher goto err_out; 697ae7668d0SJeff Kirsher } 698ae7668d0SJeff Kirsher 699ae7668d0SJeff Kirsher res = devm_request_mem_region(&pdev->dev, res->start, 700ae7668d0SJeff Kirsher resource_size(res), dev_name(&pdev->dev)); 701ae7668d0SJeff Kirsher if (!res) { 702ae7668d0SJeff Kirsher dev_err(&pdev->dev, "failed to request etop resource\n"); 703ae7668d0SJeff Kirsher err = -EBUSY; 704ae7668d0SJeff Kirsher goto err_out; 705ae7668d0SJeff Kirsher } 706ae7668d0SJeff Kirsher 707ae7668d0SJeff Kirsher ltq_etop_membase = devm_ioremap_nocache(&pdev->dev, 708ae7668d0SJeff Kirsher res->start, resource_size(res)); 709ae7668d0SJeff Kirsher if (!ltq_etop_membase) { 710ae7668d0SJeff Kirsher dev_err(&pdev->dev, "failed to remap etop engine %d\n", 711ae7668d0SJeff Kirsher pdev->id); 712ae7668d0SJeff Kirsher err = -ENOMEM; 713ae7668d0SJeff Kirsher goto err_out; 714ae7668d0SJeff Kirsher } 715ae7668d0SJeff Kirsher 716ae7668d0SJeff Kirsher dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4); 71741de8d4cSJoe Perches if (!dev) { 71841de8d4cSJoe Perches err = -ENOMEM; 71941de8d4cSJoe Perches goto err_out; 72041de8d4cSJoe Perches } 721ae7668d0SJeff Kirsher strcpy(dev->name, "eth%d"); 722ae7668d0SJeff Kirsher dev->netdev_ops = <q_eth_netdev_ops; 723ae7668d0SJeff Kirsher dev->ethtool_ops = <q_etop_ethtool_ops; 724ae7668d0SJeff Kirsher priv = netdev_priv(dev); 725ae7668d0SJeff Kirsher priv->res = res; 726d1b86507SFlorian Fainelli priv->pdev = pdev; 727ae7668d0SJeff Kirsher priv->pldata = dev_get_platdata(&pdev->dev); 728ae7668d0SJeff Kirsher priv->netdev = dev; 729ae7668d0SJeff Kirsher spin_lock_init(&priv->lock); 730ae7668d0SJeff Kirsher 731ae7668d0SJeff Kirsher for (i = 0; i < MAX_DMA_CHAN; i++) { 732ae7668d0SJeff Kirsher if (IS_TX(i)) 733ae7668d0SJeff Kirsher netif_napi_add(dev, &priv->ch[i].napi, 734ae7668d0SJeff Kirsher ltq_etop_poll_tx, 8); 735ae7668d0SJeff Kirsher else if (IS_RX(i)) 736ae7668d0SJeff Kirsher netif_napi_add(dev, &priv->ch[i].napi, 737ae7668d0SJeff Kirsher ltq_etop_poll_rx, 32); 738ae7668d0SJeff Kirsher priv->ch[i].netdev = dev; 739ae7668d0SJeff Kirsher } 740ae7668d0SJeff Kirsher 741ae7668d0SJeff Kirsher err = register_netdev(dev); 742ae7668d0SJeff Kirsher if (err) 743ae7668d0SJeff Kirsher goto err_free; 744ae7668d0SJeff Kirsher 745ae7668d0SJeff Kirsher platform_set_drvdata(pdev, dev); 746ae7668d0SJeff Kirsher return 0; 747ae7668d0SJeff Kirsher 748ae7668d0SJeff Kirsher err_free: 749cb0e51d8SWei Yongjun free_netdev(dev); 750ae7668d0SJeff Kirsher err_out: 751ae7668d0SJeff Kirsher return err; 752ae7668d0SJeff Kirsher } 753ae7668d0SJeff Kirsher 754a0a4efedSBill Pemberton static int 755ae7668d0SJeff Kirsher ltq_etop_remove(struct platform_device *pdev) 756ae7668d0SJeff Kirsher { 757ae7668d0SJeff Kirsher struct net_device *dev = platform_get_drvdata(pdev); 758ae7668d0SJeff Kirsher 759ae7668d0SJeff Kirsher if (dev) { 760ae7668d0SJeff Kirsher netif_tx_stop_all_queues(dev); 761ae7668d0SJeff Kirsher ltq_etop_hw_exit(dev); 762ae7668d0SJeff Kirsher ltq_etop_mdio_cleanup(dev); 763ae7668d0SJeff Kirsher unregister_netdev(dev); 764ae7668d0SJeff Kirsher } 765ae7668d0SJeff Kirsher return 0; 766ae7668d0SJeff Kirsher } 767ae7668d0SJeff Kirsher 768ae7668d0SJeff Kirsher static struct platform_driver ltq_mii_driver = { 769a0a4efedSBill Pemberton .remove = ltq_etop_remove, 770ae7668d0SJeff Kirsher .driver = { 771ae7668d0SJeff Kirsher .name = "ltq_etop", 772ae7668d0SJeff Kirsher }, 773ae7668d0SJeff Kirsher }; 774ae7668d0SJeff Kirsher 775ae7668d0SJeff Kirsher int __init 776ae7668d0SJeff Kirsher init_ltq_etop(void) 777ae7668d0SJeff Kirsher { 778ae7668d0SJeff Kirsher int ret = platform_driver_probe(<q_mii_driver, ltq_etop_probe); 779ae7668d0SJeff Kirsher 780ae7668d0SJeff Kirsher if (ret) 781772301b6SMasanari Iida pr_err("ltq_etop: Error registering platform driver!"); 782ae7668d0SJeff Kirsher return ret; 783ae7668d0SJeff Kirsher } 784ae7668d0SJeff Kirsher 785ae7668d0SJeff Kirsher static void __exit 786ae7668d0SJeff Kirsher exit_ltq_etop(void) 787ae7668d0SJeff Kirsher { 788ae7668d0SJeff Kirsher platform_driver_unregister(<q_mii_driver); 789ae7668d0SJeff Kirsher } 790ae7668d0SJeff Kirsher 791ae7668d0SJeff Kirsher module_init(init_ltq_etop); 792ae7668d0SJeff Kirsher module_exit(exit_ltq_etop); 793ae7668d0SJeff Kirsher 794ae7668d0SJeff Kirsher MODULE_AUTHOR("John Crispin <blogic@openwrt.org>"); 795ae7668d0SJeff Kirsher MODULE_DESCRIPTION("Lantiq SoC ETOP"); 796ae7668d0SJeff Kirsher MODULE_LICENSE("GPL"); 797