1 /******************************************************************************* 2 3 Intel 82599 Virtual Function driver 4 Copyright(c) 1999 - 2014 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 26 *******************************************************************************/ 27 28 #ifndef __IXGBE_VF_H__ 29 #define __IXGBE_VF_H__ 30 31 #include <linux/pci.h> 32 #include <linux/delay.h> 33 #include <linux/interrupt.h> 34 #include <linux/if_ether.h> 35 #include <linux/netdevice.h> 36 37 #include "defines.h" 38 #include "regs.h" 39 #include "mbx.h" 40 41 struct ixgbe_hw; 42 43 /* iterator type for walking multicast address lists */ 44 typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr, 45 u32 *vmdq); 46 struct ixgbe_mac_operations { 47 s32 (*init_hw)(struct ixgbe_hw *); 48 s32 (*reset_hw)(struct ixgbe_hw *); 49 s32 (*start_hw)(struct ixgbe_hw *); 50 s32 (*clear_hw_cntrs)(struct ixgbe_hw *); 51 enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *); 52 s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *); 53 s32 (*stop_adapter)(struct ixgbe_hw *); 54 s32 (*get_bus_info)(struct ixgbe_hw *); 55 56 /* Link */ 57 s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool, bool); 58 s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool); 59 s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *, 60 bool *); 61 62 /* RAR, Multicast, VLAN */ 63 s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32); 64 s32 (*set_uc_addr)(struct ixgbe_hw *, u32, u8 *); 65 s32 (*init_rx_addrs)(struct ixgbe_hw *); 66 s32 (*update_mc_addr_list)(struct ixgbe_hw *, struct net_device *); 67 s32 (*enable_mc)(struct ixgbe_hw *); 68 s32 (*disable_mc)(struct ixgbe_hw *); 69 s32 (*clear_vfta)(struct ixgbe_hw *); 70 s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool); 71 }; 72 73 enum ixgbe_mac_type { 74 ixgbe_mac_unknown = 0, 75 ixgbe_mac_82599_vf, 76 ixgbe_mac_X540_vf, 77 ixgbe_mac_X550_vf, 78 ixgbe_mac_X550EM_x_vf, 79 ixgbe_num_macs 80 }; 81 82 struct ixgbe_mac_info { 83 struct ixgbe_mac_operations ops; 84 u8 addr[6]; 85 u8 perm_addr[6]; 86 87 enum ixgbe_mac_type type; 88 89 s32 mc_filter_type; 90 91 bool get_link_status; 92 u32 max_tx_queues; 93 u32 max_rx_queues; 94 u32 max_msix_vectors; 95 }; 96 97 struct ixgbe_mbx_operations { 98 s32 (*init_params)(struct ixgbe_hw *hw); 99 s32 (*read)(struct ixgbe_hw *, u32 *, u16); 100 s32 (*write)(struct ixgbe_hw *, u32 *, u16); 101 s32 (*read_posted)(struct ixgbe_hw *, u32 *, u16); 102 s32 (*write_posted)(struct ixgbe_hw *, u32 *, u16); 103 s32 (*check_for_msg)(struct ixgbe_hw *); 104 s32 (*check_for_ack)(struct ixgbe_hw *); 105 s32 (*check_for_rst)(struct ixgbe_hw *); 106 }; 107 108 struct ixgbe_mbx_stats { 109 u32 msgs_tx; 110 u32 msgs_rx; 111 112 u32 acks; 113 u32 reqs; 114 u32 rsts; 115 }; 116 117 struct ixgbe_mbx_info { 118 struct ixgbe_mbx_operations ops; 119 struct ixgbe_mbx_stats stats; 120 u32 timeout; 121 u32 udelay; 122 u32 v2p_mailbox; 123 u16 size; 124 }; 125 126 struct ixgbe_hw { 127 void *back; 128 129 u8 __iomem *hw_addr; 130 131 struct ixgbe_mac_info mac; 132 struct ixgbe_mbx_info mbx; 133 134 u16 device_id; 135 u16 subsystem_vendor_id; 136 u16 subsystem_device_id; 137 u16 vendor_id; 138 139 u8 revision_id; 140 bool adapter_stopped; 141 142 int api_version; 143 }; 144 145 struct ixgbevf_hw_stats { 146 u64 base_vfgprc; 147 u64 base_vfgptc; 148 u64 base_vfgorc; 149 u64 base_vfgotc; 150 u64 base_vfmprc; 151 152 u64 last_vfgprc; 153 u64 last_vfgptc; 154 u64 last_vfgorc; 155 u64 last_vfgotc; 156 u64 last_vfmprc; 157 158 u64 vfgprc; 159 u64 vfgptc; 160 u64 vfgorc; 161 u64 vfgotc; 162 u64 vfmprc; 163 164 u64 saved_reset_vfgprc; 165 u64 saved_reset_vfgptc; 166 u64 saved_reset_vfgorc; 167 u64 saved_reset_vfgotc; 168 u64 saved_reset_vfmprc; 169 }; 170 171 struct ixgbevf_info { 172 enum ixgbe_mac_type mac; 173 const struct ixgbe_mac_operations *mac_ops; 174 }; 175 176 #define IXGBE_FAILED_READ_REG 0xffffffffU 177 178 #define IXGBE_REMOVED(a) unlikely(!(a)) 179 180 static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value) 181 { 182 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr); 183 184 if (IXGBE_REMOVED(reg_addr)) 185 return; 186 writel(value, reg_addr + reg); 187 } 188 #define IXGBE_WRITE_REG(h, r, v) ixgbe_write_reg(h, r, v) 189 190 u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg); 191 #define IXGBE_READ_REG(h, r) ixgbevf_read_reg(h, r) 192 193 static inline void ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, 194 u32 offset, u32 value) 195 { 196 ixgbe_write_reg(hw, reg + (offset << 2), value); 197 } 198 #define IXGBE_WRITE_REG_ARRAY(h, r, o, v) ixgbe_write_reg_array(h, r, o, v) 199 200 static inline u32 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, 201 u32 offset) 202 { 203 return ixgbevf_read_reg(hw, reg + (offset << 2)); 204 } 205 #define IXGBE_READ_REG_ARRAY(h, r, o) ixgbe_read_reg_array(h, r, o) 206 207 void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size); 208 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api); 209 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 210 unsigned int *default_tc); 211 #endif /* __IXGBE_VF_H__ */ 212 213