1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2018 Intel Corporation. */ 3 4 /****************************************************************************** 5 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code 6 ******************************************************************************/ 7 8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 9 10 #include <linux/types.h> 11 #include <linux/bitops.h> 12 #include <linux/module.h> 13 #include <linux/pci.h> 14 #include <linux/netdevice.h> 15 #include <linux/vmalloc.h> 16 #include <linux/string.h> 17 #include <linux/in.h> 18 #include <linux/ip.h> 19 #include <linux/tcp.h> 20 #include <linux/sctp.h> 21 #include <linux/ipv6.h> 22 #include <linux/slab.h> 23 #include <net/checksum.h> 24 #include <net/ip6_checksum.h> 25 #include <linux/ethtool.h> 26 #include <linux/if.h> 27 #include <linux/if_vlan.h> 28 #include <linux/prefetch.h> 29 #include <net/mpls.h> 30 #include <linux/bpf.h> 31 #include <linux/bpf_trace.h> 32 #include <linux/atomic.h> 33 #include <net/xfrm.h> 34 35 #include "ixgbevf.h" 36 37 const char ixgbevf_driver_name[] = "ixgbevf"; 38 static const char ixgbevf_driver_string[] = 39 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver"; 40 41 static char ixgbevf_copyright[] = 42 "Copyright (c) 2009 - 2018 Intel Corporation."; 43 44 static const struct ixgbevf_info *ixgbevf_info_tbl[] = { 45 [board_82599_vf] = &ixgbevf_82599_vf_info, 46 [board_82599_vf_hv] = &ixgbevf_82599_vf_hv_info, 47 [board_X540_vf] = &ixgbevf_X540_vf_info, 48 [board_X540_vf_hv] = &ixgbevf_X540_vf_hv_info, 49 [board_X550_vf] = &ixgbevf_X550_vf_info, 50 [board_X550_vf_hv] = &ixgbevf_X550_vf_hv_info, 51 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info, 52 [board_X550EM_x_vf_hv] = &ixgbevf_X550EM_x_vf_hv_info, 53 [board_x550em_a_vf] = &ixgbevf_x550em_a_vf_info, 54 }; 55 56 /* ixgbevf_pci_tbl - PCI Device ID Table 57 * 58 * Wildcard entries (PCI_ANY_ID) should come last 59 * Last entry must be all 0s 60 * 61 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 62 * Class, Class Mask, private data (not used) } 63 */ 64 static const struct pci_device_id ixgbevf_pci_tbl[] = { 65 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf }, 66 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv }, 67 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf }, 68 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv }, 69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf }, 70 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv }, 71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf }, 72 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv}, 73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf }, 74 /* required last entry */ 75 {0, } 76 }; 77 MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl); 78 79 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 80 MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver"); 81 MODULE_LICENSE("GPL v2"); 82 83 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) 84 static int debug = -1; 85 module_param(debug, int, 0); 86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 87 88 static struct workqueue_struct *ixgbevf_wq; 89 90 static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter) 91 { 92 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) && 93 !test_bit(__IXGBEVF_REMOVING, &adapter->state) && 94 !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state)) 95 queue_work(ixgbevf_wq, &adapter->service_task); 96 } 97 98 static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter) 99 { 100 BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state)); 101 102 /* flush memory to make sure state is correct before next watchdog */ 103 smp_mb__before_atomic(); 104 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state); 105 } 106 107 /* forward decls */ 108 static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter); 109 static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector); 110 static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter); 111 static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer); 112 static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring, 113 struct ixgbevf_rx_buffer *old_buff); 114 115 static void ixgbevf_remove_adapter(struct ixgbe_hw *hw) 116 { 117 struct ixgbevf_adapter *adapter = hw->back; 118 119 if (!hw->hw_addr) 120 return; 121 hw->hw_addr = NULL; 122 dev_err(&adapter->pdev->dev, "Adapter removed\n"); 123 if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state)) 124 ixgbevf_service_event_schedule(adapter); 125 } 126 127 static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg) 128 { 129 u32 value; 130 131 /* The following check not only optimizes a bit by not 132 * performing a read on the status register when the 133 * register just read was a status register read that 134 * returned IXGBE_FAILED_READ_REG. It also blocks any 135 * potential recursion. 136 */ 137 if (reg == IXGBE_VFSTATUS) { 138 ixgbevf_remove_adapter(hw); 139 return; 140 } 141 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS); 142 if (value == IXGBE_FAILED_READ_REG) 143 ixgbevf_remove_adapter(hw); 144 } 145 146 u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg) 147 { 148 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); 149 u32 value; 150 151 if (IXGBE_REMOVED(reg_addr)) 152 return IXGBE_FAILED_READ_REG; 153 value = readl(reg_addr + reg); 154 if (unlikely(value == IXGBE_FAILED_READ_REG)) 155 ixgbevf_check_remove(hw, reg); 156 return value; 157 } 158 159 /** 160 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors 161 * @adapter: pointer to adapter struct 162 * @direction: 0 for Rx, 1 for Tx, -1 for other causes 163 * @queue: queue to map the corresponding interrupt to 164 * @msix_vector: the vector to map to the corresponding queue 165 **/ 166 static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction, 167 u8 queue, u8 msix_vector) 168 { 169 u32 ivar, index; 170 struct ixgbe_hw *hw = &adapter->hw; 171 172 if (direction == -1) { 173 /* other causes */ 174 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 175 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC); 176 ivar &= ~0xFF; 177 ivar |= msix_vector; 178 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar); 179 } else { 180 /* Tx or Rx causes */ 181 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 182 index = ((16 * (queue & 1)) + (8 * direction)); 183 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1)); 184 ivar &= ~(0xFF << index); 185 ivar |= (msix_vector << index); 186 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar); 187 } 188 } 189 190 static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring) 191 { 192 return ring->stats.packets; 193 } 194 195 static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring) 196 { 197 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev); 198 struct ixgbe_hw *hw = &adapter->hw; 199 200 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx)); 201 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx)); 202 203 if (head != tail) 204 return (head < tail) ? 205 tail - head : (tail + ring->count - head); 206 207 return 0; 208 } 209 210 static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring) 211 { 212 u32 tx_done = ixgbevf_get_tx_completed(tx_ring); 213 u32 tx_done_old = tx_ring->tx_stats.tx_done_old; 214 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring); 215 216 clear_check_for_tx_hang(tx_ring); 217 218 /* Check for a hung queue, but be thorough. This verifies 219 * that a transmit has been completed since the previous 220 * check AND there is at least one packet pending. The 221 * ARMED bit is set to indicate a potential hang. 222 */ 223 if ((tx_done_old == tx_done) && tx_pending) { 224 /* make sure it is true for two checks in a row */ 225 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED, 226 &tx_ring->state); 227 } 228 /* reset the countdown */ 229 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state); 230 231 /* update completed stats and continue */ 232 tx_ring->tx_stats.tx_done_old = tx_done; 233 234 return false; 235 } 236 237 static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter) 238 { 239 /* Do the reset outside of interrupt context */ 240 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) { 241 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state); 242 ixgbevf_service_event_schedule(adapter); 243 } 244 } 245 246 /** 247 * ixgbevf_tx_timeout - Respond to a Tx Hang 248 * @netdev: network interface device structure 249 * @txqueue: transmit queue hanging (unused) 250 **/ 251 static void ixgbevf_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue) 252 { 253 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 254 255 ixgbevf_tx_timeout_reset(adapter); 256 } 257 258 /** 259 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes 260 * @q_vector: board private structure 261 * @tx_ring: tx ring to clean 262 * @napi_budget: Used to determine if we are in netpoll 263 **/ 264 static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector, 265 struct ixgbevf_ring *tx_ring, int napi_budget) 266 { 267 struct ixgbevf_adapter *adapter = q_vector->adapter; 268 struct ixgbevf_tx_buffer *tx_buffer; 269 union ixgbe_adv_tx_desc *tx_desc; 270 unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0; 271 unsigned int budget = tx_ring->count / 2; 272 unsigned int i = tx_ring->next_to_clean; 273 274 if (test_bit(__IXGBEVF_DOWN, &adapter->state)) 275 return true; 276 277 tx_buffer = &tx_ring->tx_buffer_info[i]; 278 tx_desc = IXGBEVF_TX_DESC(tx_ring, i); 279 i -= tx_ring->count; 280 281 do { 282 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch; 283 284 /* if next_to_watch is not set then there is no work pending */ 285 if (!eop_desc) 286 break; 287 288 /* prevent any other reads prior to eop_desc */ 289 smp_rmb(); 290 291 /* if DD is not set pending work has not been completed */ 292 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 293 break; 294 295 /* clear next_to_watch to prevent false hangs */ 296 tx_buffer->next_to_watch = NULL; 297 298 /* update the statistics for this packet */ 299 total_bytes += tx_buffer->bytecount; 300 total_packets += tx_buffer->gso_segs; 301 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC) 302 total_ipsec++; 303 304 /* free the skb */ 305 if (ring_is_xdp(tx_ring)) 306 page_frag_free(tx_buffer->data); 307 else 308 napi_consume_skb(tx_buffer->skb, napi_budget); 309 310 /* unmap skb header data */ 311 dma_unmap_single(tx_ring->dev, 312 dma_unmap_addr(tx_buffer, dma), 313 dma_unmap_len(tx_buffer, len), 314 DMA_TO_DEVICE); 315 316 /* clear tx_buffer data */ 317 dma_unmap_len_set(tx_buffer, len, 0); 318 319 /* unmap remaining buffers */ 320 while (tx_desc != eop_desc) { 321 tx_buffer++; 322 tx_desc++; 323 i++; 324 if (unlikely(!i)) { 325 i -= tx_ring->count; 326 tx_buffer = tx_ring->tx_buffer_info; 327 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); 328 } 329 330 /* unmap any remaining paged data */ 331 if (dma_unmap_len(tx_buffer, len)) { 332 dma_unmap_page(tx_ring->dev, 333 dma_unmap_addr(tx_buffer, dma), 334 dma_unmap_len(tx_buffer, len), 335 DMA_TO_DEVICE); 336 dma_unmap_len_set(tx_buffer, len, 0); 337 } 338 } 339 340 /* move us one more past the eop_desc for start of next pkt */ 341 tx_buffer++; 342 tx_desc++; 343 i++; 344 if (unlikely(!i)) { 345 i -= tx_ring->count; 346 tx_buffer = tx_ring->tx_buffer_info; 347 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); 348 } 349 350 /* issue prefetch for next Tx descriptor */ 351 prefetch(tx_desc); 352 353 /* update budget accounting */ 354 budget--; 355 } while (likely(budget)); 356 357 i += tx_ring->count; 358 tx_ring->next_to_clean = i; 359 u64_stats_update_begin(&tx_ring->syncp); 360 tx_ring->stats.bytes += total_bytes; 361 tx_ring->stats.packets += total_packets; 362 u64_stats_update_end(&tx_ring->syncp); 363 q_vector->tx.total_bytes += total_bytes; 364 q_vector->tx.total_packets += total_packets; 365 adapter->tx_ipsec += total_ipsec; 366 367 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) { 368 struct ixgbe_hw *hw = &adapter->hw; 369 union ixgbe_adv_tx_desc *eop_desc; 370 371 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch; 372 373 pr_err("Detected Tx Unit Hang%s\n" 374 " Tx Queue <%d>\n" 375 " TDH, TDT <%x>, <%x>\n" 376 " next_to_use <%x>\n" 377 " next_to_clean <%x>\n" 378 "tx_buffer_info[next_to_clean]\n" 379 " next_to_watch <%p>\n" 380 " eop_desc->wb.status <%x>\n" 381 " time_stamp <%lx>\n" 382 " jiffies <%lx>\n", 383 ring_is_xdp(tx_ring) ? " XDP" : "", 384 tx_ring->queue_index, 385 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)), 386 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)), 387 tx_ring->next_to_use, i, 388 eop_desc, (eop_desc ? eop_desc->wb.status : 0), 389 tx_ring->tx_buffer_info[i].time_stamp, jiffies); 390 391 if (!ring_is_xdp(tx_ring)) 392 netif_stop_subqueue(tx_ring->netdev, 393 tx_ring->queue_index); 394 395 /* schedule immediate reset if we believe we hung */ 396 ixgbevf_tx_timeout_reset(adapter); 397 398 return true; 399 } 400 401 if (ring_is_xdp(tx_ring)) 402 return !!budget; 403 404 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) 405 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) && 406 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) { 407 /* Make sure that anybody stopping the queue after this 408 * sees the new next_to_clean. 409 */ 410 smp_mb(); 411 412 if (__netif_subqueue_stopped(tx_ring->netdev, 413 tx_ring->queue_index) && 414 !test_bit(__IXGBEVF_DOWN, &adapter->state)) { 415 netif_wake_subqueue(tx_ring->netdev, 416 tx_ring->queue_index); 417 ++tx_ring->tx_stats.restart_queue; 418 } 419 } 420 421 return !!budget; 422 } 423 424 /** 425 * ixgbevf_rx_skb - Helper function to determine proper Rx method 426 * @q_vector: structure containing interrupt and ring information 427 * @skb: packet to send up 428 **/ 429 static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector, 430 struct sk_buff *skb) 431 { 432 napi_gro_receive(&q_vector->napi, skb); 433 } 434 435 #define IXGBE_RSS_L4_TYPES_MASK \ 436 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \ 437 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \ 438 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \ 439 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP)) 440 441 static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring, 442 union ixgbe_adv_rx_desc *rx_desc, 443 struct sk_buff *skb) 444 { 445 u16 rss_type; 446 447 if (!(ring->netdev->features & NETIF_F_RXHASH)) 448 return; 449 450 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) & 451 IXGBE_RXDADV_RSSTYPE_MASK; 452 453 if (!rss_type) 454 return; 455 456 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss), 457 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ? 458 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3); 459 } 460 461 /** 462 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum 463 * @ring: structure containig ring specific data 464 * @rx_desc: current Rx descriptor being processed 465 * @skb: skb currently being received and modified 466 **/ 467 static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring, 468 union ixgbe_adv_rx_desc *rx_desc, 469 struct sk_buff *skb) 470 { 471 skb_checksum_none_assert(skb); 472 473 /* Rx csum disabled */ 474 if (!(ring->netdev->features & NETIF_F_RXCSUM)) 475 return; 476 477 /* if IP and error */ 478 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) && 479 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) { 480 ring->rx_stats.csum_err++; 481 return; 482 } 483 484 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS)) 485 return; 486 487 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) { 488 ring->rx_stats.csum_err++; 489 return; 490 } 491 492 /* It must be a TCP or UDP packet with a valid checksum */ 493 skb->ip_summed = CHECKSUM_UNNECESSARY; 494 } 495 496 /** 497 * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor 498 * @rx_ring: rx descriptor ring packet is being transacted on 499 * @rx_desc: pointer to the EOP Rx descriptor 500 * @skb: pointer to current skb being populated 501 * 502 * This function checks the ring, descriptor, and packet information in 503 * order to populate the checksum, VLAN, protocol, and other fields within 504 * the skb. 505 **/ 506 static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring, 507 union ixgbe_adv_rx_desc *rx_desc, 508 struct sk_buff *skb) 509 { 510 ixgbevf_rx_hash(rx_ring, rx_desc, skb); 511 ixgbevf_rx_checksum(rx_ring, rx_desc, skb); 512 513 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) { 514 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan); 515 unsigned long *active_vlans = netdev_priv(rx_ring->netdev); 516 517 if (test_bit(vid & VLAN_VID_MASK, active_vlans)) 518 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid); 519 } 520 521 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP)) 522 ixgbevf_ipsec_rx(rx_ring, rx_desc, skb); 523 524 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 525 } 526 527 static 528 struct ixgbevf_rx_buffer *ixgbevf_get_rx_buffer(struct ixgbevf_ring *rx_ring, 529 const unsigned int size) 530 { 531 struct ixgbevf_rx_buffer *rx_buffer; 532 533 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; 534 prefetchw(rx_buffer->page); 535 536 /* we are reusing so sync this buffer for CPU use */ 537 dma_sync_single_range_for_cpu(rx_ring->dev, 538 rx_buffer->dma, 539 rx_buffer->page_offset, 540 size, 541 DMA_FROM_DEVICE); 542 543 rx_buffer->pagecnt_bias--; 544 545 return rx_buffer; 546 } 547 548 static void ixgbevf_put_rx_buffer(struct ixgbevf_ring *rx_ring, 549 struct ixgbevf_rx_buffer *rx_buffer, 550 struct sk_buff *skb) 551 { 552 if (ixgbevf_can_reuse_rx_page(rx_buffer)) { 553 /* hand second half of page back to the ring */ 554 ixgbevf_reuse_rx_page(rx_ring, rx_buffer); 555 } else { 556 if (IS_ERR(skb)) 557 /* We are not reusing the buffer so unmap it and free 558 * any references we are holding to it 559 */ 560 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma, 561 ixgbevf_rx_pg_size(rx_ring), 562 DMA_FROM_DEVICE, 563 IXGBEVF_RX_DMA_ATTR); 564 __page_frag_cache_drain(rx_buffer->page, 565 rx_buffer->pagecnt_bias); 566 } 567 568 /* clear contents of rx_buffer */ 569 rx_buffer->page = NULL; 570 } 571 572 /** 573 * ixgbevf_is_non_eop - process handling of non-EOP buffers 574 * @rx_ring: Rx ring being processed 575 * @rx_desc: Rx descriptor for current buffer 576 * 577 * This function updates next to clean. If the buffer is an EOP buffer 578 * this function exits returning false, otherwise it will place the 579 * sk_buff in the next buffer to be chained and return true indicating 580 * that this is in fact a non-EOP buffer. 581 **/ 582 static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring, 583 union ixgbe_adv_rx_desc *rx_desc) 584 { 585 u32 ntc = rx_ring->next_to_clean + 1; 586 587 /* fetch, update, and store next to clean */ 588 ntc = (ntc < rx_ring->count) ? ntc : 0; 589 rx_ring->next_to_clean = ntc; 590 591 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc)); 592 593 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))) 594 return false; 595 596 return true; 597 } 598 599 static inline unsigned int ixgbevf_rx_offset(struct ixgbevf_ring *rx_ring) 600 { 601 return ring_uses_build_skb(rx_ring) ? IXGBEVF_SKB_PAD : 0; 602 } 603 604 static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring, 605 struct ixgbevf_rx_buffer *bi) 606 { 607 struct page *page = bi->page; 608 dma_addr_t dma; 609 610 /* since we are recycling buffers we should seldom need to alloc */ 611 if (likely(page)) 612 return true; 613 614 /* alloc new page for storage */ 615 page = dev_alloc_pages(ixgbevf_rx_pg_order(rx_ring)); 616 if (unlikely(!page)) { 617 rx_ring->rx_stats.alloc_rx_page_failed++; 618 return false; 619 } 620 621 /* map page for use */ 622 dma = dma_map_page_attrs(rx_ring->dev, page, 0, 623 ixgbevf_rx_pg_size(rx_ring), 624 DMA_FROM_DEVICE, IXGBEVF_RX_DMA_ATTR); 625 626 /* if mapping failed free memory back to system since 627 * there isn't much point in holding memory we can't use 628 */ 629 if (dma_mapping_error(rx_ring->dev, dma)) { 630 __free_pages(page, ixgbevf_rx_pg_order(rx_ring)); 631 632 rx_ring->rx_stats.alloc_rx_page_failed++; 633 return false; 634 } 635 636 bi->dma = dma; 637 bi->page = page; 638 bi->page_offset = ixgbevf_rx_offset(rx_ring); 639 bi->pagecnt_bias = 1; 640 rx_ring->rx_stats.alloc_rx_page++; 641 642 return true; 643 } 644 645 /** 646 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split 647 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on 648 * @cleaned_count: number of buffers to replace 649 **/ 650 static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring, 651 u16 cleaned_count) 652 { 653 union ixgbe_adv_rx_desc *rx_desc; 654 struct ixgbevf_rx_buffer *bi; 655 unsigned int i = rx_ring->next_to_use; 656 657 /* nothing to do or no valid netdev defined */ 658 if (!cleaned_count || !rx_ring->netdev) 659 return; 660 661 rx_desc = IXGBEVF_RX_DESC(rx_ring, i); 662 bi = &rx_ring->rx_buffer_info[i]; 663 i -= rx_ring->count; 664 665 do { 666 if (!ixgbevf_alloc_mapped_page(rx_ring, bi)) 667 break; 668 669 /* sync the buffer for use by the device */ 670 dma_sync_single_range_for_device(rx_ring->dev, bi->dma, 671 bi->page_offset, 672 ixgbevf_rx_bufsz(rx_ring), 673 DMA_FROM_DEVICE); 674 675 /* Refresh the desc even if pkt_addr didn't change 676 * because each write-back erases this info. 677 */ 678 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset); 679 680 rx_desc++; 681 bi++; 682 i++; 683 if (unlikely(!i)) { 684 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0); 685 bi = rx_ring->rx_buffer_info; 686 i -= rx_ring->count; 687 } 688 689 /* clear the length for the next_to_use descriptor */ 690 rx_desc->wb.upper.length = 0; 691 692 cleaned_count--; 693 } while (cleaned_count); 694 695 i += rx_ring->count; 696 697 if (rx_ring->next_to_use != i) { 698 /* record the next descriptor to use */ 699 rx_ring->next_to_use = i; 700 701 /* update next to alloc since we have filled the ring */ 702 rx_ring->next_to_alloc = i; 703 704 /* Force memory writes to complete before letting h/w 705 * know there are new descriptors to fetch. (Only 706 * applicable for weak-ordered memory model archs, 707 * such as IA-64). 708 */ 709 wmb(); 710 ixgbevf_write_tail(rx_ring, i); 711 } 712 } 713 714 /** 715 * ixgbevf_cleanup_headers - Correct corrupted or empty headers 716 * @rx_ring: rx descriptor ring packet is being transacted on 717 * @rx_desc: pointer to the EOP Rx descriptor 718 * @skb: pointer to current skb being fixed 719 * 720 * Check for corrupted packet headers caused by senders on the local L2 721 * embedded NIC switch not setting up their Tx Descriptors right. These 722 * should be very rare. 723 * 724 * Also address the case where we are pulling data in on pages only 725 * and as such no data is present in the skb header. 726 * 727 * In addition if skb is not at least 60 bytes we need to pad it so that 728 * it is large enough to qualify as a valid Ethernet frame. 729 * 730 * Returns true if an error was encountered and skb was freed. 731 **/ 732 static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring, 733 union ixgbe_adv_rx_desc *rx_desc, 734 struct sk_buff *skb) 735 { 736 /* XDP packets use error pointer so abort at this point */ 737 if (IS_ERR(skb)) 738 return true; 739 740 /* verify that the packet does not have any known errors */ 741 if (unlikely(ixgbevf_test_staterr(rx_desc, 742 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) { 743 struct net_device *netdev = rx_ring->netdev; 744 745 if (!(netdev->features & NETIF_F_RXALL)) { 746 dev_kfree_skb_any(skb); 747 return true; 748 } 749 } 750 751 /* if eth_skb_pad returns an error the skb was freed */ 752 if (eth_skb_pad(skb)) 753 return true; 754 755 return false; 756 } 757 758 /** 759 * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring 760 * @rx_ring: rx descriptor ring to store buffers on 761 * @old_buff: donor buffer to have page reused 762 * 763 * Synchronizes page for reuse by the adapter 764 **/ 765 static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring, 766 struct ixgbevf_rx_buffer *old_buff) 767 { 768 struct ixgbevf_rx_buffer *new_buff; 769 u16 nta = rx_ring->next_to_alloc; 770 771 new_buff = &rx_ring->rx_buffer_info[nta]; 772 773 /* update, and store next to alloc */ 774 nta++; 775 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0; 776 777 /* transfer page from old buffer to new buffer */ 778 new_buff->page = old_buff->page; 779 new_buff->dma = old_buff->dma; 780 new_buff->page_offset = old_buff->page_offset; 781 new_buff->pagecnt_bias = old_buff->pagecnt_bias; 782 } 783 784 static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer) 785 { 786 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias; 787 struct page *page = rx_buffer->page; 788 789 /* avoid re-using remote and pfmemalloc pages */ 790 if (!dev_page_is_reusable(page)) 791 return false; 792 793 #if (PAGE_SIZE < 8192) 794 /* if we are only owner of page we can reuse it */ 795 if (unlikely((page_ref_count(page) - pagecnt_bias) > 1)) 796 return false; 797 #else 798 #define IXGBEVF_LAST_OFFSET \ 799 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBEVF_RXBUFFER_2048) 800 801 if (rx_buffer->page_offset > IXGBEVF_LAST_OFFSET) 802 return false; 803 804 #endif 805 806 /* If we have drained the page fragment pool we need to update 807 * the pagecnt_bias and page count so that we fully restock the 808 * number of references the driver holds. 809 */ 810 if (unlikely(!pagecnt_bias)) { 811 page_ref_add(page, USHRT_MAX); 812 rx_buffer->pagecnt_bias = USHRT_MAX; 813 } 814 815 return true; 816 } 817 818 /** 819 * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff 820 * @rx_ring: rx descriptor ring to transact packets on 821 * @rx_buffer: buffer containing page to add 822 * @skb: sk_buff to place the data into 823 * @size: size of buffer to be added 824 * 825 * This function will add the data contained in rx_buffer->page to the skb. 826 **/ 827 static void ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring, 828 struct ixgbevf_rx_buffer *rx_buffer, 829 struct sk_buff *skb, 830 unsigned int size) 831 { 832 #if (PAGE_SIZE < 8192) 833 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2; 834 #else 835 unsigned int truesize = ring_uses_build_skb(rx_ring) ? 836 SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) : 837 SKB_DATA_ALIGN(size); 838 #endif 839 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page, 840 rx_buffer->page_offset, size, truesize); 841 #if (PAGE_SIZE < 8192) 842 rx_buffer->page_offset ^= truesize; 843 #else 844 rx_buffer->page_offset += truesize; 845 #endif 846 } 847 848 static 849 struct sk_buff *ixgbevf_construct_skb(struct ixgbevf_ring *rx_ring, 850 struct ixgbevf_rx_buffer *rx_buffer, 851 struct xdp_buff *xdp, 852 union ixgbe_adv_rx_desc *rx_desc) 853 { 854 unsigned int size = xdp->data_end - xdp->data; 855 #if (PAGE_SIZE < 8192) 856 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2; 857 #else 858 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end - 859 xdp->data_hard_start); 860 #endif 861 unsigned int headlen; 862 struct sk_buff *skb; 863 864 /* prefetch first cache line of first page */ 865 net_prefetch(xdp->data); 866 867 /* Note, we get here by enabling legacy-rx via: 868 * 869 * ethtool --set-priv-flags <dev> legacy-rx on 870 * 871 * In this mode, we currently get 0 extra XDP headroom as 872 * opposed to having legacy-rx off, where we process XDP 873 * packets going to stack via ixgbevf_build_skb(). 874 * 875 * For ixgbevf_construct_skb() mode it means that the 876 * xdp->data_meta will always point to xdp->data, since 877 * the helper cannot expand the head. Should this ever 878 * changed in future for legacy-rx mode on, then lets also 879 * add xdp->data_meta handling here. 880 */ 881 882 /* allocate a skb to store the frags */ 883 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBEVF_RX_HDR_SIZE); 884 if (unlikely(!skb)) 885 return NULL; 886 887 /* Determine available headroom for copy */ 888 headlen = size; 889 if (headlen > IXGBEVF_RX_HDR_SIZE) 890 headlen = eth_get_headlen(skb->dev, xdp->data, 891 IXGBEVF_RX_HDR_SIZE); 892 893 /* align pull length to size of long to optimize memcpy performance */ 894 memcpy(__skb_put(skb, headlen), xdp->data, 895 ALIGN(headlen, sizeof(long))); 896 897 /* update all of the pointers */ 898 size -= headlen; 899 if (size) { 900 skb_add_rx_frag(skb, 0, rx_buffer->page, 901 (xdp->data + headlen) - 902 page_address(rx_buffer->page), 903 size, truesize); 904 #if (PAGE_SIZE < 8192) 905 rx_buffer->page_offset ^= truesize; 906 #else 907 rx_buffer->page_offset += truesize; 908 #endif 909 } else { 910 rx_buffer->pagecnt_bias++; 911 } 912 913 return skb; 914 } 915 916 static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter, 917 u32 qmask) 918 { 919 struct ixgbe_hw *hw = &adapter->hw; 920 921 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask); 922 } 923 924 static struct sk_buff *ixgbevf_build_skb(struct ixgbevf_ring *rx_ring, 925 struct ixgbevf_rx_buffer *rx_buffer, 926 struct xdp_buff *xdp, 927 union ixgbe_adv_rx_desc *rx_desc) 928 { 929 unsigned int metasize = xdp->data - xdp->data_meta; 930 #if (PAGE_SIZE < 8192) 931 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2; 932 #else 933 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + 934 SKB_DATA_ALIGN(xdp->data_end - 935 xdp->data_hard_start); 936 #endif 937 struct sk_buff *skb; 938 939 /* Prefetch first cache line of first page. If xdp->data_meta 940 * is unused, this points to xdp->data, otherwise, we likely 941 * have a consumer accessing first few bytes of meta data, 942 * and then actual data. 943 */ 944 net_prefetch(xdp->data_meta); 945 946 /* build an skb around the page buffer */ 947 skb = napi_build_skb(xdp->data_hard_start, truesize); 948 if (unlikely(!skb)) 949 return NULL; 950 951 /* update pointers within the skb to store the data */ 952 skb_reserve(skb, xdp->data - xdp->data_hard_start); 953 __skb_put(skb, xdp->data_end - xdp->data); 954 if (metasize) 955 skb_metadata_set(skb, metasize); 956 957 /* update buffer offset */ 958 #if (PAGE_SIZE < 8192) 959 rx_buffer->page_offset ^= truesize; 960 #else 961 rx_buffer->page_offset += truesize; 962 #endif 963 964 return skb; 965 } 966 967 #define IXGBEVF_XDP_PASS 0 968 #define IXGBEVF_XDP_CONSUMED 1 969 #define IXGBEVF_XDP_TX 2 970 971 static int ixgbevf_xmit_xdp_ring(struct ixgbevf_ring *ring, 972 struct xdp_buff *xdp) 973 { 974 struct ixgbevf_tx_buffer *tx_buffer; 975 union ixgbe_adv_tx_desc *tx_desc; 976 u32 len, cmd_type; 977 dma_addr_t dma; 978 u16 i; 979 980 len = xdp->data_end - xdp->data; 981 982 if (unlikely(!ixgbevf_desc_unused(ring))) 983 return IXGBEVF_XDP_CONSUMED; 984 985 dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE); 986 if (dma_mapping_error(ring->dev, dma)) 987 return IXGBEVF_XDP_CONSUMED; 988 989 /* record the location of the first descriptor for this packet */ 990 i = ring->next_to_use; 991 tx_buffer = &ring->tx_buffer_info[i]; 992 993 dma_unmap_len_set(tx_buffer, len, len); 994 dma_unmap_addr_set(tx_buffer, dma, dma); 995 tx_buffer->data = xdp->data; 996 tx_buffer->bytecount = len; 997 tx_buffer->gso_segs = 1; 998 tx_buffer->protocol = 0; 999 1000 /* Populate minimal context descriptor that will provide for the 1001 * fact that we are expected to process Ethernet frames. 1002 */ 1003 if (!test_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state)) { 1004 struct ixgbe_adv_tx_context_desc *context_desc; 1005 1006 set_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state); 1007 1008 context_desc = IXGBEVF_TX_CTXTDESC(ring, 0); 1009 context_desc->vlan_macip_lens = 1010 cpu_to_le32(ETH_HLEN << IXGBE_ADVTXD_MACLEN_SHIFT); 1011 context_desc->fceof_saidx = 0; 1012 context_desc->type_tucmd_mlhl = 1013 cpu_to_le32(IXGBE_TXD_CMD_DEXT | 1014 IXGBE_ADVTXD_DTYP_CTXT); 1015 context_desc->mss_l4len_idx = 0; 1016 1017 i = 1; 1018 } 1019 1020 /* put descriptor type bits */ 1021 cmd_type = IXGBE_ADVTXD_DTYP_DATA | 1022 IXGBE_ADVTXD_DCMD_DEXT | 1023 IXGBE_ADVTXD_DCMD_IFCS; 1024 cmd_type |= len | IXGBE_TXD_CMD; 1025 1026 tx_desc = IXGBEVF_TX_DESC(ring, i); 1027 tx_desc->read.buffer_addr = cpu_to_le64(dma); 1028 1029 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); 1030 tx_desc->read.olinfo_status = 1031 cpu_to_le32((len << IXGBE_ADVTXD_PAYLEN_SHIFT) | 1032 IXGBE_ADVTXD_CC); 1033 1034 /* Avoid any potential race with cleanup */ 1035 smp_wmb(); 1036 1037 /* set next_to_watch value indicating a packet is present */ 1038 i++; 1039 if (i == ring->count) 1040 i = 0; 1041 1042 tx_buffer->next_to_watch = tx_desc; 1043 ring->next_to_use = i; 1044 1045 return IXGBEVF_XDP_TX; 1046 } 1047 1048 static struct sk_buff *ixgbevf_run_xdp(struct ixgbevf_adapter *adapter, 1049 struct ixgbevf_ring *rx_ring, 1050 struct xdp_buff *xdp) 1051 { 1052 int result = IXGBEVF_XDP_PASS; 1053 struct ixgbevf_ring *xdp_ring; 1054 struct bpf_prog *xdp_prog; 1055 u32 act; 1056 1057 xdp_prog = READ_ONCE(rx_ring->xdp_prog); 1058 1059 if (!xdp_prog) 1060 goto xdp_out; 1061 1062 act = bpf_prog_run_xdp(xdp_prog, xdp); 1063 switch (act) { 1064 case XDP_PASS: 1065 break; 1066 case XDP_TX: 1067 xdp_ring = adapter->xdp_ring[rx_ring->queue_index]; 1068 result = ixgbevf_xmit_xdp_ring(xdp_ring, xdp); 1069 if (result == IXGBEVF_XDP_CONSUMED) 1070 goto out_failure; 1071 break; 1072 default: 1073 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act); 1074 fallthrough; 1075 case XDP_ABORTED: 1076 out_failure: 1077 trace_xdp_exception(rx_ring->netdev, xdp_prog, act); 1078 fallthrough; /* handle aborts by dropping packet */ 1079 case XDP_DROP: 1080 result = IXGBEVF_XDP_CONSUMED; 1081 break; 1082 } 1083 xdp_out: 1084 return ERR_PTR(-result); 1085 } 1086 1087 static unsigned int ixgbevf_rx_frame_truesize(struct ixgbevf_ring *rx_ring, 1088 unsigned int size) 1089 { 1090 unsigned int truesize; 1091 1092 #if (PAGE_SIZE < 8192) 1093 truesize = ixgbevf_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */ 1094 #else 1095 truesize = ring_uses_build_skb(rx_ring) ? 1096 SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) + 1097 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) : 1098 SKB_DATA_ALIGN(size); 1099 #endif 1100 return truesize; 1101 } 1102 1103 static void ixgbevf_rx_buffer_flip(struct ixgbevf_ring *rx_ring, 1104 struct ixgbevf_rx_buffer *rx_buffer, 1105 unsigned int size) 1106 { 1107 unsigned int truesize = ixgbevf_rx_frame_truesize(rx_ring, size); 1108 1109 #if (PAGE_SIZE < 8192) 1110 rx_buffer->page_offset ^= truesize; 1111 #else 1112 rx_buffer->page_offset += truesize; 1113 #endif 1114 } 1115 1116 static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector, 1117 struct ixgbevf_ring *rx_ring, 1118 int budget) 1119 { 1120 unsigned int total_rx_bytes = 0, total_rx_packets = 0, frame_sz = 0; 1121 struct ixgbevf_adapter *adapter = q_vector->adapter; 1122 u16 cleaned_count = ixgbevf_desc_unused(rx_ring); 1123 struct sk_buff *skb = rx_ring->skb; 1124 bool xdp_xmit = false; 1125 struct xdp_buff xdp; 1126 1127 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */ 1128 #if (PAGE_SIZE < 8192) 1129 frame_sz = ixgbevf_rx_frame_truesize(rx_ring, 0); 1130 #endif 1131 xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq); 1132 1133 while (likely(total_rx_packets < budget)) { 1134 struct ixgbevf_rx_buffer *rx_buffer; 1135 union ixgbe_adv_rx_desc *rx_desc; 1136 unsigned int size; 1137 1138 /* return some buffers to hardware, one at a time is too slow */ 1139 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) { 1140 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count); 1141 cleaned_count = 0; 1142 } 1143 1144 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean); 1145 size = le16_to_cpu(rx_desc->wb.upper.length); 1146 if (!size) 1147 break; 1148 1149 /* This memory barrier is needed to keep us from reading 1150 * any other fields out of the rx_desc until we know the 1151 * RXD_STAT_DD bit is set 1152 */ 1153 rmb(); 1154 1155 rx_buffer = ixgbevf_get_rx_buffer(rx_ring, size); 1156 1157 /* retrieve a buffer from the ring */ 1158 if (!skb) { 1159 unsigned int offset = ixgbevf_rx_offset(rx_ring); 1160 unsigned char *hard_start; 1161 1162 hard_start = page_address(rx_buffer->page) + 1163 rx_buffer->page_offset - offset; 1164 xdp_prepare_buff(&xdp, hard_start, offset, size, true); 1165 #if (PAGE_SIZE > 4096) 1166 /* At larger PAGE_SIZE, frame_sz depend on len size */ 1167 xdp.frame_sz = ixgbevf_rx_frame_truesize(rx_ring, size); 1168 #endif 1169 skb = ixgbevf_run_xdp(adapter, rx_ring, &xdp); 1170 } 1171 1172 if (IS_ERR(skb)) { 1173 if (PTR_ERR(skb) == -IXGBEVF_XDP_TX) { 1174 xdp_xmit = true; 1175 ixgbevf_rx_buffer_flip(rx_ring, rx_buffer, 1176 size); 1177 } else { 1178 rx_buffer->pagecnt_bias++; 1179 } 1180 total_rx_packets++; 1181 total_rx_bytes += size; 1182 } else if (skb) { 1183 ixgbevf_add_rx_frag(rx_ring, rx_buffer, skb, size); 1184 } else if (ring_uses_build_skb(rx_ring)) { 1185 skb = ixgbevf_build_skb(rx_ring, rx_buffer, 1186 &xdp, rx_desc); 1187 } else { 1188 skb = ixgbevf_construct_skb(rx_ring, rx_buffer, 1189 &xdp, rx_desc); 1190 } 1191 1192 /* exit if we failed to retrieve a buffer */ 1193 if (!skb) { 1194 rx_ring->rx_stats.alloc_rx_buff_failed++; 1195 rx_buffer->pagecnt_bias++; 1196 break; 1197 } 1198 1199 ixgbevf_put_rx_buffer(rx_ring, rx_buffer, skb); 1200 cleaned_count++; 1201 1202 /* fetch next buffer in frame if non-eop */ 1203 if (ixgbevf_is_non_eop(rx_ring, rx_desc)) 1204 continue; 1205 1206 /* verify the packet layout is correct */ 1207 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) { 1208 skb = NULL; 1209 continue; 1210 } 1211 1212 /* probably a little skewed due to removing CRC */ 1213 total_rx_bytes += skb->len; 1214 1215 /* Workaround hardware that can't do proper VEPA multicast 1216 * source pruning. 1217 */ 1218 if ((skb->pkt_type == PACKET_BROADCAST || 1219 skb->pkt_type == PACKET_MULTICAST) && 1220 ether_addr_equal(rx_ring->netdev->dev_addr, 1221 eth_hdr(skb)->h_source)) { 1222 dev_kfree_skb_irq(skb); 1223 continue; 1224 } 1225 1226 /* populate checksum, VLAN, and protocol */ 1227 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb); 1228 1229 ixgbevf_rx_skb(q_vector, skb); 1230 1231 /* reset skb pointer */ 1232 skb = NULL; 1233 1234 /* update budget accounting */ 1235 total_rx_packets++; 1236 } 1237 1238 /* place incomplete frames back on ring for completion */ 1239 rx_ring->skb = skb; 1240 1241 if (xdp_xmit) { 1242 struct ixgbevf_ring *xdp_ring = 1243 adapter->xdp_ring[rx_ring->queue_index]; 1244 1245 /* Force memory writes to complete before letting h/w 1246 * know there are new descriptors to fetch. 1247 */ 1248 wmb(); 1249 ixgbevf_write_tail(xdp_ring, xdp_ring->next_to_use); 1250 } 1251 1252 u64_stats_update_begin(&rx_ring->syncp); 1253 rx_ring->stats.packets += total_rx_packets; 1254 rx_ring->stats.bytes += total_rx_bytes; 1255 u64_stats_update_end(&rx_ring->syncp); 1256 q_vector->rx.total_packets += total_rx_packets; 1257 q_vector->rx.total_bytes += total_rx_bytes; 1258 1259 return total_rx_packets; 1260 } 1261 1262 /** 1263 * ixgbevf_poll - NAPI polling calback 1264 * @napi: napi struct with our devices info in it 1265 * @budget: amount of work driver is allowed to do this pass, in packets 1266 * 1267 * This function will clean more than one or more rings associated with a 1268 * q_vector. 1269 **/ 1270 static int ixgbevf_poll(struct napi_struct *napi, int budget) 1271 { 1272 struct ixgbevf_q_vector *q_vector = 1273 container_of(napi, struct ixgbevf_q_vector, napi); 1274 struct ixgbevf_adapter *adapter = q_vector->adapter; 1275 struct ixgbevf_ring *ring; 1276 int per_ring_budget, work_done = 0; 1277 bool clean_complete = true; 1278 1279 ixgbevf_for_each_ring(ring, q_vector->tx) { 1280 if (!ixgbevf_clean_tx_irq(q_vector, ring, budget)) 1281 clean_complete = false; 1282 } 1283 1284 if (budget <= 0) 1285 return budget; 1286 1287 /* attempt to distribute budget to each queue fairly, but don't allow 1288 * the budget to go below 1 because we'll exit polling 1289 */ 1290 if (q_vector->rx.count > 1) 1291 per_ring_budget = max(budget/q_vector->rx.count, 1); 1292 else 1293 per_ring_budget = budget; 1294 1295 ixgbevf_for_each_ring(ring, q_vector->rx) { 1296 int cleaned = ixgbevf_clean_rx_irq(q_vector, ring, 1297 per_ring_budget); 1298 work_done += cleaned; 1299 if (cleaned >= per_ring_budget) 1300 clean_complete = false; 1301 } 1302 1303 /* If all work not completed, return budget and keep polling */ 1304 if (!clean_complete) 1305 return budget; 1306 1307 /* Exit the polling mode, but don't re-enable interrupts if stack might 1308 * poll us due to busy-polling 1309 */ 1310 if (likely(napi_complete_done(napi, work_done))) { 1311 if (adapter->rx_itr_setting == 1) 1312 ixgbevf_set_itr(q_vector); 1313 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) && 1314 !test_bit(__IXGBEVF_REMOVING, &adapter->state)) 1315 ixgbevf_irq_enable_queues(adapter, 1316 BIT(q_vector->v_idx)); 1317 } 1318 1319 return min(work_done, budget - 1); 1320 } 1321 1322 /** 1323 * ixgbevf_write_eitr - write VTEITR register in hardware specific way 1324 * @q_vector: structure containing interrupt and ring information 1325 **/ 1326 void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector) 1327 { 1328 struct ixgbevf_adapter *adapter = q_vector->adapter; 1329 struct ixgbe_hw *hw = &adapter->hw; 1330 int v_idx = q_vector->v_idx; 1331 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR; 1332 1333 /* set the WDIS bit to not clear the timer bits and cause an 1334 * immediate assertion of the interrupt 1335 */ 1336 itr_reg |= IXGBE_EITR_CNT_WDIS; 1337 1338 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg); 1339 } 1340 1341 /** 1342 * ixgbevf_configure_msix - Configure MSI-X hardware 1343 * @adapter: board private structure 1344 * 1345 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X 1346 * interrupts. 1347 **/ 1348 static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter) 1349 { 1350 struct ixgbevf_q_vector *q_vector; 1351 int q_vectors, v_idx; 1352 1353 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1354 adapter->eims_enable_mask = 0; 1355 1356 /* Populate the IVAR table and set the ITR values to the 1357 * corresponding register. 1358 */ 1359 for (v_idx = 0; v_idx < q_vectors; v_idx++) { 1360 struct ixgbevf_ring *ring; 1361 1362 q_vector = adapter->q_vector[v_idx]; 1363 1364 ixgbevf_for_each_ring(ring, q_vector->rx) 1365 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx); 1366 1367 ixgbevf_for_each_ring(ring, q_vector->tx) 1368 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx); 1369 1370 if (q_vector->tx.ring && !q_vector->rx.ring) { 1371 /* Tx only vector */ 1372 if (adapter->tx_itr_setting == 1) 1373 q_vector->itr = IXGBE_12K_ITR; 1374 else 1375 q_vector->itr = adapter->tx_itr_setting; 1376 } else { 1377 /* Rx or Rx/Tx vector */ 1378 if (adapter->rx_itr_setting == 1) 1379 q_vector->itr = IXGBE_20K_ITR; 1380 else 1381 q_vector->itr = adapter->rx_itr_setting; 1382 } 1383 1384 /* add q_vector eims value to global eims_enable_mask */ 1385 adapter->eims_enable_mask |= BIT(v_idx); 1386 1387 ixgbevf_write_eitr(q_vector); 1388 } 1389 1390 ixgbevf_set_ivar(adapter, -1, 1, v_idx); 1391 /* setup eims_other and add value to global eims_enable_mask */ 1392 adapter->eims_other = BIT(v_idx); 1393 adapter->eims_enable_mask |= adapter->eims_other; 1394 } 1395 1396 enum latency_range { 1397 lowest_latency = 0, 1398 low_latency = 1, 1399 bulk_latency = 2, 1400 latency_invalid = 255 1401 }; 1402 1403 /** 1404 * ixgbevf_update_itr - update the dynamic ITR value based on statistics 1405 * @q_vector: structure containing interrupt and ring information 1406 * @ring_container: structure containing ring performance data 1407 * 1408 * Stores a new ITR value based on packets and byte 1409 * counts during the last interrupt. The advantage of per interrupt 1410 * computation is faster updates and more accurate ITR for the current 1411 * traffic pattern. Constants in this function were computed 1412 * based on theoretical maximum wire speed and thresholds were set based 1413 * on testing data as well as attempting to minimize response time 1414 * while increasing bulk throughput. 1415 **/ 1416 static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector, 1417 struct ixgbevf_ring_container *ring_container) 1418 { 1419 int bytes = ring_container->total_bytes; 1420 int packets = ring_container->total_packets; 1421 u32 timepassed_us; 1422 u64 bytes_perint; 1423 u8 itr_setting = ring_container->itr; 1424 1425 if (packets == 0) 1426 return; 1427 1428 /* simple throttle rate management 1429 * 0-20MB/s lowest (100000 ints/s) 1430 * 20-100MB/s low (20000 ints/s) 1431 * 100-1249MB/s bulk (12000 ints/s) 1432 */ 1433 /* what was last interrupt timeslice? */ 1434 timepassed_us = q_vector->itr >> 2; 1435 if (timepassed_us == 0) 1436 return; 1437 1438 bytes_perint = bytes / timepassed_us; /* bytes/usec */ 1439 1440 switch (itr_setting) { 1441 case lowest_latency: 1442 if (bytes_perint > 10) 1443 itr_setting = low_latency; 1444 break; 1445 case low_latency: 1446 if (bytes_perint > 20) 1447 itr_setting = bulk_latency; 1448 else if (bytes_perint <= 10) 1449 itr_setting = lowest_latency; 1450 break; 1451 case bulk_latency: 1452 if (bytes_perint <= 20) 1453 itr_setting = low_latency; 1454 break; 1455 } 1456 1457 /* clear work counters since we have the values we need */ 1458 ring_container->total_bytes = 0; 1459 ring_container->total_packets = 0; 1460 1461 /* write updated itr to ring container */ 1462 ring_container->itr = itr_setting; 1463 } 1464 1465 static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector) 1466 { 1467 u32 new_itr = q_vector->itr; 1468 u8 current_itr; 1469 1470 ixgbevf_update_itr(q_vector, &q_vector->tx); 1471 ixgbevf_update_itr(q_vector, &q_vector->rx); 1472 1473 current_itr = max(q_vector->rx.itr, q_vector->tx.itr); 1474 1475 switch (current_itr) { 1476 /* counts and packets in update_itr are dependent on these numbers */ 1477 case lowest_latency: 1478 new_itr = IXGBE_100K_ITR; 1479 break; 1480 case low_latency: 1481 new_itr = IXGBE_20K_ITR; 1482 break; 1483 case bulk_latency: 1484 new_itr = IXGBE_12K_ITR; 1485 break; 1486 default: 1487 break; 1488 } 1489 1490 if (new_itr != q_vector->itr) { 1491 /* do an exponential smoothing */ 1492 new_itr = (10 * new_itr * q_vector->itr) / 1493 ((9 * new_itr) + q_vector->itr); 1494 1495 /* save the algorithm value here */ 1496 q_vector->itr = new_itr; 1497 1498 ixgbevf_write_eitr(q_vector); 1499 } 1500 } 1501 1502 static irqreturn_t ixgbevf_msix_other(int irq, void *data) 1503 { 1504 struct ixgbevf_adapter *adapter = data; 1505 struct ixgbe_hw *hw = &adapter->hw; 1506 1507 hw->mac.get_link_status = 1; 1508 1509 ixgbevf_service_event_schedule(adapter); 1510 1511 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other); 1512 1513 return IRQ_HANDLED; 1514 } 1515 1516 /** 1517 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues) 1518 * @irq: unused 1519 * @data: pointer to our q_vector struct for this interrupt vector 1520 **/ 1521 static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data) 1522 { 1523 struct ixgbevf_q_vector *q_vector = data; 1524 1525 /* EIAM disabled interrupts (on this vector) for us */ 1526 if (q_vector->rx.ring || q_vector->tx.ring) 1527 napi_schedule_irqoff(&q_vector->napi); 1528 1529 return IRQ_HANDLED; 1530 } 1531 1532 /** 1533 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts 1534 * @adapter: board private structure 1535 * 1536 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests 1537 * interrupts from the kernel. 1538 **/ 1539 static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter) 1540 { 1541 struct net_device *netdev = adapter->netdev; 1542 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1543 unsigned int ri = 0, ti = 0; 1544 int vector, err; 1545 1546 for (vector = 0; vector < q_vectors; vector++) { 1547 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector]; 1548 struct msix_entry *entry = &adapter->msix_entries[vector]; 1549 1550 if (q_vector->tx.ring && q_vector->rx.ring) { 1551 snprintf(q_vector->name, sizeof(q_vector->name), 1552 "%s-TxRx-%u", netdev->name, ri++); 1553 ti++; 1554 } else if (q_vector->rx.ring) { 1555 snprintf(q_vector->name, sizeof(q_vector->name), 1556 "%s-rx-%u", netdev->name, ri++); 1557 } else if (q_vector->tx.ring) { 1558 snprintf(q_vector->name, sizeof(q_vector->name), 1559 "%s-tx-%u", netdev->name, ti++); 1560 } else { 1561 /* skip this unused q_vector */ 1562 continue; 1563 } 1564 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0, 1565 q_vector->name, q_vector); 1566 if (err) { 1567 hw_dbg(&adapter->hw, 1568 "request_irq failed for MSIX interrupt Error: %d\n", 1569 err); 1570 goto free_queue_irqs; 1571 } 1572 } 1573 1574 err = request_irq(adapter->msix_entries[vector].vector, 1575 &ixgbevf_msix_other, 0, netdev->name, adapter); 1576 if (err) { 1577 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n", 1578 err); 1579 goto free_queue_irqs; 1580 } 1581 1582 return 0; 1583 1584 free_queue_irqs: 1585 while (vector) { 1586 vector--; 1587 free_irq(adapter->msix_entries[vector].vector, 1588 adapter->q_vector[vector]); 1589 } 1590 /* This failure is non-recoverable - it indicates the system is 1591 * out of MSIX vector resources and the VF driver cannot run 1592 * without them. Set the number of msix vectors to zero 1593 * indicating that not enough can be allocated. The error 1594 * will be returned to the user indicating device open failed. 1595 * Any further attempts to force the driver to open will also 1596 * fail. The only way to recover is to unload the driver and 1597 * reload it again. If the system has recovered some MSIX 1598 * vectors then it may succeed. 1599 */ 1600 adapter->num_msix_vectors = 0; 1601 return err; 1602 } 1603 1604 /** 1605 * ixgbevf_request_irq - initialize interrupts 1606 * @adapter: board private structure 1607 * 1608 * Attempts to configure interrupts using the best available 1609 * capabilities of the hardware and kernel. 1610 **/ 1611 static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter) 1612 { 1613 int err = ixgbevf_request_msix_irqs(adapter); 1614 1615 if (err) 1616 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err); 1617 1618 return err; 1619 } 1620 1621 static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter) 1622 { 1623 int i, q_vectors; 1624 1625 if (!adapter->msix_entries) 1626 return; 1627 1628 q_vectors = adapter->num_msix_vectors; 1629 i = q_vectors - 1; 1630 1631 free_irq(adapter->msix_entries[i].vector, adapter); 1632 i--; 1633 1634 for (; i >= 0; i--) { 1635 /* free only the irqs that were actually requested */ 1636 if (!adapter->q_vector[i]->rx.ring && 1637 !adapter->q_vector[i]->tx.ring) 1638 continue; 1639 1640 free_irq(adapter->msix_entries[i].vector, 1641 adapter->q_vector[i]); 1642 } 1643 } 1644 1645 /** 1646 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC 1647 * @adapter: board private structure 1648 **/ 1649 static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter) 1650 { 1651 struct ixgbe_hw *hw = &adapter->hw; 1652 int i; 1653 1654 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0); 1655 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0); 1656 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0); 1657 1658 IXGBE_WRITE_FLUSH(hw); 1659 1660 for (i = 0; i < adapter->num_msix_vectors; i++) 1661 synchronize_irq(adapter->msix_entries[i].vector); 1662 } 1663 1664 /** 1665 * ixgbevf_irq_enable - Enable default interrupt generation settings 1666 * @adapter: board private structure 1667 **/ 1668 static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter) 1669 { 1670 struct ixgbe_hw *hw = &adapter->hw; 1671 1672 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask); 1673 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask); 1674 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask); 1675 } 1676 1677 /** 1678 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset 1679 * @adapter: board private structure 1680 * @ring: structure containing ring specific data 1681 * 1682 * Configure the Tx descriptor ring after a reset. 1683 **/ 1684 static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter, 1685 struct ixgbevf_ring *ring) 1686 { 1687 struct ixgbe_hw *hw = &adapter->hw; 1688 u64 tdba = ring->dma; 1689 int wait_loop = 10; 1690 u32 txdctl = IXGBE_TXDCTL_ENABLE; 1691 u8 reg_idx = ring->reg_idx; 1692 1693 /* disable queue to avoid issues while updating state */ 1694 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); 1695 IXGBE_WRITE_FLUSH(hw); 1696 1697 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32)); 1698 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32); 1699 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx), 1700 ring->count * sizeof(union ixgbe_adv_tx_desc)); 1701 1702 /* disable head writeback */ 1703 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0); 1704 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0); 1705 1706 /* enable relaxed ordering */ 1707 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx), 1708 (IXGBE_DCA_TXCTRL_DESC_RRO_EN | 1709 IXGBE_DCA_TXCTRL_DATA_RRO_EN)); 1710 1711 /* reset head and tail pointers */ 1712 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0); 1713 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0); 1714 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx); 1715 1716 /* reset ntu and ntc to place SW in sync with hardwdare */ 1717 ring->next_to_clean = 0; 1718 ring->next_to_use = 0; 1719 1720 /* In order to avoid issues WTHRESH + PTHRESH should always be equal 1721 * to or less than the number of on chip descriptors, which is 1722 * currently 40. 1723 */ 1724 txdctl |= (8 << 16); /* WTHRESH = 8 */ 1725 1726 /* Setting PTHRESH to 32 both improves performance */ 1727 txdctl |= (1u << 8) | /* HTHRESH = 1 */ 1728 32; /* PTHRESH = 32 */ 1729 1730 /* reinitialize tx_buffer_info */ 1731 memset(ring->tx_buffer_info, 0, 1732 sizeof(struct ixgbevf_tx_buffer) * ring->count); 1733 1734 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state); 1735 clear_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state); 1736 1737 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl); 1738 1739 /* poll to verify queue is enabled */ 1740 do { 1741 usleep_range(1000, 2000); 1742 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx)); 1743 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); 1744 if (!wait_loop) 1745 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx); 1746 } 1747 1748 /** 1749 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset 1750 * @adapter: board private structure 1751 * 1752 * Configure the Tx unit of the MAC after a reset. 1753 **/ 1754 static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter) 1755 { 1756 u32 i; 1757 1758 /* Setup the HW Tx Head and Tail descriptor pointers */ 1759 for (i = 0; i < adapter->num_tx_queues; i++) 1760 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]); 1761 for (i = 0; i < adapter->num_xdp_queues; i++) 1762 ixgbevf_configure_tx_ring(adapter, adapter->xdp_ring[i]); 1763 } 1764 1765 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 1766 1767 static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, 1768 struct ixgbevf_ring *ring, int index) 1769 { 1770 struct ixgbe_hw *hw = &adapter->hw; 1771 u32 srrctl; 1772 1773 srrctl = IXGBE_SRRCTL_DROP_EN; 1774 1775 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 1776 if (ring_uses_large_buffer(ring)) 1777 srrctl |= IXGBEVF_RXBUFFER_3072 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1778 else 1779 srrctl |= IXGBEVF_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1780 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 1781 1782 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl); 1783 } 1784 1785 static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter) 1786 { 1787 struct ixgbe_hw *hw = &adapter->hw; 1788 1789 /* PSRTYPE must be initialized in 82599 */ 1790 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR | 1791 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR | 1792 IXGBE_PSRTYPE_L2HDR; 1793 1794 if (adapter->num_rx_queues > 1) 1795 psrtype |= BIT(29); 1796 1797 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype); 1798 } 1799 1800 #define IXGBEVF_MAX_RX_DESC_POLL 10 1801 static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter, 1802 struct ixgbevf_ring *ring) 1803 { 1804 struct ixgbe_hw *hw = &adapter->hw; 1805 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL; 1806 u32 rxdctl; 1807 u8 reg_idx = ring->reg_idx; 1808 1809 if (IXGBE_REMOVED(hw->hw_addr)) 1810 return; 1811 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); 1812 rxdctl &= ~IXGBE_RXDCTL_ENABLE; 1813 1814 /* write value back with RXDCTL.ENABLE bit cleared */ 1815 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl); 1816 1817 /* the hardware may take up to 100us to really disable the Rx queue */ 1818 do { 1819 udelay(10); 1820 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); 1821 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE)); 1822 1823 if (!wait_loop) 1824 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n", 1825 reg_idx); 1826 } 1827 1828 static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter, 1829 struct ixgbevf_ring *ring) 1830 { 1831 struct ixgbe_hw *hw = &adapter->hw; 1832 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL; 1833 u32 rxdctl; 1834 u8 reg_idx = ring->reg_idx; 1835 1836 if (IXGBE_REMOVED(hw->hw_addr)) 1837 return; 1838 do { 1839 usleep_range(1000, 2000); 1840 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); 1841 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE)); 1842 1843 if (!wait_loop) 1844 pr_err("RXDCTL.ENABLE queue %d not set while polling\n", 1845 reg_idx); 1846 } 1847 1848 /** 1849 * ixgbevf_init_rss_key - Initialize adapter RSS key 1850 * @adapter: device handle 1851 * 1852 * Allocates and initializes the RSS key if it is not allocated. 1853 **/ 1854 static inline int ixgbevf_init_rss_key(struct ixgbevf_adapter *adapter) 1855 { 1856 u32 *rss_key; 1857 1858 if (!adapter->rss_key) { 1859 rss_key = kzalloc(IXGBEVF_RSS_HASH_KEY_SIZE, GFP_KERNEL); 1860 if (unlikely(!rss_key)) 1861 return -ENOMEM; 1862 1863 netdev_rss_key_fill(rss_key, IXGBEVF_RSS_HASH_KEY_SIZE); 1864 adapter->rss_key = rss_key; 1865 } 1866 1867 return 0; 1868 } 1869 1870 static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter) 1871 { 1872 struct ixgbe_hw *hw = &adapter->hw; 1873 u32 vfmrqc = 0, vfreta = 0; 1874 u16 rss_i = adapter->num_rx_queues; 1875 u8 i, j; 1876 1877 /* Fill out hash function seeds */ 1878 for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++) 1879 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), *(adapter->rss_key + i)); 1880 1881 for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) { 1882 if (j == rss_i) 1883 j = 0; 1884 1885 adapter->rss_indir_tbl[i] = j; 1886 1887 vfreta |= j << (i & 0x3) * 8; 1888 if ((i & 3) == 3) { 1889 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta); 1890 vfreta = 0; 1891 } 1892 } 1893 1894 /* Perform hash on these packet types */ 1895 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 | 1896 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP | 1897 IXGBE_VFMRQC_RSS_FIELD_IPV6 | 1898 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP; 1899 1900 vfmrqc |= IXGBE_VFMRQC_RSSEN; 1901 1902 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc); 1903 } 1904 1905 static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter, 1906 struct ixgbevf_ring *ring) 1907 { 1908 struct ixgbe_hw *hw = &adapter->hw; 1909 union ixgbe_adv_rx_desc *rx_desc; 1910 u64 rdba = ring->dma; 1911 u32 rxdctl; 1912 u8 reg_idx = ring->reg_idx; 1913 1914 /* disable queue to avoid issues while updating state */ 1915 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); 1916 ixgbevf_disable_rx_queue(adapter, ring); 1917 1918 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32)); 1919 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32); 1920 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx), 1921 ring->count * sizeof(union ixgbe_adv_rx_desc)); 1922 1923 #ifndef CONFIG_SPARC 1924 /* enable relaxed ordering */ 1925 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx), 1926 IXGBE_DCA_RXCTRL_DESC_RRO_EN); 1927 #else 1928 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx), 1929 IXGBE_DCA_RXCTRL_DESC_RRO_EN | 1930 IXGBE_DCA_RXCTRL_DATA_WRO_EN); 1931 #endif 1932 1933 /* reset head and tail pointers */ 1934 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0); 1935 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0); 1936 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx); 1937 1938 /* initialize rx_buffer_info */ 1939 memset(ring->rx_buffer_info, 0, 1940 sizeof(struct ixgbevf_rx_buffer) * ring->count); 1941 1942 /* initialize Rx descriptor 0 */ 1943 rx_desc = IXGBEVF_RX_DESC(ring, 0); 1944 rx_desc->wb.upper.length = 0; 1945 1946 /* reset ntu and ntc to place SW in sync with hardwdare */ 1947 ring->next_to_clean = 0; 1948 ring->next_to_use = 0; 1949 ring->next_to_alloc = 0; 1950 1951 ixgbevf_configure_srrctl(adapter, ring, reg_idx); 1952 1953 /* RXDCTL.RLPML does not work on 82599 */ 1954 if (adapter->hw.mac.type != ixgbe_mac_82599_vf) { 1955 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK | 1956 IXGBE_RXDCTL_RLPML_EN); 1957 1958 #if (PAGE_SIZE < 8192) 1959 /* Limit the maximum frame size so we don't overrun the skb */ 1960 if (ring_uses_build_skb(ring) && 1961 !ring_uses_large_buffer(ring)) 1962 rxdctl |= IXGBEVF_MAX_FRAME_BUILD_SKB | 1963 IXGBE_RXDCTL_RLPML_EN; 1964 #endif 1965 } 1966 1967 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME; 1968 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl); 1969 1970 ixgbevf_rx_desc_queue_enable(adapter, ring); 1971 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring)); 1972 } 1973 1974 static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter, 1975 struct ixgbevf_ring *rx_ring) 1976 { 1977 struct net_device *netdev = adapter->netdev; 1978 unsigned int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 1979 1980 /* set build_skb and buffer size flags */ 1981 clear_ring_build_skb_enabled(rx_ring); 1982 clear_ring_uses_large_buffer(rx_ring); 1983 1984 if (adapter->flags & IXGBEVF_FLAGS_LEGACY_RX) 1985 return; 1986 1987 if (PAGE_SIZE < 8192) 1988 if (max_frame > IXGBEVF_MAX_FRAME_BUILD_SKB) 1989 set_ring_uses_large_buffer(rx_ring); 1990 1991 /* 82599 can't rely on RXDCTL.RLPML to restrict the size of the frame */ 1992 if (adapter->hw.mac.type == ixgbe_mac_82599_vf && !ring_uses_large_buffer(rx_ring)) 1993 return; 1994 1995 set_ring_build_skb_enabled(rx_ring); 1996 } 1997 1998 /** 1999 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset 2000 * @adapter: board private structure 2001 * 2002 * Configure the Rx unit of the MAC after a reset. 2003 **/ 2004 static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter) 2005 { 2006 struct ixgbe_hw *hw = &adapter->hw; 2007 struct net_device *netdev = adapter->netdev; 2008 int i, ret; 2009 2010 ixgbevf_setup_psrtype(adapter); 2011 if (hw->mac.type >= ixgbe_mac_X550_vf) 2012 ixgbevf_setup_vfmrqc(adapter); 2013 2014 spin_lock_bh(&adapter->mbx_lock); 2015 /* notify the PF of our intent to use this size of frame */ 2016 ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN); 2017 spin_unlock_bh(&adapter->mbx_lock); 2018 if (ret) 2019 dev_err(&adapter->pdev->dev, 2020 "Failed to set MTU at %d\n", netdev->mtu); 2021 2022 /* Setup the HW Rx Head and Tail Descriptor Pointers and 2023 * the Base and Length of the Rx Descriptor Ring 2024 */ 2025 for (i = 0; i < adapter->num_rx_queues; i++) { 2026 struct ixgbevf_ring *rx_ring = adapter->rx_ring[i]; 2027 2028 ixgbevf_set_rx_buffer_len(adapter, rx_ring); 2029 ixgbevf_configure_rx_ring(adapter, rx_ring); 2030 } 2031 } 2032 2033 static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev, 2034 __be16 proto, u16 vid) 2035 { 2036 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2037 struct ixgbe_hw *hw = &adapter->hw; 2038 int err; 2039 2040 spin_lock_bh(&adapter->mbx_lock); 2041 2042 /* add VID to filter table */ 2043 err = hw->mac.ops.set_vfta(hw, vid, 0, true); 2044 2045 spin_unlock_bh(&adapter->mbx_lock); 2046 2047 /* translate error return types so error makes sense */ 2048 if (err == IXGBE_ERR_MBX) 2049 return -EIO; 2050 2051 if (err == IXGBE_ERR_INVALID_ARGUMENT) 2052 return -EACCES; 2053 2054 set_bit(vid, adapter->active_vlans); 2055 2056 return err; 2057 } 2058 2059 static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, 2060 __be16 proto, u16 vid) 2061 { 2062 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2063 struct ixgbe_hw *hw = &adapter->hw; 2064 int err; 2065 2066 spin_lock_bh(&adapter->mbx_lock); 2067 2068 /* remove VID from filter table */ 2069 err = hw->mac.ops.set_vfta(hw, vid, 0, false); 2070 2071 spin_unlock_bh(&adapter->mbx_lock); 2072 2073 clear_bit(vid, adapter->active_vlans); 2074 2075 return err; 2076 } 2077 2078 static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter) 2079 { 2080 u16 vid; 2081 2082 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 2083 ixgbevf_vlan_rx_add_vid(adapter->netdev, 2084 htons(ETH_P_8021Q), vid); 2085 } 2086 2087 static int ixgbevf_write_uc_addr_list(struct net_device *netdev) 2088 { 2089 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2090 struct ixgbe_hw *hw = &adapter->hw; 2091 int count = 0; 2092 2093 if (!netdev_uc_empty(netdev)) { 2094 struct netdev_hw_addr *ha; 2095 2096 netdev_for_each_uc_addr(ha, netdev) { 2097 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr); 2098 udelay(200); 2099 } 2100 } else { 2101 /* If the list is empty then send message to PF driver to 2102 * clear all MAC VLANs on this VF. 2103 */ 2104 hw->mac.ops.set_uc_addr(hw, 0, NULL); 2105 } 2106 2107 return count; 2108 } 2109 2110 /** 2111 * ixgbevf_set_rx_mode - Multicast and unicast set 2112 * @netdev: network interface device structure 2113 * 2114 * The set_rx_method entry point is called whenever the multicast address 2115 * list, unicast address list or the network interface flags are updated. 2116 * This routine is responsible for configuring the hardware for proper 2117 * multicast mode and configuring requested unicast filters. 2118 **/ 2119 static void ixgbevf_set_rx_mode(struct net_device *netdev) 2120 { 2121 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2122 struct ixgbe_hw *hw = &adapter->hw; 2123 unsigned int flags = netdev->flags; 2124 int xcast_mode; 2125 2126 /* request the most inclusive mode we need */ 2127 if (flags & IFF_PROMISC) 2128 xcast_mode = IXGBEVF_XCAST_MODE_PROMISC; 2129 else if (flags & IFF_ALLMULTI) 2130 xcast_mode = IXGBEVF_XCAST_MODE_ALLMULTI; 2131 else if (flags & (IFF_BROADCAST | IFF_MULTICAST)) 2132 xcast_mode = IXGBEVF_XCAST_MODE_MULTI; 2133 else 2134 xcast_mode = IXGBEVF_XCAST_MODE_NONE; 2135 2136 spin_lock_bh(&adapter->mbx_lock); 2137 2138 hw->mac.ops.update_xcast_mode(hw, xcast_mode); 2139 2140 /* reprogram multicast list */ 2141 hw->mac.ops.update_mc_addr_list(hw, netdev); 2142 2143 ixgbevf_write_uc_addr_list(netdev); 2144 2145 spin_unlock_bh(&adapter->mbx_lock); 2146 } 2147 2148 static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter) 2149 { 2150 int q_idx; 2151 struct ixgbevf_q_vector *q_vector; 2152 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 2153 2154 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 2155 q_vector = adapter->q_vector[q_idx]; 2156 napi_enable(&q_vector->napi); 2157 } 2158 } 2159 2160 static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter) 2161 { 2162 int q_idx; 2163 struct ixgbevf_q_vector *q_vector; 2164 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 2165 2166 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 2167 q_vector = adapter->q_vector[q_idx]; 2168 napi_disable(&q_vector->napi); 2169 } 2170 } 2171 2172 static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter) 2173 { 2174 struct ixgbe_hw *hw = &adapter->hw; 2175 unsigned int def_q = 0; 2176 unsigned int num_tcs = 0; 2177 unsigned int num_rx_queues = adapter->num_rx_queues; 2178 unsigned int num_tx_queues = adapter->num_tx_queues; 2179 int err; 2180 2181 spin_lock_bh(&adapter->mbx_lock); 2182 2183 /* fetch queue configuration from the PF */ 2184 err = ixgbevf_get_queues(hw, &num_tcs, &def_q); 2185 2186 spin_unlock_bh(&adapter->mbx_lock); 2187 2188 if (err) 2189 return err; 2190 2191 if (num_tcs > 1) { 2192 /* we need only one Tx queue */ 2193 num_tx_queues = 1; 2194 2195 /* update default Tx ring register index */ 2196 adapter->tx_ring[0]->reg_idx = def_q; 2197 2198 /* we need as many queues as traffic classes */ 2199 num_rx_queues = num_tcs; 2200 } 2201 2202 /* if we have a bad config abort request queue reset */ 2203 if ((adapter->num_rx_queues != num_rx_queues) || 2204 (adapter->num_tx_queues != num_tx_queues)) { 2205 /* force mailbox timeout to prevent further messages */ 2206 hw->mbx.timeout = 0; 2207 2208 /* wait for watchdog to come around and bail us out */ 2209 set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state); 2210 } 2211 2212 return 0; 2213 } 2214 2215 static void ixgbevf_configure(struct ixgbevf_adapter *adapter) 2216 { 2217 ixgbevf_configure_dcb(adapter); 2218 2219 ixgbevf_set_rx_mode(adapter->netdev); 2220 2221 ixgbevf_restore_vlan(adapter); 2222 ixgbevf_ipsec_restore(adapter); 2223 2224 ixgbevf_configure_tx(adapter); 2225 ixgbevf_configure_rx(adapter); 2226 } 2227 2228 static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter) 2229 { 2230 /* Only save pre-reset stats if there are some */ 2231 if (adapter->stats.vfgprc || adapter->stats.vfgptc) { 2232 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc - 2233 adapter->stats.base_vfgprc; 2234 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc - 2235 adapter->stats.base_vfgptc; 2236 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc - 2237 adapter->stats.base_vfgorc; 2238 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc - 2239 adapter->stats.base_vfgotc; 2240 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc - 2241 adapter->stats.base_vfmprc; 2242 } 2243 } 2244 2245 static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter) 2246 { 2247 struct ixgbe_hw *hw = &adapter->hw; 2248 2249 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC); 2250 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB); 2251 adapter->stats.last_vfgorc |= 2252 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32); 2253 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC); 2254 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB); 2255 adapter->stats.last_vfgotc |= 2256 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32); 2257 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC); 2258 2259 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc; 2260 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc; 2261 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc; 2262 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc; 2263 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc; 2264 } 2265 2266 static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter) 2267 { 2268 struct ixgbe_hw *hw = &adapter->hw; 2269 static const int api[] = { 2270 ixgbe_mbox_api_15, 2271 ixgbe_mbox_api_14, 2272 ixgbe_mbox_api_13, 2273 ixgbe_mbox_api_12, 2274 ixgbe_mbox_api_11, 2275 ixgbe_mbox_api_10, 2276 ixgbe_mbox_api_unknown 2277 }; 2278 int err, idx = 0; 2279 2280 spin_lock_bh(&adapter->mbx_lock); 2281 2282 while (api[idx] != ixgbe_mbox_api_unknown) { 2283 err = hw->mac.ops.negotiate_api_version(hw, api[idx]); 2284 if (!err) 2285 break; 2286 idx++; 2287 } 2288 2289 if (hw->api_version >= ixgbe_mbox_api_15) { 2290 hw->mbx.ops.init_params(hw); 2291 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops, 2292 sizeof(struct ixgbe_mbx_operations)); 2293 } 2294 2295 spin_unlock_bh(&adapter->mbx_lock); 2296 } 2297 2298 static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter) 2299 { 2300 struct net_device *netdev = adapter->netdev; 2301 struct ixgbe_hw *hw = &adapter->hw; 2302 2303 ixgbevf_configure_msix(adapter); 2304 2305 spin_lock_bh(&adapter->mbx_lock); 2306 2307 if (is_valid_ether_addr(hw->mac.addr)) 2308 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0); 2309 else 2310 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0); 2311 2312 spin_unlock_bh(&adapter->mbx_lock); 2313 2314 smp_mb__before_atomic(); 2315 clear_bit(__IXGBEVF_DOWN, &adapter->state); 2316 ixgbevf_napi_enable_all(adapter); 2317 2318 /* clear any pending interrupts, may auto mask */ 2319 IXGBE_READ_REG(hw, IXGBE_VTEICR); 2320 ixgbevf_irq_enable(adapter); 2321 2322 /* enable transmits */ 2323 netif_tx_start_all_queues(netdev); 2324 2325 ixgbevf_save_reset_stats(adapter); 2326 ixgbevf_init_last_counter_stats(adapter); 2327 2328 hw->mac.get_link_status = 1; 2329 mod_timer(&adapter->service_timer, jiffies); 2330 } 2331 2332 void ixgbevf_up(struct ixgbevf_adapter *adapter) 2333 { 2334 ixgbevf_configure(adapter); 2335 2336 ixgbevf_up_complete(adapter); 2337 } 2338 2339 /** 2340 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue 2341 * @rx_ring: ring to free buffers from 2342 **/ 2343 static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring) 2344 { 2345 u16 i = rx_ring->next_to_clean; 2346 2347 /* Free Rx ring sk_buff */ 2348 if (rx_ring->skb) { 2349 dev_kfree_skb(rx_ring->skb); 2350 rx_ring->skb = NULL; 2351 } 2352 2353 /* Free all the Rx ring pages */ 2354 while (i != rx_ring->next_to_alloc) { 2355 struct ixgbevf_rx_buffer *rx_buffer; 2356 2357 rx_buffer = &rx_ring->rx_buffer_info[i]; 2358 2359 /* Invalidate cache lines that may have been written to by 2360 * device so that we avoid corrupting memory. 2361 */ 2362 dma_sync_single_range_for_cpu(rx_ring->dev, 2363 rx_buffer->dma, 2364 rx_buffer->page_offset, 2365 ixgbevf_rx_bufsz(rx_ring), 2366 DMA_FROM_DEVICE); 2367 2368 /* free resources associated with mapping */ 2369 dma_unmap_page_attrs(rx_ring->dev, 2370 rx_buffer->dma, 2371 ixgbevf_rx_pg_size(rx_ring), 2372 DMA_FROM_DEVICE, 2373 IXGBEVF_RX_DMA_ATTR); 2374 2375 __page_frag_cache_drain(rx_buffer->page, 2376 rx_buffer->pagecnt_bias); 2377 2378 i++; 2379 if (i == rx_ring->count) 2380 i = 0; 2381 } 2382 2383 rx_ring->next_to_alloc = 0; 2384 rx_ring->next_to_clean = 0; 2385 rx_ring->next_to_use = 0; 2386 } 2387 2388 /** 2389 * ixgbevf_clean_tx_ring - Free Tx Buffers 2390 * @tx_ring: ring to be cleaned 2391 **/ 2392 static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring) 2393 { 2394 u16 i = tx_ring->next_to_clean; 2395 struct ixgbevf_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i]; 2396 2397 while (i != tx_ring->next_to_use) { 2398 union ixgbe_adv_tx_desc *eop_desc, *tx_desc; 2399 2400 /* Free all the Tx ring sk_buffs */ 2401 if (ring_is_xdp(tx_ring)) 2402 page_frag_free(tx_buffer->data); 2403 else 2404 dev_kfree_skb_any(tx_buffer->skb); 2405 2406 /* unmap skb header data */ 2407 dma_unmap_single(tx_ring->dev, 2408 dma_unmap_addr(tx_buffer, dma), 2409 dma_unmap_len(tx_buffer, len), 2410 DMA_TO_DEVICE); 2411 2412 /* check for eop_desc to determine the end of the packet */ 2413 eop_desc = tx_buffer->next_to_watch; 2414 tx_desc = IXGBEVF_TX_DESC(tx_ring, i); 2415 2416 /* unmap remaining buffers */ 2417 while (tx_desc != eop_desc) { 2418 tx_buffer++; 2419 tx_desc++; 2420 i++; 2421 if (unlikely(i == tx_ring->count)) { 2422 i = 0; 2423 tx_buffer = tx_ring->tx_buffer_info; 2424 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); 2425 } 2426 2427 /* unmap any remaining paged data */ 2428 if (dma_unmap_len(tx_buffer, len)) 2429 dma_unmap_page(tx_ring->dev, 2430 dma_unmap_addr(tx_buffer, dma), 2431 dma_unmap_len(tx_buffer, len), 2432 DMA_TO_DEVICE); 2433 } 2434 2435 /* move us one more past the eop_desc for start of next pkt */ 2436 tx_buffer++; 2437 i++; 2438 if (unlikely(i == tx_ring->count)) { 2439 i = 0; 2440 tx_buffer = tx_ring->tx_buffer_info; 2441 } 2442 } 2443 2444 /* reset next_to_use and next_to_clean */ 2445 tx_ring->next_to_use = 0; 2446 tx_ring->next_to_clean = 0; 2447 2448 } 2449 2450 /** 2451 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues 2452 * @adapter: board private structure 2453 **/ 2454 static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter) 2455 { 2456 int i; 2457 2458 for (i = 0; i < adapter->num_rx_queues; i++) 2459 ixgbevf_clean_rx_ring(adapter->rx_ring[i]); 2460 } 2461 2462 /** 2463 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues 2464 * @adapter: board private structure 2465 **/ 2466 static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter) 2467 { 2468 int i; 2469 2470 for (i = 0; i < adapter->num_tx_queues; i++) 2471 ixgbevf_clean_tx_ring(adapter->tx_ring[i]); 2472 for (i = 0; i < adapter->num_xdp_queues; i++) 2473 ixgbevf_clean_tx_ring(adapter->xdp_ring[i]); 2474 } 2475 2476 void ixgbevf_down(struct ixgbevf_adapter *adapter) 2477 { 2478 struct net_device *netdev = adapter->netdev; 2479 struct ixgbe_hw *hw = &adapter->hw; 2480 int i; 2481 2482 /* signal that we are down to the interrupt handler */ 2483 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state)) 2484 return; /* do nothing if already down */ 2485 2486 /* disable all enabled Rx queues */ 2487 for (i = 0; i < adapter->num_rx_queues; i++) 2488 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]); 2489 2490 usleep_range(10000, 20000); 2491 2492 netif_tx_stop_all_queues(netdev); 2493 2494 /* call carrier off first to avoid false dev_watchdog timeouts */ 2495 netif_carrier_off(netdev); 2496 netif_tx_disable(netdev); 2497 2498 ixgbevf_irq_disable(adapter); 2499 2500 ixgbevf_napi_disable_all(adapter); 2501 2502 del_timer_sync(&adapter->service_timer); 2503 2504 /* disable transmits in the hardware now that interrupts are off */ 2505 for (i = 0; i < adapter->num_tx_queues; i++) { 2506 u8 reg_idx = adapter->tx_ring[i]->reg_idx; 2507 2508 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), 2509 IXGBE_TXDCTL_SWFLSH); 2510 } 2511 2512 for (i = 0; i < adapter->num_xdp_queues; i++) { 2513 u8 reg_idx = adapter->xdp_ring[i]->reg_idx; 2514 2515 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), 2516 IXGBE_TXDCTL_SWFLSH); 2517 } 2518 2519 if (!pci_channel_offline(adapter->pdev)) 2520 ixgbevf_reset(adapter); 2521 2522 ixgbevf_clean_all_tx_rings(adapter); 2523 ixgbevf_clean_all_rx_rings(adapter); 2524 } 2525 2526 void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter) 2527 { 2528 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state)) 2529 msleep(1); 2530 2531 ixgbevf_down(adapter); 2532 pci_set_master(adapter->pdev); 2533 ixgbevf_up(adapter); 2534 2535 clear_bit(__IXGBEVF_RESETTING, &adapter->state); 2536 } 2537 2538 void ixgbevf_reset(struct ixgbevf_adapter *adapter) 2539 { 2540 struct ixgbe_hw *hw = &adapter->hw; 2541 struct net_device *netdev = adapter->netdev; 2542 2543 if (hw->mac.ops.reset_hw(hw)) { 2544 hw_dbg(hw, "PF still resetting\n"); 2545 } else { 2546 hw->mac.ops.init_hw(hw); 2547 ixgbevf_negotiate_api(adapter); 2548 } 2549 2550 if (is_valid_ether_addr(adapter->hw.mac.addr)) { 2551 eth_hw_addr_set(netdev, adapter->hw.mac.addr); 2552 ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr); 2553 } 2554 2555 adapter->last_reset = jiffies; 2556 } 2557 2558 static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter, 2559 int vectors) 2560 { 2561 int vector_threshold; 2562 2563 /* We'll want at least 2 (vector_threshold): 2564 * 1) TxQ[0] + RxQ[0] handler 2565 * 2) Other (Link Status Change, etc.) 2566 */ 2567 vector_threshold = MIN_MSIX_COUNT; 2568 2569 /* The more we get, the more we will assign to Tx/Rx Cleanup 2570 * for the separate queues...where Rx Cleanup >= Tx Cleanup. 2571 * Right now, we simply care about how many we'll get; we'll 2572 * set them up later while requesting irq's. 2573 */ 2574 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries, 2575 vector_threshold, vectors); 2576 2577 if (vectors < 0) { 2578 dev_err(&adapter->pdev->dev, 2579 "Unable to allocate MSI-X interrupts\n"); 2580 kfree(adapter->msix_entries); 2581 adapter->msix_entries = NULL; 2582 return vectors; 2583 } 2584 2585 /* Adjust for only the vectors we'll use, which is minimum 2586 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of 2587 * vectors we were allocated. 2588 */ 2589 adapter->num_msix_vectors = vectors; 2590 2591 return 0; 2592 } 2593 2594 /** 2595 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent 2596 * @adapter: board private structure to initialize 2597 * 2598 * This is the top level queue allocation routine. The order here is very 2599 * important, starting with the "most" number of features turned on at once, 2600 * and ending with the smallest set of features. This way large combinations 2601 * can be allocated if they're turned on, and smaller combinations are the 2602 * fall through conditions. 2603 * 2604 **/ 2605 static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter) 2606 { 2607 struct ixgbe_hw *hw = &adapter->hw; 2608 unsigned int def_q = 0; 2609 unsigned int num_tcs = 0; 2610 int err; 2611 2612 /* Start with base case */ 2613 adapter->num_rx_queues = 1; 2614 adapter->num_tx_queues = 1; 2615 adapter->num_xdp_queues = 0; 2616 2617 spin_lock_bh(&adapter->mbx_lock); 2618 2619 /* fetch queue configuration from the PF */ 2620 err = ixgbevf_get_queues(hw, &num_tcs, &def_q); 2621 2622 spin_unlock_bh(&adapter->mbx_lock); 2623 2624 if (err) 2625 return; 2626 2627 /* we need as many queues as traffic classes */ 2628 if (num_tcs > 1) { 2629 adapter->num_rx_queues = num_tcs; 2630 } else { 2631 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES); 2632 2633 switch (hw->api_version) { 2634 case ixgbe_mbox_api_11: 2635 case ixgbe_mbox_api_12: 2636 case ixgbe_mbox_api_13: 2637 case ixgbe_mbox_api_14: 2638 case ixgbe_mbox_api_15: 2639 if (adapter->xdp_prog && 2640 hw->mac.max_tx_queues == rss) 2641 rss = rss > 3 ? 2 : 1; 2642 2643 adapter->num_rx_queues = rss; 2644 adapter->num_tx_queues = rss; 2645 adapter->num_xdp_queues = adapter->xdp_prog ? rss : 0; 2646 break; 2647 default: 2648 break; 2649 } 2650 } 2651 } 2652 2653 /** 2654 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported 2655 * @adapter: board private structure to initialize 2656 * 2657 * Attempt to configure the interrupts using the best available 2658 * capabilities of the hardware and the kernel. 2659 **/ 2660 static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter) 2661 { 2662 int vector, v_budget; 2663 2664 /* It's easy to be greedy for MSI-X vectors, but it really 2665 * doesn't do us much good if we have a lot more vectors 2666 * than CPU's. So let's be conservative and only ask for 2667 * (roughly) the same number of vectors as there are CPU's. 2668 * The default is to use pairs of vectors. 2669 */ 2670 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues); 2671 v_budget = min_t(int, v_budget, num_online_cpus()); 2672 v_budget += NON_Q_VECTORS; 2673 2674 adapter->msix_entries = kcalloc(v_budget, 2675 sizeof(struct msix_entry), GFP_KERNEL); 2676 if (!adapter->msix_entries) 2677 return -ENOMEM; 2678 2679 for (vector = 0; vector < v_budget; vector++) 2680 adapter->msix_entries[vector].entry = vector; 2681 2682 /* A failure in MSI-X entry allocation isn't fatal, but the VF driver 2683 * does not support any other modes, so we will simply fail here. Note 2684 * that we clean up the msix_entries pointer else-where. 2685 */ 2686 return ixgbevf_acquire_msix_vectors(adapter, v_budget); 2687 } 2688 2689 static void ixgbevf_add_ring(struct ixgbevf_ring *ring, 2690 struct ixgbevf_ring_container *head) 2691 { 2692 ring->next = head->ring; 2693 head->ring = ring; 2694 head->count++; 2695 } 2696 2697 /** 2698 * ixgbevf_alloc_q_vector - Allocate memory for a single interrupt vector 2699 * @adapter: board private structure to initialize 2700 * @v_idx: index of vector in adapter struct 2701 * @txr_count: number of Tx rings for q vector 2702 * @txr_idx: index of first Tx ring to assign 2703 * @xdp_count: total number of XDP rings to allocate 2704 * @xdp_idx: index of first XDP ring to allocate 2705 * @rxr_count: number of Rx rings for q vector 2706 * @rxr_idx: index of first Rx ring to assign 2707 * 2708 * We allocate one q_vector. If allocation fails we return -ENOMEM. 2709 **/ 2710 static int ixgbevf_alloc_q_vector(struct ixgbevf_adapter *adapter, int v_idx, 2711 int txr_count, int txr_idx, 2712 int xdp_count, int xdp_idx, 2713 int rxr_count, int rxr_idx) 2714 { 2715 struct ixgbevf_q_vector *q_vector; 2716 int reg_idx = txr_idx + xdp_idx; 2717 struct ixgbevf_ring *ring; 2718 int ring_count, size; 2719 2720 ring_count = txr_count + xdp_count + rxr_count; 2721 size = sizeof(*q_vector) + (sizeof(*ring) * ring_count); 2722 2723 /* allocate q_vector and rings */ 2724 q_vector = kzalloc(size, GFP_KERNEL); 2725 if (!q_vector) 2726 return -ENOMEM; 2727 2728 /* initialize NAPI */ 2729 netif_napi_add(adapter->netdev, &q_vector->napi, ixgbevf_poll, 64); 2730 2731 /* tie q_vector and adapter together */ 2732 adapter->q_vector[v_idx] = q_vector; 2733 q_vector->adapter = adapter; 2734 q_vector->v_idx = v_idx; 2735 2736 /* initialize pointer to rings */ 2737 ring = q_vector->ring; 2738 2739 while (txr_count) { 2740 /* assign generic ring traits */ 2741 ring->dev = &adapter->pdev->dev; 2742 ring->netdev = adapter->netdev; 2743 2744 /* configure backlink on ring */ 2745 ring->q_vector = q_vector; 2746 2747 /* update q_vector Tx values */ 2748 ixgbevf_add_ring(ring, &q_vector->tx); 2749 2750 /* apply Tx specific ring traits */ 2751 ring->count = adapter->tx_ring_count; 2752 ring->queue_index = txr_idx; 2753 ring->reg_idx = reg_idx; 2754 2755 /* assign ring to adapter */ 2756 adapter->tx_ring[txr_idx] = ring; 2757 2758 /* update count and index */ 2759 txr_count--; 2760 txr_idx++; 2761 reg_idx++; 2762 2763 /* push pointer to next ring */ 2764 ring++; 2765 } 2766 2767 while (xdp_count) { 2768 /* assign generic ring traits */ 2769 ring->dev = &adapter->pdev->dev; 2770 ring->netdev = adapter->netdev; 2771 2772 /* configure backlink on ring */ 2773 ring->q_vector = q_vector; 2774 2775 /* update q_vector Tx values */ 2776 ixgbevf_add_ring(ring, &q_vector->tx); 2777 2778 /* apply Tx specific ring traits */ 2779 ring->count = adapter->tx_ring_count; 2780 ring->queue_index = xdp_idx; 2781 ring->reg_idx = reg_idx; 2782 set_ring_xdp(ring); 2783 2784 /* assign ring to adapter */ 2785 adapter->xdp_ring[xdp_idx] = ring; 2786 2787 /* update count and index */ 2788 xdp_count--; 2789 xdp_idx++; 2790 reg_idx++; 2791 2792 /* push pointer to next ring */ 2793 ring++; 2794 } 2795 2796 while (rxr_count) { 2797 /* assign generic ring traits */ 2798 ring->dev = &adapter->pdev->dev; 2799 ring->netdev = adapter->netdev; 2800 2801 /* configure backlink on ring */ 2802 ring->q_vector = q_vector; 2803 2804 /* update q_vector Rx values */ 2805 ixgbevf_add_ring(ring, &q_vector->rx); 2806 2807 /* apply Rx specific ring traits */ 2808 ring->count = adapter->rx_ring_count; 2809 ring->queue_index = rxr_idx; 2810 ring->reg_idx = rxr_idx; 2811 2812 /* assign ring to adapter */ 2813 adapter->rx_ring[rxr_idx] = ring; 2814 2815 /* update count and index */ 2816 rxr_count--; 2817 rxr_idx++; 2818 2819 /* push pointer to next ring */ 2820 ring++; 2821 } 2822 2823 return 0; 2824 } 2825 2826 /** 2827 * ixgbevf_free_q_vector - Free memory allocated for specific interrupt vector 2828 * @adapter: board private structure to initialize 2829 * @v_idx: index of vector in adapter struct 2830 * 2831 * This function frees the memory allocated to the q_vector. In addition if 2832 * NAPI is enabled it will delete any references to the NAPI struct prior 2833 * to freeing the q_vector. 2834 **/ 2835 static void ixgbevf_free_q_vector(struct ixgbevf_adapter *adapter, int v_idx) 2836 { 2837 struct ixgbevf_q_vector *q_vector = adapter->q_vector[v_idx]; 2838 struct ixgbevf_ring *ring; 2839 2840 ixgbevf_for_each_ring(ring, q_vector->tx) { 2841 if (ring_is_xdp(ring)) 2842 adapter->xdp_ring[ring->queue_index] = NULL; 2843 else 2844 adapter->tx_ring[ring->queue_index] = NULL; 2845 } 2846 2847 ixgbevf_for_each_ring(ring, q_vector->rx) 2848 adapter->rx_ring[ring->queue_index] = NULL; 2849 2850 adapter->q_vector[v_idx] = NULL; 2851 netif_napi_del(&q_vector->napi); 2852 2853 /* ixgbevf_get_stats() might access the rings on this vector, 2854 * we must wait a grace period before freeing it. 2855 */ 2856 kfree_rcu(q_vector, rcu); 2857 } 2858 2859 /** 2860 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors 2861 * @adapter: board private structure to initialize 2862 * 2863 * We allocate one q_vector per queue interrupt. If allocation fails we 2864 * return -ENOMEM. 2865 **/ 2866 static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter) 2867 { 2868 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 2869 int rxr_remaining = adapter->num_rx_queues; 2870 int txr_remaining = adapter->num_tx_queues; 2871 int xdp_remaining = adapter->num_xdp_queues; 2872 int rxr_idx = 0, txr_idx = 0, xdp_idx = 0, v_idx = 0; 2873 int err; 2874 2875 if (q_vectors >= (rxr_remaining + txr_remaining + xdp_remaining)) { 2876 for (; rxr_remaining; v_idx++, q_vectors--) { 2877 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors); 2878 2879 err = ixgbevf_alloc_q_vector(adapter, v_idx, 2880 0, 0, 0, 0, rqpv, rxr_idx); 2881 if (err) 2882 goto err_out; 2883 2884 /* update counts and index */ 2885 rxr_remaining -= rqpv; 2886 rxr_idx += rqpv; 2887 } 2888 } 2889 2890 for (; q_vectors; v_idx++, q_vectors--) { 2891 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors); 2892 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors); 2893 int xqpv = DIV_ROUND_UP(xdp_remaining, q_vectors); 2894 2895 err = ixgbevf_alloc_q_vector(adapter, v_idx, 2896 tqpv, txr_idx, 2897 xqpv, xdp_idx, 2898 rqpv, rxr_idx); 2899 2900 if (err) 2901 goto err_out; 2902 2903 /* update counts and index */ 2904 rxr_remaining -= rqpv; 2905 rxr_idx += rqpv; 2906 txr_remaining -= tqpv; 2907 txr_idx += tqpv; 2908 xdp_remaining -= xqpv; 2909 xdp_idx += xqpv; 2910 } 2911 2912 return 0; 2913 2914 err_out: 2915 while (v_idx) { 2916 v_idx--; 2917 ixgbevf_free_q_vector(adapter, v_idx); 2918 } 2919 2920 return -ENOMEM; 2921 } 2922 2923 /** 2924 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors 2925 * @adapter: board private structure to initialize 2926 * 2927 * This function frees the memory allocated to the q_vectors. In addition if 2928 * NAPI is enabled it will delete any references to the NAPI struct prior 2929 * to freeing the q_vector. 2930 **/ 2931 static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter) 2932 { 2933 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 2934 2935 while (q_vectors) { 2936 q_vectors--; 2937 ixgbevf_free_q_vector(adapter, q_vectors); 2938 } 2939 } 2940 2941 /** 2942 * ixgbevf_reset_interrupt_capability - Reset MSIX setup 2943 * @adapter: board private structure 2944 * 2945 **/ 2946 static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter) 2947 { 2948 if (!adapter->msix_entries) 2949 return; 2950 2951 pci_disable_msix(adapter->pdev); 2952 kfree(adapter->msix_entries); 2953 adapter->msix_entries = NULL; 2954 } 2955 2956 /** 2957 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init 2958 * @adapter: board private structure to initialize 2959 * 2960 **/ 2961 static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter) 2962 { 2963 int err; 2964 2965 /* Number of supported queues */ 2966 ixgbevf_set_num_queues(adapter); 2967 2968 err = ixgbevf_set_interrupt_capability(adapter); 2969 if (err) { 2970 hw_dbg(&adapter->hw, 2971 "Unable to setup interrupt capabilities\n"); 2972 goto err_set_interrupt; 2973 } 2974 2975 err = ixgbevf_alloc_q_vectors(adapter); 2976 if (err) { 2977 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n"); 2978 goto err_alloc_q_vectors; 2979 } 2980 2981 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u XDP Queue count %u\n", 2982 (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled", 2983 adapter->num_rx_queues, adapter->num_tx_queues, 2984 adapter->num_xdp_queues); 2985 2986 set_bit(__IXGBEVF_DOWN, &adapter->state); 2987 2988 return 0; 2989 err_alloc_q_vectors: 2990 ixgbevf_reset_interrupt_capability(adapter); 2991 err_set_interrupt: 2992 return err; 2993 } 2994 2995 /** 2996 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings 2997 * @adapter: board private structure to clear interrupt scheme on 2998 * 2999 * We go through and clear interrupt specific resources and reset the structure 3000 * to pre-load conditions 3001 **/ 3002 static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter) 3003 { 3004 adapter->num_tx_queues = 0; 3005 adapter->num_xdp_queues = 0; 3006 adapter->num_rx_queues = 0; 3007 3008 ixgbevf_free_q_vectors(adapter); 3009 ixgbevf_reset_interrupt_capability(adapter); 3010 } 3011 3012 /** 3013 * ixgbevf_sw_init - Initialize general software structures 3014 * @adapter: board private structure to initialize 3015 * 3016 * ixgbevf_sw_init initializes the Adapter private data structure. 3017 * Fields are initialized based on PCI device information and 3018 * OS network device settings (MTU size). 3019 **/ 3020 static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter) 3021 { 3022 struct ixgbe_hw *hw = &adapter->hw; 3023 struct pci_dev *pdev = adapter->pdev; 3024 struct net_device *netdev = adapter->netdev; 3025 int err; 3026 3027 /* PCI config space info */ 3028 hw->vendor_id = pdev->vendor; 3029 hw->device_id = pdev->device; 3030 hw->revision_id = pdev->revision; 3031 hw->subsystem_vendor_id = pdev->subsystem_vendor; 3032 hw->subsystem_device_id = pdev->subsystem_device; 3033 3034 hw->mbx.ops.init_params(hw); 3035 3036 if (hw->mac.type >= ixgbe_mac_X550_vf) { 3037 err = ixgbevf_init_rss_key(adapter); 3038 if (err) 3039 goto out; 3040 } 3041 3042 /* assume legacy case in which PF would only give VF 2 queues */ 3043 hw->mac.max_tx_queues = 2; 3044 hw->mac.max_rx_queues = 2; 3045 3046 /* lock to protect mailbox accesses */ 3047 spin_lock_init(&adapter->mbx_lock); 3048 3049 err = hw->mac.ops.reset_hw(hw); 3050 if (err) { 3051 dev_info(&pdev->dev, 3052 "PF still in reset state. Is the PF interface up?\n"); 3053 } else { 3054 err = hw->mac.ops.init_hw(hw); 3055 if (err) { 3056 pr_err("init_shared_code failed: %d\n", err); 3057 goto out; 3058 } 3059 ixgbevf_negotiate_api(adapter); 3060 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 3061 if (err) 3062 dev_info(&pdev->dev, "Error reading MAC address\n"); 3063 else if (is_zero_ether_addr(adapter->hw.mac.addr)) 3064 dev_info(&pdev->dev, 3065 "MAC address not assigned by administrator.\n"); 3066 eth_hw_addr_set(netdev, hw->mac.addr); 3067 } 3068 3069 if (!is_valid_ether_addr(netdev->dev_addr)) { 3070 dev_info(&pdev->dev, "Assigning random MAC address\n"); 3071 eth_hw_addr_random(netdev); 3072 ether_addr_copy(hw->mac.addr, netdev->dev_addr); 3073 ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr); 3074 } 3075 3076 /* Enable dynamic interrupt throttling rates */ 3077 adapter->rx_itr_setting = 1; 3078 adapter->tx_itr_setting = 1; 3079 3080 /* set default ring sizes */ 3081 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD; 3082 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD; 3083 3084 set_bit(__IXGBEVF_DOWN, &adapter->state); 3085 return 0; 3086 3087 out: 3088 return err; 3089 } 3090 3091 #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \ 3092 { \ 3093 u32 current_counter = IXGBE_READ_REG(hw, reg); \ 3094 if (current_counter < last_counter) \ 3095 counter += 0x100000000LL; \ 3096 last_counter = current_counter; \ 3097 counter &= 0xFFFFFFFF00000000LL; \ 3098 counter |= current_counter; \ 3099 } 3100 3101 #define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \ 3102 { \ 3103 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \ 3104 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \ 3105 u64 current_counter = (current_counter_msb << 32) | \ 3106 current_counter_lsb; \ 3107 if (current_counter < last_counter) \ 3108 counter += 0x1000000000LL; \ 3109 last_counter = current_counter; \ 3110 counter &= 0xFFFFFFF000000000LL; \ 3111 counter |= current_counter; \ 3112 } 3113 /** 3114 * ixgbevf_update_stats - Update the board statistics counters. 3115 * @adapter: board private structure 3116 **/ 3117 void ixgbevf_update_stats(struct ixgbevf_adapter *adapter) 3118 { 3119 struct ixgbe_hw *hw = &adapter->hw; 3120 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0; 3121 u64 alloc_rx_page = 0, hw_csum_rx_error = 0; 3122 int i; 3123 3124 if (test_bit(__IXGBEVF_DOWN, &adapter->state) || 3125 test_bit(__IXGBEVF_RESETTING, &adapter->state)) 3126 return; 3127 3128 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc, 3129 adapter->stats.vfgprc); 3130 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc, 3131 adapter->stats.vfgptc); 3132 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB, 3133 adapter->stats.last_vfgorc, 3134 adapter->stats.vfgorc); 3135 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB, 3136 adapter->stats.last_vfgotc, 3137 adapter->stats.vfgotc); 3138 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc, 3139 adapter->stats.vfmprc); 3140 3141 for (i = 0; i < adapter->num_rx_queues; i++) { 3142 struct ixgbevf_ring *rx_ring = adapter->rx_ring[i]; 3143 3144 hw_csum_rx_error += rx_ring->rx_stats.csum_err; 3145 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed; 3146 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed; 3147 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page; 3148 } 3149 3150 adapter->hw_csum_rx_error = hw_csum_rx_error; 3151 adapter->alloc_rx_page_failed = alloc_rx_page_failed; 3152 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed; 3153 adapter->alloc_rx_page = alloc_rx_page; 3154 } 3155 3156 /** 3157 * ixgbevf_service_timer - Timer Call-back 3158 * @t: pointer to timer_list struct 3159 **/ 3160 static void ixgbevf_service_timer(struct timer_list *t) 3161 { 3162 struct ixgbevf_adapter *adapter = from_timer(adapter, t, 3163 service_timer); 3164 3165 /* Reset the timer */ 3166 mod_timer(&adapter->service_timer, (HZ * 2) + jiffies); 3167 3168 ixgbevf_service_event_schedule(adapter); 3169 } 3170 3171 static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter) 3172 { 3173 if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state)) 3174 return; 3175 3176 rtnl_lock(); 3177 /* If we're already down or resetting, just bail */ 3178 if (test_bit(__IXGBEVF_DOWN, &adapter->state) || 3179 test_bit(__IXGBEVF_REMOVING, &adapter->state) || 3180 test_bit(__IXGBEVF_RESETTING, &adapter->state)) { 3181 rtnl_unlock(); 3182 return; 3183 } 3184 3185 adapter->tx_timeout_count++; 3186 3187 ixgbevf_reinit_locked(adapter); 3188 rtnl_unlock(); 3189 } 3190 3191 /** 3192 * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts 3193 * @adapter: pointer to the device adapter structure 3194 * 3195 * This function serves two purposes. First it strobes the interrupt lines 3196 * in order to make certain interrupts are occurring. Secondly it sets the 3197 * bits needed to check for TX hangs. As a result we should immediately 3198 * determine if a hang has occurred. 3199 **/ 3200 static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter) 3201 { 3202 struct ixgbe_hw *hw = &adapter->hw; 3203 u32 eics = 0; 3204 int i; 3205 3206 /* If we're down or resetting, just bail */ 3207 if (test_bit(__IXGBEVF_DOWN, &adapter->state) || 3208 test_bit(__IXGBEVF_RESETTING, &adapter->state)) 3209 return; 3210 3211 /* Force detection of hung controller */ 3212 if (netif_carrier_ok(adapter->netdev)) { 3213 for (i = 0; i < adapter->num_tx_queues; i++) 3214 set_check_for_tx_hang(adapter->tx_ring[i]); 3215 for (i = 0; i < adapter->num_xdp_queues; i++) 3216 set_check_for_tx_hang(adapter->xdp_ring[i]); 3217 } 3218 3219 /* get one bit for every active Tx/Rx interrupt vector */ 3220 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) { 3221 struct ixgbevf_q_vector *qv = adapter->q_vector[i]; 3222 3223 if (qv->rx.ring || qv->tx.ring) 3224 eics |= BIT(i); 3225 } 3226 3227 /* Cause software interrupt to ensure rings are cleaned */ 3228 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics); 3229 } 3230 3231 /** 3232 * ixgbevf_watchdog_update_link - update the link status 3233 * @adapter: pointer to the device adapter structure 3234 **/ 3235 static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter) 3236 { 3237 struct ixgbe_hw *hw = &adapter->hw; 3238 u32 link_speed = adapter->link_speed; 3239 bool link_up = adapter->link_up; 3240 s32 err; 3241 3242 spin_lock_bh(&adapter->mbx_lock); 3243 3244 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false); 3245 3246 spin_unlock_bh(&adapter->mbx_lock); 3247 3248 /* if check for link returns error we will need to reset */ 3249 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) { 3250 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state); 3251 link_up = false; 3252 } 3253 3254 adapter->link_up = link_up; 3255 adapter->link_speed = link_speed; 3256 } 3257 3258 /** 3259 * ixgbevf_watchdog_link_is_up - update netif_carrier status and 3260 * print link up message 3261 * @adapter: pointer to the device adapter structure 3262 **/ 3263 static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter) 3264 { 3265 struct net_device *netdev = adapter->netdev; 3266 3267 /* only continue if link was previously down */ 3268 if (netif_carrier_ok(netdev)) 3269 return; 3270 3271 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n", 3272 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ? 3273 "10 Gbps" : 3274 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ? 3275 "1 Gbps" : 3276 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ? 3277 "100 Mbps" : 3278 "unknown speed"); 3279 3280 netif_carrier_on(netdev); 3281 } 3282 3283 /** 3284 * ixgbevf_watchdog_link_is_down - update netif_carrier status and 3285 * print link down message 3286 * @adapter: pointer to the adapter structure 3287 **/ 3288 static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter) 3289 { 3290 struct net_device *netdev = adapter->netdev; 3291 3292 adapter->link_speed = 0; 3293 3294 /* only continue if link was up previously */ 3295 if (!netif_carrier_ok(netdev)) 3296 return; 3297 3298 dev_info(&adapter->pdev->dev, "NIC Link is Down\n"); 3299 3300 netif_carrier_off(netdev); 3301 } 3302 3303 /** 3304 * ixgbevf_watchdog_subtask - worker thread to bring link up 3305 * @adapter: board private structure 3306 **/ 3307 static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter) 3308 { 3309 /* if interface is down do nothing */ 3310 if (test_bit(__IXGBEVF_DOWN, &adapter->state) || 3311 test_bit(__IXGBEVF_RESETTING, &adapter->state)) 3312 return; 3313 3314 ixgbevf_watchdog_update_link(adapter); 3315 3316 if (adapter->link_up) 3317 ixgbevf_watchdog_link_is_up(adapter); 3318 else 3319 ixgbevf_watchdog_link_is_down(adapter); 3320 3321 ixgbevf_update_stats(adapter); 3322 } 3323 3324 /** 3325 * ixgbevf_service_task - manages and runs subtasks 3326 * @work: pointer to work_struct containing our data 3327 **/ 3328 static void ixgbevf_service_task(struct work_struct *work) 3329 { 3330 struct ixgbevf_adapter *adapter = container_of(work, 3331 struct ixgbevf_adapter, 3332 service_task); 3333 struct ixgbe_hw *hw = &adapter->hw; 3334 3335 if (IXGBE_REMOVED(hw->hw_addr)) { 3336 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) { 3337 rtnl_lock(); 3338 ixgbevf_down(adapter); 3339 rtnl_unlock(); 3340 } 3341 return; 3342 } 3343 3344 ixgbevf_queue_reset_subtask(adapter); 3345 ixgbevf_reset_subtask(adapter); 3346 ixgbevf_watchdog_subtask(adapter); 3347 ixgbevf_check_hang_subtask(adapter); 3348 3349 ixgbevf_service_event_complete(adapter); 3350 } 3351 3352 /** 3353 * ixgbevf_free_tx_resources - Free Tx Resources per Queue 3354 * @tx_ring: Tx descriptor ring for a specific queue 3355 * 3356 * Free all transmit software resources 3357 **/ 3358 void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring) 3359 { 3360 ixgbevf_clean_tx_ring(tx_ring); 3361 3362 vfree(tx_ring->tx_buffer_info); 3363 tx_ring->tx_buffer_info = NULL; 3364 3365 /* if not set, then don't free */ 3366 if (!tx_ring->desc) 3367 return; 3368 3369 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc, 3370 tx_ring->dma); 3371 3372 tx_ring->desc = NULL; 3373 } 3374 3375 /** 3376 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues 3377 * @adapter: board private structure 3378 * 3379 * Free all transmit software resources 3380 **/ 3381 static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter) 3382 { 3383 int i; 3384 3385 for (i = 0; i < adapter->num_tx_queues; i++) 3386 if (adapter->tx_ring[i]->desc) 3387 ixgbevf_free_tx_resources(adapter->tx_ring[i]); 3388 for (i = 0; i < adapter->num_xdp_queues; i++) 3389 if (adapter->xdp_ring[i]->desc) 3390 ixgbevf_free_tx_resources(adapter->xdp_ring[i]); 3391 } 3392 3393 /** 3394 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors) 3395 * @tx_ring: Tx descriptor ring (for a specific queue) to setup 3396 * 3397 * Return 0 on success, negative on failure 3398 **/ 3399 int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring) 3400 { 3401 struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev); 3402 int size; 3403 3404 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; 3405 tx_ring->tx_buffer_info = vmalloc(size); 3406 if (!tx_ring->tx_buffer_info) 3407 goto err; 3408 3409 u64_stats_init(&tx_ring->syncp); 3410 3411 /* round up to nearest 4K */ 3412 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc); 3413 tx_ring->size = ALIGN(tx_ring->size, 4096); 3414 3415 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size, 3416 &tx_ring->dma, GFP_KERNEL); 3417 if (!tx_ring->desc) 3418 goto err; 3419 3420 return 0; 3421 3422 err: 3423 vfree(tx_ring->tx_buffer_info); 3424 tx_ring->tx_buffer_info = NULL; 3425 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n"); 3426 return -ENOMEM; 3427 } 3428 3429 /** 3430 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources 3431 * @adapter: board private structure 3432 * 3433 * If this function returns with an error, then it's possible one or 3434 * more of the rings is populated (while the rest are not). It is the 3435 * callers duty to clean those orphaned rings. 3436 * 3437 * Return 0 on success, negative on failure 3438 **/ 3439 static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter) 3440 { 3441 int i, j = 0, err = 0; 3442 3443 for (i = 0; i < adapter->num_tx_queues; i++) { 3444 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]); 3445 if (!err) 3446 continue; 3447 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i); 3448 goto err_setup_tx; 3449 } 3450 3451 for (j = 0; j < adapter->num_xdp_queues; j++) { 3452 err = ixgbevf_setup_tx_resources(adapter->xdp_ring[j]); 3453 if (!err) 3454 continue; 3455 hw_dbg(&adapter->hw, "Allocation for XDP Queue %u failed\n", j); 3456 goto err_setup_tx; 3457 } 3458 3459 return 0; 3460 err_setup_tx: 3461 /* rewind the index freeing the rings as we go */ 3462 while (j--) 3463 ixgbevf_free_tx_resources(adapter->xdp_ring[j]); 3464 while (i--) 3465 ixgbevf_free_tx_resources(adapter->tx_ring[i]); 3466 3467 return err; 3468 } 3469 3470 /** 3471 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors) 3472 * @adapter: board private structure 3473 * @rx_ring: Rx descriptor ring (for a specific queue) to setup 3474 * 3475 * Returns 0 on success, negative on failure 3476 **/ 3477 int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter, 3478 struct ixgbevf_ring *rx_ring) 3479 { 3480 int size; 3481 3482 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; 3483 rx_ring->rx_buffer_info = vmalloc(size); 3484 if (!rx_ring->rx_buffer_info) 3485 goto err; 3486 3487 u64_stats_init(&rx_ring->syncp); 3488 3489 /* Round up to nearest 4K */ 3490 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc); 3491 rx_ring->size = ALIGN(rx_ring->size, 4096); 3492 3493 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size, 3494 &rx_ring->dma, GFP_KERNEL); 3495 3496 if (!rx_ring->desc) 3497 goto err; 3498 3499 /* XDP RX-queue info */ 3500 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev, 3501 rx_ring->queue_index, 0) < 0) 3502 goto err; 3503 3504 rx_ring->xdp_prog = adapter->xdp_prog; 3505 3506 return 0; 3507 err: 3508 vfree(rx_ring->rx_buffer_info); 3509 rx_ring->rx_buffer_info = NULL; 3510 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n"); 3511 return -ENOMEM; 3512 } 3513 3514 /** 3515 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources 3516 * @adapter: board private structure 3517 * 3518 * If this function returns with an error, then it's possible one or 3519 * more of the rings is populated (while the rest are not). It is the 3520 * callers duty to clean those orphaned rings. 3521 * 3522 * Return 0 on success, negative on failure 3523 **/ 3524 static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter) 3525 { 3526 int i, err = 0; 3527 3528 for (i = 0; i < adapter->num_rx_queues; i++) { 3529 err = ixgbevf_setup_rx_resources(adapter, adapter->rx_ring[i]); 3530 if (!err) 3531 continue; 3532 hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i); 3533 goto err_setup_rx; 3534 } 3535 3536 return 0; 3537 err_setup_rx: 3538 /* rewind the index freeing the rings as we go */ 3539 while (i--) 3540 ixgbevf_free_rx_resources(adapter->rx_ring[i]); 3541 return err; 3542 } 3543 3544 /** 3545 * ixgbevf_free_rx_resources - Free Rx Resources 3546 * @rx_ring: ring to clean the resources from 3547 * 3548 * Free all receive software resources 3549 **/ 3550 void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring) 3551 { 3552 ixgbevf_clean_rx_ring(rx_ring); 3553 3554 rx_ring->xdp_prog = NULL; 3555 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 3556 vfree(rx_ring->rx_buffer_info); 3557 rx_ring->rx_buffer_info = NULL; 3558 3559 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc, 3560 rx_ring->dma); 3561 3562 rx_ring->desc = NULL; 3563 } 3564 3565 /** 3566 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues 3567 * @adapter: board private structure 3568 * 3569 * Free all receive software resources 3570 **/ 3571 static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter) 3572 { 3573 int i; 3574 3575 for (i = 0; i < adapter->num_rx_queues; i++) 3576 if (adapter->rx_ring[i]->desc) 3577 ixgbevf_free_rx_resources(adapter->rx_ring[i]); 3578 } 3579 3580 /** 3581 * ixgbevf_open - Called when a network interface is made active 3582 * @netdev: network interface device structure 3583 * 3584 * Returns 0 on success, negative value on failure 3585 * 3586 * The open entry point is called when a network interface is made 3587 * active by the system (IFF_UP). At this point all resources needed 3588 * for transmit and receive operations are allocated, the interrupt 3589 * handler is registered with the OS, the watchdog timer is started, 3590 * and the stack is notified that the interface is ready. 3591 **/ 3592 int ixgbevf_open(struct net_device *netdev) 3593 { 3594 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3595 struct ixgbe_hw *hw = &adapter->hw; 3596 int err; 3597 3598 /* A previous failure to open the device because of a lack of 3599 * available MSIX vector resources may have reset the number 3600 * of msix vectors variable to zero. The only way to recover 3601 * is to unload/reload the driver and hope that the system has 3602 * been able to recover some MSIX vector resources. 3603 */ 3604 if (!adapter->num_msix_vectors) 3605 return -ENOMEM; 3606 3607 if (hw->adapter_stopped) { 3608 ixgbevf_reset(adapter); 3609 /* if adapter is still stopped then PF isn't up and 3610 * the VF can't start. 3611 */ 3612 if (hw->adapter_stopped) { 3613 err = IXGBE_ERR_MBX; 3614 pr_err("Unable to start - perhaps the PF Driver isn't up yet\n"); 3615 goto err_setup_reset; 3616 } 3617 } 3618 3619 /* disallow open during test */ 3620 if (test_bit(__IXGBEVF_TESTING, &adapter->state)) 3621 return -EBUSY; 3622 3623 netif_carrier_off(netdev); 3624 3625 /* allocate transmit descriptors */ 3626 err = ixgbevf_setup_all_tx_resources(adapter); 3627 if (err) 3628 goto err_setup_tx; 3629 3630 /* allocate receive descriptors */ 3631 err = ixgbevf_setup_all_rx_resources(adapter); 3632 if (err) 3633 goto err_setup_rx; 3634 3635 ixgbevf_configure(adapter); 3636 3637 err = ixgbevf_request_irq(adapter); 3638 if (err) 3639 goto err_req_irq; 3640 3641 /* Notify the stack of the actual queue counts. */ 3642 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues); 3643 if (err) 3644 goto err_set_queues; 3645 3646 err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues); 3647 if (err) 3648 goto err_set_queues; 3649 3650 ixgbevf_up_complete(adapter); 3651 3652 return 0; 3653 3654 err_set_queues: 3655 ixgbevf_free_irq(adapter); 3656 err_req_irq: 3657 ixgbevf_free_all_rx_resources(adapter); 3658 err_setup_rx: 3659 ixgbevf_free_all_tx_resources(adapter); 3660 err_setup_tx: 3661 ixgbevf_reset(adapter); 3662 err_setup_reset: 3663 3664 return err; 3665 } 3666 3667 /** 3668 * ixgbevf_close_suspend - actions necessary to both suspend and close flows 3669 * @adapter: the private adapter struct 3670 * 3671 * This function should contain the necessary work common to both suspending 3672 * and closing of the device. 3673 */ 3674 static void ixgbevf_close_suspend(struct ixgbevf_adapter *adapter) 3675 { 3676 ixgbevf_down(adapter); 3677 ixgbevf_free_irq(adapter); 3678 ixgbevf_free_all_tx_resources(adapter); 3679 ixgbevf_free_all_rx_resources(adapter); 3680 } 3681 3682 /** 3683 * ixgbevf_close - Disables a network interface 3684 * @netdev: network interface device structure 3685 * 3686 * Returns 0, this is not allowed to fail 3687 * 3688 * The close entry point is called when an interface is de-activated 3689 * by the OS. The hardware is still under the drivers control, but 3690 * needs to be disabled. A global MAC reset is issued to stop the 3691 * hardware, and all transmit and receive resources are freed. 3692 **/ 3693 int ixgbevf_close(struct net_device *netdev) 3694 { 3695 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3696 3697 if (netif_device_present(netdev)) 3698 ixgbevf_close_suspend(adapter); 3699 3700 return 0; 3701 } 3702 3703 static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter) 3704 { 3705 struct net_device *dev = adapter->netdev; 3706 3707 if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, 3708 &adapter->state)) 3709 return; 3710 3711 /* if interface is down do nothing */ 3712 if (test_bit(__IXGBEVF_DOWN, &adapter->state) || 3713 test_bit(__IXGBEVF_RESETTING, &adapter->state)) 3714 return; 3715 3716 /* Hardware has to reinitialize queues and interrupts to 3717 * match packet buffer alignment. Unfortunately, the 3718 * hardware is not flexible enough to do this dynamically. 3719 */ 3720 rtnl_lock(); 3721 3722 if (netif_running(dev)) 3723 ixgbevf_close(dev); 3724 3725 ixgbevf_clear_interrupt_scheme(adapter); 3726 ixgbevf_init_interrupt_scheme(adapter); 3727 3728 if (netif_running(dev)) 3729 ixgbevf_open(dev); 3730 3731 rtnl_unlock(); 3732 } 3733 3734 static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring, 3735 u32 vlan_macip_lens, u32 fceof_saidx, 3736 u32 type_tucmd, u32 mss_l4len_idx) 3737 { 3738 struct ixgbe_adv_tx_context_desc *context_desc; 3739 u16 i = tx_ring->next_to_use; 3740 3741 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i); 3742 3743 i++; 3744 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0; 3745 3746 /* set bits to identify this as an advanced context descriptor */ 3747 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT; 3748 3749 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); 3750 context_desc->fceof_saidx = cpu_to_le32(fceof_saidx); 3751 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd); 3752 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); 3753 } 3754 3755 static int ixgbevf_tso(struct ixgbevf_ring *tx_ring, 3756 struct ixgbevf_tx_buffer *first, 3757 u8 *hdr_len, 3758 struct ixgbevf_ipsec_tx_data *itd) 3759 { 3760 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx; 3761 struct sk_buff *skb = first->skb; 3762 union { 3763 struct iphdr *v4; 3764 struct ipv6hdr *v6; 3765 unsigned char *hdr; 3766 } ip; 3767 union { 3768 struct tcphdr *tcp; 3769 unsigned char *hdr; 3770 } l4; 3771 u32 paylen, l4_offset; 3772 u32 fceof_saidx = 0; 3773 int err; 3774 3775 if (skb->ip_summed != CHECKSUM_PARTIAL) 3776 return 0; 3777 3778 if (!skb_is_gso(skb)) 3779 return 0; 3780 3781 err = skb_cow_head(skb, 0); 3782 if (err < 0) 3783 return err; 3784 3785 if (eth_p_mpls(first->protocol)) 3786 ip.hdr = skb_inner_network_header(skb); 3787 else 3788 ip.hdr = skb_network_header(skb); 3789 l4.hdr = skb_checksum_start(skb); 3790 3791 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ 3792 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP; 3793 3794 /* initialize outer IP header fields */ 3795 if (ip.v4->version == 4) { 3796 unsigned char *csum_start = skb_checksum_start(skb); 3797 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4); 3798 int len = csum_start - trans_start; 3799 3800 /* IP header will have to cancel out any data that 3801 * is not a part of the outer IP header, so set to 3802 * a reverse csum if needed, else init check to 0. 3803 */ 3804 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ? 3805 csum_fold(csum_partial(trans_start, 3806 len, 0)) : 0; 3807 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4; 3808 3809 ip.v4->tot_len = 0; 3810 first->tx_flags |= IXGBE_TX_FLAGS_TSO | 3811 IXGBE_TX_FLAGS_CSUM | 3812 IXGBE_TX_FLAGS_IPV4; 3813 } else { 3814 ip.v6->payload_len = 0; 3815 first->tx_flags |= IXGBE_TX_FLAGS_TSO | 3816 IXGBE_TX_FLAGS_CSUM; 3817 } 3818 3819 /* determine offset of inner transport header */ 3820 l4_offset = l4.hdr - skb->data; 3821 3822 /* compute length of segmentation header */ 3823 *hdr_len = (l4.tcp->doff * 4) + l4_offset; 3824 3825 /* remove payload length from inner checksum */ 3826 paylen = skb->len - l4_offset; 3827 csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen)); 3828 3829 /* update gso size and bytecount with header size */ 3830 first->gso_segs = skb_shinfo(skb)->gso_segs; 3831 first->bytecount += (first->gso_segs - 1) * *hdr_len; 3832 3833 /* mss_l4len_id: use 1 as index for TSO */ 3834 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT; 3835 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT; 3836 mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT); 3837 3838 fceof_saidx |= itd->pfsa; 3839 type_tucmd |= itd->flags | itd->trailer_len; 3840 3841 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */ 3842 vlan_macip_lens = l4.hdr - ip.hdr; 3843 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT; 3844 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; 3845 3846 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 3847 mss_l4len_idx); 3848 3849 return 1; 3850 } 3851 3852 static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring, 3853 struct ixgbevf_tx_buffer *first, 3854 struct ixgbevf_ipsec_tx_data *itd) 3855 { 3856 struct sk_buff *skb = first->skb; 3857 u32 vlan_macip_lens = 0; 3858 u32 fceof_saidx = 0; 3859 u32 type_tucmd = 0; 3860 3861 if (skb->ip_summed != CHECKSUM_PARTIAL) 3862 goto no_csum; 3863 3864 switch (skb->csum_offset) { 3865 case offsetof(struct tcphdr, check): 3866 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP; 3867 fallthrough; 3868 case offsetof(struct udphdr, check): 3869 break; 3870 case offsetof(struct sctphdr, checksum): 3871 /* validate that this is actually an SCTP request */ 3872 if (skb_csum_is_sctp(skb)) { 3873 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP; 3874 break; 3875 } 3876 fallthrough; 3877 default: 3878 skb_checksum_help(skb); 3879 goto no_csum; 3880 } 3881 3882 if (first->protocol == htons(ETH_P_IP)) 3883 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4; 3884 3885 /* update TX checksum flag */ 3886 first->tx_flags |= IXGBE_TX_FLAGS_CSUM; 3887 vlan_macip_lens = skb_checksum_start_offset(skb) - 3888 skb_network_offset(skb); 3889 no_csum: 3890 /* vlan_macip_lens: MACLEN, VLAN tag */ 3891 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT; 3892 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; 3893 3894 fceof_saidx |= itd->pfsa; 3895 type_tucmd |= itd->flags | itd->trailer_len; 3896 3897 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, 3898 fceof_saidx, type_tucmd, 0); 3899 } 3900 3901 static __le32 ixgbevf_tx_cmd_type(u32 tx_flags) 3902 { 3903 /* set type for advanced descriptor with frame checksum insertion */ 3904 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA | 3905 IXGBE_ADVTXD_DCMD_IFCS | 3906 IXGBE_ADVTXD_DCMD_DEXT); 3907 3908 /* set HW VLAN bit if VLAN is present */ 3909 if (tx_flags & IXGBE_TX_FLAGS_VLAN) 3910 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE); 3911 3912 /* set segmentation enable bits for TSO/FSO */ 3913 if (tx_flags & IXGBE_TX_FLAGS_TSO) 3914 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE); 3915 3916 return cmd_type; 3917 } 3918 3919 static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc, 3920 u32 tx_flags, unsigned int paylen) 3921 { 3922 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT); 3923 3924 /* enable L4 checksum for TSO and TX checksum offload */ 3925 if (tx_flags & IXGBE_TX_FLAGS_CSUM) 3926 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM); 3927 3928 /* enble IPv4 checksum for TSO */ 3929 if (tx_flags & IXGBE_TX_FLAGS_IPV4) 3930 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM); 3931 3932 /* enable IPsec */ 3933 if (tx_flags & IXGBE_TX_FLAGS_IPSEC) 3934 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IPSEC); 3935 3936 /* use index 1 context for TSO/FSO/FCOE/IPSEC */ 3937 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_IPSEC)) 3938 olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT); 3939 3940 /* Check Context must be set if Tx switch is enabled, which it 3941 * always is for case where virtual functions are running 3942 */ 3943 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC); 3944 3945 tx_desc->read.olinfo_status = olinfo_status; 3946 } 3947 3948 static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring, 3949 struct ixgbevf_tx_buffer *first, 3950 const u8 hdr_len) 3951 { 3952 struct sk_buff *skb = first->skb; 3953 struct ixgbevf_tx_buffer *tx_buffer; 3954 union ixgbe_adv_tx_desc *tx_desc; 3955 skb_frag_t *frag; 3956 dma_addr_t dma; 3957 unsigned int data_len, size; 3958 u32 tx_flags = first->tx_flags; 3959 __le32 cmd_type = ixgbevf_tx_cmd_type(tx_flags); 3960 u16 i = tx_ring->next_to_use; 3961 3962 tx_desc = IXGBEVF_TX_DESC(tx_ring, i); 3963 3964 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len); 3965 3966 size = skb_headlen(skb); 3967 data_len = skb->data_len; 3968 3969 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE); 3970 3971 tx_buffer = first; 3972 3973 for (frag = &skb_shinfo(skb)->frags[0];; frag++) { 3974 if (dma_mapping_error(tx_ring->dev, dma)) 3975 goto dma_error; 3976 3977 /* record length, and DMA address */ 3978 dma_unmap_len_set(tx_buffer, len, size); 3979 dma_unmap_addr_set(tx_buffer, dma, dma); 3980 3981 tx_desc->read.buffer_addr = cpu_to_le64(dma); 3982 3983 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) { 3984 tx_desc->read.cmd_type_len = 3985 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD); 3986 3987 i++; 3988 tx_desc++; 3989 if (i == tx_ring->count) { 3990 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); 3991 i = 0; 3992 } 3993 tx_desc->read.olinfo_status = 0; 3994 3995 dma += IXGBE_MAX_DATA_PER_TXD; 3996 size -= IXGBE_MAX_DATA_PER_TXD; 3997 3998 tx_desc->read.buffer_addr = cpu_to_le64(dma); 3999 } 4000 4001 if (likely(!data_len)) 4002 break; 4003 4004 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size); 4005 4006 i++; 4007 tx_desc++; 4008 if (i == tx_ring->count) { 4009 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); 4010 i = 0; 4011 } 4012 tx_desc->read.olinfo_status = 0; 4013 4014 size = skb_frag_size(frag); 4015 data_len -= size; 4016 4017 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size, 4018 DMA_TO_DEVICE); 4019 4020 tx_buffer = &tx_ring->tx_buffer_info[i]; 4021 } 4022 4023 /* write last descriptor with RS and EOP bits */ 4024 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD); 4025 tx_desc->read.cmd_type_len = cmd_type; 4026 4027 /* set the timestamp */ 4028 first->time_stamp = jiffies; 4029 4030 skb_tx_timestamp(skb); 4031 4032 /* Force memory writes to complete before letting h/w know there 4033 * are new descriptors to fetch. (Only applicable for weak-ordered 4034 * memory model archs, such as IA-64). 4035 * 4036 * We also need this memory barrier (wmb) to make certain all of the 4037 * status bits have been updated before next_to_watch is written. 4038 */ 4039 wmb(); 4040 4041 /* set next_to_watch value indicating a packet is present */ 4042 first->next_to_watch = tx_desc; 4043 4044 i++; 4045 if (i == tx_ring->count) 4046 i = 0; 4047 4048 tx_ring->next_to_use = i; 4049 4050 /* notify HW of packet */ 4051 ixgbevf_write_tail(tx_ring, i); 4052 4053 return; 4054 dma_error: 4055 dev_err(tx_ring->dev, "TX DMA map failed\n"); 4056 tx_buffer = &tx_ring->tx_buffer_info[i]; 4057 4058 /* clear dma mappings for failed tx_buffer_info map */ 4059 while (tx_buffer != first) { 4060 if (dma_unmap_len(tx_buffer, len)) 4061 dma_unmap_page(tx_ring->dev, 4062 dma_unmap_addr(tx_buffer, dma), 4063 dma_unmap_len(tx_buffer, len), 4064 DMA_TO_DEVICE); 4065 dma_unmap_len_set(tx_buffer, len, 0); 4066 4067 if (i-- == 0) 4068 i += tx_ring->count; 4069 tx_buffer = &tx_ring->tx_buffer_info[i]; 4070 } 4071 4072 if (dma_unmap_len(tx_buffer, len)) 4073 dma_unmap_single(tx_ring->dev, 4074 dma_unmap_addr(tx_buffer, dma), 4075 dma_unmap_len(tx_buffer, len), 4076 DMA_TO_DEVICE); 4077 dma_unmap_len_set(tx_buffer, len, 0); 4078 4079 dev_kfree_skb_any(tx_buffer->skb); 4080 tx_buffer->skb = NULL; 4081 4082 tx_ring->next_to_use = i; 4083 } 4084 4085 static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size) 4086 { 4087 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index); 4088 /* Herbert's original patch had: 4089 * smp_mb__after_netif_stop_queue(); 4090 * but since that doesn't exist yet, just open code it. 4091 */ 4092 smp_mb(); 4093 4094 /* We need to check again in a case another CPU has just 4095 * made room available. 4096 */ 4097 if (likely(ixgbevf_desc_unused(tx_ring) < size)) 4098 return -EBUSY; 4099 4100 /* A reprieve! - use start_queue because it doesn't call schedule */ 4101 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index); 4102 ++tx_ring->tx_stats.restart_queue; 4103 4104 return 0; 4105 } 4106 4107 static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size) 4108 { 4109 if (likely(ixgbevf_desc_unused(tx_ring) >= size)) 4110 return 0; 4111 return __ixgbevf_maybe_stop_tx(tx_ring, size); 4112 } 4113 4114 static int ixgbevf_xmit_frame_ring(struct sk_buff *skb, 4115 struct ixgbevf_ring *tx_ring) 4116 { 4117 struct ixgbevf_tx_buffer *first; 4118 int tso; 4119 u32 tx_flags = 0; 4120 u16 count = TXD_USE_COUNT(skb_headlen(skb)); 4121 struct ixgbevf_ipsec_tx_data ipsec_tx = { 0 }; 4122 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD 4123 unsigned short f; 4124 #endif 4125 u8 hdr_len = 0; 4126 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL); 4127 4128 if (!dst_mac || is_link_local_ether_addr(dst_mac)) { 4129 dev_kfree_skb_any(skb); 4130 return NETDEV_TX_OK; 4131 } 4132 4133 /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD, 4134 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD, 4135 * + 2 desc gap to keep tail from touching head, 4136 * + 1 desc for context descriptor, 4137 * otherwise try next time 4138 */ 4139 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD 4140 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) { 4141 skb_frag_t *frag = &skb_shinfo(skb)->frags[f]; 4142 4143 count += TXD_USE_COUNT(skb_frag_size(frag)); 4144 } 4145 #else 4146 count += skb_shinfo(skb)->nr_frags; 4147 #endif 4148 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) { 4149 tx_ring->tx_stats.tx_busy++; 4150 return NETDEV_TX_BUSY; 4151 } 4152 4153 /* record the location of the first descriptor for this packet */ 4154 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use]; 4155 first->skb = skb; 4156 first->bytecount = skb->len; 4157 first->gso_segs = 1; 4158 4159 if (skb_vlan_tag_present(skb)) { 4160 tx_flags |= skb_vlan_tag_get(skb); 4161 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT; 4162 tx_flags |= IXGBE_TX_FLAGS_VLAN; 4163 } 4164 4165 /* record initial flags and protocol */ 4166 first->tx_flags = tx_flags; 4167 first->protocol = vlan_get_protocol(skb); 4168 4169 #ifdef CONFIG_IXGBEVF_IPSEC 4170 if (xfrm_offload(skb) && !ixgbevf_ipsec_tx(tx_ring, first, &ipsec_tx)) 4171 goto out_drop; 4172 #endif 4173 tso = ixgbevf_tso(tx_ring, first, &hdr_len, &ipsec_tx); 4174 if (tso < 0) 4175 goto out_drop; 4176 else if (!tso) 4177 ixgbevf_tx_csum(tx_ring, first, &ipsec_tx); 4178 4179 ixgbevf_tx_map(tx_ring, first, hdr_len); 4180 4181 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED); 4182 4183 return NETDEV_TX_OK; 4184 4185 out_drop: 4186 dev_kfree_skb_any(first->skb); 4187 first->skb = NULL; 4188 4189 return NETDEV_TX_OK; 4190 } 4191 4192 static netdev_tx_t ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 4193 { 4194 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 4195 struct ixgbevf_ring *tx_ring; 4196 4197 if (skb->len <= 0) { 4198 dev_kfree_skb_any(skb); 4199 return NETDEV_TX_OK; 4200 } 4201 4202 /* The minimum packet size for olinfo paylen is 17 so pad the skb 4203 * in order to meet this minimum size requirement. 4204 */ 4205 if (skb->len < 17) { 4206 if (skb_padto(skb, 17)) 4207 return NETDEV_TX_OK; 4208 skb->len = 17; 4209 } 4210 4211 tx_ring = adapter->tx_ring[skb->queue_mapping]; 4212 return ixgbevf_xmit_frame_ring(skb, tx_ring); 4213 } 4214 4215 /** 4216 * ixgbevf_set_mac - Change the Ethernet Address of the NIC 4217 * @netdev: network interface device structure 4218 * @p: pointer to an address structure 4219 * 4220 * Returns 0 on success, negative on failure 4221 **/ 4222 static int ixgbevf_set_mac(struct net_device *netdev, void *p) 4223 { 4224 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 4225 struct ixgbe_hw *hw = &adapter->hw; 4226 struct sockaddr *addr = p; 4227 int err; 4228 4229 if (!is_valid_ether_addr(addr->sa_data)) 4230 return -EADDRNOTAVAIL; 4231 4232 spin_lock_bh(&adapter->mbx_lock); 4233 4234 err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0); 4235 4236 spin_unlock_bh(&adapter->mbx_lock); 4237 4238 if (err) 4239 return -EPERM; 4240 4241 ether_addr_copy(hw->mac.addr, addr->sa_data); 4242 ether_addr_copy(hw->mac.perm_addr, addr->sa_data); 4243 eth_hw_addr_set(netdev, addr->sa_data); 4244 4245 return 0; 4246 } 4247 4248 /** 4249 * ixgbevf_change_mtu - Change the Maximum Transfer Unit 4250 * @netdev: network interface device structure 4251 * @new_mtu: new value for maximum frame size 4252 * 4253 * Returns 0 on success, negative on failure 4254 **/ 4255 static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu) 4256 { 4257 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 4258 struct ixgbe_hw *hw = &adapter->hw; 4259 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 4260 int ret; 4261 4262 /* prevent MTU being changed to a size unsupported by XDP */ 4263 if (adapter->xdp_prog) { 4264 dev_warn(&adapter->pdev->dev, "MTU cannot be changed while XDP program is loaded\n"); 4265 return -EPERM; 4266 } 4267 4268 spin_lock_bh(&adapter->mbx_lock); 4269 /* notify the PF of our intent to use this size of frame */ 4270 ret = hw->mac.ops.set_rlpml(hw, max_frame); 4271 spin_unlock_bh(&adapter->mbx_lock); 4272 if (ret) 4273 return -EINVAL; 4274 4275 hw_dbg(hw, "changing MTU from %d to %d\n", 4276 netdev->mtu, new_mtu); 4277 4278 /* must set new MTU before calling down or up */ 4279 netdev->mtu = new_mtu; 4280 4281 if (netif_running(netdev)) 4282 ixgbevf_reinit_locked(adapter); 4283 4284 return 0; 4285 } 4286 4287 static int __maybe_unused ixgbevf_suspend(struct device *dev_d) 4288 { 4289 struct net_device *netdev = dev_get_drvdata(dev_d); 4290 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 4291 4292 rtnl_lock(); 4293 netif_device_detach(netdev); 4294 4295 if (netif_running(netdev)) 4296 ixgbevf_close_suspend(adapter); 4297 4298 ixgbevf_clear_interrupt_scheme(adapter); 4299 rtnl_unlock(); 4300 4301 return 0; 4302 } 4303 4304 static int __maybe_unused ixgbevf_resume(struct device *dev_d) 4305 { 4306 struct pci_dev *pdev = to_pci_dev(dev_d); 4307 struct net_device *netdev = pci_get_drvdata(pdev); 4308 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 4309 u32 err; 4310 4311 adapter->hw.hw_addr = adapter->io_addr; 4312 smp_mb__before_atomic(); 4313 clear_bit(__IXGBEVF_DISABLED, &adapter->state); 4314 pci_set_master(pdev); 4315 4316 ixgbevf_reset(adapter); 4317 4318 rtnl_lock(); 4319 err = ixgbevf_init_interrupt_scheme(adapter); 4320 if (!err && netif_running(netdev)) 4321 err = ixgbevf_open(netdev); 4322 rtnl_unlock(); 4323 if (err) 4324 return err; 4325 4326 netif_device_attach(netdev); 4327 4328 return err; 4329 } 4330 4331 static void ixgbevf_shutdown(struct pci_dev *pdev) 4332 { 4333 ixgbevf_suspend(&pdev->dev); 4334 } 4335 4336 static void ixgbevf_get_tx_ring_stats(struct rtnl_link_stats64 *stats, 4337 const struct ixgbevf_ring *ring) 4338 { 4339 u64 bytes, packets; 4340 unsigned int start; 4341 4342 if (ring) { 4343 do { 4344 start = u64_stats_fetch_begin_irq(&ring->syncp); 4345 bytes = ring->stats.bytes; 4346 packets = ring->stats.packets; 4347 } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); 4348 stats->tx_bytes += bytes; 4349 stats->tx_packets += packets; 4350 } 4351 } 4352 4353 static void ixgbevf_get_stats(struct net_device *netdev, 4354 struct rtnl_link_stats64 *stats) 4355 { 4356 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 4357 unsigned int start; 4358 u64 bytes, packets; 4359 const struct ixgbevf_ring *ring; 4360 int i; 4361 4362 ixgbevf_update_stats(adapter); 4363 4364 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc; 4365 4366 rcu_read_lock(); 4367 for (i = 0; i < adapter->num_rx_queues; i++) { 4368 ring = adapter->rx_ring[i]; 4369 do { 4370 start = u64_stats_fetch_begin_irq(&ring->syncp); 4371 bytes = ring->stats.bytes; 4372 packets = ring->stats.packets; 4373 } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); 4374 stats->rx_bytes += bytes; 4375 stats->rx_packets += packets; 4376 } 4377 4378 for (i = 0; i < adapter->num_tx_queues; i++) { 4379 ring = adapter->tx_ring[i]; 4380 ixgbevf_get_tx_ring_stats(stats, ring); 4381 } 4382 4383 for (i = 0; i < adapter->num_xdp_queues; i++) { 4384 ring = adapter->xdp_ring[i]; 4385 ixgbevf_get_tx_ring_stats(stats, ring); 4386 } 4387 rcu_read_unlock(); 4388 } 4389 4390 #define IXGBEVF_MAX_MAC_HDR_LEN 127 4391 #define IXGBEVF_MAX_NETWORK_HDR_LEN 511 4392 4393 static netdev_features_t 4394 ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev, 4395 netdev_features_t features) 4396 { 4397 unsigned int network_hdr_len, mac_hdr_len; 4398 4399 /* Make certain the headers can be described by a context descriptor */ 4400 mac_hdr_len = skb_network_header(skb) - skb->data; 4401 if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN)) 4402 return features & ~(NETIF_F_HW_CSUM | 4403 NETIF_F_SCTP_CRC | 4404 NETIF_F_HW_VLAN_CTAG_TX | 4405 NETIF_F_TSO | 4406 NETIF_F_TSO6); 4407 4408 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb); 4409 if (unlikely(network_hdr_len > IXGBEVF_MAX_NETWORK_HDR_LEN)) 4410 return features & ~(NETIF_F_HW_CSUM | 4411 NETIF_F_SCTP_CRC | 4412 NETIF_F_TSO | 4413 NETIF_F_TSO6); 4414 4415 /* We can only support IPV4 TSO in tunnels if we can mangle the 4416 * inner IP ID field, so strip TSO if MANGLEID is not supported. 4417 */ 4418 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) 4419 features &= ~NETIF_F_TSO; 4420 4421 return features; 4422 } 4423 4424 static int ixgbevf_xdp_setup(struct net_device *dev, struct bpf_prog *prog) 4425 { 4426 int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 4427 struct ixgbevf_adapter *adapter = netdev_priv(dev); 4428 struct bpf_prog *old_prog; 4429 4430 /* verify ixgbevf ring attributes are sufficient for XDP */ 4431 for (i = 0; i < adapter->num_rx_queues; i++) { 4432 struct ixgbevf_ring *ring = adapter->rx_ring[i]; 4433 4434 if (frame_size > ixgbevf_rx_bufsz(ring)) 4435 return -EINVAL; 4436 } 4437 4438 old_prog = xchg(&adapter->xdp_prog, prog); 4439 4440 /* If transitioning XDP modes reconfigure rings */ 4441 if (!!prog != !!old_prog) { 4442 /* Hardware has to reinitialize queues and interrupts to 4443 * match packet buffer alignment. Unfortunately, the 4444 * hardware is not flexible enough to do this dynamically. 4445 */ 4446 if (netif_running(dev)) 4447 ixgbevf_close(dev); 4448 4449 ixgbevf_clear_interrupt_scheme(adapter); 4450 ixgbevf_init_interrupt_scheme(adapter); 4451 4452 if (netif_running(dev)) 4453 ixgbevf_open(dev); 4454 } else { 4455 for (i = 0; i < adapter->num_rx_queues; i++) 4456 xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog); 4457 } 4458 4459 if (old_prog) 4460 bpf_prog_put(old_prog); 4461 4462 return 0; 4463 } 4464 4465 static int ixgbevf_xdp(struct net_device *dev, struct netdev_bpf *xdp) 4466 { 4467 switch (xdp->command) { 4468 case XDP_SETUP_PROG: 4469 return ixgbevf_xdp_setup(dev, xdp->prog); 4470 default: 4471 return -EINVAL; 4472 } 4473 } 4474 4475 static const struct net_device_ops ixgbevf_netdev_ops = { 4476 .ndo_open = ixgbevf_open, 4477 .ndo_stop = ixgbevf_close, 4478 .ndo_start_xmit = ixgbevf_xmit_frame, 4479 .ndo_set_rx_mode = ixgbevf_set_rx_mode, 4480 .ndo_get_stats64 = ixgbevf_get_stats, 4481 .ndo_validate_addr = eth_validate_addr, 4482 .ndo_set_mac_address = ixgbevf_set_mac, 4483 .ndo_change_mtu = ixgbevf_change_mtu, 4484 .ndo_tx_timeout = ixgbevf_tx_timeout, 4485 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid, 4486 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid, 4487 .ndo_features_check = ixgbevf_features_check, 4488 .ndo_bpf = ixgbevf_xdp, 4489 }; 4490 4491 static void ixgbevf_assign_netdev_ops(struct net_device *dev) 4492 { 4493 dev->netdev_ops = &ixgbevf_netdev_ops; 4494 ixgbevf_set_ethtool_ops(dev); 4495 dev->watchdog_timeo = 5 * HZ; 4496 } 4497 4498 /** 4499 * ixgbevf_probe - Device Initialization Routine 4500 * @pdev: PCI device information struct 4501 * @ent: entry in ixgbevf_pci_tbl 4502 * 4503 * Returns 0 on success, negative on failure 4504 * 4505 * ixgbevf_probe initializes an adapter identified by a pci_dev structure. 4506 * The OS initialization, configuring of the adapter private structure, 4507 * and a hardware reset occur. 4508 **/ 4509 static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 4510 { 4511 struct net_device *netdev; 4512 struct ixgbevf_adapter *adapter = NULL; 4513 struct ixgbe_hw *hw = NULL; 4514 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data]; 4515 int err, pci_using_dac; 4516 bool disable_dev = false; 4517 4518 err = pci_enable_device(pdev); 4519 if (err) 4520 return err; 4521 4522 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) { 4523 pci_using_dac = 1; 4524 } else { 4525 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 4526 if (err) { 4527 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); 4528 goto err_dma; 4529 } 4530 pci_using_dac = 0; 4531 } 4532 4533 err = pci_request_regions(pdev, ixgbevf_driver_name); 4534 if (err) { 4535 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err); 4536 goto err_pci_reg; 4537 } 4538 4539 pci_set_master(pdev); 4540 4541 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter), 4542 MAX_TX_QUEUES); 4543 if (!netdev) { 4544 err = -ENOMEM; 4545 goto err_alloc_etherdev; 4546 } 4547 4548 SET_NETDEV_DEV(netdev, &pdev->dev); 4549 4550 adapter = netdev_priv(netdev); 4551 4552 adapter->netdev = netdev; 4553 adapter->pdev = pdev; 4554 hw = &adapter->hw; 4555 hw->back = adapter; 4556 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 4557 4558 /* call save state here in standalone driver because it relies on 4559 * adapter struct to exist, and needs to call netdev_priv 4560 */ 4561 pci_save_state(pdev); 4562 4563 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), 4564 pci_resource_len(pdev, 0)); 4565 adapter->io_addr = hw->hw_addr; 4566 if (!hw->hw_addr) { 4567 err = -EIO; 4568 goto err_ioremap; 4569 } 4570 4571 ixgbevf_assign_netdev_ops(netdev); 4572 4573 /* Setup HW API */ 4574 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops)); 4575 hw->mac.type = ii->mac; 4576 4577 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops_legacy, 4578 sizeof(struct ixgbe_mbx_operations)); 4579 4580 /* setup the private structure */ 4581 err = ixgbevf_sw_init(adapter); 4582 if (err) 4583 goto err_sw_init; 4584 4585 /* The HW MAC address was set and/or determined in sw_init */ 4586 if (!is_valid_ether_addr(netdev->dev_addr)) { 4587 pr_err("invalid MAC address\n"); 4588 err = -EIO; 4589 goto err_sw_init; 4590 } 4591 4592 netdev->hw_features = NETIF_F_SG | 4593 NETIF_F_TSO | 4594 NETIF_F_TSO6 | 4595 NETIF_F_RXCSUM | 4596 NETIF_F_HW_CSUM | 4597 NETIF_F_SCTP_CRC; 4598 4599 #define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \ 4600 NETIF_F_GSO_GRE_CSUM | \ 4601 NETIF_F_GSO_IPXIP4 | \ 4602 NETIF_F_GSO_IPXIP6 | \ 4603 NETIF_F_GSO_UDP_TUNNEL | \ 4604 NETIF_F_GSO_UDP_TUNNEL_CSUM) 4605 4606 netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES; 4607 netdev->hw_features |= NETIF_F_GSO_PARTIAL | 4608 IXGBEVF_GSO_PARTIAL_FEATURES; 4609 4610 netdev->features = netdev->hw_features; 4611 4612 if (pci_using_dac) 4613 netdev->features |= NETIF_F_HIGHDMA; 4614 4615 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID; 4616 netdev->mpls_features |= NETIF_F_SG | 4617 NETIF_F_TSO | 4618 NETIF_F_TSO6 | 4619 NETIF_F_HW_CSUM; 4620 netdev->mpls_features |= IXGBEVF_GSO_PARTIAL_FEATURES; 4621 netdev->hw_enc_features |= netdev->vlan_features; 4622 4623 /* set this bit last since it cannot be part of vlan_features */ 4624 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | 4625 NETIF_F_HW_VLAN_CTAG_RX | 4626 NETIF_F_HW_VLAN_CTAG_TX; 4627 4628 netdev->priv_flags |= IFF_UNICAST_FLT; 4629 4630 /* MTU range: 68 - 1504 or 9710 */ 4631 netdev->min_mtu = ETH_MIN_MTU; 4632 switch (adapter->hw.api_version) { 4633 case ixgbe_mbox_api_11: 4634 case ixgbe_mbox_api_12: 4635 case ixgbe_mbox_api_13: 4636 case ixgbe_mbox_api_14: 4637 case ixgbe_mbox_api_15: 4638 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - 4639 (ETH_HLEN + ETH_FCS_LEN); 4640 break; 4641 default: 4642 if (adapter->hw.mac.type != ixgbe_mac_82599_vf) 4643 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - 4644 (ETH_HLEN + ETH_FCS_LEN); 4645 else 4646 netdev->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN; 4647 break; 4648 } 4649 4650 if (IXGBE_REMOVED(hw->hw_addr)) { 4651 err = -EIO; 4652 goto err_sw_init; 4653 } 4654 4655 timer_setup(&adapter->service_timer, ixgbevf_service_timer, 0); 4656 4657 INIT_WORK(&adapter->service_task, ixgbevf_service_task); 4658 set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state); 4659 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state); 4660 4661 err = ixgbevf_init_interrupt_scheme(adapter); 4662 if (err) 4663 goto err_sw_init; 4664 4665 strcpy(netdev->name, "eth%d"); 4666 4667 err = register_netdev(netdev); 4668 if (err) 4669 goto err_register; 4670 4671 pci_set_drvdata(pdev, netdev); 4672 netif_carrier_off(netdev); 4673 ixgbevf_init_ipsec_offload(adapter); 4674 4675 ixgbevf_init_last_counter_stats(adapter); 4676 4677 /* print the VF info */ 4678 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr); 4679 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type); 4680 4681 switch (hw->mac.type) { 4682 case ixgbe_mac_X550_vf: 4683 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n"); 4684 break; 4685 case ixgbe_mac_X540_vf: 4686 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n"); 4687 break; 4688 case ixgbe_mac_82599_vf: 4689 default: 4690 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n"); 4691 break; 4692 } 4693 4694 return 0; 4695 4696 err_register: 4697 ixgbevf_clear_interrupt_scheme(adapter); 4698 err_sw_init: 4699 ixgbevf_reset_interrupt_capability(adapter); 4700 iounmap(adapter->io_addr); 4701 kfree(adapter->rss_key); 4702 err_ioremap: 4703 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state); 4704 free_netdev(netdev); 4705 err_alloc_etherdev: 4706 pci_release_regions(pdev); 4707 err_pci_reg: 4708 err_dma: 4709 if (!adapter || disable_dev) 4710 pci_disable_device(pdev); 4711 return err; 4712 } 4713 4714 /** 4715 * ixgbevf_remove - Device Removal Routine 4716 * @pdev: PCI device information struct 4717 * 4718 * ixgbevf_remove is called by the PCI subsystem to alert the driver 4719 * that it should release a PCI device. The could be caused by a 4720 * Hot-Plug event, or because the driver is going to be removed from 4721 * memory. 4722 **/ 4723 static void ixgbevf_remove(struct pci_dev *pdev) 4724 { 4725 struct net_device *netdev = pci_get_drvdata(pdev); 4726 struct ixgbevf_adapter *adapter; 4727 bool disable_dev; 4728 4729 if (!netdev) 4730 return; 4731 4732 adapter = netdev_priv(netdev); 4733 4734 set_bit(__IXGBEVF_REMOVING, &adapter->state); 4735 cancel_work_sync(&adapter->service_task); 4736 4737 if (netdev->reg_state == NETREG_REGISTERED) 4738 unregister_netdev(netdev); 4739 4740 ixgbevf_stop_ipsec_offload(adapter); 4741 ixgbevf_clear_interrupt_scheme(adapter); 4742 ixgbevf_reset_interrupt_capability(adapter); 4743 4744 iounmap(adapter->io_addr); 4745 pci_release_regions(pdev); 4746 4747 hw_dbg(&adapter->hw, "Remove complete\n"); 4748 4749 kfree(adapter->rss_key); 4750 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state); 4751 free_netdev(netdev); 4752 4753 if (disable_dev) 4754 pci_disable_device(pdev); 4755 } 4756 4757 /** 4758 * ixgbevf_io_error_detected - called when PCI error is detected 4759 * @pdev: Pointer to PCI device 4760 * @state: The current pci connection state 4761 * 4762 * This function is called after a PCI bus error affecting 4763 * this device has been detected. 4764 **/ 4765 static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev, 4766 pci_channel_state_t state) 4767 { 4768 struct net_device *netdev = pci_get_drvdata(pdev); 4769 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 4770 4771 if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state)) 4772 return PCI_ERS_RESULT_DISCONNECT; 4773 4774 rtnl_lock(); 4775 netif_device_detach(netdev); 4776 4777 if (netif_running(netdev)) 4778 ixgbevf_close_suspend(adapter); 4779 4780 if (state == pci_channel_io_perm_failure) { 4781 rtnl_unlock(); 4782 return PCI_ERS_RESULT_DISCONNECT; 4783 } 4784 4785 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state)) 4786 pci_disable_device(pdev); 4787 rtnl_unlock(); 4788 4789 /* Request a slot slot reset. */ 4790 return PCI_ERS_RESULT_NEED_RESET; 4791 } 4792 4793 /** 4794 * ixgbevf_io_slot_reset - called after the pci bus has been reset. 4795 * @pdev: Pointer to PCI device 4796 * 4797 * Restart the card from scratch, as if from a cold-boot. Implementation 4798 * resembles the first-half of the ixgbevf_resume routine. 4799 **/ 4800 static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev) 4801 { 4802 struct net_device *netdev = pci_get_drvdata(pdev); 4803 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 4804 4805 if (pci_enable_device_mem(pdev)) { 4806 dev_err(&pdev->dev, 4807 "Cannot re-enable PCI device after reset.\n"); 4808 return PCI_ERS_RESULT_DISCONNECT; 4809 } 4810 4811 adapter->hw.hw_addr = adapter->io_addr; 4812 smp_mb__before_atomic(); 4813 clear_bit(__IXGBEVF_DISABLED, &adapter->state); 4814 pci_set_master(pdev); 4815 4816 ixgbevf_reset(adapter); 4817 4818 return PCI_ERS_RESULT_RECOVERED; 4819 } 4820 4821 /** 4822 * ixgbevf_io_resume - called when traffic can start flowing again. 4823 * @pdev: Pointer to PCI device 4824 * 4825 * This callback is called when the error recovery driver tells us that 4826 * its OK to resume normal operation. Implementation resembles the 4827 * second-half of the ixgbevf_resume routine. 4828 **/ 4829 static void ixgbevf_io_resume(struct pci_dev *pdev) 4830 { 4831 struct net_device *netdev = pci_get_drvdata(pdev); 4832 4833 rtnl_lock(); 4834 if (netif_running(netdev)) 4835 ixgbevf_open(netdev); 4836 4837 netif_device_attach(netdev); 4838 rtnl_unlock(); 4839 } 4840 4841 /* PCI Error Recovery (ERS) */ 4842 static const struct pci_error_handlers ixgbevf_err_handler = { 4843 .error_detected = ixgbevf_io_error_detected, 4844 .slot_reset = ixgbevf_io_slot_reset, 4845 .resume = ixgbevf_io_resume, 4846 }; 4847 4848 static SIMPLE_DEV_PM_OPS(ixgbevf_pm_ops, ixgbevf_suspend, ixgbevf_resume); 4849 4850 static struct pci_driver ixgbevf_driver = { 4851 .name = ixgbevf_driver_name, 4852 .id_table = ixgbevf_pci_tbl, 4853 .probe = ixgbevf_probe, 4854 .remove = ixgbevf_remove, 4855 4856 /* Power Management Hooks */ 4857 .driver.pm = &ixgbevf_pm_ops, 4858 4859 .shutdown = ixgbevf_shutdown, 4860 .err_handler = &ixgbevf_err_handler 4861 }; 4862 4863 /** 4864 * ixgbevf_init_module - Driver Registration Routine 4865 * 4866 * ixgbevf_init_module is the first routine called when the driver is 4867 * loaded. All it does is register with the PCI subsystem. 4868 **/ 4869 static int __init ixgbevf_init_module(void) 4870 { 4871 pr_info("%s\n", ixgbevf_driver_string); 4872 pr_info("%s\n", ixgbevf_copyright); 4873 ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name); 4874 if (!ixgbevf_wq) { 4875 pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name); 4876 return -ENOMEM; 4877 } 4878 4879 return pci_register_driver(&ixgbevf_driver); 4880 } 4881 4882 module_init(ixgbevf_init_module); 4883 4884 /** 4885 * ixgbevf_exit_module - Driver Exit Cleanup Routine 4886 * 4887 * ixgbevf_exit_module is called just before the driver is removed 4888 * from memory. 4889 **/ 4890 static void __exit ixgbevf_exit_module(void) 4891 { 4892 pci_unregister_driver(&ixgbevf_driver); 4893 if (ixgbevf_wq) { 4894 destroy_workqueue(ixgbevf_wq); 4895 ixgbevf_wq = NULL; 4896 } 4897 } 4898 4899 #ifdef DEBUG 4900 /** 4901 * ixgbevf_get_hw_dev_name - return device name string 4902 * used by hardware layer to print debugging information 4903 * @hw: pointer to private hardware struct 4904 **/ 4905 char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw) 4906 { 4907 struct ixgbevf_adapter *adapter = hw->back; 4908 4909 return adapter->netdev->name; 4910 } 4911 4912 #endif 4913 module_exit(ixgbevf_exit_module); 4914 4915 /* ixgbevf_main.c */ 4916