1 /******************************************************************************* 2 3 Intel 82599 Virtual Function driver 4 Copyright(c) 1999 - 2015 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, see <http://www.gnu.org/licenses/>. 17 18 The full GNU General Public License is included in this distribution in 19 the file called "COPYING". 20 21 Contact Information: 22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 25 *******************************************************************************/ 26 27 #ifndef _IXGBEVF_H_ 28 #define _IXGBEVF_H_ 29 30 #include <linux/types.h> 31 #include <linux/bitops.h> 32 #include <linux/timer.h> 33 #include <linux/io.h> 34 #include <linux/netdevice.h> 35 #include <linux/if_vlan.h> 36 #include <linux/u64_stats_sync.h> 37 38 #include "vf.h" 39 40 #define IXGBE_MAX_TXD_PWR 14 41 #define IXGBE_MAX_DATA_PER_TXD BIT(IXGBE_MAX_TXD_PWR) 42 43 /* Tx Descriptors needed, worst case */ 44 #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD) 45 #define DESC_NEEDED (MAX_SKB_FRAGS + 4) 46 47 /* wrapper around a pointer to a socket buffer, 48 * so a DMA handle can be stored along with the buffer 49 */ 50 struct ixgbevf_tx_buffer { 51 union ixgbe_adv_tx_desc *next_to_watch; 52 unsigned long time_stamp; 53 struct sk_buff *skb; 54 unsigned int bytecount; 55 unsigned short gso_segs; 56 __be16 protocol; 57 DEFINE_DMA_UNMAP_ADDR(dma); 58 DEFINE_DMA_UNMAP_LEN(len); 59 u32 tx_flags; 60 }; 61 62 struct ixgbevf_rx_buffer { 63 dma_addr_t dma; 64 struct page *page; 65 #if (BITS_PER_LONG > 32) || (PAGE_SIZE >= 65536) 66 __u32 page_offset; 67 #else 68 __u16 page_offset; 69 #endif 70 __u16 pagecnt_bias; 71 }; 72 73 struct ixgbevf_stats { 74 u64 packets; 75 u64 bytes; 76 }; 77 78 struct ixgbevf_tx_queue_stats { 79 u64 restart_queue; 80 u64 tx_busy; 81 u64 tx_done_old; 82 }; 83 84 struct ixgbevf_rx_queue_stats { 85 u64 alloc_rx_page_failed; 86 u64 alloc_rx_buff_failed; 87 u64 alloc_rx_page; 88 u64 csum_err; 89 }; 90 91 enum ixgbevf_ring_state_t { 92 __IXGBEVF_TX_DETECT_HANG, 93 __IXGBEVF_HANG_CHECK_ARMED, 94 }; 95 96 #define check_for_tx_hang(ring) \ 97 test_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 98 #define set_check_for_tx_hang(ring) \ 99 set_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 100 #define clear_check_for_tx_hang(ring) \ 101 clear_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 102 103 struct ixgbevf_ring { 104 struct ixgbevf_ring *next; 105 struct net_device *netdev; 106 struct device *dev; 107 void *desc; /* descriptor ring memory */ 108 dma_addr_t dma; /* phys. address of descriptor ring */ 109 unsigned int size; /* length in bytes */ 110 u16 count; /* amount of descriptors */ 111 u16 next_to_use; 112 u16 next_to_clean; 113 u16 next_to_alloc; 114 115 union { 116 struct ixgbevf_tx_buffer *tx_buffer_info; 117 struct ixgbevf_rx_buffer *rx_buffer_info; 118 }; 119 unsigned long state; 120 struct ixgbevf_stats stats; 121 struct u64_stats_sync syncp; 122 union { 123 struct ixgbevf_tx_queue_stats tx_stats; 124 struct ixgbevf_rx_queue_stats rx_stats; 125 }; 126 127 u64 hw_csum_rx_error; 128 u8 __iomem *tail; 129 struct sk_buff *skb; 130 131 /* holds the special value that gets the hardware register offset 132 * associated with this ring, which is different for DCB and RSS modes 133 */ 134 u16 reg_idx; 135 int queue_index; /* needed for multiqueue queue management */ 136 }; 137 138 /* How many Rx Buffers do we bundle into one write to the hardware ? */ 139 #define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 140 141 #define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES 142 #define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES 143 #define IXGBEVF_MAX_RSS_QUEUES 2 144 #define IXGBEVF_82599_RETA_SIZE 128 /* 128 entries */ 145 #define IXGBEVF_X550_VFRETA_SIZE 64 /* 64 entries */ 146 #define IXGBEVF_RSS_HASH_KEY_SIZE 40 147 #define IXGBEVF_VFRSSRK_REGS 10 /* 10 registers for RSS key */ 148 149 #define IXGBEVF_DEFAULT_TXD 1024 150 #define IXGBEVF_DEFAULT_RXD 512 151 #define IXGBEVF_MAX_TXD 4096 152 #define IXGBEVF_MIN_TXD 64 153 #define IXGBEVF_MAX_RXD 4096 154 #define IXGBEVF_MIN_RXD 64 155 156 /* Supported Rx Buffer Sizes */ 157 #define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */ 158 #define IXGBEVF_RXBUFFER_2048 2048 159 160 #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256 161 #define IXGBEVF_RX_BUFSZ IXGBEVF_RXBUFFER_2048 162 163 #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) 164 165 #define IXGBE_TX_FLAGS_CSUM BIT(0) 166 #define IXGBE_TX_FLAGS_VLAN BIT(1) 167 #define IXGBE_TX_FLAGS_TSO BIT(2) 168 #define IXGBE_TX_FLAGS_IPV4 BIT(3) 169 #define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000 170 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000 171 #define IXGBE_TX_FLAGS_VLAN_SHIFT 16 172 173 struct ixgbevf_ring_container { 174 struct ixgbevf_ring *ring; /* pointer to linked list of rings */ 175 unsigned int total_bytes; /* total bytes processed this int */ 176 unsigned int total_packets; /* total packets processed this int */ 177 u8 count; /* total number of rings in vector */ 178 u8 itr; /* current ITR setting for ring */ 179 }; 180 181 /* iterator for handling rings in ring container */ 182 #define ixgbevf_for_each_ring(pos, head) \ 183 for (pos = (head).ring; pos != NULL; pos = pos->next) 184 185 /* MAX_MSIX_Q_VECTORS of these are allocated, 186 * but we only use one per queue-specific vector. 187 */ 188 struct ixgbevf_q_vector { 189 struct ixgbevf_adapter *adapter; 190 /* index of q_vector within array, also used for finding the bit in 191 * EICR and friends that represents the vector for this ring 192 */ 193 u16 v_idx; 194 u16 itr; /* Interrupt throttle rate written to EITR */ 195 struct napi_struct napi; 196 struct ixgbevf_ring_container rx, tx; 197 char name[IFNAMSIZ + 9]; 198 #ifdef CONFIG_NET_RX_BUSY_POLL 199 unsigned int state; 200 #define IXGBEVF_QV_STATE_IDLE 0 201 #define IXGBEVF_QV_STATE_NAPI 1 /* NAPI owns this QV */ 202 #define IXGBEVF_QV_STATE_POLL 2 /* poll owns this QV */ 203 #define IXGBEVF_QV_STATE_DISABLED 4 /* QV is disabled */ 204 #define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL) 205 #define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED) 206 #define IXGBEVF_QV_STATE_NAPI_YIELD 8 /* NAPI yielded this QV */ 207 #define IXGBEVF_QV_STATE_POLL_YIELD 16 /* poll yielded this QV */ 208 #define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | \ 209 IXGBEVF_QV_STATE_POLL_YIELD) 210 #define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | \ 211 IXGBEVF_QV_STATE_POLL_YIELD) 212 spinlock_t lock; 213 #endif /* CONFIG_NET_RX_BUSY_POLL */ 214 }; 215 216 /* microsecond values for various ITR rates shifted by 2 to fit itr register 217 * with the first 3 bits reserved 0 218 */ 219 #define IXGBE_MIN_RSC_ITR 24 220 #define IXGBE_100K_ITR 40 221 #define IXGBE_20K_ITR 200 222 #define IXGBE_12K_ITR 336 223 224 /* Helper macros to switch between ints/sec and what the register uses. 225 * And yes, it's the same math going both ways. The lowest value 226 * supported by all of the ixgbe hardware is 8. 227 */ 228 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \ 229 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8) 230 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG 231 232 /* ixgbevf_test_staterr - tests bits in Rx descriptor status and error fields */ 233 static inline __le32 ixgbevf_test_staterr(union ixgbe_adv_rx_desc *rx_desc, 234 const u32 stat_err_bits) 235 { 236 return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits); 237 } 238 239 static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring) 240 { 241 u16 ntc = ring->next_to_clean; 242 u16 ntu = ring->next_to_use; 243 244 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1; 245 } 246 247 static inline void ixgbevf_write_tail(struct ixgbevf_ring *ring, u32 value) 248 { 249 writel(value, ring->tail); 250 } 251 252 #define IXGBEVF_RX_DESC(R, i) \ 253 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i])) 254 #define IXGBEVF_TX_DESC(R, i) \ 255 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i])) 256 #define IXGBEVF_TX_CTXTDESC(R, i) \ 257 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i])) 258 259 #define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */ 260 261 #define OTHER_VECTOR 1 262 #define NON_Q_VECTORS (OTHER_VECTOR) 263 264 #define MAX_MSIX_Q_VECTORS 2 265 266 #define MIN_MSIX_Q_VECTORS 1 267 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS) 268 269 #define IXGBEVF_RX_DMA_ATTR \ 270 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING) 271 272 /* board specific private data structure */ 273 struct ixgbevf_adapter { 274 /* this field must be first, see ixgbevf_process_skb_fields */ 275 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 276 277 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS]; 278 279 /* Interrupt Throttle Rate */ 280 u16 rx_itr_setting; 281 u16 tx_itr_setting; 282 283 /* interrupt masks */ 284 u32 eims_enable_mask; 285 u32 eims_other; 286 287 /* TX */ 288 int num_tx_queues; 289 struct ixgbevf_ring *tx_ring[MAX_TX_QUEUES]; /* One per active queue */ 290 u64 restart_queue; 291 u32 tx_timeout_count; 292 293 /* RX */ 294 int num_rx_queues; 295 struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */ 296 u64 hw_csum_rx_error; 297 u64 hw_rx_no_dma_resources; 298 int num_msix_vectors; 299 u64 alloc_rx_page_failed; 300 u64 alloc_rx_buff_failed; 301 u64 alloc_rx_page; 302 303 struct msix_entry *msix_entries; 304 305 /* OS defined structs */ 306 struct net_device *netdev; 307 struct pci_dev *pdev; 308 309 /* structs defined in ixgbe_vf.h */ 310 struct ixgbe_hw hw; 311 u16 msg_enable; 312 /* Interrupt Throttle Rate */ 313 u32 eitr_param; 314 315 struct ixgbevf_hw_stats stats; 316 317 unsigned long state; 318 u64 tx_busy; 319 unsigned int tx_ring_count; 320 unsigned int rx_ring_count; 321 322 u8 __iomem *io_addr; /* Mainly for iounmap use */ 323 u32 link_speed; 324 bool link_up; 325 326 struct timer_list service_timer; 327 struct work_struct service_task; 328 329 spinlock_t mbx_lock; 330 unsigned long last_reset; 331 332 u32 *rss_key; 333 u8 rss_indir_tbl[IXGBEVF_X550_VFRETA_SIZE]; 334 }; 335 336 enum ixbgevf_state_t { 337 __IXGBEVF_TESTING, 338 __IXGBEVF_RESETTING, 339 __IXGBEVF_DOWN, 340 __IXGBEVF_DISABLED, 341 __IXGBEVF_REMOVING, 342 __IXGBEVF_SERVICE_SCHED, 343 __IXGBEVF_SERVICE_INITED, 344 __IXGBEVF_RESET_REQUESTED, 345 __IXGBEVF_QUEUE_RESET_REQUESTED, 346 }; 347 348 enum ixgbevf_boards { 349 board_82599_vf, 350 board_82599_vf_hv, 351 board_X540_vf, 352 board_X540_vf_hv, 353 board_X550_vf, 354 board_X550_vf_hv, 355 board_X550EM_x_vf, 356 board_X550EM_x_vf_hv, 357 board_x550em_a_vf, 358 }; 359 360 enum ixgbevf_xcast_modes { 361 IXGBEVF_XCAST_MODE_NONE = 0, 362 IXGBEVF_XCAST_MODE_MULTI, 363 IXGBEVF_XCAST_MODE_ALLMULTI, 364 IXGBEVF_XCAST_MODE_PROMISC, 365 }; 366 367 extern const struct ixgbevf_info ixgbevf_82599_vf_info; 368 extern const struct ixgbevf_info ixgbevf_X540_vf_info; 369 extern const struct ixgbevf_info ixgbevf_X550_vf_info; 370 extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_info; 371 extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops; 372 extern const struct ixgbevf_info ixgbevf_x550em_a_vf_info; 373 374 extern const struct ixgbevf_info ixgbevf_82599_vf_hv_info; 375 extern const struct ixgbevf_info ixgbevf_X540_vf_hv_info; 376 extern const struct ixgbevf_info ixgbevf_X550_vf_hv_info; 377 extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_hv_info; 378 extern const struct ixgbe_mbx_operations ixgbevf_hv_mbx_ops; 379 380 /* needed by ethtool.c */ 381 extern const char ixgbevf_driver_name[]; 382 extern const char ixgbevf_driver_version[]; 383 384 int ixgbevf_open(struct net_device *netdev); 385 int ixgbevf_close(struct net_device *netdev); 386 void ixgbevf_up(struct ixgbevf_adapter *adapter); 387 void ixgbevf_down(struct ixgbevf_adapter *adapter); 388 void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter); 389 void ixgbevf_reset(struct ixgbevf_adapter *adapter); 390 void ixgbevf_set_ethtool_ops(struct net_device *netdev); 391 int ixgbevf_setup_rx_resources(struct ixgbevf_ring *); 392 int ixgbevf_setup_tx_resources(struct ixgbevf_ring *); 393 void ixgbevf_free_rx_resources(struct ixgbevf_ring *); 394 void ixgbevf_free_tx_resources(struct ixgbevf_ring *); 395 void ixgbevf_update_stats(struct ixgbevf_adapter *adapter); 396 int ethtool_ioctl(struct ifreq *ifr); 397 398 extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector); 399 400 void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter); 401 void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter); 402 403 #define ixgbevf_hw_to_netdev(hw) \ 404 (((struct ixgbevf_adapter *)(hw)->back)->netdev) 405 406 #define hw_dbg(hw, format, arg...) \ 407 netdev_dbg(ixgbevf_hw_to_netdev(hw), format, ## arg) 408 #endif /* _IXGBEVF_H_ */ 409