1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /******************************************************************************* 3 4 Intel 82599 Virtual Function driver 5 Copyright(c) 1999 - 2018 Intel Corporation. 6 7 This program is free software; you can redistribute it and/or modify it 8 under the terms and conditions of the GNU General Public License, 9 version 2, as published by the Free Software Foundation. 10 11 This program is distributed in the hope it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 more details. 15 16 You should have received a copy of the GNU General Public License along with 17 this program; if not, see <http://www.gnu.org/licenses/>. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 26 *******************************************************************************/ 27 28 #ifndef _IXGBEVF_H_ 29 #define _IXGBEVF_H_ 30 31 #include <linux/types.h> 32 #include <linux/bitops.h> 33 #include <linux/timer.h> 34 #include <linux/io.h> 35 #include <linux/netdevice.h> 36 #include <linux/if_vlan.h> 37 #include <linux/u64_stats_sync.h> 38 #include <net/xdp.h> 39 40 #include "vf.h" 41 42 #define IXGBE_MAX_TXD_PWR 14 43 #define IXGBE_MAX_DATA_PER_TXD BIT(IXGBE_MAX_TXD_PWR) 44 45 /* Tx Descriptors needed, worst case */ 46 #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD) 47 #define DESC_NEEDED (MAX_SKB_FRAGS + 4) 48 49 /* wrapper around a pointer to a socket buffer, 50 * so a DMA handle can be stored along with the buffer 51 */ 52 struct ixgbevf_tx_buffer { 53 union ixgbe_adv_tx_desc *next_to_watch; 54 unsigned long time_stamp; 55 union { 56 struct sk_buff *skb; 57 /* XDP uses address ptr on irq_clean */ 58 void *data; 59 }; 60 unsigned int bytecount; 61 unsigned short gso_segs; 62 __be16 protocol; 63 DEFINE_DMA_UNMAP_ADDR(dma); 64 DEFINE_DMA_UNMAP_LEN(len); 65 u32 tx_flags; 66 }; 67 68 struct ixgbevf_rx_buffer { 69 dma_addr_t dma; 70 struct page *page; 71 #if (BITS_PER_LONG > 32) || (PAGE_SIZE >= 65536) 72 __u32 page_offset; 73 #else 74 __u16 page_offset; 75 #endif 76 __u16 pagecnt_bias; 77 }; 78 79 struct ixgbevf_stats { 80 u64 packets; 81 u64 bytes; 82 }; 83 84 struct ixgbevf_tx_queue_stats { 85 u64 restart_queue; 86 u64 tx_busy; 87 u64 tx_done_old; 88 }; 89 90 struct ixgbevf_rx_queue_stats { 91 u64 alloc_rx_page_failed; 92 u64 alloc_rx_buff_failed; 93 u64 alloc_rx_page; 94 u64 csum_err; 95 }; 96 97 enum ixgbevf_ring_state_t { 98 __IXGBEVF_RX_3K_BUFFER, 99 __IXGBEVF_RX_BUILD_SKB_ENABLED, 100 __IXGBEVF_TX_DETECT_HANG, 101 __IXGBEVF_HANG_CHECK_ARMED, 102 __IXGBEVF_TX_XDP_RING, 103 }; 104 105 #define ring_is_xdp(ring) \ 106 test_bit(__IXGBEVF_TX_XDP_RING, &(ring)->state) 107 #define set_ring_xdp(ring) \ 108 set_bit(__IXGBEVF_TX_XDP_RING, &(ring)->state) 109 #define clear_ring_xdp(ring) \ 110 clear_bit(__IXGBEVF_TX_XDP_RING, &(ring)->state) 111 112 struct ixgbevf_ring { 113 struct ixgbevf_ring *next; 114 struct ixgbevf_q_vector *q_vector; /* backpointer to q_vector */ 115 struct net_device *netdev; 116 struct bpf_prog *xdp_prog; 117 struct device *dev; 118 void *desc; /* descriptor ring memory */ 119 dma_addr_t dma; /* phys. address of descriptor ring */ 120 unsigned int size; /* length in bytes */ 121 u16 count; /* amount of descriptors */ 122 u16 next_to_use; 123 u16 next_to_clean; 124 u16 next_to_alloc; 125 126 union { 127 struct ixgbevf_tx_buffer *tx_buffer_info; 128 struct ixgbevf_rx_buffer *rx_buffer_info; 129 }; 130 unsigned long state; 131 struct ixgbevf_stats stats; 132 struct u64_stats_sync syncp; 133 union { 134 struct ixgbevf_tx_queue_stats tx_stats; 135 struct ixgbevf_rx_queue_stats rx_stats; 136 }; 137 struct xdp_rxq_info xdp_rxq; 138 u64 hw_csum_rx_error; 139 u8 __iomem *tail; 140 struct sk_buff *skb; 141 142 /* holds the special value that gets the hardware register offset 143 * associated with this ring, which is different for DCB and RSS modes 144 */ 145 u16 reg_idx; 146 int queue_index; /* needed for multiqueue queue management */ 147 } ____cacheline_internodealigned_in_smp; 148 149 /* How many Rx Buffers do we bundle into one write to the hardware ? */ 150 #define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 151 152 #define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES 153 #define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES 154 #define MAX_XDP_QUEUES IXGBE_VF_MAX_TX_QUEUES 155 #define IXGBEVF_MAX_RSS_QUEUES 2 156 #define IXGBEVF_82599_RETA_SIZE 128 /* 128 entries */ 157 #define IXGBEVF_X550_VFRETA_SIZE 64 /* 64 entries */ 158 #define IXGBEVF_RSS_HASH_KEY_SIZE 40 159 #define IXGBEVF_VFRSSRK_REGS 10 /* 10 registers for RSS key */ 160 161 #define IXGBEVF_DEFAULT_TXD 1024 162 #define IXGBEVF_DEFAULT_RXD 512 163 #define IXGBEVF_MAX_TXD 4096 164 #define IXGBEVF_MIN_TXD 64 165 #define IXGBEVF_MAX_RXD 4096 166 #define IXGBEVF_MIN_RXD 64 167 168 /* Supported Rx Buffer Sizes */ 169 #define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */ 170 #define IXGBEVF_RXBUFFER_2048 2048 171 #define IXGBEVF_RXBUFFER_3072 3072 172 173 #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256 174 175 #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) 176 177 #define IXGBEVF_SKB_PAD (NET_SKB_PAD + NET_IP_ALIGN) 178 #if (PAGE_SIZE < 8192) 179 #define IXGBEVF_MAX_FRAME_BUILD_SKB \ 180 (SKB_WITH_OVERHEAD(IXGBEVF_RXBUFFER_2048) - IXGBEVF_SKB_PAD) 181 #else 182 #define IXGBEVF_MAX_FRAME_BUILD_SKB IXGBEVF_RXBUFFER_2048 183 #endif 184 185 #define IXGBE_TX_FLAGS_CSUM BIT(0) 186 #define IXGBE_TX_FLAGS_VLAN BIT(1) 187 #define IXGBE_TX_FLAGS_TSO BIT(2) 188 #define IXGBE_TX_FLAGS_IPV4 BIT(3) 189 #define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000 190 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000 191 #define IXGBE_TX_FLAGS_VLAN_SHIFT 16 192 193 #define ring_uses_large_buffer(ring) \ 194 test_bit(__IXGBEVF_RX_3K_BUFFER, &(ring)->state) 195 #define set_ring_uses_large_buffer(ring) \ 196 set_bit(__IXGBEVF_RX_3K_BUFFER, &(ring)->state) 197 #define clear_ring_uses_large_buffer(ring) \ 198 clear_bit(__IXGBEVF_RX_3K_BUFFER, &(ring)->state) 199 200 #define ring_uses_build_skb(ring) \ 201 test_bit(__IXGBEVF_RX_BUILD_SKB_ENABLED, &(ring)->state) 202 #define set_ring_build_skb_enabled(ring) \ 203 set_bit(__IXGBEVF_RX_BUILD_SKB_ENABLED, &(ring)->state) 204 #define clear_ring_build_skb_enabled(ring) \ 205 clear_bit(__IXGBEVF_RX_BUILD_SKB_ENABLED, &(ring)->state) 206 207 static inline unsigned int ixgbevf_rx_bufsz(struct ixgbevf_ring *ring) 208 { 209 #if (PAGE_SIZE < 8192) 210 if (ring_uses_large_buffer(ring)) 211 return IXGBEVF_RXBUFFER_3072; 212 213 if (ring_uses_build_skb(ring)) 214 return IXGBEVF_MAX_FRAME_BUILD_SKB; 215 #endif 216 return IXGBEVF_RXBUFFER_2048; 217 } 218 219 static inline unsigned int ixgbevf_rx_pg_order(struct ixgbevf_ring *ring) 220 { 221 #if (PAGE_SIZE < 8192) 222 if (ring_uses_large_buffer(ring)) 223 return 1; 224 #endif 225 return 0; 226 } 227 228 #define ixgbevf_rx_pg_size(_ring) (PAGE_SIZE << ixgbevf_rx_pg_order(_ring)) 229 230 #define check_for_tx_hang(ring) \ 231 test_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 232 #define set_check_for_tx_hang(ring) \ 233 set_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 234 #define clear_check_for_tx_hang(ring) \ 235 clear_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state) 236 237 struct ixgbevf_ring_container { 238 struct ixgbevf_ring *ring; /* pointer to linked list of rings */ 239 unsigned int total_bytes; /* total bytes processed this int */ 240 unsigned int total_packets; /* total packets processed this int */ 241 u8 count; /* total number of rings in vector */ 242 u8 itr; /* current ITR setting for ring */ 243 }; 244 245 /* iterator for handling rings in ring container */ 246 #define ixgbevf_for_each_ring(pos, head) \ 247 for (pos = (head).ring; pos != NULL; pos = pos->next) 248 249 /* MAX_MSIX_Q_VECTORS of these are allocated, 250 * but we only use one per queue-specific vector. 251 */ 252 struct ixgbevf_q_vector { 253 struct ixgbevf_adapter *adapter; 254 /* index of q_vector within array, also used for finding the bit in 255 * EICR and friends that represents the vector for this ring 256 */ 257 u16 v_idx; 258 u16 itr; /* Interrupt throttle rate written to EITR */ 259 struct napi_struct napi; 260 struct ixgbevf_ring_container rx, tx; 261 struct rcu_head rcu; /* to avoid race with update stats on free */ 262 char name[IFNAMSIZ + 9]; 263 264 /* for dynamic allocation of rings associated with this q_vector */ 265 struct ixgbevf_ring ring[0] ____cacheline_internodealigned_in_smp; 266 #ifdef CONFIG_NET_RX_BUSY_POLL 267 unsigned int state; 268 #define IXGBEVF_QV_STATE_IDLE 0 269 #define IXGBEVF_QV_STATE_NAPI 1 /* NAPI owns this QV */ 270 #define IXGBEVF_QV_STATE_POLL 2 /* poll owns this QV */ 271 #define IXGBEVF_QV_STATE_DISABLED 4 /* QV is disabled */ 272 #define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL) 273 #define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED) 274 #define IXGBEVF_QV_STATE_NAPI_YIELD 8 /* NAPI yielded this QV */ 275 #define IXGBEVF_QV_STATE_POLL_YIELD 16 /* poll yielded this QV */ 276 #define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | \ 277 IXGBEVF_QV_STATE_POLL_YIELD) 278 #define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | \ 279 IXGBEVF_QV_STATE_POLL_YIELD) 280 spinlock_t lock; 281 #endif /* CONFIG_NET_RX_BUSY_POLL */ 282 }; 283 284 /* microsecond values for various ITR rates shifted by 2 to fit itr register 285 * with the first 3 bits reserved 0 286 */ 287 #define IXGBE_MIN_RSC_ITR 24 288 #define IXGBE_100K_ITR 40 289 #define IXGBE_20K_ITR 200 290 #define IXGBE_12K_ITR 336 291 292 /* Helper macros to switch between ints/sec and what the register uses. 293 * And yes, it's the same math going both ways. The lowest value 294 * supported by all of the ixgbe hardware is 8. 295 */ 296 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \ 297 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8) 298 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG 299 300 /* ixgbevf_test_staterr - tests bits in Rx descriptor status and error fields */ 301 static inline __le32 ixgbevf_test_staterr(union ixgbe_adv_rx_desc *rx_desc, 302 const u32 stat_err_bits) 303 { 304 return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits); 305 } 306 307 static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring) 308 { 309 u16 ntc = ring->next_to_clean; 310 u16 ntu = ring->next_to_use; 311 312 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1; 313 } 314 315 static inline void ixgbevf_write_tail(struct ixgbevf_ring *ring, u32 value) 316 { 317 writel(value, ring->tail); 318 } 319 320 #define IXGBEVF_RX_DESC(R, i) \ 321 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i])) 322 #define IXGBEVF_TX_DESC(R, i) \ 323 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i])) 324 #define IXGBEVF_TX_CTXTDESC(R, i) \ 325 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i])) 326 327 #define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */ 328 329 #define OTHER_VECTOR 1 330 #define NON_Q_VECTORS (OTHER_VECTOR) 331 332 #define MAX_MSIX_Q_VECTORS 2 333 334 #define MIN_MSIX_Q_VECTORS 1 335 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS) 336 337 #define IXGBEVF_RX_DMA_ATTR \ 338 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING) 339 340 /* board specific private data structure */ 341 struct ixgbevf_adapter { 342 /* this field must be first, see ixgbevf_process_skb_fields */ 343 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 344 345 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS]; 346 347 /* Interrupt Throttle Rate */ 348 u16 rx_itr_setting; 349 u16 tx_itr_setting; 350 351 /* interrupt masks */ 352 u32 eims_enable_mask; 353 u32 eims_other; 354 355 /* XDP */ 356 int num_xdp_queues; 357 struct ixgbevf_ring *xdp_ring[MAX_XDP_QUEUES]; 358 359 /* TX */ 360 int num_tx_queues; 361 struct ixgbevf_ring *tx_ring[MAX_TX_QUEUES]; /* One per active queue */ 362 u64 restart_queue; 363 u32 tx_timeout_count; 364 365 /* RX */ 366 int num_rx_queues; 367 struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */ 368 u64 hw_csum_rx_error; 369 u64 hw_rx_no_dma_resources; 370 int num_msix_vectors; 371 u64 alloc_rx_page_failed; 372 u64 alloc_rx_buff_failed; 373 u64 alloc_rx_page; 374 375 struct msix_entry *msix_entries; 376 377 /* OS defined structs */ 378 struct net_device *netdev; 379 struct bpf_prog *xdp_prog; 380 struct pci_dev *pdev; 381 382 /* structs defined in ixgbe_vf.h */ 383 struct ixgbe_hw hw; 384 u16 msg_enable; 385 /* Interrupt Throttle Rate */ 386 u32 eitr_param; 387 388 struct ixgbevf_hw_stats stats; 389 390 unsigned long state; 391 u64 tx_busy; 392 unsigned int tx_ring_count; 393 unsigned int xdp_ring_count; 394 unsigned int rx_ring_count; 395 396 u8 __iomem *io_addr; /* Mainly for iounmap use */ 397 u32 link_speed; 398 bool link_up; 399 400 struct timer_list service_timer; 401 struct work_struct service_task; 402 403 spinlock_t mbx_lock; 404 unsigned long last_reset; 405 406 u32 *rss_key; 407 u8 rss_indir_tbl[IXGBEVF_X550_VFRETA_SIZE]; 408 u32 flags; 409 #define IXGBEVF_FLAGS_LEGACY_RX BIT(1) 410 }; 411 412 enum ixbgevf_state_t { 413 __IXGBEVF_TESTING, 414 __IXGBEVF_RESETTING, 415 __IXGBEVF_DOWN, 416 __IXGBEVF_DISABLED, 417 __IXGBEVF_REMOVING, 418 __IXGBEVF_SERVICE_SCHED, 419 __IXGBEVF_SERVICE_INITED, 420 __IXGBEVF_RESET_REQUESTED, 421 __IXGBEVF_QUEUE_RESET_REQUESTED, 422 }; 423 424 enum ixgbevf_boards { 425 board_82599_vf, 426 board_82599_vf_hv, 427 board_X540_vf, 428 board_X540_vf_hv, 429 board_X550_vf, 430 board_X550_vf_hv, 431 board_X550EM_x_vf, 432 board_X550EM_x_vf_hv, 433 board_x550em_a_vf, 434 }; 435 436 enum ixgbevf_xcast_modes { 437 IXGBEVF_XCAST_MODE_NONE = 0, 438 IXGBEVF_XCAST_MODE_MULTI, 439 IXGBEVF_XCAST_MODE_ALLMULTI, 440 IXGBEVF_XCAST_MODE_PROMISC, 441 }; 442 443 extern const struct ixgbevf_info ixgbevf_82599_vf_info; 444 extern const struct ixgbevf_info ixgbevf_X540_vf_info; 445 extern const struct ixgbevf_info ixgbevf_X550_vf_info; 446 extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_info; 447 extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops; 448 extern const struct ixgbevf_info ixgbevf_x550em_a_vf_info; 449 450 extern const struct ixgbevf_info ixgbevf_82599_vf_hv_info; 451 extern const struct ixgbevf_info ixgbevf_X540_vf_hv_info; 452 extern const struct ixgbevf_info ixgbevf_X550_vf_hv_info; 453 extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_hv_info; 454 extern const struct ixgbe_mbx_operations ixgbevf_hv_mbx_ops; 455 456 /* needed by ethtool.c */ 457 extern const char ixgbevf_driver_name[]; 458 extern const char ixgbevf_driver_version[]; 459 460 int ixgbevf_open(struct net_device *netdev); 461 int ixgbevf_close(struct net_device *netdev); 462 void ixgbevf_up(struct ixgbevf_adapter *adapter); 463 void ixgbevf_down(struct ixgbevf_adapter *adapter); 464 void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter); 465 void ixgbevf_reset(struct ixgbevf_adapter *adapter); 466 void ixgbevf_set_ethtool_ops(struct net_device *netdev); 467 int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter, 468 struct ixgbevf_ring *rx_ring); 469 int ixgbevf_setup_tx_resources(struct ixgbevf_ring *); 470 void ixgbevf_free_rx_resources(struct ixgbevf_ring *); 471 void ixgbevf_free_tx_resources(struct ixgbevf_ring *); 472 void ixgbevf_update_stats(struct ixgbevf_adapter *adapter); 473 int ethtool_ioctl(struct ifreq *ifr); 474 475 extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector); 476 477 void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter); 478 void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter); 479 480 #define ixgbevf_hw_to_netdev(hw) \ 481 (((struct ixgbevf_adapter *)(hw)->back)->netdev) 482 483 #define hw_dbg(hw, format, arg...) \ 484 netdev_dbg(ixgbevf_hw_to_netdev(hw), format, ## arg) 485 #endif /* _IXGBEVF_H_ */ 486