1 /******************************************************************************* 2 3 Intel 82599 Virtual Function driver 4 Copyright(c) 1999 - 2014 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 26 *******************************************************************************/ 27 28 #ifndef _IXGBEVF_H_ 29 #define _IXGBEVF_H_ 30 31 #include <linux/types.h> 32 #include <linux/bitops.h> 33 #include <linux/timer.h> 34 #include <linux/io.h> 35 #include <linux/netdevice.h> 36 #include <linux/if_vlan.h> 37 #include <linux/u64_stats_sync.h> 38 39 #include "vf.h" 40 41 #ifdef CONFIG_NET_RX_BUSY_POLL 42 #include <net/busy_poll.h> 43 #define BP_EXTENDED_STATS 44 #endif 45 46 /* wrapper around a pointer to a socket buffer, 47 * so a DMA handle can be stored along with the buffer */ 48 struct ixgbevf_tx_buffer { 49 union ixgbe_adv_tx_desc *next_to_watch; 50 unsigned long time_stamp; 51 struct sk_buff *skb; 52 unsigned int bytecount; 53 unsigned short gso_segs; 54 __be16 protocol; 55 DEFINE_DMA_UNMAP_ADDR(dma); 56 DEFINE_DMA_UNMAP_LEN(len); 57 u32 tx_flags; 58 }; 59 60 struct ixgbevf_rx_buffer { 61 struct sk_buff *skb; 62 dma_addr_t dma; 63 }; 64 65 struct ixgbevf_stats { 66 u64 packets; 67 u64 bytes; 68 #ifdef BP_EXTENDED_STATS 69 u64 yields; 70 u64 misses; 71 u64 cleaned; 72 #endif 73 }; 74 75 struct ixgbevf_tx_queue_stats { 76 u64 restart_queue; 77 u64 tx_busy; 78 u64 tx_done_old; 79 }; 80 81 struct ixgbevf_rx_queue_stats { 82 u64 non_eop_descs; 83 u64 alloc_rx_page_failed; 84 u64 alloc_rx_buff_failed; 85 u64 csum_err; 86 }; 87 88 struct ixgbevf_ring { 89 struct ixgbevf_ring *next; 90 struct net_device *netdev; 91 struct device *dev; 92 void *desc; /* descriptor ring memory */ 93 dma_addr_t dma; /* phys. address of descriptor ring */ 94 unsigned int size; /* length in bytes */ 95 unsigned int count; /* amount of descriptors */ 96 unsigned int next_to_use; 97 unsigned int next_to_clean; 98 99 union { 100 struct ixgbevf_tx_buffer *tx_buffer_info; 101 struct ixgbevf_rx_buffer *rx_buffer_info; 102 }; 103 104 struct ixgbevf_stats stats; 105 struct u64_stats_sync syncp; 106 union { 107 struct ixgbevf_tx_queue_stats tx_stats; 108 struct ixgbevf_rx_queue_stats rx_stats; 109 }; 110 111 u64 hw_csum_rx_error; 112 u8 __iomem *tail; 113 114 u16 reg_idx; /* holds the special value that gets the hardware register 115 * offset associated with this ring, which is different 116 * for DCB and RSS modes */ 117 118 u16 rx_buf_len; 119 int queue_index; /* needed for multiqueue queue management */ 120 }; 121 122 /* How many Rx Buffers do we bundle into one write to the hardware ? */ 123 #define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 124 125 #define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES 126 #define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES 127 128 #define IXGBEVF_DEFAULT_TXD 1024 129 #define IXGBEVF_DEFAULT_RXD 512 130 #define IXGBEVF_MAX_TXD 4096 131 #define IXGBEVF_MIN_TXD 64 132 #define IXGBEVF_MAX_RXD 4096 133 #define IXGBEVF_MIN_RXD 64 134 135 /* Supported Rx Buffer Sizes */ 136 #define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */ 137 #define IXGBEVF_RXBUFFER_2K 2048 138 #define IXGBEVF_RXBUFFER_4K 4096 139 #define IXGBEVF_RXBUFFER_8K 8192 140 #define IXGBEVF_RXBUFFER_10K 10240 141 142 #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256 143 144 #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) 145 146 #define IXGBE_TX_FLAGS_CSUM (u32)(1) 147 #define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1) 148 #define IXGBE_TX_FLAGS_TSO (u32)(1 << 2) 149 #define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3) 150 #define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000 151 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000 152 #define IXGBE_TX_FLAGS_VLAN_SHIFT 16 153 154 struct ixgbevf_ring_container { 155 struct ixgbevf_ring *ring; /* pointer to linked list of rings */ 156 unsigned int total_bytes; /* total bytes processed this int */ 157 unsigned int total_packets; /* total packets processed this int */ 158 u8 count; /* total number of rings in vector */ 159 u8 itr; /* current ITR setting for ring */ 160 }; 161 162 /* iterator for handling rings in ring container */ 163 #define ixgbevf_for_each_ring(pos, head) \ 164 for (pos = (head).ring; pos != NULL; pos = pos->next) 165 166 /* MAX_MSIX_Q_VECTORS of these are allocated, 167 * but we only use one per queue-specific vector. 168 */ 169 struct ixgbevf_q_vector { 170 struct ixgbevf_adapter *adapter; 171 u16 v_idx; /* index of q_vector within array, also used for 172 * finding the bit in EICR and friends that 173 * represents the vector for this ring */ 174 u16 itr; /* Interrupt throttle rate written to EITR */ 175 struct napi_struct napi; 176 struct ixgbevf_ring_container rx, tx; 177 char name[IFNAMSIZ + 9]; 178 #ifdef CONFIG_NET_RX_BUSY_POLL 179 unsigned int state; 180 #define IXGBEVF_QV_STATE_IDLE 0 181 #define IXGBEVF_QV_STATE_NAPI 1 /* NAPI owns this QV */ 182 #define IXGBEVF_QV_STATE_POLL 2 /* poll owns this QV */ 183 #define IXGBEVF_QV_STATE_DISABLED 4 /* QV is disabled */ 184 #define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL) 185 #define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED) 186 #define IXGBEVF_QV_STATE_NAPI_YIELD 8 /* NAPI yielded this QV */ 187 #define IXGBEVF_QV_STATE_POLL_YIELD 16 /* poll yielded this QV */ 188 #define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | IXGBEVF_QV_STATE_POLL_YIELD) 189 #define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | IXGBEVF_QV_STATE_POLL_YIELD) 190 spinlock_t lock; 191 #endif /* CONFIG_NET_RX_BUSY_POLL */ 192 }; 193 #ifdef CONFIG_NET_RX_BUSY_POLL 194 static inline void ixgbevf_qv_init_lock(struct ixgbevf_q_vector *q_vector) 195 { 196 197 spin_lock_init(&q_vector->lock); 198 q_vector->state = IXGBEVF_QV_STATE_IDLE; 199 } 200 201 /* called from the device poll routine to get ownership of a q_vector */ 202 static inline bool ixgbevf_qv_lock_napi(struct ixgbevf_q_vector *q_vector) 203 { 204 int rc = true; 205 spin_lock_bh(&q_vector->lock); 206 if (q_vector->state & IXGBEVF_QV_LOCKED) { 207 WARN_ON(q_vector->state & IXGBEVF_QV_STATE_NAPI); 208 q_vector->state |= IXGBEVF_QV_STATE_NAPI_YIELD; 209 rc = false; 210 #ifdef BP_EXTENDED_STATS 211 q_vector->tx.ring->stats.yields++; 212 #endif 213 } else { 214 /* we don't care if someone yielded */ 215 q_vector->state = IXGBEVF_QV_STATE_NAPI; 216 } 217 spin_unlock_bh(&q_vector->lock); 218 return rc; 219 } 220 221 /* returns true is someone tried to get the qv while napi had it */ 222 static inline bool ixgbevf_qv_unlock_napi(struct ixgbevf_q_vector *q_vector) 223 { 224 int rc = false; 225 spin_lock_bh(&q_vector->lock); 226 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_POLL | 227 IXGBEVF_QV_STATE_NAPI_YIELD)); 228 229 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD) 230 rc = true; 231 /* reset state to idle, unless QV is disabled */ 232 q_vector->state &= IXGBEVF_QV_STATE_DISABLED; 233 spin_unlock_bh(&q_vector->lock); 234 return rc; 235 } 236 237 /* called from ixgbevf_low_latency_poll() */ 238 static inline bool ixgbevf_qv_lock_poll(struct ixgbevf_q_vector *q_vector) 239 { 240 int rc = true; 241 spin_lock_bh(&q_vector->lock); 242 if ((q_vector->state & IXGBEVF_QV_LOCKED)) { 243 q_vector->state |= IXGBEVF_QV_STATE_POLL_YIELD; 244 rc = false; 245 #ifdef BP_EXTENDED_STATS 246 q_vector->rx.ring->stats.yields++; 247 #endif 248 } else { 249 /* preserve yield marks */ 250 q_vector->state |= IXGBEVF_QV_STATE_POLL; 251 } 252 spin_unlock_bh(&q_vector->lock); 253 return rc; 254 } 255 256 /* returns true if someone tried to get the qv while it was locked */ 257 static inline bool ixgbevf_qv_unlock_poll(struct ixgbevf_q_vector *q_vector) 258 { 259 int rc = false; 260 spin_lock_bh(&q_vector->lock); 261 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_NAPI)); 262 263 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD) 264 rc = true; 265 /* reset state to idle, unless QV is disabled */ 266 q_vector->state &= IXGBEVF_QV_STATE_DISABLED; 267 spin_unlock_bh(&q_vector->lock); 268 return rc; 269 } 270 271 /* true if a socket is polling, even if it did not get the lock */ 272 static inline bool ixgbevf_qv_busy_polling(struct ixgbevf_q_vector *q_vector) 273 { 274 WARN_ON(!(q_vector->state & IXGBEVF_QV_OWNED)); 275 return q_vector->state & IXGBEVF_QV_USER_PEND; 276 } 277 278 /* false if QV is currently owned */ 279 static inline bool ixgbevf_qv_disable(struct ixgbevf_q_vector *q_vector) 280 { 281 int rc = true; 282 spin_lock_bh(&q_vector->lock); 283 if (q_vector->state & IXGBEVF_QV_OWNED) 284 rc = false; 285 q_vector->state |= IXGBEVF_QV_STATE_DISABLED; 286 spin_unlock_bh(&q_vector->lock); 287 return rc; 288 } 289 290 #endif /* CONFIG_NET_RX_BUSY_POLL */ 291 292 /* 293 * microsecond values for various ITR rates shifted by 2 to fit itr register 294 * with the first 3 bits reserved 0 295 */ 296 #define IXGBE_MIN_RSC_ITR 24 297 #define IXGBE_100K_ITR 40 298 #define IXGBE_20K_ITR 200 299 #define IXGBE_10K_ITR 400 300 #define IXGBE_8K_ITR 500 301 302 /* Helper macros to switch between ints/sec and what the register uses. 303 * And yes, it's the same math going both ways. The lowest value 304 * supported by all of the ixgbe hardware is 8. 305 */ 306 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \ 307 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8) 308 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG 309 310 static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring) 311 { 312 u16 ntc = ring->next_to_clean; 313 u16 ntu = ring->next_to_use; 314 315 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1; 316 } 317 318 static inline void ixgbevf_write_tail(struct ixgbevf_ring *ring, u32 value) 319 { 320 writel(value, ring->tail); 321 } 322 323 #define IXGBEVF_RX_DESC(R, i) \ 324 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i])) 325 #define IXGBEVF_TX_DESC(R, i) \ 326 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i])) 327 #define IXGBEVF_TX_CTXTDESC(R, i) \ 328 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i])) 329 330 #define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */ 331 332 #define OTHER_VECTOR 1 333 #define NON_Q_VECTORS (OTHER_VECTOR) 334 335 #define MAX_MSIX_Q_VECTORS 2 336 337 #define MIN_MSIX_Q_VECTORS 1 338 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS) 339 340 /* board specific private data structure */ 341 struct ixgbevf_adapter { 342 struct timer_list watchdog_timer; 343 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 344 struct work_struct reset_task; 345 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS]; 346 347 /* Interrupt Throttle Rate */ 348 u16 rx_itr_setting; 349 u16 tx_itr_setting; 350 351 /* interrupt masks */ 352 u32 eims_enable_mask; 353 u32 eims_other; 354 355 /* TX */ 356 int num_tx_queues; 357 struct ixgbevf_ring *tx_ring[MAX_TX_QUEUES]; /* One per active queue */ 358 u64 restart_queue; 359 u32 tx_timeout_count; 360 361 /* RX */ 362 int num_rx_queues; 363 struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */ 364 u64 hw_csum_rx_error; 365 u64 hw_rx_no_dma_resources; 366 u64 non_eop_descs; 367 int num_msix_vectors; 368 u32 alloc_rx_page_failed; 369 u32 alloc_rx_buff_failed; 370 371 /* Some features need tri-state capability, 372 * thus the additional *_CAPABLE flags. 373 */ 374 u32 flags; 375 #define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1) 376 #define IXGBE_FLAG_IN_NETPOLL (u32)(1 << 1) 377 #define IXGBEVF_FLAG_QUEUE_RESET_REQUESTED (u32)(1 << 2) 378 379 struct msix_entry *msix_entries; 380 381 /* OS defined structs */ 382 struct net_device *netdev; 383 struct pci_dev *pdev; 384 385 /* structs defined in ixgbe_vf.h */ 386 struct ixgbe_hw hw; 387 u16 msg_enable; 388 u16 bd_number; 389 /* Interrupt Throttle Rate */ 390 u32 eitr_param; 391 392 struct ixgbevf_hw_stats stats; 393 394 unsigned long state; 395 u64 tx_busy; 396 unsigned int tx_ring_count; 397 unsigned int rx_ring_count; 398 399 #ifdef BP_EXTENDED_STATS 400 u64 bp_rx_yields; 401 u64 bp_rx_cleaned; 402 u64 bp_rx_missed; 403 404 u64 bp_tx_yields; 405 u64 bp_tx_cleaned; 406 u64 bp_tx_missed; 407 #endif 408 409 u8 __iomem *io_addr; /* Mainly for iounmap use */ 410 u32 link_speed; 411 bool link_up; 412 413 spinlock_t mbx_lock; 414 415 struct work_struct watchdog_task; 416 }; 417 418 enum ixbgevf_state_t { 419 __IXGBEVF_TESTING, 420 __IXGBEVF_RESETTING, 421 __IXGBEVF_DOWN, 422 __IXGBEVF_DISABLED, 423 __IXGBEVF_REMOVING, 424 __IXGBEVF_WORK_INIT, 425 }; 426 427 struct ixgbevf_cb { 428 struct sk_buff *prev; 429 }; 430 #define IXGBE_CB(skb) ((struct ixgbevf_cb *)(skb)->cb) 431 432 enum ixgbevf_boards { 433 board_82599_vf, 434 board_X540_vf, 435 }; 436 437 extern const struct ixgbevf_info ixgbevf_82599_vf_info; 438 extern const struct ixgbevf_info ixgbevf_X540_vf_info; 439 extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops; 440 441 /* needed by ethtool.c */ 442 extern const char ixgbevf_driver_name[]; 443 extern const char ixgbevf_driver_version[]; 444 445 void ixgbevf_up(struct ixgbevf_adapter *adapter); 446 void ixgbevf_down(struct ixgbevf_adapter *adapter); 447 void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter); 448 void ixgbevf_reset(struct ixgbevf_adapter *adapter); 449 void ixgbevf_set_ethtool_ops(struct net_device *netdev); 450 int ixgbevf_setup_rx_resources(struct ixgbevf_ring *); 451 int ixgbevf_setup_tx_resources(struct ixgbevf_ring *); 452 void ixgbevf_free_rx_resources(struct ixgbevf_ring *); 453 void ixgbevf_free_tx_resources(struct ixgbevf_ring *); 454 void ixgbevf_update_stats(struct ixgbevf_adapter *adapter); 455 int ethtool_ioctl(struct ifreq *ifr); 456 457 extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector); 458 459 void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter); 460 void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter); 461 462 #ifdef DEBUG 463 char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw); 464 #define hw_dbg(hw, format, arg...) \ 465 printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg) 466 #else 467 #define hw_dbg(hw, format, arg...) do {} while (0) 468 #endif 469 470 #endif /* _IXGBEVF_H_ */ 471