1 /******************************************************************************* 2 3 Intel 82599 Virtual Function driver 4 Copyright(c) 1999 - 2012 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 26 *******************************************************************************/ 27 28 #ifndef _IXGBEVF_H_ 29 #define _IXGBEVF_H_ 30 31 #include <linux/types.h> 32 #include <linux/bitops.h> 33 #include <linux/timer.h> 34 #include <linux/io.h> 35 #include <linux/netdevice.h> 36 #include <linux/if_vlan.h> 37 #include <linux/u64_stats_sync.h> 38 39 #include "vf.h" 40 41 /* wrapper around a pointer to a socket buffer, 42 * so a DMA handle can be stored along with the buffer */ 43 struct ixgbevf_tx_buffer { 44 struct sk_buff *skb; 45 dma_addr_t dma; 46 unsigned long time_stamp; 47 u16 length; 48 u16 next_to_watch; 49 u16 mapped_as_page; 50 }; 51 52 struct ixgbevf_rx_buffer { 53 struct sk_buff *skb; 54 dma_addr_t dma; 55 }; 56 57 struct ixgbevf_ring { 58 struct ixgbevf_ring *next; 59 struct net_device *netdev; 60 struct device *dev; 61 struct ixgbevf_adapter *adapter; /* backlink */ 62 void *desc; /* descriptor ring memory */ 63 dma_addr_t dma; /* phys. address of descriptor ring */ 64 unsigned int size; /* length in bytes */ 65 unsigned int count; /* amount of descriptors */ 66 unsigned int next_to_use; 67 unsigned int next_to_clean; 68 69 int queue_index; /* needed for multiqueue queue management */ 70 union { 71 struct ixgbevf_tx_buffer *tx_buffer_info; 72 struct ixgbevf_rx_buffer *rx_buffer_info; 73 }; 74 75 u64 total_bytes; 76 u64 total_packets; 77 struct u64_stats_sync syncp; 78 79 u16 head; 80 u16 tail; 81 82 u16 reg_idx; /* holds the special value that gets the hardware register 83 * offset associated with this ring, which is different 84 * for DCB and RSS modes */ 85 86 u16 rx_buf_len; 87 }; 88 89 /* How many Rx Buffers do we bundle into one write to the hardware ? */ 90 #define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 91 92 #define MAX_RX_QUEUES 1 93 #define MAX_TX_QUEUES 1 94 95 #define IXGBEVF_DEFAULT_TXD 1024 96 #define IXGBEVF_DEFAULT_RXD 512 97 #define IXGBEVF_MAX_TXD 4096 98 #define IXGBEVF_MIN_TXD 64 99 #define IXGBEVF_MAX_RXD 4096 100 #define IXGBEVF_MIN_RXD 64 101 102 /* Supported Rx Buffer Sizes */ 103 #define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */ 104 #define IXGBEVF_RXBUFFER_2048 2048 105 #define IXGBEVF_MAX_RXBUFFER 16384 /* largest size for single descriptor */ 106 107 #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256 108 109 #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) 110 111 #define IXGBE_TX_FLAGS_CSUM (u32)(1) 112 #define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1) 113 #define IXGBE_TX_FLAGS_TSO (u32)(1 << 2) 114 #define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3) 115 #define IXGBE_TX_FLAGS_FCOE (u32)(1 << 4) 116 #define IXGBE_TX_FLAGS_FSO (u32)(1 << 5) 117 #define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000 118 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000 119 #define IXGBE_TX_FLAGS_VLAN_SHIFT 16 120 121 struct ixgbevf_ring_container { 122 struct ixgbevf_ring *ring; /* pointer to linked list of rings */ 123 unsigned int total_bytes; /* total bytes processed this int */ 124 unsigned int total_packets; /* total packets processed this int */ 125 u8 count; /* total number of rings in vector */ 126 u8 itr; /* current ITR setting for ring */ 127 }; 128 129 /* iterator for handling rings in ring container */ 130 #define ixgbevf_for_each_ring(pos, head) \ 131 for (pos = (head).ring; pos != NULL; pos = pos->next) 132 133 /* MAX_MSIX_Q_VECTORS of these are allocated, 134 * but we only use one per queue-specific vector. 135 */ 136 struct ixgbevf_q_vector { 137 struct ixgbevf_adapter *adapter; 138 u16 v_idx; /* index of q_vector within array, also used for 139 * finding the bit in EICR and friends that 140 * represents the vector for this ring */ 141 u16 itr; /* Interrupt throttle rate written to EITR */ 142 struct napi_struct napi; 143 struct ixgbevf_ring_container rx, tx; 144 char name[IFNAMSIZ + 9]; 145 }; 146 147 /* 148 * microsecond values for various ITR rates shifted by 2 to fit itr register 149 * with the first 3 bits reserved 0 150 */ 151 #define IXGBE_MIN_RSC_ITR 24 152 #define IXGBE_100K_ITR 40 153 #define IXGBE_20K_ITR 200 154 #define IXGBE_10K_ITR 400 155 #define IXGBE_8K_ITR 500 156 157 /* Helper macros to switch between ints/sec and what the register uses. 158 * And yes, it's the same math going both ways. The lowest value 159 * supported by all of the ixgbe hardware is 8. 160 */ 161 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \ 162 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8) 163 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG 164 165 #define IXGBE_DESC_UNUSED(R) \ 166 ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \ 167 (R)->next_to_clean - (R)->next_to_use - 1) 168 169 #define IXGBEVF_RX_DESC(R, i) \ 170 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i])) 171 #define IXGBEVF_TX_DESC(R, i) \ 172 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i])) 173 #define IXGBEVF_TX_CTXTDESC(R, i) \ 174 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i])) 175 176 #define IXGBE_MAX_JUMBO_FRAME_SIZE 16128 177 178 #define OTHER_VECTOR 1 179 #define NON_Q_VECTORS (OTHER_VECTOR) 180 181 #define MAX_MSIX_Q_VECTORS 2 182 183 #define MIN_MSIX_Q_VECTORS 1 184 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS) 185 186 /* board specific private data structure */ 187 struct ixgbevf_adapter { 188 struct timer_list watchdog_timer; 189 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 190 u16 bd_number; 191 struct work_struct reset_task; 192 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS]; 193 194 /* Interrupt Throttle Rate */ 195 u16 rx_itr_setting; 196 u16 tx_itr_setting; 197 198 /* interrupt masks */ 199 u32 eims_enable_mask; 200 u32 eims_other; 201 202 /* TX */ 203 struct ixgbevf_ring *tx_ring; /* One per active queue */ 204 int num_tx_queues; 205 u64 restart_queue; 206 u64 hw_csum_tx_good; 207 u64 lsc_int; 208 u64 hw_tso_ctxt; 209 u64 hw_tso6_ctxt; 210 u32 tx_timeout_count; 211 212 /* RX */ 213 struct ixgbevf_ring *rx_ring; /* One per active queue */ 214 int num_rx_queues; 215 u64 hw_csum_rx_error; 216 u64 hw_rx_no_dma_resources; 217 u64 hw_csum_rx_good; 218 u64 non_eop_descs; 219 int num_msix_vectors; 220 struct msix_entry *msix_entries; 221 222 u32 alloc_rx_page_failed; 223 u32 alloc_rx_buff_failed; 224 225 /* Some features need tri-state capability, 226 * thus the additional *_CAPABLE flags. 227 */ 228 u32 flags; 229 #define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1) 230 231 /* OS defined structs */ 232 struct net_device *netdev; 233 struct pci_dev *pdev; 234 235 /* structs defined in ixgbe_vf.h */ 236 struct ixgbe_hw hw; 237 u16 msg_enable; 238 struct ixgbevf_hw_stats stats; 239 u64 zero_base; 240 /* Interrupt Throttle Rate */ 241 u32 eitr_param; 242 243 unsigned long state; 244 u64 tx_busy; 245 unsigned int tx_ring_count; 246 unsigned int rx_ring_count; 247 248 u32 link_speed; 249 bool link_up; 250 251 struct work_struct watchdog_task; 252 253 spinlock_t mbx_lock; 254 }; 255 256 enum ixbgevf_state_t { 257 __IXGBEVF_TESTING, 258 __IXGBEVF_RESETTING, 259 __IXGBEVF_DOWN 260 }; 261 262 enum ixgbevf_boards { 263 board_82599_vf, 264 board_X540_vf, 265 }; 266 267 extern const struct ixgbevf_info ixgbevf_82599_vf_info; 268 extern const struct ixgbevf_info ixgbevf_X540_vf_info; 269 extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops; 270 271 /* needed by ethtool.c */ 272 extern const char ixgbevf_driver_name[]; 273 extern const char ixgbevf_driver_version[]; 274 275 extern void ixgbevf_up(struct ixgbevf_adapter *adapter); 276 extern void ixgbevf_down(struct ixgbevf_adapter *adapter); 277 extern void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter); 278 extern void ixgbevf_reset(struct ixgbevf_adapter *adapter); 279 extern void ixgbevf_set_ethtool_ops(struct net_device *netdev); 280 extern int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *, 281 struct ixgbevf_ring *); 282 extern int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *, 283 struct ixgbevf_ring *); 284 extern void ixgbevf_free_rx_resources(struct ixgbevf_adapter *, 285 struct ixgbevf_ring *); 286 extern void ixgbevf_free_tx_resources(struct ixgbevf_adapter *, 287 struct ixgbevf_ring *); 288 extern void ixgbevf_update_stats(struct ixgbevf_adapter *adapter); 289 extern int ethtool_ioctl(struct ifreq *ifr); 290 291 extern void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter); 292 extern void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter); 293 294 #ifdef DEBUG 295 extern char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw); 296 #define hw_dbg(hw, format, arg...) \ 297 printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg) 298 #else 299 #define hw_dbg(hw, format, arg...) do {} while (0) 300 #endif 301 302 #endif /* _IXGBEVF_H_ */ 303