1 /*******************************************************************************
2 
3   Intel 82599 Virtual Function driver
4   Copyright(c) 1999 - 2012 Intel Corporation.
5 
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9 
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14 
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21 
22   Contact Information:
23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 
26 *******************************************************************************/
27 
28 #ifndef _IXGBEVF_H_
29 #define _IXGBEVF_H_
30 
31 #include <linux/types.h>
32 #include <linux/bitops.h>
33 #include <linux/timer.h>
34 #include <linux/io.h>
35 #include <linux/netdevice.h>
36 #include <linux/if_vlan.h>
37 #include <linux/u64_stats_sync.h>
38 
39 #include "vf.h"
40 
41 /* wrapper around a pointer to a socket buffer,
42  * so a DMA handle can be stored along with the buffer */
43 struct ixgbevf_tx_buffer {
44 	struct sk_buff *skb;
45 	dma_addr_t dma;
46 	unsigned long time_stamp;
47 	u16 length;
48 	u16 next_to_watch;
49 	u16 mapped_as_page;
50 };
51 
52 struct ixgbevf_rx_buffer {
53 	struct sk_buff *skb;
54 	dma_addr_t dma;
55 	struct page *page;
56 	dma_addr_t page_dma;
57 	unsigned int page_offset;
58 };
59 
60 struct ixgbevf_ring {
61 	struct ixgbevf_adapter *adapter;  /* backlink */
62 	void *desc;			/* descriptor ring memory */
63 	dma_addr_t dma;			/* phys. address of descriptor ring */
64 	unsigned int size;		/* length in bytes */
65 	unsigned int count;		/* amount of descriptors */
66 	unsigned int next_to_use;
67 	unsigned int next_to_clean;
68 
69 	int queue_index; /* needed for multiqueue queue management */
70 	union {
71 		struct ixgbevf_tx_buffer *tx_buffer_info;
72 		struct ixgbevf_rx_buffer *rx_buffer_info;
73 	};
74 
75 	u64			total_bytes;
76 	u64			total_packets;
77 	struct u64_stats_sync	syncp;
78 
79 	u16 head;
80 	u16 tail;
81 
82 	u16 reg_idx; /* holds the special value that gets the hardware register
83 		      * offset associated with this ring, which is different
84 		      * for DCB and RSS modes */
85 
86 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
87 	/* cpu for tx queue */
88 	int cpu;
89 #endif
90 
91 	u64 v_idx; /* maps directly to the index for this ring in the hardware
92 		    * vector array, can also be used for finding the bit in EICR
93 		    * and friends that represents the vector for this ring */
94 
95 	u16 work_limit;                /* max work per interrupt */
96 	u16 rx_buf_len;
97 };
98 
99 enum ixgbevf_ring_f_enum {
100 	RING_F_NONE = 0,
101 	RING_F_ARRAY_SIZE      /* must be last in enum set */
102 };
103 
104 struct ixgbevf_ring_feature {
105 	int indices;
106 	int mask;
107 };
108 
109 /* How many Rx Buffers do we bundle into one write to the hardware ? */
110 #define IXGBEVF_RX_BUFFER_WRITE	16	/* Must be power of 2 */
111 
112 #define MAX_RX_QUEUES 1
113 #define MAX_TX_QUEUES 1
114 
115 #define IXGBEVF_DEFAULT_TXD   1024
116 #define IXGBEVF_DEFAULT_RXD   512
117 #define IXGBEVF_MAX_TXD       4096
118 #define IXGBEVF_MIN_TXD       64
119 #define IXGBEVF_MAX_RXD       4096
120 #define IXGBEVF_MIN_RXD       64
121 
122 /* Supported Rx Buffer Sizes */
123 #define IXGBEVF_RXBUFFER_64    64     /* Used for packet split */
124 #define IXGBEVF_RXBUFFER_128   128    /* Used for packet split */
125 #define IXGBEVF_RXBUFFER_256   256    /* Used for packet split */
126 #define IXGBEVF_RXBUFFER_2048  2048
127 #define IXGBEVF_MAX_RXBUFFER   16384  /* largest size for single descriptor */
128 
129 #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
130 
131 #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
132 
133 #define IXGBE_TX_FLAGS_CSUM		(u32)(1)
134 #define IXGBE_TX_FLAGS_VLAN		(u32)(1 << 1)
135 #define IXGBE_TX_FLAGS_TSO		(u32)(1 << 2)
136 #define IXGBE_TX_FLAGS_IPV4		(u32)(1 << 3)
137 #define IXGBE_TX_FLAGS_FCOE		(u32)(1 << 4)
138 #define IXGBE_TX_FLAGS_FSO		(u32)(1 << 5)
139 #define IXGBE_TX_FLAGS_VLAN_MASK	0xffff0000
140 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK	0x0000e000
141 #define IXGBE_TX_FLAGS_VLAN_SHIFT	16
142 
143 /* MAX_MSIX_Q_VECTORS of these are allocated,
144  * but we only use one per queue-specific vector.
145  */
146 struct ixgbevf_q_vector {
147 	struct ixgbevf_adapter *adapter;
148 	struct napi_struct napi;
149 	DECLARE_BITMAP(rxr_idx, MAX_RX_QUEUES); /* Rx ring indices */
150 	DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */
151 	u8 rxr_count;     /* Rx ring count assigned to this vector */
152 	u8 txr_count;     /* Tx ring count assigned to this vector */
153 	u8 tx_itr;
154 	u8 rx_itr;
155 	u32 eitr;
156 	int v_idx;	  /* vector index in list */
157 };
158 
159 /* Helper macros to switch between ints/sec and what the register uses.
160  * And yes, it's the same math going both ways.  The lowest value
161  * supported by all of the ixgbe hardware is 8.
162  */
163 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \
164 	((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
165 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
166 
167 #define IXGBE_DESC_UNUSED(R) \
168 	((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
169 	(R)->next_to_clean - (R)->next_to_use - 1)
170 
171 #define IXGBE_RX_DESC_ADV(R, i)	    \
172 	(&(((union ixgbe_adv_rx_desc *)((R).desc))[i]))
173 #define IXGBE_TX_DESC_ADV(R, i)	    \
174 	(&(((union ixgbe_adv_tx_desc *)((R).desc))[i]))
175 #define IXGBE_TX_CTXTDESC_ADV(R, i)	    \
176 	(&(((struct ixgbe_adv_tx_context_desc *)((R).desc))[i]))
177 
178 #define IXGBE_MAX_JUMBO_FRAME_SIZE        16128
179 
180 #define OTHER_VECTOR 1
181 #define NON_Q_VECTORS (OTHER_VECTOR)
182 
183 #define MAX_MSIX_Q_VECTORS 2
184 #define MAX_MSIX_COUNT 2
185 
186 #define MIN_MSIX_Q_VECTORS 2
187 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
188 
189 /* board specific private data structure */
190 struct ixgbevf_adapter {
191 	struct timer_list watchdog_timer;
192 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
193 	u16 bd_number;
194 	struct work_struct reset_task;
195 	struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
196 	char name[MAX_MSIX_COUNT][IFNAMSIZ + 9];
197 
198 	/* Interrupt Throttle Rate */
199 	u32 itr_setting;
200 	u16 eitr_low;
201 	u16 eitr_high;
202 
203 	/* TX */
204 	struct ixgbevf_ring *tx_ring;	/* One per active queue */
205 	int num_tx_queues;
206 	u64 restart_queue;
207 	u64 hw_csum_tx_good;
208 	u64 lsc_int;
209 	u64 hw_tso_ctxt;
210 	u64 hw_tso6_ctxt;
211 	u32 tx_timeout_count;
212 
213 	/* RX */
214 	struct ixgbevf_ring *rx_ring;	/* One per active queue */
215 	int num_rx_queues;
216 	int num_rx_pools;               /* == num_rx_queues in 82598 */
217 	int num_rx_queues_per_pool;	/* 1 if 82598, can be many if 82599 */
218 	u64 hw_csum_rx_error;
219 	u64 hw_rx_no_dma_resources;
220 	u64 hw_csum_rx_good;
221 	u64 non_eop_descs;
222 	int num_msix_vectors;
223 	int max_msix_q_vectors;         /* true count of q_vectors for device */
224 	struct ixgbevf_ring_feature ring_feature[RING_F_ARRAY_SIZE];
225 	struct msix_entry *msix_entries;
226 
227 	u64 rx_hdr_split;
228 	u32 alloc_rx_page_failed;
229 	u32 alloc_rx_buff_failed;
230 
231 	/* Some features need tri-state capability,
232 	 * thus the additional *_CAPABLE flags.
233 	 */
234 	u32 flags;
235 #define IXGBE_FLAG_RX_CSUM_ENABLED              (u32)(1)
236 #define IXGBE_FLAG_RX_1BUF_CAPABLE              (u32)(1 << 1)
237 #define IXGBE_FLAG_RX_PS_CAPABLE                (u32)(1 << 2)
238 #define IXGBE_FLAG_RX_PS_ENABLED                (u32)(1 << 3)
239 #define IXGBE_FLAG_IN_NETPOLL                   (u32)(1 << 4)
240 #define IXGBE_FLAG_IMIR_ENABLED                 (u32)(1 << 5)
241 #define IXGBE_FLAG_MQ_CAPABLE                   (u32)(1 << 6)
242 #define IXGBE_FLAG_NEED_LINK_UPDATE             (u32)(1 << 7)
243 #define IXGBE_FLAG_IN_WATCHDOG_TASK             (u32)(1 << 8)
244 	/* OS defined structs */
245 	struct net_device *netdev;
246 	struct pci_dev *pdev;
247 
248 	/* structs defined in ixgbe_vf.h */
249 	struct ixgbe_hw hw;
250 	u16 msg_enable;
251 	struct ixgbevf_hw_stats stats;
252 	u64 zero_base;
253 	/* Interrupt Throttle Rate */
254 	u32 eitr_param;
255 
256 	unsigned long state;
257 	u32 *config_space;
258 	u64 tx_busy;
259 	unsigned int tx_ring_count;
260 	unsigned int rx_ring_count;
261 
262 	u32 link_speed;
263 	bool link_up;
264 	unsigned long link_check_timeout;
265 
266 	struct work_struct watchdog_task;
267 	bool netdev_registered;
268 	bool dev_closed;
269 };
270 
271 enum ixbgevf_state_t {
272 	__IXGBEVF_TESTING,
273 	__IXGBEVF_RESETTING,
274 	__IXGBEVF_DOWN
275 };
276 
277 enum ixgbevf_boards {
278 	board_82599_vf,
279 	board_X540_vf,
280 };
281 
282 extern const struct ixgbevf_info ixgbevf_82599_vf_info;
283 extern const struct ixgbevf_info ixgbevf_X540_vf_info;
284 extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;
285 
286 /* needed by ethtool.c */
287 extern const char ixgbevf_driver_name[];
288 extern const char ixgbevf_driver_version[];
289 
290 extern void ixgbevf_up(struct ixgbevf_adapter *adapter);
291 extern void ixgbevf_down(struct ixgbevf_adapter *adapter);
292 extern void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
293 extern void ixgbevf_reset(struct ixgbevf_adapter *adapter);
294 extern void ixgbevf_set_ethtool_ops(struct net_device *netdev);
295 extern int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *,
296 				      struct ixgbevf_ring *);
297 extern int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *,
298 				      struct ixgbevf_ring *);
299 extern void ixgbevf_free_rx_resources(struct ixgbevf_adapter *,
300 				      struct ixgbevf_ring *);
301 extern void ixgbevf_free_tx_resources(struct ixgbevf_adapter *,
302 				      struct ixgbevf_ring *);
303 extern void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
304 
305 #ifdef ETHTOOL_OPS_COMPAT
306 extern int ethtool_ioctl(struct ifreq *ifr);
307 
308 #endif
309 extern void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
310 extern void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
311 
312 #ifdef DEBUG
313 extern char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw);
314 #define hw_dbg(hw, format, arg...) \
315 	printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
316 #else
317 #define hw_dbg(hw, format, arg...) do {} while (0)
318 #endif
319 
320 #endif /* _IXGBEVF_H_ */
321