1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2018 Intel Corporation. */ 3 4 #include <linux/bpf_trace.h> 5 #include <net/xdp_sock_drv.h> 6 #include <net/xdp.h> 7 8 #include "ixgbe.h" 9 #include "ixgbe_txrx_common.h" 10 11 struct xsk_buff_pool *ixgbe_xsk_pool(struct ixgbe_adapter *adapter, 12 struct ixgbe_ring *ring) 13 { 14 bool xdp_on = READ_ONCE(adapter->xdp_prog); 15 int qid = ring->ring_idx; 16 17 if (!xdp_on || !test_bit(qid, adapter->af_xdp_zc_qps)) 18 return NULL; 19 20 return xsk_get_pool_from_qid(adapter->netdev, qid); 21 } 22 23 static int ixgbe_xsk_pool_enable(struct ixgbe_adapter *adapter, 24 struct xsk_buff_pool *pool, 25 u16 qid) 26 { 27 struct net_device *netdev = adapter->netdev; 28 bool if_running; 29 int err; 30 31 if (qid >= adapter->num_rx_queues) 32 return -EINVAL; 33 34 if (qid >= netdev->real_num_rx_queues || 35 qid >= netdev->real_num_tx_queues) 36 return -EINVAL; 37 38 err = xsk_pool_dma_map(pool, &adapter->pdev->dev, IXGBE_RX_DMA_ATTR); 39 if (err) 40 return err; 41 42 if_running = netif_running(adapter->netdev) && 43 ixgbe_enabled_xdp_adapter(adapter); 44 45 if (if_running) 46 ixgbe_txrx_ring_disable(adapter, qid); 47 48 set_bit(qid, adapter->af_xdp_zc_qps); 49 50 if (if_running) { 51 ixgbe_txrx_ring_enable(adapter, qid); 52 53 /* Kick start the NAPI context so that receiving will start */ 54 err = ixgbe_xsk_wakeup(adapter->netdev, qid, XDP_WAKEUP_RX); 55 if (err) 56 return err; 57 } 58 59 return 0; 60 } 61 62 static int ixgbe_xsk_pool_disable(struct ixgbe_adapter *adapter, u16 qid) 63 { 64 struct xsk_buff_pool *pool; 65 bool if_running; 66 67 pool = xsk_get_pool_from_qid(adapter->netdev, qid); 68 if (!pool) 69 return -EINVAL; 70 71 if_running = netif_running(adapter->netdev) && 72 ixgbe_enabled_xdp_adapter(adapter); 73 74 if (if_running) 75 ixgbe_txrx_ring_disable(adapter, qid); 76 77 clear_bit(qid, adapter->af_xdp_zc_qps); 78 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR); 79 80 if (if_running) 81 ixgbe_txrx_ring_enable(adapter, qid); 82 83 return 0; 84 } 85 86 int ixgbe_xsk_pool_setup(struct ixgbe_adapter *adapter, 87 struct xsk_buff_pool *pool, 88 u16 qid) 89 { 90 return pool ? ixgbe_xsk_pool_enable(adapter, pool, qid) : 91 ixgbe_xsk_pool_disable(adapter, qid); 92 } 93 94 static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter, 95 struct ixgbe_ring *rx_ring, 96 struct xdp_buff *xdp) 97 { 98 int err, result = IXGBE_XDP_PASS; 99 struct bpf_prog *xdp_prog; 100 struct xdp_frame *xdpf; 101 u32 act; 102 103 rcu_read_lock(); 104 xdp_prog = READ_ONCE(rx_ring->xdp_prog); 105 act = bpf_prog_run_xdp(xdp_prog, xdp); 106 107 switch (act) { 108 case XDP_PASS: 109 break; 110 case XDP_TX: 111 xdpf = xdp_convert_buff_to_frame(xdp); 112 if (unlikely(!xdpf)) { 113 result = IXGBE_XDP_CONSUMED; 114 break; 115 } 116 result = ixgbe_xmit_xdp_ring(adapter, xdpf); 117 break; 118 case XDP_REDIRECT: 119 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog); 120 result = !err ? IXGBE_XDP_REDIR : IXGBE_XDP_CONSUMED; 121 break; 122 default: 123 bpf_warn_invalid_xdp_action(act); 124 fallthrough; 125 case XDP_ABORTED: 126 trace_xdp_exception(rx_ring->netdev, xdp_prog, act); 127 fallthrough; /* handle aborts by dropping packet */ 128 case XDP_DROP: 129 result = IXGBE_XDP_CONSUMED; 130 break; 131 } 132 rcu_read_unlock(); 133 return result; 134 } 135 136 bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count) 137 { 138 union ixgbe_adv_rx_desc *rx_desc; 139 struct ixgbe_rx_buffer *bi; 140 u16 i = rx_ring->next_to_use; 141 dma_addr_t dma; 142 bool ok = true; 143 144 /* nothing to do */ 145 if (!count) 146 return true; 147 148 rx_desc = IXGBE_RX_DESC(rx_ring, i); 149 bi = &rx_ring->rx_buffer_info[i]; 150 i -= rx_ring->count; 151 152 do { 153 bi->xdp = xsk_buff_alloc(rx_ring->xsk_pool); 154 if (!bi->xdp) { 155 ok = false; 156 break; 157 } 158 159 dma = xsk_buff_xdp_get_dma(bi->xdp); 160 161 /* Refresh the desc even if buffer_addrs didn't change 162 * because each write-back erases this info. 163 */ 164 rx_desc->read.pkt_addr = cpu_to_le64(dma); 165 166 rx_desc++; 167 bi++; 168 i++; 169 if (unlikely(!i)) { 170 rx_desc = IXGBE_RX_DESC(rx_ring, 0); 171 bi = rx_ring->rx_buffer_info; 172 i -= rx_ring->count; 173 } 174 175 /* clear the length for the next_to_use descriptor */ 176 rx_desc->wb.upper.length = 0; 177 178 count--; 179 } while (count); 180 181 i += rx_ring->count; 182 183 if (rx_ring->next_to_use != i) { 184 rx_ring->next_to_use = i; 185 186 /* Force memory writes to complete before letting h/w 187 * know there are new descriptors to fetch. (Only 188 * applicable for weak-ordered memory model archs, 189 * such as IA-64). 190 */ 191 wmb(); 192 writel(i, rx_ring->tail); 193 } 194 195 return ok; 196 } 197 198 static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring, 199 struct ixgbe_rx_buffer *bi) 200 { 201 unsigned int metasize = bi->xdp->data - bi->xdp->data_meta; 202 unsigned int datasize = bi->xdp->data_end - bi->xdp->data; 203 struct sk_buff *skb; 204 205 /* allocate a skb to store the frags */ 206 skb = __napi_alloc_skb(&rx_ring->q_vector->napi, 207 bi->xdp->data_end - bi->xdp->data_hard_start, 208 GFP_ATOMIC | __GFP_NOWARN); 209 if (unlikely(!skb)) 210 return NULL; 211 212 skb_reserve(skb, bi->xdp->data - bi->xdp->data_hard_start); 213 memcpy(__skb_put(skb, datasize), bi->xdp->data, datasize); 214 if (metasize) 215 skb_metadata_set(skb, metasize); 216 217 xsk_buff_free(bi->xdp); 218 bi->xdp = NULL; 219 return skb; 220 } 221 222 static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring) 223 { 224 u32 ntc = rx_ring->next_to_clean + 1; 225 226 ntc = (ntc < rx_ring->count) ? ntc : 0; 227 rx_ring->next_to_clean = ntc; 228 prefetch(IXGBE_RX_DESC(rx_ring, ntc)); 229 } 230 231 int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector, 232 struct ixgbe_ring *rx_ring, 233 const int budget) 234 { 235 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 236 struct ixgbe_adapter *adapter = q_vector->adapter; 237 u16 cleaned_count = ixgbe_desc_unused(rx_ring); 238 unsigned int xdp_res, xdp_xmit = 0; 239 bool failure = false; 240 struct sk_buff *skb; 241 242 while (likely(total_rx_packets < budget)) { 243 union ixgbe_adv_rx_desc *rx_desc; 244 struct ixgbe_rx_buffer *bi; 245 unsigned int size; 246 247 /* return some buffers to hardware, one at a time is too slow */ 248 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) { 249 failure = failure || 250 !ixgbe_alloc_rx_buffers_zc(rx_ring, 251 cleaned_count); 252 cleaned_count = 0; 253 } 254 255 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean); 256 size = le16_to_cpu(rx_desc->wb.upper.length); 257 if (!size) 258 break; 259 260 /* This memory barrier is needed to keep us from reading 261 * any other fields out of the rx_desc until we know the 262 * descriptor has been written back 263 */ 264 dma_rmb(); 265 266 bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; 267 268 if (unlikely(!ixgbe_test_staterr(rx_desc, 269 IXGBE_RXD_STAT_EOP))) { 270 struct ixgbe_rx_buffer *next_bi; 271 272 xsk_buff_free(bi->xdp); 273 bi->xdp = NULL; 274 ixgbe_inc_ntc(rx_ring); 275 next_bi = 276 &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; 277 next_bi->discard = true; 278 continue; 279 } 280 281 if (unlikely(bi->discard)) { 282 xsk_buff_free(bi->xdp); 283 bi->xdp = NULL; 284 bi->discard = false; 285 ixgbe_inc_ntc(rx_ring); 286 continue; 287 } 288 289 bi->xdp->data_end = bi->xdp->data + size; 290 xsk_buff_dma_sync_for_cpu(bi->xdp, rx_ring->xsk_pool); 291 xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, bi->xdp); 292 293 if (xdp_res) { 294 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) 295 xdp_xmit |= xdp_res; 296 else 297 xsk_buff_free(bi->xdp); 298 299 bi->xdp = NULL; 300 total_rx_packets++; 301 total_rx_bytes += size; 302 303 cleaned_count++; 304 ixgbe_inc_ntc(rx_ring); 305 continue; 306 } 307 308 /* XDP_PASS path */ 309 skb = ixgbe_construct_skb_zc(rx_ring, bi); 310 if (!skb) { 311 rx_ring->rx_stats.alloc_rx_buff_failed++; 312 break; 313 } 314 315 cleaned_count++; 316 ixgbe_inc_ntc(rx_ring); 317 318 if (eth_skb_pad(skb)) 319 continue; 320 321 total_rx_bytes += skb->len; 322 total_rx_packets++; 323 324 ixgbe_process_skb_fields(rx_ring, rx_desc, skb); 325 ixgbe_rx_skb(q_vector, skb); 326 } 327 328 if (xdp_xmit & IXGBE_XDP_REDIR) 329 xdp_do_flush_map(); 330 331 if (xdp_xmit & IXGBE_XDP_TX) { 332 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()]; 333 334 /* Force memory writes to complete before letting h/w 335 * know there are new descriptors to fetch. 336 */ 337 wmb(); 338 writel(ring->next_to_use, ring->tail); 339 } 340 341 u64_stats_update_begin(&rx_ring->syncp); 342 rx_ring->stats.packets += total_rx_packets; 343 rx_ring->stats.bytes += total_rx_bytes; 344 u64_stats_update_end(&rx_ring->syncp); 345 q_vector->rx.total_packets += total_rx_packets; 346 q_vector->rx.total_bytes += total_rx_bytes; 347 348 if (xsk_uses_need_wakeup(rx_ring->xsk_pool)) { 349 if (failure || rx_ring->next_to_clean == rx_ring->next_to_use) 350 xsk_set_rx_need_wakeup(rx_ring->xsk_pool); 351 else 352 xsk_clear_rx_need_wakeup(rx_ring->xsk_pool); 353 354 return (int)total_rx_packets; 355 } 356 return failure ? budget : (int)total_rx_packets; 357 } 358 359 void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring) 360 { 361 struct ixgbe_rx_buffer *bi; 362 u16 i; 363 364 for (i = 0; i < rx_ring->count; i++) { 365 bi = &rx_ring->rx_buffer_info[i]; 366 367 if (!bi->xdp) 368 continue; 369 370 xsk_buff_free(bi->xdp); 371 bi->xdp = NULL; 372 } 373 } 374 375 static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget) 376 { 377 struct xsk_buff_pool *pool = xdp_ring->xsk_pool; 378 union ixgbe_adv_tx_desc *tx_desc = NULL; 379 struct ixgbe_tx_buffer *tx_bi; 380 bool work_done = true; 381 struct xdp_desc desc; 382 dma_addr_t dma; 383 u32 cmd_type; 384 385 while (budget-- > 0) { 386 if (unlikely(!ixgbe_desc_unused(xdp_ring)) || 387 !netif_carrier_ok(xdp_ring->netdev)) { 388 work_done = false; 389 break; 390 } 391 392 if (!xsk_tx_peek_desc(pool, &desc)) 393 break; 394 395 dma = xsk_buff_raw_get_dma(pool, desc.addr); 396 xsk_buff_raw_dma_sync_for_device(pool, dma, desc.len); 397 398 tx_bi = &xdp_ring->tx_buffer_info[xdp_ring->next_to_use]; 399 tx_bi->bytecount = desc.len; 400 tx_bi->xdpf = NULL; 401 tx_bi->gso_segs = 1; 402 403 tx_desc = IXGBE_TX_DESC(xdp_ring, xdp_ring->next_to_use); 404 tx_desc->read.buffer_addr = cpu_to_le64(dma); 405 406 /* put descriptor type bits */ 407 cmd_type = IXGBE_ADVTXD_DTYP_DATA | 408 IXGBE_ADVTXD_DCMD_DEXT | 409 IXGBE_ADVTXD_DCMD_IFCS; 410 cmd_type |= desc.len | IXGBE_TXD_CMD; 411 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); 412 tx_desc->read.olinfo_status = 413 cpu_to_le32(desc.len << IXGBE_ADVTXD_PAYLEN_SHIFT); 414 415 xdp_ring->next_to_use++; 416 if (xdp_ring->next_to_use == xdp_ring->count) 417 xdp_ring->next_to_use = 0; 418 } 419 420 if (tx_desc) { 421 ixgbe_xdp_ring_update_tail(xdp_ring); 422 xsk_tx_release(pool); 423 } 424 425 return !!budget && work_done; 426 } 427 428 static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring, 429 struct ixgbe_tx_buffer *tx_bi) 430 { 431 xdp_return_frame(tx_bi->xdpf); 432 dma_unmap_single(tx_ring->dev, 433 dma_unmap_addr(tx_bi, dma), 434 dma_unmap_len(tx_bi, len), DMA_TO_DEVICE); 435 dma_unmap_len_set(tx_bi, len, 0); 436 } 437 438 bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector, 439 struct ixgbe_ring *tx_ring, int napi_budget) 440 { 441 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use; 442 unsigned int total_packets = 0, total_bytes = 0; 443 struct xsk_buff_pool *pool = tx_ring->xsk_pool; 444 union ixgbe_adv_tx_desc *tx_desc; 445 struct ixgbe_tx_buffer *tx_bi; 446 u32 xsk_frames = 0; 447 448 tx_bi = &tx_ring->tx_buffer_info[ntc]; 449 tx_desc = IXGBE_TX_DESC(tx_ring, ntc); 450 451 while (ntc != ntu) { 452 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 453 break; 454 455 total_bytes += tx_bi->bytecount; 456 total_packets += tx_bi->gso_segs; 457 458 if (tx_bi->xdpf) 459 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi); 460 else 461 xsk_frames++; 462 463 tx_bi->xdpf = NULL; 464 465 tx_bi++; 466 tx_desc++; 467 ntc++; 468 if (unlikely(ntc == tx_ring->count)) { 469 ntc = 0; 470 tx_bi = tx_ring->tx_buffer_info; 471 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 472 } 473 474 /* issue prefetch for next Tx descriptor */ 475 prefetch(tx_desc); 476 } 477 478 tx_ring->next_to_clean = ntc; 479 480 u64_stats_update_begin(&tx_ring->syncp); 481 tx_ring->stats.bytes += total_bytes; 482 tx_ring->stats.packets += total_packets; 483 u64_stats_update_end(&tx_ring->syncp); 484 q_vector->tx.total_bytes += total_bytes; 485 q_vector->tx.total_packets += total_packets; 486 487 if (xsk_frames) 488 xsk_tx_completed(pool, xsk_frames); 489 490 if (xsk_uses_need_wakeup(pool)) 491 xsk_set_tx_need_wakeup(pool); 492 493 return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit); 494 } 495 496 int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags) 497 { 498 struct ixgbe_adapter *adapter = netdev_priv(dev); 499 struct ixgbe_ring *ring; 500 501 if (test_bit(__IXGBE_DOWN, &adapter->state)) 502 return -ENETDOWN; 503 504 if (!READ_ONCE(adapter->xdp_prog)) 505 return -ENXIO; 506 507 if (qid >= adapter->num_xdp_queues) 508 return -ENXIO; 509 510 ring = adapter->xdp_ring[qid]; 511 512 if (test_bit(__IXGBE_TX_DISABLED, &ring->state)) 513 return -ENETDOWN; 514 515 if (!ring->xsk_pool) 516 return -ENXIO; 517 518 if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) { 519 u64 eics = BIT_ULL(ring->q_vector->v_idx); 520 521 ixgbe_irq_rearm_queues(adapter, eics); 522 } 523 524 return 0; 525 } 526 527 void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring) 528 { 529 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use; 530 struct xsk_buff_pool *pool = tx_ring->xsk_pool; 531 struct ixgbe_tx_buffer *tx_bi; 532 u32 xsk_frames = 0; 533 534 while (ntc != ntu) { 535 tx_bi = &tx_ring->tx_buffer_info[ntc]; 536 537 if (tx_bi->xdpf) 538 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi); 539 else 540 xsk_frames++; 541 542 tx_bi->xdpf = NULL; 543 544 ntc++; 545 if (ntc == tx_ring->count) 546 ntc = 0; 547 } 548 549 if (xsk_frames) 550 xsk_tx_completed(pool, xsk_frames); 551 } 552