1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2018 Intel Corporation. */ 3 4 #include <linux/bpf_trace.h> 5 #include <net/xdp_sock_drv.h> 6 #include <net/xdp.h> 7 8 #include "ixgbe.h" 9 #include "ixgbe_txrx_common.h" 10 11 struct xsk_buff_pool *ixgbe_xsk_pool(struct ixgbe_adapter *adapter, 12 struct ixgbe_ring *ring) 13 { 14 bool xdp_on = READ_ONCE(adapter->xdp_prog); 15 int qid = ring->ring_idx; 16 17 if (!xdp_on || !test_bit(qid, adapter->af_xdp_zc_qps)) 18 return NULL; 19 20 return xsk_get_pool_from_qid(adapter->netdev, qid); 21 } 22 23 static int ixgbe_xsk_pool_enable(struct ixgbe_adapter *adapter, 24 struct xsk_buff_pool *pool, 25 u16 qid) 26 { 27 struct net_device *netdev = adapter->netdev; 28 bool if_running; 29 int err; 30 31 if (qid >= adapter->num_rx_queues) 32 return -EINVAL; 33 34 if (qid >= netdev->real_num_rx_queues || 35 qid >= netdev->real_num_tx_queues) 36 return -EINVAL; 37 38 err = xsk_pool_dma_map(pool, &adapter->pdev->dev, IXGBE_RX_DMA_ATTR); 39 if (err) 40 return err; 41 42 if_running = netif_running(adapter->netdev) && 43 ixgbe_enabled_xdp_adapter(adapter); 44 45 if (if_running) 46 ixgbe_txrx_ring_disable(adapter, qid); 47 48 set_bit(qid, adapter->af_xdp_zc_qps); 49 50 if (if_running) { 51 ixgbe_txrx_ring_enable(adapter, qid); 52 53 /* Kick start the NAPI context so that receiving will start */ 54 err = ixgbe_xsk_wakeup(adapter->netdev, qid, XDP_WAKEUP_RX); 55 if (err) 56 return err; 57 } 58 59 return 0; 60 } 61 62 static int ixgbe_xsk_pool_disable(struct ixgbe_adapter *adapter, u16 qid) 63 { 64 struct xsk_buff_pool *pool; 65 bool if_running; 66 67 pool = xsk_get_pool_from_qid(adapter->netdev, qid); 68 if (!pool) 69 return -EINVAL; 70 71 if_running = netif_running(adapter->netdev) && 72 ixgbe_enabled_xdp_adapter(adapter); 73 74 if (if_running) 75 ixgbe_txrx_ring_disable(adapter, qid); 76 77 clear_bit(qid, adapter->af_xdp_zc_qps); 78 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR); 79 80 if (if_running) 81 ixgbe_txrx_ring_enable(adapter, qid); 82 83 return 0; 84 } 85 86 int ixgbe_xsk_pool_setup(struct ixgbe_adapter *adapter, 87 struct xsk_buff_pool *pool, 88 u16 qid) 89 { 90 return pool ? ixgbe_xsk_pool_enable(adapter, pool, qid) : 91 ixgbe_xsk_pool_disable(adapter, qid); 92 } 93 94 static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter, 95 struct ixgbe_ring *rx_ring, 96 struct xdp_buff *xdp) 97 { 98 int err, result = IXGBE_XDP_PASS; 99 struct bpf_prog *xdp_prog; 100 struct xdp_frame *xdpf; 101 u32 act; 102 103 rcu_read_lock(); 104 xdp_prog = READ_ONCE(rx_ring->xdp_prog); 105 act = bpf_prog_run_xdp(xdp_prog, xdp); 106 107 if (likely(act == XDP_REDIRECT)) { 108 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog); 109 result = !err ? IXGBE_XDP_REDIR : IXGBE_XDP_CONSUMED; 110 rcu_read_unlock(); 111 return result; 112 } 113 114 switch (act) { 115 case XDP_PASS: 116 break; 117 case XDP_TX: 118 xdpf = xdp_convert_buff_to_frame(xdp); 119 if (unlikely(!xdpf)) { 120 result = IXGBE_XDP_CONSUMED; 121 break; 122 } 123 result = ixgbe_xmit_xdp_ring(adapter, xdpf); 124 break; 125 default: 126 bpf_warn_invalid_xdp_action(act); 127 fallthrough; 128 case XDP_ABORTED: 129 trace_xdp_exception(rx_ring->netdev, xdp_prog, act); 130 fallthrough; /* handle aborts by dropping packet */ 131 case XDP_DROP: 132 result = IXGBE_XDP_CONSUMED; 133 break; 134 } 135 rcu_read_unlock(); 136 return result; 137 } 138 139 bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count) 140 { 141 union ixgbe_adv_rx_desc *rx_desc; 142 struct ixgbe_rx_buffer *bi; 143 u16 i = rx_ring->next_to_use; 144 dma_addr_t dma; 145 bool ok = true; 146 147 /* nothing to do */ 148 if (!count) 149 return true; 150 151 rx_desc = IXGBE_RX_DESC(rx_ring, i); 152 bi = &rx_ring->rx_buffer_info[i]; 153 i -= rx_ring->count; 154 155 do { 156 bi->xdp = xsk_buff_alloc(rx_ring->xsk_pool); 157 if (!bi->xdp) { 158 ok = false; 159 break; 160 } 161 162 dma = xsk_buff_xdp_get_dma(bi->xdp); 163 164 /* Refresh the desc even if buffer_addrs didn't change 165 * because each write-back erases this info. 166 */ 167 rx_desc->read.pkt_addr = cpu_to_le64(dma); 168 169 rx_desc++; 170 bi++; 171 i++; 172 if (unlikely(!i)) { 173 rx_desc = IXGBE_RX_DESC(rx_ring, 0); 174 bi = rx_ring->rx_buffer_info; 175 i -= rx_ring->count; 176 } 177 178 /* clear the length for the next_to_use descriptor */ 179 rx_desc->wb.upper.length = 0; 180 181 count--; 182 } while (count); 183 184 i += rx_ring->count; 185 186 if (rx_ring->next_to_use != i) { 187 rx_ring->next_to_use = i; 188 189 /* Force memory writes to complete before letting h/w 190 * know there are new descriptors to fetch. (Only 191 * applicable for weak-ordered memory model archs, 192 * such as IA-64). 193 */ 194 wmb(); 195 writel(i, rx_ring->tail); 196 } 197 198 return ok; 199 } 200 201 static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring, 202 struct ixgbe_rx_buffer *bi) 203 { 204 unsigned int metasize = bi->xdp->data - bi->xdp->data_meta; 205 unsigned int datasize = bi->xdp->data_end - bi->xdp->data; 206 struct sk_buff *skb; 207 208 /* allocate a skb to store the frags */ 209 skb = __napi_alloc_skb(&rx_ring->q_vector->napi, 210 bi->xdp->data_end - bi->xdp->data_hard_start, 211 GFP_ATOMIC | __GFP_NOWARN); 212 if (unlikely(!skb)) 213 return NULL; 214 215 skb_reserve(skb, bi->xdp->data - bi->xdp->data_hard_start); 216 memcpy(__skb_put(skb, datasize), bi->xdp->data, datasize); 217 if (metasize) 218 skb_metadata_set(skb, metasize); 219 220 xsk_buff_free(bi->xdp); 221 bi->xdp = NULL; 222 return skb; 223 } 224 225 static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring) 226 { 227 u32 ntc = rx_ring->next_to_clean + 1; 228 229 ntc = (ntc < rx_ring->count) ? ntc : 0; 230 rx_ring->next_to_clean = ntc; 231 prefetch(IXGBE_RX_DESC(rx_ring, ntc)); 232 } 233 234 int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector, 235 struct ixgbe_ring *rx_ring, 236 const int budget) 237 { 238 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 239 struct ixgbe_adapter *adapter = q_vector->adapter; 240 u16 cleaned_count = ixgbe_desc_unused(rx_ring); 241 unsigned int xdp_res, xdp_xmit = 0; 242 bool failure = false; 243 struct sk_buff *skb; 244 245 while (likely(total_rx_packets < budget)) { 246 union ixgbe_adv_rx_desc *rx_desc; 247 struct ixgbe_rx_buffer *bi; 248 unsigned int size; 249 250 /* return some buffers to hardware, one at a time is too slow */ 251 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) { 252 failure = failure || 253 !ixgbe_alloc_rx_buffers_zc(rx_ring, 254 cleaned_count); 255 cleaned_count = 0; 256 } 257 258 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean); 259 size = le16_to_cpu(rx_desc->wb.upper.length); 260 if (!size) 261 break; 262 263 /* This memory barrier is needed to keep us from reading 264 * any other fields out of the rx_desc until we know the 265 * descriptor has been written back 266 */ 267 dma_rmb(); 268 269 bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; 270 271 if (unlikely(!ixgbe_test_staterr(rx_desc, 272 IXGBE_RXD_STAT_EOP))) { 273 struct ixgbe_rx_buffer *next_bi; 274 275 xsk_buff_free(bi->xdp); 276 bi->xdp = NULL; 277 ixgbe_inc_ntc(rx_ring); 278 next_bi = 279 &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; 280 next_bi->discard = true; 281 continue; 282 } 283 284 if (unlikely(bi->discard)) { 285 xsk_buff_free(bi->xdp); 286 bi->xdp = NULL; 287 bi->discard = false; 288 ixgbe_inc_ntc(rx_ring); 289 continue; 290 } 291 292 bi->xdp->data_end = bi->xdp->data + size; 293 xsk_buff_dma_sync_for_cpu(bi->xdp, rx_ring->xsk_pool); 294 xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, bi->xdp); 295 296 if (xdp_res) { 297 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) 298 xdp_xmit |= xdp_res; 299 else 300 xsk_buff_free(bi->xdp); 301 302 bi->xdp = NULL; 303 total_rx_packets++; 304 total_rx_bytes += size; 305 306 cleaned_count++; 307 ixgbe_inc_ntc(rx_ring); 308 continue; 309 } 310 311 /* XDP_PASS path */ 312 skb = ixgbe_construct_skb_zc(rx_ring, bi); 313 if (!skb) { 314 rx_ring->rx_stats.alloc_rx_buff_failed++; 315 break; 316 } 317 318 cleaned_count++; 319 ixgbe_inc_ntc(rx_ring); 320 321 if (eth_skb_pad(skb)) 322 continue; 323 324 total_rx_bytes += skb->len; 325 total_rx_packets++; 326 327 ixgbe_process_skb_fields(rx_ring, rx_desc, skb); 328 ixgbe_rx_skb(q_vector, skb); 329 } 330 331 if (xdp_xmit & IXGBE_XDP_REDIR) 332 xdp_do_flush_map(); 333 334 if (xdp_xmit & IXGBE_XDP_TX) { 335 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()]; 336 337 /* Force memory writes to complete before letting h/w 338 * know there are new descriptors to fetch. 339 */ 340 wmb(); 341 writel(ring->next_to_use, ring->tail); 342 } 343 344 u64_stats_update_begin(&rx_ring->syncp); 345 rx_ring->stats.packets += total_rx_packets; 346 rx_ring->stats.bytes += total_rx_bytes; 347 u64_stats_update_end(&rx_ring->syncp); 348 q_vector->rx.total_packets += total_rx_packets; 349 q_vector->rx.total_bytes += total_rx_bytes; 350 351 if (xsk_uses_need_wakeup(rx_ring->xsk_pool)) { 352 if (failure || rx_ring->next_to_clean == rx_ring->next_to_use) 353 xsk_set_rx_need_wakeup(rx_ring->xsk_pool); 354 else 355 xsk_clear_rx_need_wakeup(rx_ring->xsk_pool); 356 357 return (int)total_rx_packets; 358 } 359 return failure ? budget : (int)total_rx_packets; 360 } 361 362 void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring) 363 { 364 struct ixgbe_rx_buffer *bi; 365 u16 i; 366 367 for (i = 0; i < rx_ring->count; i++) { 368 bi = &rx_ring->rx_buffer_info[i]; 369 370 if (!bi->xdp) 371 continue; 372 373 xsk_buff_free(bi->xdp); 374 bi->xdp = NULL; 375 } 376 } 377 378 static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget) 379 { 380 struct xsk_buff_pool *pool = xdp_ring->xsk_pool; 381 union ixgbe_adv_tx_desc *tx_desc = NULL; 382 struct ixgbe_tx_buffer *tx_bi; 383 bool work_done = true; 384 struct xdp_desc desc; 385 dma_addr_t dma; 386 u32 cmd_type; 387 388 while (budget-- > 0) { 389 if (unlikely(!ixgbe_desc_unused(xdp_ring)) || 390 !netif_carrier_ok(xdp_ring->netdev)) { 391 work_done = false; 392 break; 393 } 394 395 if (!xsk_tx_peek_desc(pool, &desc)) 396 break; 397 398 dma = xsk_buff_raw_get_dma(pool, desc.addr); 399 xsk_buff_raw_dma_sync_for_device(pool, dma, desc.len); 400 401 tx_bi = &xdp_ring->tx_buffer_info[xdp_ring->next_to_use]; 402 tx_bi->bytecount = desc.len; 403 tx_bi->xdpf = NULL; 404 tx_bi->gso_segs = 1; 405 406 tx_desc = IXGBE_TX_DESC(xdp_ring, xdp_ring->next_to_use); 407 tx_desc->read.buffer_addr = cpu_to_le64(dma); 408 409 /* put descriptor type bits */ 410 cmd_type = IXGBE_ADVTXD_DTYP_DATA | 411 IXGBE_ADVTXD_DCMD_DEXT | 412 IXGBE_ADVTXD_DCMD_IFCS; 413 cmd_type |= desc.len | IXGBE_TXD_CMD; 414 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); 415 tx_desc->read.olinfo_status = 416 cpu_to_le32(desc.len << IXGBE_ADVTXD_PAYLEN_SHIFT); 417 418 xdp_ring->next_to_use++; 419 if (xdp_ring->next_to_use == xdp_ring->count) 420 xdp_ring->next_to_use = 0; 421 } 422 423 if (tx_desc) { 424 ixgbe_xdp_ring_update_tail(xdp_ring); 425 xsk_tx_release(pool); 426 } 427 428 return !!budget && work_done; 429 } 430 431 static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring, 432 struct ixgbe_tx_buffer *tx_bi) 433 { 434 xdp_return_frame(tx_bi->xdpf); 435 dma_unmap_single(tx_ring->dev, 436 dma_unmap_addr(tx_bi, dma), 437 dma_unmap_len(tx_bi, len), DMA_TO_DEVICE); 438 dma_unmap_len_set(tx_bi, len, 0); 439 } 440 441 bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector, 442 struct ixgbe_ring *tx_ring, int napi_budget) 443 { 444 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use; 445 unsigned int total_packets = 0, total_bytes = 0; 446 struct xsk_buff_pool *pool = tx_ring->xsk_pool; 447 union ixgbe_adv_tx_desc *tx_desc; 448 struct ixgbe_tx_buffer *tx_bi; 449 u32 xsk_frames = 0; 450 451 tx_bi = &tx_ring->tx_buffer_info[ntc]; 452 tx_desc = IXGBE_TX_DESC(tx_ring, ntc); 453 454 while (ntc != ntu) { 455 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 456 break; 457 458 total_bytes += tx_bi->bytecount; 459 total_packets += tx_bi->gso_segs; 460 461 if (tx_bi->xdpf) 462 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi); 463 else 464 xsk_frames++; 465 466 tx_bi->xdpf = NULL; 467 468 tx_bi++; 469 tx_desc++; 470 ntc++; 471 if (unlikely(ntc == tx_ring->count)) { 472 ntc = 0; 473 tx_bi = tx_ring->tx_buffer_info; 474 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 475 } 476 477 /* issue prefetch for next Tx descriptor */ 478 prefetch(tx_desc); 479 } 480 481 tx_ring->next_to_clean = ntc; 482 483 u64_stats_update_begin(&tx_ring->syncp); 484 tx_ring->stats.bytes += total_bytes; 485 tx_ring->stats.packets += total_packets; 486 u64_stats_update_end(&tx_ring->syncp); 487 q_vector->tx.total_bytes += total_bytes; 488 q_vector->tx.total_packets += total_packets; 489 490 if (xsk_frames) 491 xsk_tx_completed(pool, xsk_frames); 492 493 if (xsk_uses_need_wakeup(pool)) 494 xsk_set_tx_need_wakeup(pool); 495 496 return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit); 497 } 498 499 int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags) 500 { 501 struct ixgbe_adapter *adapter = netdev_priv(dev); 502 struct ixgbe_ring *ring; 503 504 if (test_bit(__IXGBE_DOWN, &adapter->state)) 505 return -ENETDOWN; 506 507 if (!READ_ONCE(adapter->xdp_prog)) 508 return -ENXIO; 509 510 if (qid >= adapter->num_xdp_queues) 511 return -ENXIO; 512 513 ring = adapter->xdp_ring[qid]; 514 515 if (test_bit(__IXGBE_TX_DISABLED, &ring->state)) 516 return -ENETDOWN; 517 518 if (!ring->xsk_pool) 519 return -ENXIO; 520 521 if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) { 522 u64 eics = BIT_ULL(ring->q_vector->v_idx); 523 524 ixgbe_irq_rearm_queues(adapter, eics); 525 } 526 527 return 0; 528 } 529 530 void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring) 531 { 532 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use; 533 struct xsk_buff_pool *pool = tx_ring->xsk_pool; 534 struct ixgbe_tx_buffer *tx_bi; 535 u32 xsk_frames = 0; 536 537 while (ntc != ntu) { 538 tx_bi = &tx_ring->tx_buffer_info[ntc]; 539 540 if (tx_bi->xdpf) 541 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi); 542 else 543 xsk_frames++; 544 545 tx_bi->xdpf = NULL; 546 547 ntc++; 548 if (ntc == tx_ring->count) 549 ntc = 0; 550 } 551 552 if (xsk_frames) 553 xsk_tx_completed(pool, xsk_frames); 554 } 555