1 /*******************************************************************************
2 
3   Intel 10 Gigabit PCI Express Linux driver
4   Copyright(c) 1999 - 2013 Intel Corporation.
5 
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9 
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14 
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21 
22   Contact Information:
23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 
26 *******************************************************************************/
27 
28 #ifndef _IXGBE_FCOE_H
29 #define _IXGBE_FCOE_H
30 
31 #include <scsi/fc/fc_fs.h>
32 #include <scsi/fc/fc_fcoe.h>
33 
34 /* shift bits within STAT fo FCSTAT */
35 #define IXGBE_RXDADV_FCSTAT_SHIFT	4
36 
37 /* ddp user buffer */
38 #define IXGBE_BUFFCNT_MAX	256	/* 8 bits bufcnt */
39 #define IXGBE_FCPTR_ALIGN	16
40 #define IXGBE_FCPTR_MAX	(IXGBE_BUFFCNT_MAX * sizeof(dma_addr_t))
41 #define IXGBE_FCBUFF_4KB	0x0
42 #define IXGBE_FCBUFF_8KB	0x1
43 #define IXGBE_FCBUFF_16KB	0x2
44 #define IXGBE_FCBUFF_64KB	0x3
45 #define IXGBE_FCBUFF_MAX	65536	/* 64KB max */
46 #define IXGBE_FCBUFF_MIN	4096	/* 4KB min */
47 #define IXGBE_FCOE_DDP_MAX	512	/* 9 bits xid */
48 
49 /* Default traffic class to use for FCoE */
50 #define IXGBE_FCOE_DEFTC	3
51 
52 /* fcerr */
53 #define IXGBE_FCERR_BADCRC       0x00100000
54 
55 /* FCoE DDP for target mode */
56 #define __IXGBE_FCOE_TARGET	1
57 
58 struct ixgbe_fcoe_ddp {
59 	int len;
60 	u32 err;
61 	unsigned int sgc;
62 	struct scatterlist *sgl;
63 	dma_addr_t udp;
64 	u64 *udl;
65 	struct dma_pool *pool;
66 };
67 
68 /* per cpu variables */
69 struct ixgbe_fcoe_ddp_pool {
70 	struct dma_pool *pool;
71 	u64 noddp;
72 	u64 noddp_ext_buff;
73 };
74 
75 struct ixgbe_fcoe {
76 	struct ixgbe_fcoe_ddp_pool __percpu *ddp_pool;
77 	atomic_t refcnt;
78 	spinlock_t lock;
79 	struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX];
80 	void *extra_ddp_buffer;
81 	dma_addr_t extra_ddp_buffer_dma;
82 	unsigned long mode;
83 #ifdef CONFIG_IXGBE_DCB
84 	u8 up;
85 #endif
86 };
87 
88 #endif /* _IXGBE_FCOE_H */
89