1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /******************************************************************************* 3 4 Intel 10 Gigabit PCI Express Linux driver 5 Copyright(c) 1999 - 2016 Intel Corporation. 6 7 This program is free software; you can redistribute it and/or modify it 8 under the terms and conditions of the GNU General Public License, 9 version 2, as published by the Free Software Foundation. 10 11 This program is distributed in the hope it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 more details. 15 16 You should have received a copy of the GNU General Public License along with 17 this program; if not, write to the Free Software Foundation, Inc., 18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 19 20 The full GNU General Public License is included in this distribution in 21 the file called "COPYING". 22 23 Contact Information: 24 Linux NICS <linux.nics@intel.com> 25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 27 28 *******************************************************************************/ 29 30 #ifndef _IXGBE_COMMON_H_ 31 #define _IXGBE_COMMON_H_ 32 33 #include "ixgbe_type.h" 34 #include "ixgbe.h" 35 36 u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); 37 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw); 38 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw); 39 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw); 40 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw); 41 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); 42 s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, 43 u32 pba_num_size); 44 s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); 45 enum ixgbe_bus_width ixgbe_convert_bus_width(u16 link_status); 46 enum ixgbe_bus_speed ixgbe_convert_bus_speed(u16 link_status); 47 s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); 48 void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); 49 s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); 50 51 s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index); 52 s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index); 53 s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw); 54 55 s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw); 56 s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 57 s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 58 u16 words, u16 *data); 59 s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data); 60 s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset, 61 u16 words, u16 *data); 62 s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 63 s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, 64 u16 words, u16 *data); 65 s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 66 u16 *data); 67 s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 68 u16 words, u16 *data); 69 s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); 70 s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, 71 u16 *checksum_val); 72 s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); 73 74 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 75 u32 enable_addr); 76 s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); 77 s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); 78 s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, 79 struct net_device *netdev); 80 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); 81 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); 82 s32 ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw); 83 s32 ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw); 84 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); 85 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw); 86 s32 ixgbe_setup_fc_generic(struct ixgbe_hw *); 87 bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); 88 void ixgbe_fc_autoneg(struct ixgbe_hw *hw); 89 90 s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask); 91 void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask); 92 s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); 93 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 94 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq); 95 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 96 s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); 97 s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, 98 u32 vind, bool vlan_on, bool vlvf_bypass); 99 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); 100 s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, 101 ixgbe_link_speed *speed, 102 bool *link_up, bool link_up_wait_to_complete); 103 s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, 104 u16 *wwpn_prefix); 105 106 s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val); 107 s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked); 108 109 s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); 110 s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); 111 void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); 112 void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); 113 s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps); 114 s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, 115 u8 build, u8 ver, u16 len, const char *str); 116 u8 ixgbe_calculate_checksum(u8 *buffer, u32 length); 117 s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, void *, u32 length, 118 u32 timeout, bool return_data); 119 s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 len, u32 timeout); 120 s32 ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity, 121 u32 (*data)[FW_PHY_ACT_DATA_COUNT]); 122 void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); 123 bool ixgbe_mng_present(struct ixgbe_hw *hw); 124 bool ixgbe_mng_enabled(struct ixgbe_hw *hw); 125 126 void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, 127 u32 headroom, int strategy); 128 129 extern const u32 ixgbe_mvals_8259X[IXGBE_MVALS_IDX_LIMIT]; 130 131 #define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8 132 #define IXGBE_EMC_INTERNAL_DATA 0x00 133 #define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20 134 #define IXGBE_EMC_DIODE1_DATA 0x01 135 #define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19 136 #define IXGBE_EMC_DIODE2_DATA 0x23 137 #define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A 138 #define IXGBE_EMC_DIODE3_DATA 0x2A 139 #define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30 140 141 s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw); 142 s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw); 143 void ixgbe_get_etk_id(struct ixgbe_hw *hw, 144 struct ixgbe_nvm_version *nvm_ver); 145 void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw, 146 struct ixgbe_nvm_version *nvm_ver); 147 void ixgbe_get_orom_version(struct ixgbe_hw *hw, 148 struct ixgbe_nvm_version *nvm_ver); 149 void ixgbe_disable_rx_generic(struct ixgbe_hw *hw); 150 void ixgbe_enable_rx_generic(struct ixgbe_hw *hw); 151 s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, 152 ixgbe_link_speed speed, 153 bool autoneg_wait_to_complete); 154 void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw, 155 ixgbe_link_speed speed); 156 157 #define IXGBE_FAILED_READ_RETRIES 5 158 #define IXGBE_FAILED_READ_REG 0xffffffffU 159 #define IXGBE_FAILED_READ_CFG_DWORD 0xffffffffU 160 #define IXGBE_FAILED_READ_CFG_WORD 0xffffU 161 162 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg); 163 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value); 164 165 static inline bool ixgbe_removed(void __iomem *addr) 166 { 167 return unlikely(!addr); 168 } 169 170 static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value) 171 { 172 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); 173 174 if (ixgbe_removed(reg_addr)) 175 return; 176 writel(value, reg_addr + reg); 177 } 178 #define IXGBE_WRITE_REG(a, reg, value) ixgbe_write_reg((a), (reg), (value)) 179 180 #ifndef writeq 181 #define writeq writeq 182 static inline void writeq(u64 val, void __iomem *addr) 183 { 184 writel((u32)val, addr); 185 writel((u32)(val >> 32), addr + 4); 186 } 187 #endif 188 189 static inline void ixgbe_write_reg64(struct ixgbe_hw *hw, u32 reg, u64 value) 190 { 191 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); 192 193 if (ixgbe_removed(reg_addr)) 194 return; 195 writeq(value, reg_addr + reg); 196 } 197 #define IXGBE_WRITE_REG64(a, reg, value) ixgbe_write_reg64((a), (reg), (value)) 198 199 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg); 200 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg((a), (reg)) 201 202 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) \ 203 ixgbe_write_reg((a), (reg) + ((offset) << 2), (value)) 204 205 #define IXGBE_READ_REG_ARRAY(a, reg, offset) \ 206 ixgbe_read_reg((a), (reg) + ((offset) << 2)) 207 208 #define IXGBE_WRITE_FLUSH(a) ixgbe_read_reg((a), IXGBE_STATUS) 209 210 #define ixgbe_hw_to_netdev(hw) (((struct ixgbe_adapter *)(hw)->back)->netdev) 211 212 #define hw_dbg(hw, format, arg...) \ 213 netdev_dbg(ixgbe_hw_to_netdev(hw), format, ## arg) 214 #define hw_err(hw, format, arg...) \ 215 netdev_err(ixgbe_hw_to_netdev(hw), format, ## arg) 216 #define e_dev_info(format, arg...) \ 217 dev_info(&adapter->pdev->dev, format, ## arg) 218 #define e_dev_warn(format, arg...) \ 219 dev_warn(&adapter->pdev->dev, format, ## arg) 220 #define e_dev_err(format, arg...) \ 221 dev_err(&adapter->pdev->dev, format, ## arg) 222 #define e_dev_notice(format, arg...) \ 223 dev_notice(&adapter->pdev->dev, format, ## arg) 224 #define e_info(msglvl, format, arg...) \ 225 netif_info(adapter, msglvl, adapter->netdev, format, ## arg) 226 #define e_err(msglvl, format, arg...) \ 227 netif_err(adapter, msglvl, adapter->netdev, format, ## arg) 228 #define e_warn(msglvl, format, arg...) \ 229 netif_warn(adapter, msglvl, adapter->netdev, format, ## arg) 230 #define e_crit(msglvl, format, arg...) \ 231 netif_crit(adapter, msglvl, adapter->netdev, format, ## arg) 232 #endif /* IXGBE_COMMON */ 233