1d89f8841SSasha Neftin /* SPDX-License-Identifier: GPL-2.0 */ 2d89f8841SSasha Neftin /* Copyright (c) 2018 Intel Corporation */ 3d89f8841SSasha Neftin 4d89f8841SSasha Neftin #ifndef _IGC_HW_H_ 5d89f8841SSasha Neftin #define _IGC_HW_H_ 6d89f8841SSasha Neftin 7146740f9SSasha Neftin #include <linux/types.h> 8146740f9SSasha Neftin #include <linux/if_ether.h> 9146740f9SSasha Neftin #include "igc_regs.h" 10146740f9SSasha Neftin #include "igc_defines.h" 11146740f9SSasha Neftin #include "igc_mac.h" 12146740f9SSasha Neftin #include "igc_i225.h" 13146740f9SSasha Neftin 14d89f8841SSasha Neftin #define IGC_DEV_ID_I225_LM 0x15F2 15d89f8841SSasha Neftin #define IGC_DEV_ID_I225_V 0x15F3 16d89f8841SSasha Neftin 17146740f9SSasha Neftin /* Function pointers for the MAC. */ 18146740f9SSasha Neftin struct igc_mac_operations { 19146740f9SSasha Neftin }; 20146740f9SSasha Neftin 21146740f9SSasha Neftin enum igc_mac_type { 22146740f9SSasha Neftin igc_undefined = 0, 23146740f9SSasha Neftin igc_i225, 24146740f9SSasha Neftin igc_num_macs /* List is 1-based, so subtract 1 for true count. */ 25146740f9SSasha Neftin }; 26146740f9SSasha Neftin 27146740f9SSasha Neftin enum igc_phy_type { 28146740f9SSasha Neftin igc_phy_unknown = 0, 29146740f9SSasha Neftin igc_phy_none, 30146740f9SSasha Neftin igc_phy_i225, 31146740f9SSasha Neftin }; 32146740f9SSasha Neftin 33146740f9SSasha Neftin struct igc_mac_info { 34146740f9SSasha Neftin struct igc_mac_operations ops; 35146740f9SSasha Neftin 36146740f9SSasha Neftin u8 addr[ETH_ALEN]; 37146740f9SSasha Neftin u8 perm_addr[ETH_ALEN]; 38146740f9SSasha Neftin 39146740f9SSasha Neftin enum igc_mac_type type; 40146740f9SSasha Neftin 41146740f9SSasha Neftin u32 collision_delta; 42146740f9SSasha Neftin u32 ledctl_default; 43146740f9SSasha Neftin u32 ledctl_mode1; 44146740f9SSasha Neftin u32 ledctl_mode2; 45146740f9SSasha Neftin u32 mc_filter_type; 46146740f9SSasha Neftin u32 tx_packet_delta; 47146740f9SSasha Neftin u32 txcw; 48146740f9SSasha Neftin 49146740f9SSasha Neftin u16 mta_reg_count; 50146740f9SSasha Neftin u16 uta_reg_count; 51146740f9SSasha Neftin 52146740f9SSasha Neftin u16 rar_entry_count; 53146740f9SSasha Neftin 54146740f9SSasha Neftin u8 forced_speed_duplex; 55146740f9SSasha Neftin 56146740f9SSasha Neftin bool adaptive_ifs; 57146740f9SSasha Neftin bool has_fwsm; 58146740f9SSasha Neftin bool arc_subsystem_valid; 59146740f9SSasha Neftin 60146740f9SSasha Neftin bool autoneg; 61146740f9SSasha Neftin bool autoneg_failed; 62c9a11c23SSasha Neftin bool get_link_status; 63146740f9SSasha Neftin }; 64146740f9SSasha Neftin 65146740f9SSasha Neftin struct igc_bus_info { 66146740f9SSasha Neftin u16 func; 67146740f9SSasha Neftin u16 pci_cmd_word; 68146740f9SSasha Neftin }; 69146740f9SSasha Neftin 70146740f9SSasha Neftin struct igc_hw { 71146740f9SSasha Neftin void *back; 72146740f9SSasha Neftin 73146740f9SSasha Neftin u8 __iomem *hw_addr; 74146740f9SSasha Neftin unsigned long io_base; 75146740f9SSasha Neftin 76146740f9SSasha Neftin struct igc_mac_info mac; 77146740f9SSasha Neftin 78146740f9SSasha Neftin struct igc_bus_info bus; 79146740f9SSasha Neftin 80146740f9SSasha Neftin u16 device_id; 81146740f9SSasha Neftin u16 subsystem_vendor_id; 82146740f9SSasha Neftin u16 subsystem_device_id; 83146740f9SSasha Neftin u16 vendor_id; 84146740f9SSasha Neftin 85146740f9SSasha Neftin u8 revision_id; 86146740f9SSasha Neftin }; 87146740f9SSasha Neftin 883df25e4cSSasha Neftin /* Statistics counters collected by the MAC */ 893df25e4cSSasha Neftin struct igc_hw_stats { 903df25e4cSSasha Neftin u64 crcerrs; 913df25e4cSSasha Neftin u64 algnerrc; 923df25e4cSSasha Neftin u64 symerrs; 933df25e4cSSasha Neftin u64 rxerrc; 943df25e4cSSasha Neftin u64 mpc; 953df25e4cSSasha Neftin u64 scc; 963df25e4cSSasha Neftin u64 ecol; 973df25e4cSSasha Neftin u64 mcc; 983df25e4cSSasha Neftin u64 latecol; 993df25e4cSSasha Neftin u64 colc; 1003df25e4cSSasha Neftin u64 dc; 1013df25e4cSSasha Neftin u64 tncrs; 1023df25e4cSSasha Neftin u64 sec; 1033df25e4cSSasha Neftin u64 cexterr; 1043df25e4cSSasha Neftin u64 rlec; 1053df25e4cSSasha Neftin u64 xonrxc; 1063df25e4cSSasha Neftin u64 xontxc; 1073df25e4cSSasha Neftin u64 xoffrxc; 1083df25e4cSSasha Neftin u64 xofftxc; 1093df25e4cSSasha Neftin u64 fcruc; 1103df25e4cSSasha Neftin u64 prc64; 1113df25e4cSSasha Neftin u64 prc127; 1123df25e4cSSasha Neftin u64 prc255; 1133df25e4cSSasha Neftin u64 prc511; 1143df25e4cSSasha Neftin u64 prc1023; 1153df25e4cSSasha Neftin u64 prc1522; 1163df25e4cSSasha Neftin u64 gprc; 1173df25e4cSSasha Neftin u64 bprc; 1183df25e4cSSasha Neftin u64 mprc; 1193df25e4cSSasha Neftin u64 gptc; 1203df25e4cSSasha Neftin u64 gorc; 1213df25e4cSSasha Neftin u64 gotc; 1223df25e4cSSasha Neftin u64 rnbc; 1233df25e4cSSasha Neftin u64 ruc; 1243df25e4cSSasha Neftin u64 rfc; 1253df25e4cSSasha Neftin u64 roc; 1263df25e4cSSasha Neftin u64 rjc; 1273df25e4cSSasha Neftin u64 mgprc; 1283df25e4cSSasha Neftin u64 mgpdc; 1293df25e4cSSasha Neftin u64 mgptc; 1303df25e4cSSasha Neftin u64 tor; 1313df25e4cSSasha Neftin u64 tot; 1323df25e4cSSasha Neftin u64 tpr; 1333df25e4cSSasha Neftin u64 tpt; 1343df25e4cSSasha Neftin u64 ptc64; 1353df25e4cSSasha Neftin u64 ptc127; 1363df25e4cSSasha Neftin u64 ptc255; 1373df25e4cSSasha Neftin u64 ptc511; 1383df25e4cSSasha Neftin u64 ptc1023; 1393df25e4cSSasha Neftin u64 ptc1522; 1403df25e4cSSasha Neftin u64 mptc; 1413df25e4cSSasha Neftin u64 bptc; 1423df25e4cSSasha Neftin u64 tsctc; 1433df25e4cSSasha Neftin u64 tsctfc; 1443df25e4cSSasha Neftin u64 iac; 1453df25e4cSSasha Neftin u64 icrxptc; 1463df25e4cSSasha Neftin u64 icrxatc; 1473df25e4cSSasha Neftin u64 ictxptc; 1483df25e4cSSasha Neftin u64 ictxatc; 1493df25e4cSSasha Neftin u64 ictxqec; 1503df25e4cSSasha Neftin u64 ictxqmtc; 1513df25e4cSSasha Neftin u64 icrxdmtc; 1523df25e4cSSasha Neftin u64 icrxoc; 1533df25e4cSSasha Neftin u64 cbtmpc; 1543df25e4cSSasha Neftin u64 htdpmc; 1553df25e4cSSasha Neftin u64 cbrdpc; 1563df25e4cSSasha Neftin u64 cbrmpc; 1573df25e4cSSasha Neftin u64 rpthc; 1583df25e4cSSasha Neftin u64 hgptc; 1593df25e4cSSasha Neftin u64 htcbdpc; 1603df25e4cSSasha Neftin u64 hgorc; 1613df25e4cSSasha Neftin u64 hgotc; 1623df25e4cSSasha Neftin u64 lenerrs; 1633df25e4cSSasha Neftin u64 scvpc; 1643df25e4cSSasha Neftin u64 hrmpc; 1653df25e4cSSasha Neftin u64 doosync; 1663df25e4cSSasha Neftin u64 o2bgptc; 1673df25e4cSSasha Neftin u64 o2bspc; 1683df25e4cSSasha Neftin u64 b2ospc; 1693df25e4cSSasha Neftin u64 b2ogprc; 1703df25e4cSSasha Neftin }; 1713df25e4cSSasha Neftin 172146740f9SSasha Neftin s32 igc_read_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value); 173146740f9SSasha Neftin s32 igc_write_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value); 174146740f9SSasha Neftin void igc_read_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value); 175146740f9SSasha Neftin void igc_write_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value); 176146740f9SSasha Neftin 177d89f8841SSasha Neftin #endif /* _IGC_HW_H_ */ 178