1837f08fdSAnirudh Venkataramanan /* SPDX-License-Identifier: GPL-2.0 */ 2837f08fdSAnirudh Venkataramanan /* Copyright (c) 2018, Intel Corporation. */ 3837f08fdSAnirudh Venkataramanan 4837f08fdSAnirudh Venkataramanan #ifndef _ICE_TYPE_H_ 5837f08fdSAnirudh Venkataramanan #define _ICE_TYPE_H_ 6837f08fdSAnirudh Venkataramanan 77ec59eeaSAnirudh Venkataramanan #include "ice_status.h" 87ec59eeaSAnirudh Venkataramanan #include "ice_hw_autogen.h" 97ec59eeaSAnirudh Venkataramanan #include "ice_osdep.h" 107ec59eeaSAnirudh Venkataramanan #include "ice_controlq.h" 11cdedef59SAnirudh Venkataramanan #include "ice_lan_tx_rx.h" 127ec59eeaSAnirudh Venkataramanan 137ec59eeaSAnirudh Venkataramanan /* debug masks - set these bits in hw->debug_mask to control output */ 14f31e4b6fSAnirudh Venkataramanan #define ICE_DBG_INIT BIT_ULL(1) 15cdedef59SAnirudh Venkataramanan #define ICE_DBG_QCTX BIT_ULL(6) 16f31e4b6fSAnirudh Venkataramanan #define ICE_DBG_NVM BIT_ULL(7) 17dc49c772SAnirudh Venkataramanan #define ICE_DBG_LAN BIT_ULL(8) 189c20346bSAnirudh Venkataramanan #define ICE_DBG_SW BIT_ULL(13) 199c20346bSAnirudh Venkataramanan #define ICE_DBG_SCHED BIT_ULL(14) 20f31e4b6fSAnirudh Venkataramanan #define ICE_DBG_RES BIT_ULL(17) 217ec59eeaSAnirudh Venkataramanan #define ICE_DBG_AQ_MSG BIT_ULL(24) 227ec59eeaSAnirudh Venkataramanan #define ICE_DBG_AQ_CMD BIT_ULL(27) 237ec59eeaSAnirudh Venkataramanan 24f31e4b6fSAnirudh Venkataramanan enum ice_aq_res_ids { 25f31e4b6fSAnirudh Venkataramanan ICE_NVM_RES_ID = 1, 26f31e4b6fSAnirudh Venkataramanan ICE_SPD_RES_ID, 27f31e4b6fSAnirudh Venkataramanan ICE_GLOBAL_CFG_LOCK_RES_ID, 28f31e4b6fSAnirudh Venkataramanan ICE_CHANGE_LOCK_RES_ID 29f31e4b6fSAnirudh Venkataramanan }; 30f31e4b6fSAnirudh Venkataramanan 31f31e4b6fSAnirudh Venkataramanan enum ice_aq_res_access_type { 32f31e4b6fSAnirudh Venkataramanan ICE_RES_READ = 1, 33f31e4b6fSAnirudh Venkataramanan ICE_RES_WRITE 34f31e4b6fSAnirudh Venkataramanan }; 35f31e4b6fSAnirudh Venkataramanan 36dc49c772SAnirudh Venkataramanan enum ice_fc_mode { 37dc49c772SAnirudh Venkataramanan ICE_FC_NONE = 0, 38dc49c772SAnirudh Venkataramanan ICE_FC_RX_PAUSE, 39dc49c772SAnirudh Venkataramanan ICE_FC_TX_PAUSE, 40dc49c772SAnirudh Venkataramanan ICE_FC_FULL, 41dc49c772SAnirudh Venkataramanan ICE_FC_PFC, 42dc49c772SAnirudh Venkataramanan ICE_FC_DFLT 43dc49c772SAnirudh Venkataramanan }; 44dc49c772SAnirudh Venkataramanan 45f31e4b6fSAnirudh Venkataramanan /* Various MAC types */ 46f31e4b6fSAnirudh Venkataramanan enum ice_mac_type { 47f31e4b6fSAnirudh Venkataramanan ICE_MAC_UNKNOWN = 0, 48f31e4b6fSAnirudh Venkataramanan ICE_MAC_GENERIC, 49f31e4b6fSAnirudh Venkataramanan }; 50f31e4b6fSAnirudh Venkataramanan 51dc49c772SAnirudh Venkataramanan /* Media Types */ 52dc49c772SAnirudh Venkataramanan enum ice_media_type { 53dc49c772SAnirudh Venkataramanan ICE_MEDIA_UNKNOWN = 0, 54dc49c772SAnirudh Venkataramanan ICE_MEDIA_FIBER, 55dc49c772SAnirudh Venkataramanan ICE_MEDIA_BASET, 56dc49c772SAnirudh Venkataramanan ICE_MEDIA_BACKPLANE, 57dc49c772SAnirudh Venkataramanan ICE_MEDIA_DA, 58dc49c772SAnirudh Venkataramanan }; 59dc49c772SAnirudh Venkataramanan 603a858ba3SAnirudh Venkataramanan enum ice_vsi_type { 613a858ba3SAnirudh Venkataramanan ICE_VSI_PF = 0, 623a858ba3SAnirudh Venkataramanan }; 633a858ba3SAnirudh Venkataramanan 64dc49c772SAnirudh Venkataramanan struct ice_link_status { 65dc49c772SAnirudh Venkataramanan /* Refer to ice_aq_phy_type for bits definition */ 66dc49c772SAnirudh Venkataramanan u64 phy_type_low; 67dc49c772SAnirudh Venkataramanan u16 max_frame_size; 68dc49c772SAnirudh Venkataramanan u16 link_speed; 69dc49c772SAnirudh Venkataramanan bool lse_ena; /* Link Status Event notification */ 70dc49c772SAnirudh Venkataramanan u8 link_info; 71dc49c772SAnirudh Venkataramanan u8 an_info; 72dc49c772SAnirudh Venkataramanan u8 ext_info; 73dc49c772SAnirudh Venkataramanan u8 pacing; 74dc49c772SAnirudh Venkataramanan u8 req_speeds; 75dc49c772SAnirudh Venkataramanan /* Refer to #define from module_type[ICE_MODULE_TYPE_TOTAL_BYTE] of 76dc49c772SAnirudh Venkataramanan * ice_aqc_get_phy_caps structure 77dc49c772SAnirudh Venkataramanan */ 78dc49c772SAnirudh Venkataramanan u8 module_type[ICE_MODULE_TYPE_TOTAL_BYTE]; 79dc49c772SAnirudh Venkataramanan }; 80dc49c772SAnirudh Venkataramanan 81dc49c772SAnirudh Venkataramanan /* PHY info such as phy_type, etc... */ 82dc49c772SAnirudh Venkataramanan struct ice_phy_info { 83dc49c772SAnirudh Venkataramanan struct ice_link_status link_info; 84dc49c772SAnirudh Venkataramanan struct ice_link_status link_info_old; 85dc49c772SAnirudh Venkataramanan u64 phy_type_low; 86dc49c772SAnirudh Venkataramanan enum ice_media_type media_type; 87dc49c772SAnirudh Venkataramanan bool get_link_info; 88dc49c772SAnirudh Venkataramanan }; 89dc49c772SAnirudh Venkataramanan 909c20346bSAnirudh Venkataramanan /* Common HW capabilities for SW use */ 919c20346bSAnirudh Venkataramanan struct ice_hw_common_caps { 929c20346bSAnirudh Venkataramanan /* TX/RX queues */ 939c20346bSAnirudh Venkataramanan u16 num_rxq; /* Number/Total RX queues */ 949c20346bSAnirudh Venkataramanan u16 rxq_first_id; /* First queue ID for RX queues */ 959c20346bSAnirudh Venkataramanan u16 num_txq; /* Number/Total TX queues */ 969c20346bSAnirudh Venkataramanan u16 txq_first_id; /* First queue ID for TX queues */ 979c20346bSAnirudh Venkataramanan 989c20346bSAnirudh Venkataramanan /* MSI-X vectors */ 999c20346bSAnirudh Venkataramanan u16 num_msix_vectors; 1009c20346bSAnirudh Venkataramanan u16 msix_vector_first_id; 1019c20346bSAnirudh Venkataramanan 1029c20346bSAnirudh Venkataramanan /* Max MTU for function or device */ 1039c20346bSAnirudh Venkataramanan u16 max_mtu; 1049c20346bSAnirudh Venkataramanan 1059c20346bSAnirudh Venkataramanan /* RSS related capabilities */ 1069c20346bSAnirudh Venkataramanan u16 rss_table_size; /* 512 for PFs and 64 for VFs */ 1079c20346bSAnirudh Venkataramanan u8 rss_table_entry_width; /* RSS Entry width in bits */ 1089c20346bSAnirudh Venkataramanan }; 1099c20346bSAnirudh Venkataramanan 1109c20346bSAnirudh Venkataramanan /* Function specific capabilities */ 1119c20346bSAnirudh Venkataramanan struct ice_hw_func_caps { 1129c20346bSAnirudh Venkataramanan struct ice_hw_common_caps common_cap; 1139c20346bSAnirudh Venkataramanan u32 guaranteed_num_vsi; 1149c20346bSAnirudh Venkataramanan }; 1159c20346bSAnirudh Venkataramanan 1169c20346bSAnirudh Venkataramanan /* Device wide capabilities */ 1179c20346bSAnirudh Venkataramanan struct ice_hw_dev_caps { 1189c20346bSAnirudh Venkataramanan struct ice_hw_common_caps common_cap; 1199c20346bSAnirudh Venkataramanan u32 num_vsi_allocd_to_host; /* Excluding EMP VSI */ 1209c20346bSAnirudh Venkataramanan }; 1219c20346bSAnirudh Venkataramanan 122dc49c772SAnirudh Venkataramanan /* MAC info */ 123dc49c772SAnirudh Venkataramanan struct ice_mac_info { 124dc49c772SAnirudh Venkataramanan u8 lan_addr[ETH_ALEN]; 125dc49c772SAnirudh Venkataramanan u8 perm_addr[ETH_ALEN]; 126dc49c772SAnirudh Venkataramanan }; 127dc49c772SAnirudh Venkataramanan 128f31e4b6fSAnirudh Venkataramanan /* Various RESET request, These are not tied with HW reset types */ 129f31e4b6fSAnirudh Venkataramanan enum ice_reset_req { 130f31e4b6fSAnirudh Venkataramanan ICE_RESET_PFR = 0, 131f31e4b6fSAnirudh Venkataramanan ICE_RESET_CORER = 1, 132f31e4b6fSAnirudh Venkataramanan ICE_RESET_GLOBR = 2, 133f31e4b6fSAnirudh Venkataramanan }; 134f31e4b6fSAnirudh Venkataramanan 135837f08fdSAnirudh Venkataramanan /* Bus parameters */ 136837f08fdSAnirudh Venkataramanan struct ice_bus_info { 137837f08fdSAnirudh Venkataramanan u16 device; 138837f08fdSAnirudh Venkataramanan u8 func; 139837f08fdSAnirudh Venkataramanan }; 140837f08fdSAnirudh Venkataramanan 141dc49c772SAnirudh Venkataramanan /* Flow control (FC) parameters */ 142dc49c772SAnirudh Venkataramanan struct ice_fc_info { 143dc49c772SAnirudh Venkataramanan enum ice_fc_mode current_mode; /* FC mode in effect */ 144dc49c772SAnirudh Venkataramanan enum ice_fc_mode req_mode; /* FC mode requested by caller */ 145dc49c772SAnirudh Venkataramanan }; 146dc49c772SAnirudh Venkataramanan 147f31e4b6fSAnirudh Venkataramanan /* NVM Information */ 148f31e4b6fSAnirudh Venkataramanan struct ice_nvm_info { 149f31e4b6fSAnirudh Venkataramanan u32 eetrack; /* NVM data version */ 150f31e4b6fSAnirudh Venkataramanan u32 oem_ver; /* OEM version info */ 151f31e4b6fSAnirudh Venkataramanan u16 sr_words; /* Shadow RAM size in words */ 152f31e4b6fSAnirudh Venkataramanan u16 ver; /* NVM package version */ 153f31e4b6fSAnirudh Venkataramanan bool blank_nvm_mode; /* is NVM empty (no FW present) */ 154f31e4b6fSAnirudh Venkataramanan }; 155f31e4b6fSAnirudh Venkataramanan 1569c20346bSAnirudh Venkataramanan /* Max number of port to queue branches w.r.t topology */ 1579c20346bSAnirudh Venkataramanan #define ICE_MAX_TRAFFIC_CLASS 8 158dc49c772SAnirudh Venkataramanan #define ICE_TXSCHED_MAX_BRANCHES ICE_MAX_TRAFFIC_CLASS 1599c20346bSAnirudh Venkataramanan 1609c20346bSAnirudh Venkataramanan struct ice_sched_node { 1619c20346bSAnirudh Venkataramanan struct ice_sched_node *parent; 1629c20346bSAnirudh Venkataramanan struct ice_sched_node *sibling; /* next sibling in the same layer */ 1639c20346bSAnirudh Venkataramanan struct ice_sched_node **children; 1649c20346bSAnirudh Venkataramanan struct ice_aqc_txsched_elem_data info; 1659c20346bSAnirudh Venkataramanan u32 agg_id; /* aggregator group id */ 1669c20346bSAnirudh Venkataramanan u16 vsi_id; 1679c20346bSAnirudh Venkataramanan bool in_use; /* suspended or in use */ 1689c20346bSAnirudh Venkataramanan u8 tx_sched_layer; /* Logical Layer (1-9) */ 1699c20346bSAnirudh Venkataramanan u8 num_children; 1709c20346bSAnirudh Venkataramanan u8 tc_num; 1719c20346bSAnirudh Venkataramanan u8 owner; 1729c20346bSAnirudh Venkataramanan #define ICE_SCHED_NODE_OWNER_LAN 0 1739c20346bSAnirudh Venkataramanan }; 1749c20346bSAnirudh Venkataramanan 175dc49c772SAnirudh Venkataramanan /* Access Macros for Tx Sched Elements data */ 176dc49c772SAnirudh Venkataramanan #define ICE_TXSCHED_GET_NODE_TEID(x) le32_to_cpu((x)->info.node_teid) 177dc49c772SAnirudh Venkataramanan 1789c20346bSAnirudh Venkataramanan /* The aggregator type determines if identifier is for a VSI group, 1799c20346bSAnirudh Venkataramanan * aggregator group, aggregator of queues, or queue group. 1809c20346bSAnirudh Venkataramanan */ 1819c20346bSAnirudh Venkataramanan enum ice_agg_type { 1829c20346bSAnirudh Venkataramanan ICE_AGG_TYPE_UNKNOWN = 0, 1839c20346bSAnirudh Venkataramanan ICE_AGG_TYPE_VSI, 1849c20346bSAnirudh Venkataramanan ICE_AGG_TYPE_AGG, /* aggregator */ 1859c20346bSAnirudh Venkataramanan ICE_AGG_TYPE_Q, 1869c20346bSAnirudh Venkataramanan ICE_AGG_TYPE_QG 1879c20346bSAnirudh Venkataramanan }; 1889c20346bSAnirudh Venkataramanan 1899c20346bSAnirudh Venkataramanan /* vsi type list entry to locate corresponding vsi/ag nodes */ 1909c20346bSAnirudh Venkataramanan struct ice_sched_vsi_info { 1919c20346bSAnirudh Venkataramanan struct ice_sched_node *vsi_node[ICE_MAX_TRAFFIC_CLASS]; 1929c20346bSAnirudh Venkataramanan struct ice_sched_node *ag_node[ICE_MAX_TRAFFIC_CLASS]; 1939c20346bSAnirudh Venkataramanan struct list_head list_entry; 1949c20346bSAnirudh Venkataramanan u16 max_lanq[ICE_MAX_TRAFFIC_CLASS]; 1959c20346bSAnirudh Venkataramanan u16 vsi_id; 1969c20346bSAnirudh Venkataramanan }; 1979c20346bSAnirudh Venkataramanan 1989c20346bSAnirudh Venkataramanan /* driver defines the policy */ 1999c20346bSAnirudh Venkataramanan struct ice_sched_tx_policy { 2009c20346bSAnirudh Venkataramanan u16 max_num_vsis; 2019c20346bSAnirudh Venkataramanan u8 max_num_lan_qs_per_tc[ICE_MAX_TRAFFIC_CLASS]; 2029c20346bSAnirudh Venkataramanan bool rdma_ena; 2039c20346bSAnirudh Venkataramanan }; 2049c20346bSAnirudh Venkataramanan 2059c20346bSAnirudh Venkataramanan struct ice_port_info { 2069c20346bSAnirudh Venkataramanan struct ice_sched_node *root; /* Root Node per Port */ 2079c20346bSAnirudh Venkataramanan struct ice_hw *hw; /* back pointer to hw instance */ 208dc49c772SAnirudh Venkataramanan u32 last_node_teid; /* scheduler last node info */ 2099c20346bSAnirudh Venkataramanan u16 sw_id; /* Initial switch ID belongs to port */ 2109c20346bSAnirudh Venkataramanan u16 pf_vf_num; 2119c20346bSAnirudh Venkataramanan u8 port_state; 2129c20346bSAnirudh Venkataramanan #define ICE_SCHED_PORT_STATE_INIT 0x0 2139c20346bSAnirudh Venkataramanan #define ICE_SCHED_PORT_STATE_READY 0x1 2149c20346bSAnirudh Venkataramanan u16 dflt_tx_vsi_num; 2159c20346bSAnirudh Venkataramanan u16 dflt_rx_vsi_num; 216dc49c772SAnirudh Venkataramanan struct ice_fc_info fc; 217dc49c772SAnirudh Venkataramanan struct ice_mac_info mac; 218dc49c772SAnirudh Venkataramanan struct ice_phy_info phy; 2199c20346bSAnirudh Venkataramanan struct mutex sched_lock; /* protect access to TXSched tree */ 2209c20346bSAnirudh Venkataramanan struct ice_sched_tx_policy sched_policy; 2219c20346bSAnirudh Venkataramanan struct list_head vsi_info_list; 2229c20346bSAnirudh Venkataramanan struct list_head agg_list; /* lists all aggregator */ 2239c20346bSAnirudh Venkataramanan u8 lport; 2249c20346bSAnirudh Venkataramanan #define ICE_LPORT_MASK 0xff 2259c20346bSAnirudh Venkataramanan bool is_vf; 2269c20346bSAnirudh Venkataramanan }; 2279c20346bSAnirudh Venkataramanan 2289daf8208SAnirudh Venkataramanan struct ice_switch_info { 2299daf8208SAnirudh Venkataramanan /* Switch VSI lists to MAC/VLAN translation */ 2309daf8208SAnirudh Venkataramanan struct mutex mac_list_lock; /* protect MAC list */ 2319daf8208SAnirudh Venkataramanan struct list_head mac_list_head; 2329daf8208SAnirudh Venkataramanan struct mutex vlan_list_lock; /* protect VLAN list */ 2339daf8208SAnirudh Venkataramanan struct list_head vlan_list_head; 2349daf8208SAnirudh Venkataramanan struct mutex eth_m_list_lock; /* protect ethtype list */ 2359daf8208SAnirudh Venkataramanan struct list_head eth_m_list_head; 2369daf8208SAnirudh Venkataramanan struct mutex promisc_list_lock; /* protect promisc mode list */ 2379daf8208SAnirudh Venkataramanan struct list_head promisc_list_head; 2389daf8208SAnirudh Venkataramanan struct mutex mac_vlan_list_lock; /* protect MAC-VLAN list */ 2399daf8208SAnirudh Venkataramanan struct list_head mac_vlan_list_head; 2409daf8208SAnirudh Venkataramanan 2419daf8208SAnirudh Venkataramanan struct list_head vsi_list_map_head; 2429daf8208SAnirudh Venkataramanan }; 2439daf8208SAnirudh Venkataramanan 244837f08fdSAnirudh Venkataramanan /* Port hardware description */ 245837f08fdSAnirudh Venkataramanan struct ice_hw { 246837f08fdSAnirudh Venkataramanan u8 __iomem *hw_addr; 247837f08fdSAnirudh Venkataramanan void *back; 2489c20346bSAnirudh Venkataramanan struct ice_aqc_layer_props *layer_info; 2499c20346bSAnirudh Venkataramanan struct ice_port_info *port_info; 2507ec59eeaSAnirudh Venkataramanan u64 debug_mask; /* bitmap for debug mask */ 251f31e4b6fSAnirudh Venkataramanan enum ice_mac_type mac_type; 252837f08fdSAnirudh Venkataramanan 253837f08fdSAnirudh Venkataramanan /* pci info */ 254837f08fdSAnirudh Venkataramanan u16 device_id; 255837f08fdSAnirudh Venkataramanan u16 vendor_id; 256837f08fdSAnirudh Venkataramanan u16 subsystem_device_id; 257837f08fdSAnirudh Venkataramanan u16 subsystem_vendor_id; 258837f08fdSAnirudh Venkataramanan u8 revision_id; 259837f08fdSAnirudh Venkataramanan 260f31e4b6fSAnirudh Venkataramanan u8 pf_id; /* device profile info */ 261f31e4b6fSAnirudh Venkataramanan 2629c20346bSAnirudh Venkataramanan /* TX Scheduler values */ 2639c20346bSAnirudh Venkataramanan u16 num_tx_sched_layers; 2649c20346bSAnirudh Venkataramanan u16 num_tx_sched_phys_layers; 2659c20346bSAnirudh Venkataramanan u8 flattened_layers; 2669c20346bSAnirudh Venkataramanan u8 max_cgds; 2679c20346bSAnirudh Venkataramanan u8 sw_entry_point_layer; 2689c20346bSAnirudh Venkataramanan 2699daf8208SAnirudh Venkataramanan bool evb_veb; /* true for VEB, false for VEPA */ 270837f08fdSAnirudh Venkataramanan struct ice_bus_info bus; 271f31e4b6fSAnirudh Venkataramanan struct ice_nvm_info nvm; 2729c20346bSAnirudh Venkataramanan struct ice_hw_dev_caps dev_caps; /* device capabilities */ 2739c20346bSAnirudh Venkataramanan struct ice_hw_func_caps func_caps; /* function capabilities */ 274f31e4b6fSAnirudh Venkataramanan 2759daf8208SAnirudh Venkataramanan struct ice_switch_info *switch_info; /* switch filter lists */ 2769daf8208SAnirudh Venkataramanan 2777ec59eeaSAnirudh Venkataramanan /* Control Queue info */ 2787ec59eeaSAnirudh Venkataramanan struct ice_ctl_q_info adminq; 2797ec59eeaSAnirudh Venkataramanan 2807ec59eeaSAnirudh Venkataramanan u8 api_branch; /* API branch version */ 2817ec59eeaSAnirudh Venkataramanan u8 api_maj_ver; /* API major version */ 2827ec59eeaSAnirudh Venkataramanan u8 api_min_ver; /* API minor version */ 2837ec59eeaSAnirudh Venkataramanan u8 api_patch; /* API patch version */ 2847ec59eeaSAnirudh Venkataramanan u8 fw_branch; /* firmware branch version */ 2857ec59eeaSAnirudh Venkataramanan u8 fw_maj_ver; /* firmware major version */ 2867ec59eeaSAnirudh Venkataramanan u8 fw_min_ver; /* firmware minor version */ 2877ec59eeaSAnirudh Venkataramanan u8 fw_patch; /* firmware patch version */ 2887ec59eeaSAnirudh Venkataramanan u32 fw_build; /* firmware build number */ 289940b61afSAnirudh Venkataramanan 290940b61afSAnirudh Venkataramanan /* minimum allowed value for different speeds */ 291940b61afSAnirudh Venkataramanan #define ICE_ITR_GRAN_MIN_200 1 292940b61afSAnirudh Venkataramanan #define ICE_ITR_GRAN_MIN_100 1 293940b61afSAnirudh Venkataramanan #define ICE_ITR_GRAN_MIN_50 2 294940b61afSAnirudh Venkataramanan #define ICE_ITR_GRAN_MIN_25 4 295940b61afSAnirudh Venkataramanan /* ITR granularity in 1 us */ 296940b61afSAnirudh Venkataramanan u8 itr_gran_200; 297940b61afSAnirudh Venkataramanan u8 itr_gran_100; 298940b61afSAnirudh Venkataramanan u8 itr_gran_50; 299940b61afSAnirudh Venkataramanan u8 itr_gran_25; 3009daf8208SAnirudh Venkataramanan bool ucast_shared; /* true if VSIs can share unicast addr */ 3019daf8208SAnirudh Venkataramanan 302837f08fdSAnirudh Venkataramanan }; 303837f08fdSAnirudh Venkataramanan 304f31e4b6fSAnirudh Venkataramanan /* Checksum and Shadow RAM pointers */ 305f31e4b6fSAnirudh Venkataramanan #define ICE_SR_NVM_DEV_STARTER_VER 0x18 306f31e4b6fSAnirudh Venkataramanan #define ICE_SR_NVM_EETRACK_LO 0x2D 307f31e4b6fSAnirudh Venkataramanan #define ICE_SR_NVM_EETRACK_HI 0x2E 308f31e4b6fSAnirudh Venkataramanan #define ICE_SR_SECTOR_SIZE_IN_WORDS 0x800 309f31e4b6fSAnirudh Venkataramanan #define ICE_SR_WORDS_IN_1KB 512 310f31e4b6fSAnirudh Venkataramanan 311837f08fdSAnirudh Venkataramanan #endif /* _ICE_TYPE_H_ */ 312