1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019, Intel Corporation. */
3 
4 #include <linux/filter.h>
5 
6 #include "ice_txrx_lib.h"
7 #include "ice_eswitch.h"
8 #include "ice_lib.h"
9 
10 /**
11  * ice_release_rx_desc - Store the new tail and head values
12  * @rx_ring: ring to bump
13  * @val: new head index
14  */
15 void ice_release_rx_desc(struct ice_rx_ring *rx_ring, u16 val)
16 {
17 	u16 prev_ntu = rx_ring->next_to_use & ~0x7;
18 
19 	rx_ring->next_to_use = val;
20 
21 	/* update next to alloc since we have filled the ring */
22 	rx_ring->next_to_alloc = val;
23 
24 	/* QRX_TAIL will be updated with any tail value, but hardware ignores
25 	 * the lower 3 bits. This makes it so we only bump tail on meaningful
26 	 * boundaries. Also, this allows us to bump tail on intervals of 8 up to
27 	 * the budget depending on the current traffic load.
28 	 */
29 	val &= ~0x7;
30 	if (prev_ntu != val) {
31 		/* Force memory writes to complete before letting h/w
32 		 * know there are new descriptors to fetch. (Only
33 		 * applicable for weak-ordered memory model archs,
34 		 * such as IA-64).
35 		 */
36 		wmb();
37 		writel(val, rx_ring->tail);
38 	}
39 }
40 
41 /**
42  * ice_ptype_to_htype - get a hash type
43  * @ptype: the ptype value from the descriptor
44  *
45  * Returns appropriate hash type (such as PKT_HASH_TYPE_L2/L3/L4) to be used by
46  * skb_set_hash based on PTYPE as parsed by HW Rx pipeline and is part of
47  * Rx desc.
48  */
49 static enum pkt_hash_types ice_ptype_to_htype(u16 ptype)
50 {
51 	struct ice_rx_ptype_decoded decoded = ice_decode_rx_desc_ptype(ptype);
52 
53 	if (!decoded.known)
54 		return PKT_HASH_TYPE_NONE;
55 	if (decoded.payload_layer == ICE_RX_PTYPE_PAYLOAD_LAYER_PAY4)
56 		return PKT_HASH_TYPE_L4;
57 	if (decoded.payload_layer == ICE_RX_PTYPE_PAYLOAD_LAYER_PAY3)
58 		return PKT_HASH_TYPE_L3;
59 	if (decoded.outer_ip == ICE_RX_PTYPE_OUTER_L2)
60 		return PKT_HASH_TYPE_L2;
61 
62 	return PKT_HASH_TYPE_NONE;
63 }
64 
65 /**
66  * ice_rx_hash - set the hash value in the skb
67  * @rx_ring: descriptor ring
68  * @rx_desc: specific descriptor
69  * @skb: pointer to current skb
70  * @rx_ptype: the ptype value from the descriptor
71  */
72 static void
73 ice_rx_hash(struct ice_rx_ring *rx_ring, union ice_32b_rx_flex_desc *rx_desc,
74 	    struct sk_buff *skb, u16 rx_ptype)
75 {
76 	struct ice_32b_rx_flex_desc_nic *nic_mdid;
77 	u32 hash;
78 
79 	if (!(rx_ring->netdev->features & NETIF_F_RXHASH))
80 		return;
81 
82 	if (rx_desc->wb.rxdid != ICE_RXDID_FLEX_NIC)
83 		return;
84 
85 	nic_mdid = (struct ice_32b_rx_flex_desc_nic *)rx_desc;
86 	hash = le32_to_cpu(nic_mdid->rss_hash);
87 	skb_set_hash(skb, hash, ice_ptype_to_htype(rx_ptype));
88 }
89 
90 /**
91  * ice_rx_csum - Indicate in skb if checksum is good
92  * @ring: the ring we care about
93  * @skb: skb currently being received and modified
94  * @rx_desc: the receive descriptor
95  * @ptype: the packet type decoded by hardware
96  *
97  * skb->protocol must be set before this function is called
98  */
99 static void
100 ice_rx_csum(struct ice_rx_ring *ring, struct sk_buff *skb,
101 	    union ice_32b_rx_flex_desc *rx_desc, u16 ptype)
102 {
103 	struct ice_rx_ptype_decoded decoded;
104 	u16 rx_status0, rx_status1;
105 	bool ipv4, ipv6;
106 
107 	rx_status0 = le16_to_cpu(rx_desc->wb.status_error0);
108 	rx_status1 = le16_to_cpu(rx_desc->wb.status_error1);
109 
110 	decoded = ice_decode_rx_desc_ptype(ptype);
111 
112 	/* Start with CHECKSUM_NONE and by default csum_level = 0 */
113 	skb->ip_summed = CHECKSUM_NONE;
114 	skb_checksum_none_assert(skb);
115 
116 	/* check if Rx checksum is enabled */
117 	if (!(ring->netdev->features & NETIF_F_RXCSUM))
118 		return;
119 
120 	/* check if HW has decoded the packet and checksum */
121 	if (!(rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_L3L4P_S)))
122 		return;
123 
124 	if (!(decoded.known && decoded.outer_ip))
125 		return;
126 
127 	ipv4 = (decoded.outer_ip == ICE_RX_PTYPE_OUTER_IP) &&
128 	       (decoded.outer_ip_ver == ICE_RX_PTYPE_OUTER_IPV4);
129 	ipv6 = (decoded.outer_ip == ICE_RX_PTYPE_OUTER_IP) &&
130 	       (decoded.outer_ip_ver == ICE_RX_PTYPE_OUTER_IPV6);
131 
132 	if (ipv4 && (rx_status0 & (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_IPE_S) |
133 				   BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S))))
134 		goto checksum_fail;
135 
136 	if (ipv6 && (rx_status0 & (BIT(ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S))))
137 		goto checksum_fail;
138 
139 	/* check for L4 errors and handle packets that were not able to be
140 	 * checksummed due to arrival speed
141 	 */
142 	if (rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_L4E_S))
143 		goto checksum_fail;
144 
145 	/* check for outer UDP checksum error in tunneled packets */
146 	if ((rx_status1 & BIT(ICE_RX_FLEX_DESC_STATUS1_NAT_S)) &&
147 	    (rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S)))
148 		goto checksum_fail;
149 
150 	/* If there is an outer header present that might contain a checksum
151 	 * we need to bump the checksum level by 1 to reflect the fact that
152 	 * we are indicating we validated the inner checksum.
153 	 */
154 	if (decoded.tunnel_type >= ICE_RX_PTYPE_TUNNEL_IP_GRENAT)
155 		skb->csum_level = 1;
156 
157 	/* Only report checksum unnecessary for TCP, UDP, or SCTP */
158 	switch (decoded.inner_prot) {
159 	case ICE_RX_PTYPE_INNER_PROT_TCP:
160 	case ICE_RX_PTYPE_INNER_PROT_UDP:
161 	case ICE_RX_PTYPE_INNER_PROT_SCTP:
162 		skb->ip_summed = CHECKSUM_UNNECESSARY;
163 		break;
164 	default:
165 		break;
166 	}
167 	return;
168 
169 checksum_fail:
170 	ring->vsi->back->hw_csum_rx_error++;
171 }
172 
173 /**
174  * ice_process_skb_fields - Populate skb header fields from Rx descriptor
175  * @rx_ring: Rx descriptor ring packet is being transacted on
176  * @rx_desc: pointer to the EOP Rx descriptor
177  * @skb: pointer to current skb being populated
178  * @ptype: the packet type decoded by hardware
179  *
180  * This function checks the ring, descriptor, and packet information in
181  * order to populate the hash, checksum, VLAN, protocol, and
182  * other fields within the skb.
183  */
184 void
185 ice_process_skb_fields(struct ice_rx_ring *rx_ring,
186 		       union ice_32b_rx_flex_desc *rx_desc,
187 		       struct sk_buff *skb, u16 ptype)
188 {
189 	ice_rx_hash(rx_ring, rx_desc, skb, ptype);
190 
191 	/* modifies the skb - consumes the enet header */
192 	skb->protocol = eth_type_trans(skb, ice_eswitch_get_target_netdev
193 				       (rx_ring, rx_desc));
194 
195 	ice_rx_csum(rx_ring, skb, rx_desc, ptype);
196 
197 	if (rx_ring->ptp_rx)
198 		ice_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
199 }
200 
201 /**
202  * ice_receive_skb - Send a completed packet up the stack
203  * @rx_ring: Rx ring in play
204  * @skb: packet to send up
205  * @vlan_tag: VLAN tag for packet
206  *
207  * This function sends the completed packet (via. skb) up the stack using
208  * gro receive functions (with/without VLAN tag)
209  */
210 void
211 ice_receive_skb(struct ice_rx_ring *rx_ring, struct sk_buff *skb, u16 vlan_tag)
212 {
213 	if ((rx_ring->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
214 	    (vlan_tag & VLAN_VID_MASK))
215 		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
216 	napi_gro_receive(&rx_ring->q_vector->napi, skb);
217 }
218 
219 /**
220  * ice_clean_xdp_irq - Reclaim resources after transmit completes on XDP ring
221  * @xdp_ring: XDP ring to clean
222  */
223 static void ice_clean_xdp_irq(struct ice_tx_ring *xdp_ring)
224 {
225 	unsigned int total_bytes = 0, total_pkts = 0;
226 	u16 ntc = xdp_ring->next_to_clean;
227 	struct ice_tx_desc *next_dd_desc;
228 	u16 next_dd = xdp_ring->next_dd;
229 	struct ice_tx_buf *tx_buf;
230 	int i;
231 
232 	next_dd_desc = ICE_TX_DESC(xdp_ring, next_dd);
233 	if (!(next_dd_desc->cmd_type_offset_bsz &
234 	    cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
235 		return;
236 
237 	for (i = 0; i < ICE_TX_THRESH; i++) {
238 		tx_buf = &xdp_ring->tx_buf[ntc];
239 
240 		total_bytes += tx_buf->bytecount;
241 		/* normally tx_buf->gso_segs was taken but at this point
242 		 * it's always 1 for us
243 		 */
244 		total_pkts++;
245 
246 		page_frag_free(tx_buf->raw_buf);
247 		dma_unmap_single(xdp_ring->dev, dma_unmap_addr(tx_buf, dma),
248 				 dma_unmap_len(tx_buf, len), DMA_TO_DEVICE);
249 		dma_unmap_len_set(tx_buf, len, 0);
250 		tx_buf->raw_buf = NULL;
251 
252 		ntc++;
253 		if (ntc >= xdp_ring->count)
254 			ntc = 0;
255 	}
256 
257 	next_dd_desc->cmd_type_offset_bsz = 0;
258 	xdp_ring->next_dd = xdp_ring->next_dd + ICE_TX_THRESH;
259 	if (xdp_ring->next_dd > xdp_ring->count)
260 		xdp_ring->next_dd = ICE_TX_THRESH - 1;
261 	xdp_ring->next_to_clean = ntc;
262 	ice_update_tx_ring_stats(xdp_ring, total_pkts, total_bytes);
263 }
264 
265 /**
266  * ice_xmit_xdp_ring - submit single packet to XDP ring for transmission
267  * @data: packet data pointer
268  * @size: packet data size
269  * @xdp_ring: XDP ring for transmission
270  */
271 int ice_xmit_xdp_ring(void *data, u16 size, struct ice_tx_ring *xdp_ring)
272 {
273 	u16 i = xdp_ring->next_to_use;
274 	struct ice_tx_desc *tx_desc;
275 	struct ice_tx_buf *tx_buf;
276 	dma_addr_t dma;
277 
278 	if (ICE_DESC_UNUSED(xdp_ring) < ICE_TX_THRESH)
279 		ice_clean_xdp_irq(xdp_ring);
280 
281 	if (!unlikely(ICE_DESC_UNUSED(xdp_ring))) {
282 		xdp_ring->tx_stats.tx_busy++;
283 		return ICE_XDP_CONSUMED;
284 	}
285 
286 	dma = dma_map_single(xdp_ring->dev, data, size, DMA_TO_DEVICE);
287 	if (dma_mapping_error(xdp_ring->dev, dma))
288 		return ICE_XDP_CONSUMED;
289 
290 	tx_buf = &xdp_ring->tx_buf[i];
291 	tx_buf->bytecount = size;
292 	tx_buf->gso_segs = 1;
293 	tx_buf->raw_buf = data;
294 
295 	/* record length, and DMA address */
296 	dma_unmap_len_set(tx_buf, len, size);
297 	dma_unmap_addr_set(tx_buf, dma, dma);
298 
299 	tx_desc = ICE_TX_DESC(xdp_ring, i);
300 	tx_desc->buf_addr = cpu_to_le64(dma);
301 	tx_desc->cmd_type_offset_bsz = ice_build_ctob(ICE_TX_DESC_CMD_EOP, 0,
302 						      size, 0);
303 
304 	i++;
305 	if (i == xdp_ring->count) {
306 		i = 0;
307 		tx_desc = ICE_TX_DESC(xdp_ring, xdp_ring->next_rs);
308 		tx_desc->cmd_type_offset_bsz |=
309 			cpu_to_le64(ICE_TX_DESC_CMD_RS << ICE_TXD_QW1_CMD_S);
310 		xdp_ring->next_rs = ICE_TX_THRESH - 1;
311 	}
312 	xdp_ring->next_to_use = i;
313 
314 	if (i > xdp_ring->next_rs) {
315 		tx_desc = ICE_TX_DESC(xdp_ring, xdp_ring->next_rs);
316 		tx_desc->cmd_type_offset_bsz |=
317 			cpu_to_le64(ICE_TX_DESC_CMD_RS << ICE_TXD_QW1_CMD_S);
318 		xdp_ring->next_rs += ICE_TX_THRESH;
319 	}
320 
321 	return ICE_XDP_TX;
322 }
323 
324 /**
325  * ice_xmit_xdp_buff - convert an XDP buffer to an XDP frame and send it
326  * @xdp: XDP buffer
327  * @xdp_ring: XDP Tx ring
328  *
329  * Returns negative on failure, 0 on success.
330  */
331 int ice_xmit_xdp_buff(struct xdp_buff *xdp, struct ice_tx_ring *xdp_ring)
332 {
333 	struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
334 
335 	if (unlikely(!xdpf))
336 		return ICE_XDP_CONSUMED;
337 
338 	return ice_xmit_xdp_ring(xdpf->data, xdpf->len, xdp_ring);
339 }
340 
341 /**
342  * ice_finalize_xdp_rx - Bump XDP Tx tail and/or flush redirect map
343  * @xdp_ring: XDP ring
344  * @xdp_res: Result of the receive batch
345  *
346  * This function bumps XDP Tx tail and/or flush redirect map, and
347  * should be called when a batch of packets has been processed in the
348  * napi loop.
349  */
350 void ice_finalize_xdp_rx(struct ice_tx_ring *xdp_ring, unsigned int xdp_res)
351 {
352 	if (xdp_res & ICE_XDP_REDIR)
353 		xdp_do_flush_map();
354 
355 	if (xdp_res & ICE_XDP_TX) {
356 		if (static_branch_unlikely(&ice_xdp_locking_key))
357 			spin_lock(&xdp_ring->tx_lock);
358 		ice_xdp_ring_update_tail(xdp_ring);
359 		if (static_branch_unlikely(&ice_xdp_locking_key))
360 			spin_unlock(&xdp_ring->tx_lock);
361 	}
362 }
363