1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 /* The driver transmit and receive code */
5 
6 #include <linux/mm.h>
7 #include <linux/netdevice.h>
8 #include <linux/prefetch.h>
9 #include <linux/bpf_trace.h>
10 #include <net/dsfield.h>
11 #include <net/mpls.h>
12 #include <net/xdp.h>
13 #include "ice_txrx_lib.h"
14 #include "ice_lib.h"
15 #include "ice.h"
16 #include "ice_trace.h"
17 #include "ice_dcb_lib.h"
18 #include "ice_xsk.h"
19 #include "ice_eswitch.h"
20 
21 #define ICE_RX_HDR_SIZE		256
22 
23 #define FDIR_DESC_RXDID 0x40
24 #define ICE_FDIR_CLEAN_DELAY 10
25 
26 /**
27  * ice_prgm_fdir_fltr - Program a Flow Director filter
28  * @vsi: VSI to send dummy packet
29  * @fdir_desc: flow director descriptor
30  * @raw_packet: allocated buffer for flow director
31  */
32 int
33 ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
34 		   u8 *raw_packet)
35 {
36 	struct ice_tx_buf *tx_buf, *first;
37 	struct ice_fltr_desc *f_desc;
38 	struct ice_tx_desc *tx_desc;
39 	struct ice_tx_ring *tx_ring;
40 	struct device *dev;
41 	dma_addr_t dma;
42 	u32 td_cmd;
43 	u16 i;
44 
45 	/* VSI and Tx ring */
46 	if (!vsi)
47 		return -ENOENT;
48 	tx_ring = vsi->tx_rings[0];
49 	if (!tx_ring || !tx_ring->desc)
50 		return -ENOENT;
51 	dev = tx_ring->dev;
52 
53 	/* we are using two descriptors to add/del a filter and we can wait */
54 	for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
55 		if (!i)
56 			return -EAGAIN;
57 		msleep_interruptible(1);
58 	}
59 
60 	dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
61 			     DMA_TO_DEVICE);
62 
63 	if (dma_mapping_error(dev, dma))
64 		return -EINVAL;
65 
66 	/* grab the next descriptor */
67 	i = tx_ring->next_to_use;
68 	first = &tx_ring->tx_buf[i];
69 	f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70 	memcpy(f_desc, fdir_desc, sizeof(*f_desc));
71 
72 	i++;
73 	i = (i < tx_ring->count) ? i : 0;
74 	tx_desc = ICE_TX_DESC(tx_ring, i);
75 	tx_buf = &tx_ring->tx_buf[i];
76 
77 	i++;
78 	tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
79 
80 	memset(tx_buf, 0, sizeof(*tx_buf));
81 	dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82 	dma_unmap_addr_set(tx_buf, dma, dma);
83 
84 	tx_desc->buf_addr = cpu_to_le64(dma);
85 	td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
86 		 ICE_TX_DESC_CMD_RE;
87 
88 	tx_buf->type = ICE_TX_BUF_DUMMY;
89 	tx_buf->raw_buf = raw_packet;
90 
91 	tx_desc->cmd_type_offset_bsz =
92 		ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
93 
94 	/* Force memory write to complete before letting h/w know
95 	 * there are new descriptors to fetch.
96 	 */
97 	wmb();
98 
99 	/* mark the data descriptor to be watched */
100 	first->next_to_watch = tx_desc;
101 
102 	writel(tx_ring->next_to_use, tx_ring->tail);
103 
104 	return 0;
105 }
106 
107 /**
108  * ice_unmap_and_free_tx_buf - Release a Tx buffer
109  * @ring: the ring that owns the buffer
110  * @tx_buf: the buffer to free
111  */
112 static void
113 ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
114 {
115 	if (dma_unmap_len(tx_buf, len))
116 		dma_unmap_page(ring->dev,
117 			       dma_unmap_addr(tx_buf, dma),
118 			       dma_unmap_len(tx_buf, len),
119 			       DMA_TO_DEVICE);
120 
121 	switch (tx_buf->type) {
122 	case ICE_TX_BUF_DUMMY:
123 		devm_kfree(ring->dev, tx_buf->raw_buf);
124 		break;
125 	case ICE_TX_BUF_SKB:
126 		dev_kfree_skb_any(tx_buf->skb);
127 		break;
128 	case ICE_TX_BUF_XDP_TX:
129 		page_frag_free(tx_buf->raw_buf);
130 		break;
131 	case ICE_TX_BUF_XDP_XMIT:
132 		xdp_return_frame(tx_buf->xdpf);
133 		break;
134 	}
135 
136 	tx_buf->next_to_watch = NULL;
137 	tx_buf->type = ICE_TX_BUF_EMPTY;
138 	dma_unmap_len_set(tx_buf, len, 0);
139 	/* tx_buf must be completely set up in the transmit path */
140 }
141 
142 static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
143 {
144 	return netdev_get_tx_queue(ring->netdev, ring->q_index);
145 }
146 
147 /**
148  * ice_clean_tx_ring - Free any empty Tx buffers
149  * @tx_ring: ring to be cleaned
150  */
151 void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
152 {
153 	u32 size;
154 	u16 i;
155 
156 	if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
157 		ice_xsk_clean_xdp_ring(tx_ring);
158 		goto tx_skip_free;
159 	}
160 
161 	/* ring already cleared, nothing to do */
162 	if (!tx_ring->tx_buf)
163 		return;
164 
165 	/* Free all the Tx ring sk_buffs */
166 	for (i = 0; i < tx_ring->count; i++)
167 		ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
168 
169 tx_skip_free:
170 	memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
171 
172 	size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
173 		     PAGE_SIZE);
174 	/* Zero out the descriptor ring */
175 	memset(tx_ring->desc, 0, size);
176 
177 	tx_ring->next_to_use = 0;
178 	tx_ring->next_to_clean = 0;
179 
180 	if (!tx_ring->netdev)
181 		return;
182 
183 	/* cleanup Tx queue statistics */
184 	netdev_tx_reset_queue(txring_txq(tx_ring));
185 }
186 
187 /**
188  * ice_free_tx_ring - Free Tx resources per queue
189  * @tx_ring: Tx descriptor ring for a specific queue
190  *
191  * Free all transmit software resources
192  */
193 void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
194 {
195 	u32 size;
196 
197 	ice_clean_tx_ring(tx_ring);
198 	devm_kfree(tx_ring->dev, tx_ring->tx_buf);
199 	tx_ring->tx_buf = NULL;
200 
201 	if (tx_ring->desc) {
202 		size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
203 			     PAGE_SIZE);
204 		dmam_free_coherent(tx_ring->dev, size,
205 				   tx_ring->desc, tx_ring->dma);
206 		tx_ring->desc = NULL;
207 	}
208 }
209 
210 /**
211  * ice_clean_tx_irq - Reclaim resources after transmit completes
212  * @tx_ring: Tx ring to clean
213  * @napi_budget: Used to determine if we are in netpoll
214  *
215  * Returns true if there's any budget left (e.g. the clean is finished)
216  */
217 static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
218 {
219 	unsigned int total_bytes = 0, total_pkts = 0;
220 	unsigned int budget = ICE_DFLT_IRQ_WORK;
221 	struct ice_vsi *vsi = tx_ring->vsi;
222 	s16 i = tx_ring->next_to_clean;
223 	struct ice_tx_desc *tx_desc;
224 	struct ice_tx_buf *tx_buf;
225 
226 	/* get the bql data ready */
227 	netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
228 
229 	tx_buf = &tx_ring->tx_buf[i];
230 	tx_desc = ICE_TX_DESC(tx_ring, i);
231 	i -= tx_ring->count;
232 
233 	prefetch(&vsi->state);
234 
235 	do {
236 		struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
237 
238 		/* if next_to_watch is not set then there is no work pending */
239 		if (!eop_desc)
240 			break;
241 
242 		/* follow the guidelines of other drivers */
243 		prefetchw(&tx_buf->skb->users);
244 
245 		smp_rmb();	/* prevent any other reads prior to eop_desc */
246 
247 		ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
248 		/* if the descriptor isn't done, no work yet to do */
249 		if (!(eop_desc->cmd_type_offset_bsz &
250 		      cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
251 			break;
252 
253 		/* clear next_to_watch to prevent false hangs */
254 		tx_buf->next_to_watch = NULL;
255 
256 		/* update the statistics for this packet */
257 		total_bytes += tx_buf->bytecount;
258 		total_pkts += tx_buf->gso_segs;
259 
260 		/* free the skb */
261 		napi_consume_skb(tx_buf->skb, napi_budget);
262 
263 		/* unmap skb header data */
264 		dma_unmap_single(tx_ring->dev,
265 				 dma_unmap_addr(tx_buf, dma),
266 				 dma_unmap_len(tx_buf, len),
267 				 DMA_TO_DEVICE);
268 
269 		/* clear tx_buf data */
270 		tx_buf->type = ICE_TX_BUF_EMPTY;
271 		dma_unmap_len_set(tx_buf, len, 0);
272 
273 		/* unmap remaining buffers */
274 		while (tx_desc != eop_desc) {
275 			ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
276 			tx_buf++;
277 			tx_desc++;
278 			i++;
279 			if (unlikely(!i)) {
280 				i -= tx_ring->count;
281 				tx_buf = tx_ring->tx_buf;
282 				tx_desc = ICE_TX_DESC(tx_ring, 0);
283 			}
284 
285 			/* unmap any remaining paged data */
286 			if (dma_unmap_len(tx_buf, len)) {
287 				dma_unmap_page(tx_ring->dev,
288 					       dma_unmap_addr(tx_buf, dma),
289 					       dma_unmap_len(tx_buf, len),
290 					       DMA_TO_DEVICE);
291 				dma_unmap_len_set(tx_buf, len, 0);
292 			}
293 		}
294 		ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
295 
296 		/* move us one more past the eop_desc for start of next pkt */
297 		tx_buf++;
298 		tx_desc++;
299 		i++;
300 		if (unlikely(!i)) {
301 			i -= tx_ring->count;
302 			tx_buf = tx_ring->tx_buf;
303 			tx_desc = ICE_TX_DESC(tx_ring, 0);
304 		}
305 
306 		prefetch(tx_desc);
307 
308 		/* update budget accounting */
309 		budget--;
310 	} while (likely(budget));
311 
312 	i += tx_ring->count;
313 	tx_ring->next_to_clean = i;
314 
315 	ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
316 	netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
317 
318 #define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
319 	if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
320 		     (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
321 		/* Make sure that anybody stopping the queue after this
322 		 * sees the new next_to_clean.
323 		 */
324 		smp_mb();
325 		if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
326 		    !test_bit(ICE_VSI_DOWN, vsi->state)) {
327 			netif_tx_wake_queue(txring_txq(tx_ring));
328 			++tx_ring->ring_stats->tx_stats.restart_q;
329 		}
330 	}
331 
332 	return !!budget;
333 }
334 
335 /**
336  * ice_setup_tx_ring - Allocate the Tx descriptors
337  * @tx_ring: the Tx ring to set up
338  *
339  * Return 0 on success, negative on error
340  */
341 int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
342 {
343 	struct device *dev = tx_ring->dev;
344 	u32 size;
345 
346 	if (!dev)
347 		return -ENOMEM;
348 
349 	/* warn if we are about to overwrite the pointer */
350 	WARN_ON(tx_ring->tx_buf);
351 	tx_ring->tx_buf =
352 		devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
353 			     GFP_KERNEL);
354 	if (!tx_ring->tx_buf)
355 		return -ENOMEM;
356 
357 	/* round up to nearest page */
358 	size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
359 		     PAGE_SIZE);
360 	tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
361 					    GFP_KERNEL);
362 	if (!tx_ring->desc) {
363 		dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
364 			size);
365 		goto err;
366 	}
367 
368 	tx_ring->next_to_use = 0;
369 	tx_ring->next_to_clean = 0;
370 	tx_ring->ring_stats->tx_stats.prev_pkt = -1;
371 	return 0;
372 
373 err:
374 	devm_kfree(dev, tx_ring->tx_buf);
375 	tx_ring->tx_buf = NULL;
376 	return -ENOMEM;
377 }
378 
379 /**
380  * ice_clean_rx_ring - Free Rx buffers
381  * @rx_ring: ring to be cleaned
382  */
383 void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
384 {
385 	struct xdp_buff *xdp = &rx_ring->xdp;
386 	struct device *dev = rx_ring->dev;
387 	u32 size;
388 	u16 i;
389 
390 	/* ring already cleared, nothing to do */
391 	if (!rx_ring->rx_buf)
392 		return;
393 
394 	if (rx_ring->xsk_pool) {
395 		ice_xsk_clean_rx_ring(rx_ring);
396 		goto rx_skip_free;
397 	}
398 
399 	if (xdp->data) {
400 		xdp_return_buff(xdp);
401 		xdp->data = NULL;
402 	}
403 
404 	/* Free all the Rx ring sk_buffs */
405 	for (i = 0; i < rx_ring->count; i++) {
406 		struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
407 
408 		if (!rx_buf->page)
409 			continue;
410 
411 		/* Invalidate cache lines that may have been written to by
412 		 * device so that we avoid corrupting memory.
413 		 */
414 		dma_sync_single_range_for_cpu(dev, rx_buf->dma,
415 					      rx_buf->page_offset,
416 					      rx_ring->rx_buf_len,
417 					      DMA_FROM_DEVICE);
418 
419 		/* free resources associated with mapping */
420 		dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
421 				     DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
422 		__page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
423 
424 		rx_buf->page = NULL;
425 		rx_buf->page_offset = 0;
426 	}
427 
428 rx_skip_free:
429 	if (rx_ring->xsk_pool)
430 		memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
431 	else
432 		memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
433 
434 	/* Zero out the descriptor ring */
435 	size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
436 		     PAGE_SIZE);
437 	memset(rx_ring->desc, 0, size);
438 
439 	rx_ring->next_to_alloc = 0;
440 	rx_ring->next_to_clean = 0;
441 	rx_ring->first_desc = 0;
442 	rx_ring->next_to_use = 0;
443 }
444 
445 /**
446  * ice_free_rx_ring - Free Rx resources
447  * @rx_ring: ring to clean the resources from
448  *
449  * Free all receive software resources
450  */
451 void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
452 {
453 	u32 size;
454 
455 	ice_clean_rx_ring(rx_ring);
456 	if (rx_ring->vsi->type == ICE_VSI_PF)
457 		if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
458 			xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
459 	rx_ring->xdp_prog = NULL;
460 	if (rx_ring->xsk_pool) {
461 		kfree(rx_ring->xdp_buf);
462 		rx_ring->xdp_buf = NULL;
463 	} else {
464 		kfree(rx_ring->rx_buf);
465 		rx_ring->rx_buf = NULL;
466 	}
467 
468 	if (rx_ring->desc) {
469 		size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
470 			     PAGE_SIZE);
471 		dmam_free_coherent(rx_ring->dev, size,
472 				   rx_ring->desc, rx_ring->dma);
473 		rx_ring->desc = NULL;
474 	}
475 }
476 
477 /**
478  * ice_setup_rx_ring - Allocate the Rx descriptors
479  * @rx_ring: the Rx ring to set up
480  *
481  * Return 0 on success, negative on error
482  */
483 int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
484 {
485 	struct device *dev = rx_ring->dev;
486 	u32 size;
487 
488 	if (!dev)
489 		return -ENOMEM;
490 
491 	/* warn if we are about to overwrite the pointer */
492 	WARN_ON(rx_ring->rx_buf);
493 	rx_ring->rx_buf =
494 		kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
495 	if (!rx_ring->rx_buf)
496 		return -ENOMEM;
497 
498 	/* round up to nearest page */
499 	size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
500 		     PAGE_SIZE);
501 	rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
502 					    GFP_KERNEL);
503 	if (!rx_ring->desc) {
504 		dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
505 			size);
506 		goto err;
507 	}
508 
509 	rx_ring->next_to_use = 0;
510 	rx_ring->next_to_clean = 0;
511 	rx_ring->first_desc = 0;
512 
513 	if (ice_is_xdp_ena_vsi(rx_ring->vsi))
514 		WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
515 
516 	if (rx_ring->vsi->type == ICE_VSI_PF &&
517 	    !xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
518 		if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
519 				     rx_ring->q_index, rx_ring->q_vector->napi.napi_id))
520 			goto err;
521 	return 0;
522 
523 err:
524 	kfree(rx_ring->rx_buf);
525 	rx_ring->rx_buf = NULL;
526 	return -ENOMEM;
527 }
528 
529 /**
530  * ice_rx_frame_truesize
531  * @rx_ring: ptr to Rx ring
532  * @size: size
533  *
534  * calculate the truesize with taking into the account PAGE_SIZE of
535  * underlying arch
536  */
537 static unsigned int
538 ice_rx_frame_truesize(struct ice_rx_ring *rx_ring, const unsigned int size)
539 {
540 	unsigned int truesize;
541 
542 #if (PAGE_SIZE < 8192)
543 	truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
544 #else
545 	truesize = rx_ring->rx_offset ?
546 		SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
547 		SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
548 		SKB_DATA_ALIGN(size);
549 #endif
550 	return truesize;
551 }
552 
553 /**
554  * ice_run_xdp - Executes an XDP program on initialized xdp_buff
555  * @rx_ring: Rx ring
556  * @xdp: xdp_buff used as input to the XDP program
557  * @xdp_prog: XDP program to run
558  * @xdp_ring: ring to be used for XDP_TX action
559  * @rx_buf: Rx buffer to store the XDP action
560  *
561  * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
562  */
563 static void
564 ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
565 	    struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring,
566 	    struct ice_rx_buf *rx_buf)
567 {
568 	unsigned int ret = ICE_XDP_PASS;
569 	u32 act;
570 
571 	if (!xdp_prog)
572 		goto exit;
573 
574 	act = bpf_prog_run_xdp(xdp_prog, xdp);
575 	switch (act) {
576 	case XDP_PASS:
577 		break;
578 	case XDP_TX:
579 		if (static_branch_unlikely(&ice_xdp_locking_key))
580 			spin_lock(&xdp_ring->tx_lock);
581 		ret = __ice_xmit_xdp_ring(xdp, xdp_ring, false);
582 		if (static_branch_unlikely(&ice_xdp_locking_key))
583 			spin_unlock(&xdp_ring->tx_lock);
584 		if (ret == ICE_XDP_CONSUMED)
585 			goto out_failure;
586 		break;
587 	case XDP_REDIRECT:
588 		if (xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))
589 			goto out_failure;
590 		ret = ICE_XDP_REDIR;
591 		break;
592 	default:
593 		bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
594 		fallthrough;
595 	case XDP_ABORTED:
596 out_failure:
597 		trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
598 		fallthrough;
599 	case XDP_DROP:
600 		ret = ICE_XDP_CONSUMED;
601 	}
602 exit:
603 	rx_buf->act = ret;
604 	if (unlikely(xdp_buff_has_frags(xdp)))
605 		ice_set_rx_bufs_act(xdp, rx_ring, ret);
606 }
607 
608 /**
609  * ice_xmit_xdp_ring - submit frame to XDP ring for transmission
610  * @xdpf: XDP frame that will be converted to XDP buff
611  * @xdp_ring: XDP ring for transmission
612  */
613 static int ice_xmit_xdp_ring(const struct xdp_frame *xdpf,
614 			     struct ice_tx_ring *xdp_ring)
615 {
616 	struct xdp_buff xdp;
617 
618 	xdp.data_hard_start = (void *)xdpf;
619 	xdp.data = xdpf->data;
620 	xdp.data_end = xdp.data + xdpf->len;
621 	xdp.frame_sz = xdpf->frame_sz;
622 	xdp.flags = xdpf->flags;
623 
624 	return __ice_xmit_xdp_ring(&xdp, xdp_ring, true);
625 }
626 
627 /**
628  * ice_xdp_xmit - submit packets to XDP ring for transmission
629  * @dev: netdev
630  * @n: number of XDP frames to be transmitted
631  * @frames: XDP frames to be transmitted
632  * @flags: transmit flags
633  *
634  * Returns number of frames successfully sent. Failed frames
635  * will be free'ed by XDP core.
636  * For error cases, a negative errno code is returned and no-frames
637  * are transmitted (caller must handle freeing frames).
638  */
639 int
640 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
641 	     u32 flags)
642 {
643 	struct ice_netdev_priv *np = netdev_priv(dev);
644 	unsigned int queue_index = smp_processor_id();
645 	struct ice_vsi *vsi = np->vsi;
646 	struct ice_tx_ring *xdp_ring;
647 	struct ice_tx_buf *tx_buf;
648 	int nxmit = 0, i;
649 
650 	if (test_bit(ICE_VSI_DOWN, vsi->state))
651 		return -ENETDOWN;
652 
653 	if (!ice_is_xdp_ena_vsi(vsi))
654 		return -ENXIO;
655 
656 	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
657 		return -EINVAL;
658 
659 	if (static_branch_unlikely(&ice_xdp_locking_key)) {
660 		queue_index %= vsi->num_xdp_txq;
661 		xdp_ring = vsi->xdp_rings[queue_index];
662 		spin_lock(&xdp_ring->tx_lock);
663 	} else {
664 		/* Generally, should not happen */
665 		if (unlikely(queue_index >= vsi->num_xdp_txq))
666 			return -ENXIO;
667 		xdp_ring = vsi->xdp_rings[queue_index];
668 	}
669 
670 	tx_buf = &xdp_ring->tx_buf[xdp_ring->next_to_use];
671 	for (i = 0; i < n; i++) {
672 		const struct xdp_frame *xdpf = frames[i];
673 		int err;
674 
675 		err = ice_xmit_xdp_ring(xdpf, xdp_ring);
676 		if (err != ICE_XDP_TX)
677 			break;
678 		nxmit++;
679 	}
680 
681 	tx_buf->rs_idx = ice_set_rs_bit(xdp_ring);
682 	if (unlikely(flags & XDP_XMIT_FLUSH))
683 		ice_xdp_ring_update_tail(xdp_ring);
684 
685 	if (static_branch_unlikely(&ice_xdp_locking_key))
686 		spin_unlock(&xdp_ring->tx_lock);
687 
688 	return nxmit;
689 }
690 
691 /**
692  * ice_alloc_mapped_page - recycle or make a new page
693  * @rx_ring: ring to use
694  * @bi: rx_buf struct to modify
695  *
696  * Returns true if the page was successfully allocated or
697  * reused.
698  */
699 static bool
700 ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
701 {
702 	struct page *page = bi->page;
703 	dma_addr_t dma;
704 
705 	/* since we are recycling buffers we should seldom need to alloc */
706 	if (likely(page))
707 		return true;
708 
709 	/* alloc new page for storage */
710 	page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
711 	if (unlikely(!page)) {
712 		rx_ring->ring_stats->rx_stats.alloc_page_failed++;
713 		return false;
714 	}
715 
716 	/* map page for use */
717 	dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
718 				 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
719 
720 	/* if mapping failed free memory back to system since
721 	 * there isn't much point in holding memory we can't use
722 	 */
723 	if (dma_mapping_error(rx_ring->dev, dma)) {
724 		__free_pages(page, ice_rx_pg_order(rx_ring));
725 		rx_ring->ring_stats->rx_stats.alloc_page_failed++;
726 		return false;
727 	}
728 
729 	bi->dma = dma;
730 	bi->page = page;
731 	bi->page_offset = rx_ring->rx_offset;
732 	page_ref_add(page, USHRT_MAX - 1);
733 	bi->pagecnt_bias = USHRT_MAX;
734 
735 	return true;
736 }
737 
738 /**
739  * ice_alloc_rx_bufs - Replace used receive buffers
740  * @rx_ring: ring to place buffers on
741  * @cleaned_count: number of buffers to replace
742  *
743  * Returns false if all allocations were successful, true if any fail. Returning
744  * true signals to the caller that we didn't replace cleaned_count buffers and
745  * there is more work to do.
746  *
747  * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
748  * buffers. Then bump tail at most one time. Grouping like this lets us avoid
749  * multiple tail writes per call.
750  */
751 bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, unsigned int cleaned_count)
752 {
753 	union ice_32b_rx_flex_desc *rx_desc;
754 	u16 ntu = rx_ring->next_to_use;
755 	struct ice_rx_buf *bi;
756 
757 	/* do nothing if no valid netdev defined */
758 	if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
759 	    !cleaned_count)
760 		return false;
761 
762 	/* get the Rx descriptor and buffer based on next_to_use */
763 	rx_desc = ICE_RX_DESC(rx_ring, ntu);
764 	bi = &rx_ring->rx_buf[ntu];
765 
766 	do {
767 		/* if we fail here, we have work remaining */
768 		if (!ice_alloc_mapped_page(rx_ring, bi))
769 			break;
770 
771 		/* sync the buffer for use by the device */
772 		dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
773 						 bi->page_offset,
774 						 rx_ring->rx_buf_len,
775 						 DMA_FROM_DEVICE);
776 
777 		/* Refresh the desc even if buffer_addrs didn't change
778 		 * because each write-back erases this info.
779 		 */
780 		rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
781 
782 		rx_desc++;
783 		bi++;
784 		ntu++;
785 		if (unlikely(ntu == rx_ring->count)) {
786 			rx_desc = ICE_RX_DESC(rx_ring, 0);
787 			bi = rx_ring->rx_buf;
788 			ntu = 0;
789 		}
790 
791 		/* clear the status bits for the next_to_use descriptor */
792 		rx_desc->wb.status_error0 = 0;
793 
794 		cleaned_count--;
795 	} while (cleaned_count);
796 
797 	if (rx_ring->next_to_use != ntu)
798 		ice_release_rx_desc(rx_ring, ntu);
799 
800 	return !!cleaned_count;
801 }
802 
803 /**
804  * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
805  * @rx_buf: Rx buffer to adjust
806  * @size: Size of adjustment
807  *
808  * Update the offset within page so that Rx buf will be ready to be reused.
809  * For systems with PAGE_SIZE < 8192 this function will flip the page offset
810  * so the second half of page assigned to Rx buffer will be used, otherwise
811  * the offset is moved by "size" bytes
812  */
813 static void
814 ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
815 {
816 #if (PAGE_SIZE < 8192)
817 	/* flip page offset to other buffer */
818 	rx_buf->page_offset ^= size;
819 #else
820 	/* move offset up to the next cache line */
821 	rx_buf->page_offset += size;
822 #endif
823 }
824 
825 /**
826  * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
827  * @rx_buf: buffer containing the page
828  *
829  * If page is reusable, we have a green light for calling ice_reuse_rx_page,
830  * which will assign the current buffer to the buffer that next_to_alloc is
831  * pointing to; otherwise, the DMA mapping needs to be destroyed and
832  * page freed
833  */
834 static bool
835 ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf)
836 {
837 	unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
838 	struct page *page = rx_buf->page;
839 
840 	/* avoid re-using remote and pfmemalloc pages */
841 	if (!dev_page_is_reusable(page))
842 		return false;
843 
844 #if (PAGE_SIZE < 8192)
845 	/* if we are only owner of page we can reuse it */
846 	if (unlikely(rx_buf->pgcnt - pagecnt_bias > 1))
847 		return false;
848 #else
849 #define ICE_LAST_OFFSET \
850 	(SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
851 	if (rx_buf->page_offset > ICE_LAST_OFFSET)
852 		return false;
853 #endif /* PAGE_SIZE < 8192) */
854 
855 	/* If we have drained the page fragment pool we need to update
856 	 * the pagecnt_bias and page count so that we fully restock the
857 	 * number of references the driver holds.
858 	 */
859 	if (unlikely(pagecnt_bias == 1)) {
860 		page_ref_add(page, USHRT_MAX - 1);
861 		rx_buf->pagecnt_bias = USHRT_MAX;
862 	}
863 
864 	return true;
865 }
866 
867 /**
868  * ice_add_xdp_frag - Add contents of Rx buffer to xdp buf as a frag
869  * @rx_ring: Rx descriptor ring to transact packets on
870  * @xdp: xdp buff to place the data into
871  * @rx_buf: buffer containing page to add
872  * @size: packet length from rx_desc
873  *
874  * This function will add the data contained in rx_buf->page to the xdp buf.
875  * It will just attach the page as a frag.
876  */
877 static int
878 ice_add_xdp_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
879 		 struct ice_rx_buf *rx_buf, const unsigned int size)
880 {
881 	struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
882 
883 	if (!size)
884 		return 0;
885 
886 	if (!xdp_buff_has_frags(xdp)) {
887 		sinfo->nr_frags = 0;
888 		sinfo->xdp_frags_size = 0;
889 		xdp_buff_set_frags_flag(xdp);
890 	}
891 
892 	if (unlikely(sinfo->nr_frags == MAX_SKB_FRAGS)) {
893 		if (unlikely(xdp_buff_has_frags(xdp)))
894 			ice_set_rx_bufs_act(xdp, rx_ring, ICE_XDP_CONSUMED);
895 		return -ENOMEM;
896 	}
897 
898 	__skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++, rx_buf->page,
899 				   rx_buf->page_offset, size);
900 	sinfo->xdp_frags_size += size;
901 
902 	if (page_is_pfmemalloc(rx_buf->page))
903 		xdp_buff_set_frag_pfmemalloc(xdp);
904 
905 	return 0;
906 }
907 
908 /**
909  * ice_reuse_rx_page - page flip buffer and store it back on the ring
910  * @rx_ring: Rx descriptor ring to store buffers on
911  * @old_buf: donor buffer to have page reused
912  *
913  * Synchronizes page for reuse by the adapter
914  */
915 static void
916 ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
917 {
918 	u16 nta = rx_ring->next_to_alloc;
919 	struct ice_rx_buf *new_buf;
920 
921 	new_buf = &rx_ring->rx_buf[nta];
922 
923 	/* update, and store next to alloc */
924 	nta++;
925 	rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
926 
927 	/* Transfer page from old buffer to new buffer.
928 	 * Move each member individually to avoid possible store
929 	 * forwarding stalls and unnecessary copy of skb.
930 	 */
931 	new_buf->dma = old_buf->dma;
932 	new_buf->page = old_buf->page;
933 	new_buf->page_offset = old_buf->page_offset;
934 	new_buf->pagecnt_bias = old_buf->pagecnt_bias;
935 }
936 
937 /**
938  * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
939  * @rx_ring: Rx descriptor ring to transact packets on
940  * @size: size of buffer to add to skb
941  * @ntc: index of next to clean element
942  *
943  * This function will pull an Rx buffer from the ring and synchronize it
944  * for use by the CPU.
945  */
946 static struct ice_rx_buf *
947 ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
948 	       const unsigned int ntc)
949 {
950 	struct ice_rx_buf *rx_buf;
951 
952 	rx_buf = &rx_ring->rx_buf[ntc];
953 	rx_buf->pgcnt =
954 #if (PAGE_SIZE < 8192)
955 		page_count(rx_buf->page);
956 #else
957 		0;
958 #endif
959 	prefetchw(rx_buf->page);
960 
961 	if (!size)
962 		return rx_buf;
963 	/* we are reusing so sync this buffer for CPU use */
964 	dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
965 				      rx_buf->page_offset, size,
966 				      DMA_FROM_DEVICE);
967 
968 	/* We have pulled a buffer for use, so decrement pagecnt_bias */
969 	rx_buf->pagecnt_bias--;
970 
971 	return rx_buf;
972 }
973 
974 /**
975  * ice_build_skb - Build skb around an existing buffer
976  * @rx_ring: Rx descriptor ring to transact packets on
977  * @xdp: xdp_buff pointing to the data
978  *
979  * This function builds an skb around an existing XDP buffer, taking care
980  * to set up the skb correctly and avoid any memcpy overhead. Driver has
981  * already combined frags (if any) to skb_shared_info.
982  */
983 static struct sk_buff *
984 ice_build_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
985 {
986 	u8 metasize = xdp->data - xdp->data_meta;
987 	struct skb_shared_info *sinfo = NULL;
988 	unsigned int nr_frags;
989 	struct sk_buff *skb;
990 
991 	if (unlikely(xdp_buff_has_frags(xdp))) {
992 		sinfo = xdp_get_shared_info_from_buff(xdp);
993 		nr_frags = sinfo->nr_frags;
994 	}
995 
996 	/* Prefetch first cache line of first page. If xdp->data_meta
997 	 * is unused, this points exactly as xdp->data, otherwise we
998 	 * likely have a consumer accessing first few bytes of meta
999 	 * data, and then actual data.
1000 	 */
1001 	net_prefetch(xdp->data_meta);
1002 	/* build an skb around the page buffer */
1003 	skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
1004 	if (unlikely(!skb))
1005 		return NULL;
1006 
1007 	/* must to record Rx queue, otherwise OS features such as
1008 	 * symmetric queue won't work
1009 	 */
1010 	skb_record_rx_queue(skb, rx_ring->q_index);
1011 
1012 	/* update pointers within the skb to store the data */
1013 	skb_reserve(skb, xdp->data - xdp->data_hard_start);
1014 	__skb_put(skb, xdp->data_end - xdp->data);
1015 	if (metasize)
1016 		skb_metadata_set(skb, metasize);
1017 
1018 	if (unlikely(xdp_buff_has_frags(xdp)))
1019 		xdp_update_skb_shared_info(skb, nr_frags,
1020 					   sinfo->xdp_frags_size,
1021 					   nr_frags * xdp->frame_sz,
1022 					   xdp_buff_is_frag_pfmemalloc(xdp));
1023 
1024 	return skb;
1025 }
1026 
1027 /**
1028  * ice_construct_skb - Allocate skb and populate it
1029  * @rx_ring: Rx descriptor ring to transact packets on
1030  * @xdp: xdp_buff pointing to the data
1031  *
1032  * This function allocates an skb. It then populates it with the page
1033  * data from the current receive descriptor, taking care to set up the
1034  * skb correctly.
1035  */
1036 static struct sk_buff *
1037 ice_construct_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
1038 {
1039 	unsigned int size = xdp->data_end - xdp->data;
1040 	struct skb_shared_info *sinfo = NULL;
1041 	struct ice_rx_buf *rx_buf;
1042 	unsigned int nr_frags = 0;
1043 	unsigned int headlen;
1044 	struct sk_buff *skb;
1045 
1046 	/* prefetch first cache line of first page */
1047 	net_prefetch(xdp->data);
1048 
1049 	if (unlikely(xdp_buff_has_frags(xdp))) {
1050 		sinfo = xdp_get_shared_info_from_buff(xdp);
1051 		nr_frags = sinfo->nr_frags;
1052 	}
1053 
1054 	/* allocate a skb to store the frags */
1055 	skb = __napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE,
1056 			       GFP_ATOMIC | __GFP_NOWARN);
1057 	if (unlikely(!skb))
1058 		return NULL;
1059 
1060 	rx_buf = &rx_ring->rx_buf[rx_ring->first_desc];
1061 	skb_record_rx_queue(skb, rx_ring->q_index);
1062 	/* Determine available headroom for copy */
1063 	headlen = size;
1064 	if (headlen > ICE_RX_HDR_SIZE)
1065 		headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1066 
1067 	/* align pull length to size of long to optimize memcpy performance */
1068 	memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen,
1069 							 sizeof(long)));
1070 
1071 	/* if we exhaust the linear part then add what is left as a frag */
1072 	size -= headlen;
1073 	if (size) {
1074 		/* besides adding here a partial frag, we are going to add
1075 		 * frags from xdp_buff, make sure there is enough space for
1076 		 * them
1077 		 */
1078 		if (unlikely(nr_frags >= MAX_SKB_FRAGS - 1)) {
1079 			dev_kfree_skb(skb);
1080 			return NULL;
1081 		}
1082 		skb_add_rx_frag(skb, 0, rx_buf->page,
1083 				rx_buf->page_offset + headlen, size,
1084 				xdp->frame_sz);
1085 	} else {
1086 		/* buffer is unused, change the act that should be taken later
1087 		 * on; data was copied onto skb's linear part so there's no
1088 		 * need for adjusting page offset and we can reuse this buffer
1089 		 * as-is
1090 		 */
1091 		rx_buf->act = ICE_SKB_CONSUMED;
1092 	}
1093 
1094 	if (unlikely(xdp_buff_has_frags(xdp))) {
1095 		struct skb_shared_info *skinfo = skb_shinfo(skb);
1096 
1097 		memcpy(&skinfo->frags[skinfo->nr_frags], &sinfo->frags[0],
1098 		       sizeof(skb_frag_t) * nr_frags);
1099 
1100 		xdp_update_skb_shared_info(skb, skinfo->nr_frags + nr_frags,
1101 					   sinfo->xdp_frags_size,
1102 					   nr_frags * xdp->frame_sz,
1103 					   xdp_buff_is_frag_pfmemalloc(xdp));
1104 	}
1105 
1106 	return skb;
1107 }
1108 
1109 /**
1110  * ice_put_rx_buf - Clean up used buffer and either recycle or free
1111  * @rx_ring: Rx descriptor ring to transact packets on
1112  * @rx_buf: Rx buffer to pull data from
1113  *
1114  * This function will clean up the contents of the rx_buf. It will either
1115  * recycle the buffer or unmap it and free the associated resources.
1116  */
1117 static void
1118 ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf)
1119 {
1120 	if (!rx_buf)
1121 		return;
1122 
1123 	if (ice_can_reuse_rx_page(rx_buf)) {
1124 		/* hand second half of page back to the ring */
1125 		ice_reuse_rx_page(rx_ring, rx_buf);
1126 	} else {
1127 		/* we are not reusing the buffer so unmap it */
1128 		dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1129 				     ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1130 				     ICE_RX_DMA_ATTR);
1131 		__page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1132 	}
1133 
1134 	/* clear contents of buffer_info */
1135 	rx_buf->page = NULL;
1136 }
1137 
1138 /**
1139  * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1140  * @rx_ring: Rx descriptor ring to transact packets on
1141  * @budget: Total limit on number of packets to process
1142  *
1143  * This function provides a "bounce buffer" approach to Rx interrupt
1144  * processing. The advantage to this is that on systems that have
1145  * expensive overhead for IOMMU access this provides a means of avoiding
1146  * it by maintaining the mapping of the page to the system.
1147  *
1148  * Returns amount of work completed
1149  */
1150 int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1151 {
1152 	unsigned int total_rx_bytes = 0, total_rx_pkts = 0;
1153 	unsigned int offset = rx_ring->rx_offset;
1154 	struct xdp_buff *xdp = &rx_ring->xdp;
1155 	struct ice_tx_ring *xdp_ring = NULL;
1156 	struct bpf_prog *xdp_prog = NULL;
1157 	u32 ntc = rx_ring->next_to_clean;
1158 	u32 cnt = rx_ring->count;
1159 	u32 cached_ntc = ntc;
1160 	u32 xdp_xmit = 0;
1161 	u32 cached_ntu;
1162 	bool failure;
1163 	u32 first;
1164 
1165 	/* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1166 #if (PAGE_SIZE < 8192)
1167 	xdp->frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1168 #endif
1169 
1170 	xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1171 	if (xdp_prog) {
1172 		xdp_ring = rx_ring->xdp_ring;
1173 		cached_ntu = xdp_ring->next_to_use;
1174 	}
1175 
1176 	/* start the loop to process Rx packets bounded by 'budget' */
1177 	while (likely(total_rx_pkts < (unsigned int)budget)) {
1178 		union ice_32b_rx_flex_desc *rx_desc;
1179 		struct ice_rx_buf *rx_buf;
1180 		struct sk_buff *skb;
1181 		unsigned int size;
1182 		u16 stat_err_bits;
1183 		u16 vlan_tag = 0;
1184 		u16 rx_ptype;
1185 
1186 		/* get the Rx desc from Rx ring based on 'next_to_clean' */
1187 		rx_desc = ICE_RX_DESC(rx_ring, ntc);
1188 
1189 		/* status_error_len will always be zero for unused descriptors
1190 		 * because it's cleared in cleanup, and overlaps with hdr_addr
1191 		 * which is always zero because packet split isn't used, if the
1192 		 * hardware wrote DD then it will be non-zero
1193 		 */
1194 		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1195 		if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1196 			break;
1197 
1198 		/* This memory barrier is needed to keep us from reading
1199 		 * any other fields out of the rx_desc until we know the
1200 		 * DD bit is set.
1201 		 */
1202 		dma_rmb();
1203 
1204 		ice_trace(clean_rx_irq, rx_ring, rx_desc);
1205 		if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1206 			struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1207 
1208 			if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1209 			    ctrl_vsi->vf)
1210 				ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1211 			if (++ntc == cnt)
1212 				ntc = 0;
1213 			rx_ring->first_desc = ntc;
1214 			continue;
1215 		}
1216 
1217 		size = le16_to_cpu(rx_desc->wb.pkt_len) &
1218 			ICE_RX_FLX_DESC_PKT_LEN_M;
1219 
1220 		/* retrieve a buffer from the ring */
1221 		rx_buf = ice_get_rx_buf(rx_ring, size, ntc);
1222 
1223 		if (!xdp->data) {
1224 			void *hard_start;
1225 
1226 			hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1227 				     offset;
1228 			xdp_prepare_buff(xdp, hard_start, offset, size, !!offset);
1229 #if (PAGE_SIZE > 4096)
1230 			/* At larger PAGE_SIZE, frame_sz depend on len size */
1231 			xdp->frame_sz = ice_rx_frame_truesize(rx_ring, size);
1232 #endif
1233 			xdp_buff_clear_frags_flag(xdp);
1234 		} else if (ice_add_xdp_frag(rx_ring, xdp, rx_buf, size)) {
1235 			break;
1236 		}
1237 		if (++ntc == cnt)
1238 			ntc = 0;
1239 
1240 		/* skip if it is NOP desc */
1241 		if (ice_is_non_eop(rx_ring, rx_desc))
1242 			continue;
1243 
1244 		ice_run_xdp(rx_ring, xdp, xdp_prog, xdp_ring, rx_buf);
1245 		if (rx_buf->act == ICE_XDP_PASS)
1246 			goto construct_skb;
1247 		total_rx_bytes += xdp_get_buff_len(xdp);
1248 		total_rx_pkts++;
1249 
1250 		xdp->data = NULL;
1251 		rx_ring->first_desc = ntc;
1252 		continue;
1253 construct_skb:
1254 		if (likely(ice_ring_uses_build_skb(rx_ring)))
1255 			skb = ice_build_skb(rx_ring, xdp);
1256 		else
1257 			skb = ice_construct_skb(rx_ring, xdp);
1258 		/* exit if we failed to retrieve a buffer */
1259 		if (!skb) {
1260 			rx_ring->ring_stats->rx_stats.alloc_page_failed++;
1261 			rx_buf->act = ICE_XDP_CONSUMED;
1262 			if (unlikely(xdp_buff_has_frags(xdp)))
1263 				ice_set_rx_bufs_act(xdp, rx_ring,
1264 						    ICE_XDP_CONSUMED);
1265 			xdp->data = NULL;
1266 			rx_ring->first_desc = ntc;
1267 			break;
1268 		}
1269 		xdp->data = NULL;
1270 		rx_ring->first_desc = ntc;
1271 
1272 		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1273 		if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1274 					      stat_err_bits))) {
1275 			dev_kfree_skb_any(skb);
1276 			continue;
1277 		}
1278 
1279 		vlan_tag = ice_get_vlan_tag_from_rx_desc(rx_desc);
1280 
1281 		/* pad the skb if needed, to make a valid ethernet frame */
1282 		if (eth_skb_pad(skb))
1283 			continue;
1284 
1285 		/* probably a little skewed due to removing CRC */
1286 		total_rx_bytes += skb->len;
1287 
1288 		/* populate checksum, VLAN, and protocol */
1289 		rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
1290 			ICE_RX_FLEX_DESC_PTYPE_M;
1291 
1292 		ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
1293 
1294 		ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1295 		/* send completed skb up the stack */
1296 		ice_receive_skb(rx_ring, skb, vlan_tag);
1297 
1298 		/* update budget accounting */
1299 		total_rx_pkts++;
1300 	}
1301 
1302 	first = rx_ring->first_desc;
1303 	while (cached_ntc != first) {
1304 		struct ice_rx_buf *buf = &rx_ring->rx_buf[cached_ntc];
1305 
1306 		if (buf->act & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1307 			ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1308 			xdp_xmit |= buf->act;
1309 		} else if (buf->act & ICE_XDP_CONSUMED) {
1310 			buf->pagecnt_bias++;
1311 		} else if (buf->act == ICE_XDP_PASS) {
1312 			ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1313 		}
1314 
1315 		ice_put_rx_buf(rx_ring, buf);
1316 		if (++cached_ntc >= cnt)
1317 			cached_ntc = 0;
1318 	}
1319 	rx_ring->next_to_clean = ntc;
1320 	/* return up to cleaned_count buffers to hardware */
1321 	failure = ice_alloc_rx_bufs(rx_ring, ICE_RX_DESC_UNUSED(rx_ring));
1322 
1323 	if (xdp_xmit)
1324 		ice_finalize_xdp_rx(xdp_ring, xdp_xmit, cached_ntu);
1325 
1326 	if (rx_ring->ring_stats)
1327 		ice_update_rx_ring_stats(rx_ring, total_rx_pkts,
1328 					 total_rx_bytes);
1329 
1330 	/* guarantee a trip back through this routine if there was a failure */
1331 	return failure ? budget : (int)total_rx_pkts;
1332 }
1333 
1334 static void __ice_update_sample(struct ice_q_vector *q_vector,
1335 				struct ice_ring_container *rc,
1336 				struct dim_sample *sample,
1337 				bool is_tx)
1338 {
1339 	u64 packets = 0, bytes = 0;
1340 
1341 	if (is_tx) {
1342 		struct ice_tx_ring *tx_ring;
1343 
1344 		ice_for_each_tx_ring(tx_ring, *rc) {
1345 			struct ice_ring_stats *ring_stats;
1346 
1347 			ring_stats = tx_ring->ring_stats;
1348 			if (!ring_stats)
1349 				continue;
1350 			packets += ring_stats->stats.pkts;
1351 			bytes += ring_stats->stats.bytes;
1352 		}
1353 	} else {
1354 		struct ice_rx_ring *rx_ring;
1355 
1356 		ice_for_each_rx_ring(rx_ring, *rc) {
1357 			struct ice_ring_stats *ring_stats;
1358 
1359 			ring_stats = rx_ring->ring_stats;
1360 			if (!ring_stats)
1361 				continue;
1362 			packets += ring_stats->stats.pkts;
1363 			bytes += ring_stats->stats.bytes;
1364 		}
1365 	}
1366 
1367 	dim_update_sample(q_vector->total_events, packets, bytes, sample);
1368 	sample->comp_ctr = 0;
1369 
1370 	/* if dim settings get stale, like when not updated for 1
1371 	 * second or longer, force it to start again. This addresses the
1372 	 * frequent case of an idle queue being switched to by the
1373 	 * scheduler. The 1,000 here means 1,000 milliseconds.
1374 	 */
1375 	if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1376 		rc->dim.state = DIM_START_MEASURE;
1377 }
1378 
1379 /**
1380  * ice_net_dim - Update net DIM algorithm
1381  * @q_vector: the vector associated with the interrupt
1382  *
1383  * Create a DIM sample and notify net_dim() so that it can possibly decide
1384  * a new ITR value based on incoming packets, bytes, and interrupts.
1385  *
1386  * This function is a no-op if the ring is not configured to dynamic ITR.
1387  */
1388 static void ice_net_dim(struct ice_q_vector *q_vector)
1389 {
1390 	struct ice_ring_container *tx = &q_vector->tx;
1391 	struct ice_ring_container *rx = &q_vector->rx;
1392 
1393 	if (ITR_IS_DYNAMIC(tx)) {
1394 		struct dim_sample dim_sample;
1395 
1396 		__ice_update_sample(q_vector, tx, &dim_sample, true);
1397 		net_dim(&tx->dim, dim_sample);
1398 	}
1399 
1400 	if (ITR_IS_DYNAMIC(rx)) {
1401 		struct dim_sample dim_sample;
1402 
1403 		__ice_update_sample(q_vector, rx, &dim_sample, false);
1404 		net_dim(&rx->dim, dim_sample);
1405 	}
1406 }
1407 
1408 /**
1409  * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1410  * @itr_idx: interrupt throttling index
1411  * @itr: interrupt throttling value in usecs
1412  */
1413 static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1414 {
1415 	/* The ITR value is reported in microseconds, and the register value is
1416 	 * recorded in 2 microsecond units. For this reason we only need to
1417 	 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1418 	 * granularity as a shift instead of division. The mask makes sure the
1419 	 * ITR value is never odd so we don't accidentally write into the field
1420 	 * prior to the ITR field.
1421 	 */
1422 	itr &= ICE_ITR_MASK;
1423 
1424 	return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1425 		(itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1426 		(itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1427 }
1428 
1429 /**
1430  * ice_enable_interrupt - re-enable MSI-X interrupt
1431  * @q_vector: the vector associated with the interrupt to enable
1432  *
1433  * If the VSI is down, the interrupt will not be re-enabled. Also,
1434  * when enabling the interrupt always reset the wb_on_itr to false
1435  * and trigger a software interrupt to clean out internal state.
1436  */
1437 static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1438 {
1439 	struct ice_vsi *vsi = q_vector->vsi;
1440 	bool wb_en = q_vector->wb_on_itr;
1441 	u32 itr_val;
1442 
1443 	if (test_bit(ICE_DOWN, vsi->state))
1444 		return;
1445 
1446 	/* trigger an ITR delayed software interrupt when exiting busy poll, to
1447 	 * make sure to catch any pending cleanups that might have been missed
1448 	 * due to interrupt state transition. If busy poll or poll isn't
1449 	 * enabled, then don't update ITR, and just enable the interrupt.
1450 	 */
1451 	if (!wb_en) {
1452 		itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1453 	} else {
1454 		q_vector->wb_on_itr = false;
1455 
1456 		/* do two things here with a single write. Set up the third ITR
1457 		 * index to be used for software interrupt moderation, and then
1458 		 * trigger a software interrupt with a rate limit of 20K on
1459 		 * software interrupts, this will help avoid high interrupt
1460 		 * loads due to frequently polling and exiting polling.
1461 		 */
1462 		itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1463 		itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1464 			   ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1465 			   GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1466 	}
1467 	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1468 }
1469 
1470 /**
1471  * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1472  * @q_vector: q_vector to set WB_ON_ITR on
1473  *
1474  * We need to tell hardware to write-back completed descriptors even when
1475  * interrupts are disabled. Descriptors will be written back on cache line
1476  * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1477  * descriptors may not be written back if they don't fill a cache line until
1478  * the next interrupt.
1479  *
1480  * This sets the write-back frequency to whatever was set previously for the
1481  * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1482  * aren't meddling with the INTENA_M bit.
1483  */
1484 static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1485 {
1486 	struct ice_vsi *vsi = q_vector->vsi;
1487 
1488 	/* already in wb_on_itr mode no need to change it */
1489 	if (q_vector->wb_on_itr)
1490 		return;
1491 
1492 	/* use previously set ITR values for all of the ITR indices by
1493 	 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1494 	 * be static in non-adaptive mode (user configured)
1495 	 */
1496 	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1497 	     ((ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S) &
1498 	      GLINT_DYN_CTL_ITR_INDX_M) | GLINT_DYN_CTL_INTENA_MSK_M |
1499 	     GLINT_DYN_CTL_WB_ON_ITR_M);
1500 
1501 	q_vector->wb_on_itr = true;
1502 }
1503 
1504 /**
1505  * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1506  * @napi: napi struct with our devices info in it
1507  * @budget: amount of work driver is allowed to do this pass, in packets
1508  *
1509  * This function will clean all queues associated with a q_vector.
1510  *
1511  * Returns the amount of work done
1512  */
1513 int ice_napi_poll(struct napi_struct *napi, int budget)
1514 {
1515 	struct ice_q_vector *q_vector =
1516 				container_of(napi, struct ice_q_vector, napi);
1517 	struct ice_tx_ring *tx_ring;
1518 	struct ice_rx_ring *rx_ring;
1519 	bool clean_complete = true;
1520 	int budget_per_ring;
1521 	int work_done = 0;
1522 
1523 	/* Since the actual Tx work is minimal, we can give the Tx a larger
1524 	 * budget and be more aggressive about cleaning up the Tx descriptors.
1525 	 */
1526 	ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1527 		bool wd;
1528 
1529 		if (tx_ring->xsk_pool)
1530 			wd = ice_xmit_zc(tx_ring);
1531 		else if (ice_ring_is_xdp(tx_ring))
1532 			wd = true;
1533 		else
1534 			wd = ice_clean_tx_irq(tx_ring, budget);
1535 
1536 		if (!wd)
1537 			clean_complete = false;
1538 	}
1539 
1540 	/* Handle case where we are called by netpoll with a budget of 0 */
1541 	if (unlikely(budget <= 0))
1542 		return budget;
1543 
1544 	/* normally we have 1 Rx ring per q_vector */
1545 	if (unlikely(q_vector->num_ring_rx > 1))
1546 		/* We attempt to distribute budget to each Rx queue fairly, but
1547 		 * don't allow the budget to go below 1 because that would exit
1548 		 * polling early.
1549 		 */
1550 		budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1551 	else
1552 		/* Max of 1 Rx ring in this q_vector so give it the budget */
1553 		budget_per_ring = budget;
1554 
1555 	ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1556 		int cleaned;
1557 
1558 		/* A dedicated path for zero-copy allows making a single
1559 		 * comparison in the irq context instead of many inside the
1560 		 * ice_clean_rx_irq function and makes the codebase cleaner.
1561 		 */
1562 		cleaned = rx_ring->xsk_pool ?
1563 			  ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1564 			  ice_clean_rx_irq(rx_ring, budget_per_ring);
1565 		work_done += cleaned;
1566 		/* if we clean as many as budgeted, we must not be done */
1567 		if (cleaned >= budget_per_ring)
1568 			clean_complete = false;
1569 	}
1570 
1571 	/* If work not completed, return budget and polling will return */
1572 	if (!clean_complete) {
1573 		/* Set the writeback on ITR so partial completions of
1574 		 * cache-lines will still continue even if we're polling.
1575 		 */
1576 		ice_set_wb_on_itr(q_vector);
1577 		return budget;
1578 	}
1579 
1580 	/* Exit the polling mode, but don't re-enable interrupts if stack might
1581 	 * poll us due to busy-polling
1582 	 */
1583 	if (napi_complete_done(napi, work_done)) {
1584 		ice_net_dim(q_vector);
1585 		ice_enable_interrupt(q_vector);
1586 	} else {
1587 		ice_set_wb_on_itr(q_vector);
1588 	}
1589 
1590 	return min_t(int, work_done, budget - 1);
1591 }
1592 
1593 /**
1594  * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1595  * @tx_ring: the ring to be checked
1596  * @size: the size buffer we want to assure is available
1597  *
1598  * Returns -EBUSY if a stop is needed, else 0
1599  */
1600 static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1601 {
1602 	netif_tx_stop_queue(txring_txq(tx_ring));
1603 	/* Memory barrier before checking head and tail */
1604 	smp_mb();
1605 
1606 	/* Check again in a case another CPU has just made room available. */
1607 	if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1608 		return -EBUSY;
1609 
1610 	/* A reprieve! - use start_queue because it doesn't call schedule */
1611 	netif_tx_start_queue(txring_txq(tx_ring));
1612 	++tx_ring->ring_stats->tx_stats.restart_q;
1613 	return 0;
1614 }
1615 
1616 /**
1617  * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1618  * @tx_ring: the ring to be checked
1619  * @size:    the size buffer we want to assure is available
1620  *
1621  * Returns 0 if stop is not needed
1622  */
1623 static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1624 {
1625 	if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1626 		return 0;
1627 
1628 	return __ice_maybe_stop_tx(tx_ring, size);
1629 }
1630 
1631 /**
1632  * ice_tx_map - Build the Tx descriptor
1633  * @tx_ring: ring to send buffer on
1634  * @first: first buffer info buffer to use
1635  * @off: pointer to struct that holds offload parameters
1636  *
1637  * This function loops over the skb data pointed to by *first
1638  * and gets a physical address for each memory location and programs
1639  * it and the length into the transmit descriptor.
1640  */
1641 static void
1642 ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1643 	   struct ice_tx_offload_params *off)
1644 {
1645 	u64 td_offset, td_tag, td_cmd;
1646 	u16 i = tx_ring->next_to_use;
1647 	unsigned int data_len, size;
1648 	struct ice_tx_desc *tx_desc;
1649 	struct ice_tx_buf *tx_buf;
1650 	struct sk_buff *skb;
1651 	skb_frag_t *frag;
1652 	dma_addr_t dma;
1653 	bool kick;
1654 
1655 	td_tag = off->td_l2tag1;
1656 	td_cmd = off->td_cmd;
1657 	td_offset = off->td_offset;
1658 	skb = first->skb;
1659 
1660 	data_len = skb->data_len;
1661 	size = skb_headlen(skb);
1662 
1663 	tx_desc = ICE_TX_DESC(tx_ring, i);
1664 
1665 	if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1666 		td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1667 		td_tag = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
1668 			  ICE_TX_FLAGS_VLAN_S;
1669 	}
1670 
1671 	dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1672 
1673 	tx_buf = first;
1674 
1675 	for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1676 		unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1677 
1678 		if (dma_mapping_error(tx_ring->dev, dma))
1679 			goto dma_error;
1680 
1681 		/* record length, and DMA address */
1682 		dma_unmap_len_set(tx_buf, len, size);
1683 		dma_unmap_addr_set(tx_buf, dma, dma);
1684 
1685 		/* align size to end of page */
1686 		max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1687 		tx_desc->buf_addr = cpu_to_le64(dma);
1688 
1689 		/* account for data chunks larger than the hardware
1690 		 * can handle
1691 		 */
1692 		while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1693 			tx_desc->cmd_type_offset_bsz =
1694 				ice_build_ctob(td_cmd, td_offset, max_data,
1695 					       td_tag);
1696 
1697 			tx_desc++;
1698 			i++;
1699 
1700 			if (i == tx_ring->count) {
1701 				tx_desc = ICE_TX_DESC(tx_ring, 0);
1702 				i = 0;
1703 			}
1704 
1705 			dma += max_data;
1706 			size -= max_data;
1707 
1708 			max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1709 			tx_desc->buf_addr = cpu_to_le64(dma);
1710 		}
1711 
1712 		if (likely(!data_len))
1713 			break;
1714 
1715 		tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1716 							      size, td_tag);
1717 
1718 		tx_desc++;
1719 		i++;
1720 
1721 		if (i == tx_ring->count) {
1722 			tx_desc = ICE_TX_DESC(tx_ring, 0);
1723 			i = 0;
1724 		}
1725 
1726 		size = skb_frag_size(frag);
1727 		data_len -= size;
1728 
1729 		dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1730 				       DMA_TO_DEVICE);
1731 
1732 		tx_buf = &tx_ring->tx_buf[i];
1733 		tx_buf->type = ICE_TX_BUF_FRAG;
1734 	}
1735 
1736 	/* record SW timestamp if HW timestamp is not available */
1737 	skb_tx_timestamp(first->skb);
1738 
1739 	i++;
1740 	if (i == tx_ring->count)
1741 		i = 0;
1742 
1743 	/* write last descriptor with RS and EOP bits */
1744 	td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1745 	tx_desc->cmd_type_offset_bsz =
1746 			ice_build_ctob(td_cmd, td_offset, size, td_tag);
1747 
1748 	/* Force memory writes to complete before letting h/w know there
1749 	 * are new descriptors to fetch.
1750 	 *
1751 	 * We also use this memory barrier to make certain all of the
1752 	 * status bits have been updated before next_to_watch is written.
1753 	 */
1754 	wmb();
1755 
1756 	/* set next_to_watch value indicating a packet is present */
1757 	first->next_to_watch = tx_desc;
1758 
1759 	tx_ring->next_to_use = i;
1760 
1761 	ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1762 
1763 	/* notify HW of packet */
1764 	kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1765 				      netdev_xmit_more());
1766 	if (kick)
1767 		/* notify HW of packet */
1768 		writel(i, tx_ring->tail);
1769 
1770 	return;
1771 
1772 dma_error:
1773 	/* clear DMA mappings for failed tx_buf map */
1774 	for (;;) {
1775 		tx_buf = &tx_ring->tx_buf[i];
1776 		ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1777 		if (tx_buf == first)
1778 			break;
1779 		if (i == 0)
1780 			i = tx_ring->count;
1781 		i--;
1782 	}
1783 
1784 	tx_ring->next_to_use = i;
1785 }
1786 
1787 /**
1788  * ice_tx_csum - Enable Tx checksum offloads
1789  * @first: pointer to the first descriptor
1790  * @off: pointer to struct that holds offload parameters
1791  *
1792  * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1793  */
1794 static
1795 int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1796 {
1797 	u32 l4_len = 0, l3_len = 0, l2_len = 0;
1798 	struct sk_buff *skb = first->skb;
1799 	union {
1800 		struct iphdr *v4;
1801 		struct ipv6hdr *v6;
1802 		unsigned char *hdr;
1803 	} ip;
1804 	union {
1805 		struct tcphdr *tcp;
1806 		unsigned char *hdr;
1807 	} l4;
1808 	__be16 frag_off, protocol;
1809 	unsigned char *exthdr;
1810 	u32 offset, cmd = 0;
1811 	u8 l4_proto = 0;
1812 
1813 	if (skb->ip_summed != CHECKSUM_PARTIAL)
1814 		return 0;
1815 
1816 	protocol = vlan_get_protocol(skb);
1817 
1818 	if (eth_p_mpls(protocol)) {
1819 		ip.hdr = skb_inner_network_header(skb);
1820 		l4.hdr = skb_checksum_start(skb);
1821 	} else {
1822 		ip.hdr = skb_network_header(skb);
1823 		l4.hdr = skb_transport_header(skb);
1824 	}
1825 
1826 	/* compute outer L2 header size */
1827 	l2_len = ip.hdr - skb->data;
1828 	offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1829 
1830 	/* set the tx_flags to indicate the IP protocol type. this is
1831 	 * required so that checksum header computation below is accurate.
1832 	 */
1833 	if (ip.v4->version == 4)
1834 		first->tx_flags |= ICE_TX_FLAGS_IPV4;
1835 	else if (ip.v6->version == 6)
1836 		first->tx_flags |= ICE_TX_FLAGS_IPV6;
1837 
1838 	if (skb->encapsulation) {
1839 		bool gso_ena = false;
1840 		u32 tunnel = 0;
1841 
1842 		/* define outer network header type */
1843 		if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1844 			tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1845 				  ICE_TX_CTX_EIPT_IPV4 :
1846 				  ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1847 			l4_proto = ip.v4->protocol;
1848 		} else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1849 			int ret;
1850 
1851 			tunnel |= ICE_TX_CTX_EIPT_IPV6;
1852 			exthdr = ip.hdr + sizeof(*ip.v6);
1853 			l4_proto = ip.v6->nexthdr;
1854 			ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1855 					       &l4_proto, &frag_off);
1856 			if (ret < 0)
1857 				return -1;
1858 		}
1859 
1860 		/* define outer transport */
1861 		switch (l4_proto) {
1862 		case IPPROTO_UDP:
1863 			tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1864 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1865 			break;
1866 		case IPPROTO_GRE:
1867 			tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1868 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1869 			break;
1870 		case IPPROTO_IPIP:
1871 		case IPPROTO_IPV6:
1872 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1873 			l4.hdr = skb_inner_network_header(skb);
1874 			break;
1875 		default:
1876 			if (first->tx_flags & ICE_TX_FLAGS_TSO)
1877 				return -1;
1878 
1879 			skb_checksum_help(skb);
1880 			return 0;
1881 		}
1882 
1883 		/* compute outer L3 header size */
1884 		tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1885 			  ICE_TXD_CTX_QW0_EIPLEN_S;
1886 
1887 		/* switch IP header pointer from outer to inner header */
1888 		ip.hdr = skb_inner_network_header(skb);
1889 
1890 		/* compute tunnel header size */
1891 		tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1892 			   ICE_TXD_CTX_QW0_NATLEN_S;
1893 
1894 		gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1895 		/* indicate if we need to offload outer UDP header */
1896 		if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1897 		    (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1898 			tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1899 
1900 		/* record tunnel offload values */
1901 		off->cd_tunnel_params |= tunnel;
1902 
1903 		/* set DTYP=1 to indicate that it's an Tx context descriptor
1904 		 * in IPsec tunnel mode with Tx offloads in Quad word 1
1905 		 */
1906 		off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1907 
1908 		/* switch L4 header pointer from outer to inner */
1909 		l4.hdr = skb_inner_transport_header(skb);
1910 		l4_proto = 0;
1911 
1912 		/* reset type as we transition from outer to inner headers */
1913 		first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1914 		if (ip.v4->version == 4)
1915 			first->tx_flags |= ICE_TX_FLAGS_IPV4;
1916 		if (ip.v6->version == 6)
1917 			first->tx_flags |= ICE_TX_FLAGS_IPV6;
1918 	}
1919 
1920 	/* Enable IP checksum offloads */
1921 	if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1922 		l4_proto = ip.v4->protocol;
1923 		/* the stack computes the IP header already, the only time we
1924 		 * need the hardware to recompute it is in the case of TSO.
1925 		 */
1926 		if (first->tx_flags & ICE_TX_FLAGS_TSO)
1927 			cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1928 		else
1929 			cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1930 
1931 	} else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1932 		cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1933 		exthdr = ip.hdr + sizeof(*ip.v6);
1934 		l4_proto = ip.v6->nexthdr;
1935 		if (l4.hdr != exthdr)
1936 			ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1937 					 &frag_off);
1938 	} else {
1939 		return -1;
1940 	}
1941 
1942 	/* compute inner L3 header size */
1943 	l3_len = l4.hdr - ip.hdr;
1944 	offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1945 
1946 	/* Enable L4 checksum offloads */
1947 	switch (l4_proto) {
1948 	case IPPROTO_TCP:
1949 		/* enable checksum offloads */
1950 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1951 		l4_len = l4.tcp->doff;
1952 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1953 		break;
1954 	case IPPROTO_UDP:
1955 		/* enable UDP checksum offload */
1956 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1957 		l4_len = (sizeof(struct udphdr) >> 2);
1958 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1959 		break;
1960 	case IPPROTO_SCTP:
1961 		/* enable SCTP checksum offload */
1962 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1963 		l4_len = sizeof(struct sctphdr) >> 2;
1964 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1965 		break;
1966 
1967 	default:
1968 		if (first->tx_flags & ICE_TX_FLAGS_TSO)
1969 			return -1;
1970 		skb_checksum_help(skb);
1971 		return 0;
1972 	}
1973 
1974 	off->td_cmd |= cmd;
1975 	off->td_offset |= offset;
1976 	return 1;
1977 }
1978 
1979 /**
1980  * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1981  * @tx_ring: ring to send buffer on
1982  * @first: pointer to struct ice_tx_buf
1983  *
1984  * Checks the skb and set up correspondingly several generic transmit flags
1985  * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1986  */
1987 static void
1988 ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
1989 {
1990 	struct sk_buff *skb = first->skb;
1991 
1992 	/* nothing left to do, software offloaded VLAN */
1993 	if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1994 		return;
1995 
1996 	/* the VLAN ethertype/tpid is determined by VSI configuration and netdev
1997 	 * feature flags, which the driver only allows either 802.1Q or 802.1ad
1998 	 * VLAN offloads exclusively so we only care about the VLAN ID here
1999 	 */
2000 	if (skb_vlan_tag_present(skb)) {
2001 		first->tx_flags |= skb_vlan_tag_get(skb) << ICE_TX_FLAGS_VLAN_S;
2002 		if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
2003 			first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
2004 		else
2005 			first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
2006 	}
2007 
2008 	ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
2009 }
2010 
2011 /**
2012  * ice_tso - computes mss and TSO length to prepare for TSO
2013  * @first: pointer to struct ice_tx_buf
2014  * @off: pointer to struct that holds offload parameters
2015  *
2016  * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
2017  */
2018 static
2019 int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2020 {
2021 	struct sk_buff *skb = first->skb;
2022 	union {
2023 		struct iphdr *v4;
2024 		struct ipv6hdr *v6;
2025 		unsigned char *hdr;
2026 	} ip;
2027 	union {
2028 		struct tcphdr *tcp;
2029 		struct udphdr *udp;
2030 		unsigned char *hdr;
2031 	} l4;
2032 	u64 cd_mss, cd_tso_len;
2033 	__be16 protocol;
2034 	u32 paylen;
2035 	u8 l4_start;
2036 	int err;
2037 
2038 	if (skb->ip_summed != CHECKSUM_PARTIAL)
2039 		return 0;
2040 
2041 	if (!skb_is_gso(skb))
2042 		return 0;
2043 
2044 	err = skb_cow_head(skb, 0);
2045 	if (err < 0)
2046 		return err;
2047 
2048 	protocol = vlan_get_protocol(skb);
2049 
2050 	if (eth_p_mpls(protocol))
2051 		ip.hdr = skb_inner_network_header(skb);
2052 	else
2053 		ip.hdr = skb_network_header(skb);
2054 	l4.hdr = skb_checksum_start(skb);
2055 
2056 	/* initialize outer IP header fields */
2057 	if (ip.v4->version == 4) {
2058 		ip.v4->tot_len = 0;
2059 		ip.v4->check = 0;
2060 	} else {
2061 		ip.v6->payload_len = 0;
2062 	}
2063 
2064 	if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2065 					 SKB_GSO_GRE_CSUM |
2066 					 SKB_GSO_IPXIP4 |
2067 					 SKB_GSO_IPXIP6 |
2068 					 SKB_GSO_UDP_TUNNEL |
2069 					 SKB_GSO_UDP_TUNNEL_CSUM)) {
2070 		if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2071 		    (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2072 			l4.udp->len = 0;
2073 
2074 			/* determine offset of outer transport header */
2075 			l4_start = (u8)(l4.hdr - skb->data);
2076 
2077 			/* remove payload length from outer checksum */
2078 			paylen = skb->len - l4_start;
2079 			csum_replace_by_diff(&l4.udp->check,
2080 					     (__force __wsum)htonl(paylen));
2081 		}
2082 
2083 		/* reset pointers to inner headers */
2084 		ip.hdr = skb_inner_network_header(skb);
2085 		l4.hdr = skb_inner_transport_header(skb);
2086 
2087 		/* initialize inner IP header fields */
2088 		if (ip.v4->version == 4) {
2089 			ip.v4->tot_len = 0;
2090 			ip.v4->check = 0;
2091 		} else {
2092 			ip.v6->payload_len = 0;
2093 		}
2094 	}
2095 
2096 	/* determine offset of transport header */
2097 	l4_start = (u8)(l4.hdr - skb->data);
2098 
2099 	/* remove payload length from checksum */
2100 	paylen = skb->len - l4_start;
2101 
2102 	if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2103 		csum_replace_by_diff(&l4.udp->check,
2104 				     (__force __wsum)htonl(paylen));
2105 		/* compute length of UDP segmentation header */
2106 		off->header_len = (u8)sizeof(l4.udp) + l4_start;
2107 	} else {
2108 		csum_replace_by_diff(&l4.tcp->check,
2109 				     (__force __wsum)htonl(paylen));
2110 		/* compute length of TCP segmentation header */
2111 		off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2112 	}
2113 
2114 	/* update gso_segs and bytecount */
2115 	first->gso_segs = skb_shinfo(skb)->gso_segs;
2116 	first->bytecount += (first->gso_segs - 1) * off->header_len;
2117 
2118 	cd_tso_len = skb->len - off->header_len;
2119 	cd_mss = skb_shinfo(skb)->gso_size;
2120 
2121 	/* record cdesc_qw1 with TSO parameters */
2122 	off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2123 			     (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2124 			     (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2125 			     (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2126 	first->tx_flags |= ICE_TX_FLAGS_TSO;
2127 	return 1;
2128 }
2129 
2130 /**
2131  * ice_txd_use_count  - estimate the number of descriptors needed for Tx
2132  * @size: transmit request size in bytes
2133  *
2134  * Due to hardware alignment restrictions (4K alignment), we need to
2135  * assume that we can have no more than 12K of data per descriptor, even
2136  * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2137  * Thus, we need to divide by 12K. But division is slow! Instead,
2138  * we decompose the operation into shifts and one relatively cheap
2139  * multiply operation.
2140  *
2141  * To divide by 12K, we first divide by 4K, then divide by 3:
2142  *     To divide by 4K, shift right by 12 bits
2143  *     To divide by 3, multiply by 85, then divide by 256
2144  *     (Divide by 256 is done by shifting right by 8 bits)
2145  * Finally, we add one to round up. Because 256 isn't an exact multiple of
2146  * 3, we'll underestimate near each multiple of 12K. This is actually more
2147  * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2148  * segment. For our purposes this is accurate out to 1M which is orders of
2149  * magnitude greater than our largest possible GSO size.
2150  *
2151  * This would then be implemented as:
2152  *     return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2153  *
2154  * Since multiplication and division are commutative, we can reorder
2155  * operations into:
2156  *     return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2157  */
2158 static unsigned int ice_txd_use_count(unsigned int size)
2159 {
2160 	return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2161 }
2162 
2163 /**
2164  * ice_xmit_desc_count - calculate number of Tx descriptors needed
2165  * @skb: send buffer
2166  *
2167  * Returns number of data descriptors needed for this skb.
2168  */
2169 static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2170 {
2171 	const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2172 	unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2173 	unsigned int count = 0, size = skb_headlen(skb);
2174 
2175 	for (;;) {
2176 		count += ice_txd_use_count(size);
2177 
2178 		if (!nr_frags--)
2179 			break;
2180 
2181 		size = skb_frag_size(frag++);
2182 	}
2183 
2184 	return count;
2185 }
2186 
2187 /**
2188  * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2189  * @skb: send buffer
2190  *
2191  * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2192  * and so we need to figure out the cases where we need to linearize the skb.
2193  *
2194  * For TSO we need to count the TSO header and segment payload separately.
2195  * As such we need to check cases where we have 7 fragments or more as we
2196  * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2197  * the segment payload in the first descriptor, and another 7 for the
2198  * fragments.
2199  */
2200 static bool __ice_chk_linearize(struct sk_buff *skb)
2201 {
2202 	const skb_frag_t *frag, *stale;
2203 	int nr_frags, sum;
2204 
2205 	/* no need to check if number of frags is less than 7 */
2206 	nr_frags = skb_shinfo(skb)->nr_frags;
2207 	if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2208 		return false;
2209 
2210 	/* We need to walk through the list and validate that each group
2211 	 * of 6 fragments totals at least gso_size.
2212 	 */
2213 	nr_frags -= ICE_MAX_BUF_TXD - 2;
2214 	frag = &skb_shinfo(skb)->frags[0];
2215 
2216 	/* Initialize size to the negative value of gso_size minus 1. We
2217 	 * use this as the worst case scenario in which the frag ahead
2218 	 * of us only provides one byte which is why we are limited to 6
2219 	 * descriptors for a single transmit as the header and previous
2220 	 * fragment are already consuming 2 descriptors.
2221 	 */
2222 	sum = 1 - skb_shinfo(skb)->gso_size;
2223 
2224 	/* Add size of frags 0 through 4 to create our initial sum */
2225 	sum += skb_frag_size(frag++);
2226 	sum += skb_frag_size(frag++);
2227 	sum += skb_frag_size(frag++);
2228 	sum += skb_frag_size(frag++);
2229 	sum += skb_frag_size(frag++);
2230 
2231 	/* Walk through fragments adding latest fragment, testing it, and
2232 	 * then removing stale fragments from the sum.
2233 	 */
2234 	for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2235 		int stale_size = skb_frag_size(stale);
2236 
2237 		sum += skb_frag_size(frag++);
2238 
2239 		/* The stale fragment may present us with a smaller
2240 		 * descriptor than the actual fragment size. To account
2241 		 * for that we need to remove all the data on the front and
2242 		 * figure out what the remainder would be in the last
2243 		 * descriptor associated with the fragment.
2244 		 */
2245 		if (stale_size > ICE_MAX_DATA_PER_TXD) {
2246 			int align_pad = -(skb_frag_off(stale)) &
2247 					(ICE_MAX_READ_REQ_SIZE - 1);
2248 
2249 			sum -= align_pad;
2250 			stale_size -= align_pad;
2251 
2252 			do {
2253 				sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2254 				stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2255 			} while (stale_size > ICE_MAX_DATA_PER_TXD);
2256 		}
2257 
2258 		/* if sum is negative we failed to make sufficient progress */
2259 		if (sum < 0)
2260 			return true;
2261 
2262 		if (!nr_frags--)
2263 			break;
2264 
2265 		sum -= stale_size;
2266 	}
2267 
2268 	return false;
2269 }
2270 
2271 /**
2272  * ice_chk_linearize - Check if there are more than 8 fragments per packet
2273  * @skb:      send buffer
2274  * @count:    number of buffers used
2275  *
2276  * Note: Our HW can't scatter-gather more than 8 fragments to build
2277  * a packet on the wire and so we need to figure out the cases where we
2278  * need to linearize the skb.
2279  */
2280 static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2281 {
2282 	/* Both TSO and single send will work if count is less than 8 */
2283 	if (likely(count < ICE_MAX_BUF_TXD))
2284 		return false;
2285 
2286 	if (skb_is_gso(skb))
2287 		return __ice_chk_linearize(skb);
2288 
2289 	/* we can support up to 8 data buffers for a single send */
2290 	return count != ICE_MAX_BUF_TXD;
2291 }
2292 
2293 /**
2294  * ice_tstamp - set up context descriptor for hardware timestamp
2295  * @tx_ring: pointer to the Tx ring to send buffer on
2296  * @skb: pointer to the SKB we're sending
2297  * @first: Tx buffer
2298  * @off: Tx offload parameters
2299  */
2300 static void
2301 ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2302 	   struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2303 {
2304 	s8 idx;
2305 
2306 	/* only timestamp the outbound packet if the user has requested it */
2307 	if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2308 		return;
2309 
2310 	if (!tx_ring->ptp_tx)
2311 		return;
2312 
2313 	/* Tx timestamps cannot be sampled when doing TSO */
2314 	if (first->tx_flags & ICE_TX_FLAGS_TSO)
2315 		return;
2316 
2317 	/* Grab an open timestamp slot */
2318 	idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2319 	if (idx < 0) {
2320 		tx_ring->vsi->back->ptp.tx_hwtstamp_skipped++;
2321 		return;
2322 	}
2323 
2324 	off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2325 			     (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2326 			     ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2327 	first->tx_flags |= ICE_TX_FLAGS_TSYN;
2328 }
2329 
2330 /**
2331  * ice_xmit_frame_ring - Sends buffer on Tx ring
2332  * @skb: send buffer
2333  * @tx_ring: ring to send buffer on
2334  *
2335  * Returns NETDEV_TX_OK if sent, else an error code
2336  */
2337 static netdev_tx_t
2338 ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2339 {
2340 	struct ice_tx_offload_params offload = { 0 };
2341 	struct ice_vsi *vsi = tx_ring->vsi;
2342 	struct ice_tx_buf *first;
2343 	struct ethhdr *eth;
2344 	unsigned int count;
2345 	int tso, csum;
2346 
2347 	ice_trace(xmit_frame_ring, tx_ring, skb);
2348 
2349 	if (unlikely(ipv6_hopopt_jumbo_remove(skb)))
2350 		goto out_drop;
2351 
2352 	count = ice_xmit_desc_count(skb);
2353 	if (ice_chk_linearize(skb, count)) {
2354 		if (__skb_linearize(skb))
2355 			goto out_drop;
2356 		count = ice_txd_use_count(skb->len);
2357 		tx_ring->ring_stats->tx_stats.tx_linearize++;
2358 	}
2359 
2360 	/* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2361 	 *       + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2362 	 *       + 4 desc gap to avoid the cache line where head is,
2363 	 *       + 1 desc for context descriptor,
2364 	 * otherwise try next time
2365 	 */
2366 	if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2367 			      ICE_DESCS_FOR_CTX_DESC)) {
2368 		tx_ring->ring_stats->tx_stats.tx_busy++;
2369 		return NETDEV_TX_BUSY;
2370 	}
2371 
2372 	/* prefetch for bql data which is infrequently used */
2373 	netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2374 
2375 	offload.tx_ring = tx_ring;
2376 
2377 	/* record the location of the first descriptor for this packet */
2378 	first = &tx_ring->tx_buf[tx_ring->next_to_use];
2379 	first->skb = skb;
2380 	first->type = ICE_TX_BUF_SKB;
2381 	first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2382 	first->gso_segs = 1;
2383 	first->tx_flags = 0;
2384 
2385 	/* prepare the VLAN tagging flags for Tx */
2386 	ice_tx_prepare_vlan_flags(tx_ring, first);
2387 	if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2388 		offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2389 					(ICE_TX_CTX_DESC_IL2TAG2 <<
2390 					ICE_TXD_CTX_QW1_CMD_S));
2391 		offload.cd_l2tag2 = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
2392 			ICE_TX_FLAGS_VLAN_S;
2393 	}
2394 
2395 	/* set up TSO offload */
2396 	tso = ice_tso(first, &offload);
2397 	if (tso < 0)
2398 		goto out_drop;
2399 
2400 	/* always set up Tx checksum offload */
2401 	csum = ice_tx_csum(first, &offload);
2402 	if (csum < 0)
2403 		goto out_drop;
2404 
2405 	/* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2406 	eth = (struct ethhdr *)skb_mac_header(skb);
2407 	if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2408 		      eth->h_proto == htons(ETH_P_LLDP)) &&
2409 		     vsi->type == ICE_VSI_PF &&
2410 		     vsi->port_info->qos_cfg.is_sw_lldp))
2411 		offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2412 					ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2413 					ICE_TXD_CTX_QW1_CMD_S);
2414 
2415 	ice_tstamp(tx_ring, skb, first, &offload);
2416 	if (ice_is_switchdev_running(vsi->back))
2417 		ice_eswitch_set_target_vsi(skb, &offload);
2418 
2419 	if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2420 		struct ice_tx_ctx_desc *cdesc;
2421 		u16 i = tx_ring->next_to_use;
2422 
2423 		/* grab the next descriptor */
2424 		cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2425 		i++;
2426 		tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2427 
2428 		/* setup context descriptor */
2429 		cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2430 		cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2431 		cdesc->rsvd = cpu_to_le16(0);
2432 		cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2433 	}
2434 
2435 	ice_tx_map(tx_ring, first, &offload);
2436 	return NETDEV_TX_OK;
2437 
2438 out_drop:
2439 	ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2440 	dev_kfree_skb_any(skb);
2441 	return NETDEV_TX_OK;
2442 }
2443 
2444 /**
2445  * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2446  * @skb: send buffer
2447  * @netdev: network interface device structure
2448  *
2449  * Returns NETDEV_TX_OK if sent, else an error code
2450  */
2451 netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2452 {
2453 	struct ice_netdev_priv *np = netdev_priv(netdev);
2454 	struct ice_vsi *vsi = np->vsi;
2455 	struct ice_tx_ring *tx_ring;
2456 
2457 	tx_ring = vsi->tx_rings[skb->queue_mapping];
2458 
2459 	/* hardware can't handle really short frames, hardware padding works
2460 	 * beyond this point
2461 	 */
2462 	if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2463 		return NETDEV_TX_OK;
2464 
2465 	return ice_xmit_frame_ring(skb, tx_ring);
2466 }
2467 
2468 /**
2469  * ice_get_dscp_up - return the UP/TC value for a SKB
2470  * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2471  * @skb: SKB to query for info to determine UP/TC
2472  *
2473  * This function is to only be called when the PF is in L3 DSCP PFC mode
2474  */
2475 static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2476 {
2477 	u8 dscp = 0;
2478 
2479 	if (skb->protocol == htons(ETH_P_IP))
2480 		dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2481 	else if (skb->protocol == htons(ETH_P_IPV6))
2482 		dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2483 
2484 	return dcbcfg->dscp_map[dscp];
2485 }
2486 
2487 u16
2488 ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2489 		 struct net_device *sb_dev)
2490 {
2491 	struct ice_pf *pf = ice_netdev_to_pf(netdev);
2492 	struct ice_dcbx_cfg *dcbcfg;
2493 
2494 	dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2495 	if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2496 		skb->priority = ice_get_dscp_up(dcbcfg, skb);
2497 
2498 	return netdev_pick_tx(netdev, skb, sb_dev);
2499 }
2500 
2501 /**
2502  * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2503  * @tx_ring: tx_ring to clean
2504  */
2505 void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2506 {
2507 	struct ice_vsi *vsi = tx_ring->vsi;
2508 	s16 i = tx_ring->next_to_clean;
2509 	int budget = ICE_DFLT_IRQ_WORK;
2510 	struct ice_tx_desc *tx_desc;
2511 	struct ice_tx_buf *tx_buf;
2512 
2513 	tx_buf = &tx_ring->tx_buf[i];
2514 	tx_desc = ICE_TX_DESC(tx_ring, i);
2515 	i -= tx_ring->count;
2516 
2517 	do {
2518 		struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2519 
2520 		/* if next_to_watch is not set then there is no pending work */
2521 		if (!eop_desc)
2522 			break;
2523 
2524 		/* prevent any other reads prior to eop_desc */
2525 		smp_rmb();
2526 
2527 		/* if the descriptor isn't done, no work to do */
2528 		if (!(eop_desc->cmd_type_offset_bsz &
2529 		      cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2530 			break;
2531 
2532 		/* clear next_to_watch to prevent false hangs */
2533 		tx_buf->next_to_watch = NULL;
2534 		tx_desc->buf_addr = 0;
2535 		tx_desc->cmd_type_offset_bsz = 0;
2536 
2537 		/* move past filter desc */
2538 		tx_buf++;
2539 		tx_desc++;
2540 		i++;
2541 		if (unlikely(!i)) {
2542 			i -= tx_ring->count;
2543 			tx_buf = tx_ring->tx_buf;
2544 			tx_desc = ICE_TX_DESC(tx_ring, 0);
2545 		}
2546 
2547 		/* unmap the data header */
2548 		if (dma_unmap_len(tx_buf, len))
2549 			dma_unmap_single(tx_ring->dev,
2550 					 dma_unmap_addr(tx_buf, dma),
2551 					 dma_unmap_len(tx_buf, len),
2552 					 DMA_TO_DEVICE);
2553 		if (tx_buf->type == ICE_TX_BUF_DUMMY)
2554 			devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2555 
2556 		/* clear next_to_watch to prevent false hangs */
2557 		tx_buf->type = ICE_TX_BUF_EMPTY;
2558 		tx_buf->tx_flags = 0;
2559 		tx_buf->next_to_watch = NULL;
2560 		dma_unmap_len_set(tx_buf, len, 0);
2561 		tx_desc->buf_addr = 0;
2562 		tx_desc->cmd_type_offset_bsz = 0;
2563 
2564 		/* move past eop_desc for start of next FD desc */
2565 		tx_buf++;
2566 		tx_desc++;
2567 		i++;
2568 		if (unlikely(!i)) {
2569 			i -= tx_ring->count;
2570 			tx_buf = tx_ring->tx_buf;
2571 			tx_desc = ICE_TX_DESC(tx_ring, 0);
2572 		}
2573 
2574 		budget--;
2575 	} while (likely(budget));
2576 
2577 	i += tx_ring->count;
2578 	tx_ring->next_to_clean = i;
2579 
2580 	/* re-enable interrupt if needed */
2581 	ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2582 }
2583