xref: /openbmc/linux/drivers/net/ethernet/intel/ice/ice_txrx.c (revision 69bfac968a06aab5927160f8736485f85c3e8ee8)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 /* The driver transmit and receive code */
5 
6 #include <linux/prefetch.h>
7 #include <linux/mm.h>
8 #include <linux/bpf_trace.h>
9 #include <net/xdp.h>
10 #include "ice_txrx_lib.h"
11 #include "ice_lib.h"
12 #include "ice.h"
13 #include "ice_trace.h"
14 #include "ice_dcb_lib.h"
15 #include "ice_xsk.h"
16 
17 #define ICE_RX_HDR_SIZE		256
18 
19 #define FDIR_DESC_RXDID 0x40
20 #define ICE_FDIR_CLEAN_DELAY 10
21 
22 /**
23  * ice_prgm_fdir_fltr - Program a Flow Director filter
24  * @vsi: VSI to send dummy packet
25  * @fdir_desc: flow director descriptor
26  * @raw_packet: allocated buffer for flow director
27  */
28 int
29 ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
30 		   u8 *raw_packet)
31 {
32 	struct ice_tx_buf *tx_buf, *first;
33 	struct ice_fltr_desc *f_desc;
34 	struct ice_tx_desc *tx_desc;
35 	struct ice_ring *tx_ring;
36 	struct device *dev;
37 	dma_addr_t dma;
38 	u32 td_cmd;
39 	u16 i;
40 
41 	/* VSI and Tx ring */
42 	if (!vsi)
43 		return -ENOENT;
44 	tx_ring = vsi->tx_rings[0];
45 	if (!tx_ring || !tx_ring->desc)
46 		return -ENOENT;
47 	dev = tx_ring->dev;
48 
49 	/* we are using two descriptors to add/del a filter and we can wait */
50 	for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
51 		if (!i)
52 			return -EAGAIN;
53 		msleep_interruptible(1);
54 	}
55 
56 	dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
57 			     DMA_TO_DEVICE);
58 
59 	if (dma_mapping_error(dev, dma))
60 		return -EINVAL;
61 
62 	/* grab the next descriptor */
63 	i = tx_ring->next_to_use;
64 	first = &tx_ring->tx_buf[i];
65 	f_desc = ICE_TX_FDIRDESC(tx_ring, i);
66 	memcpy(f_desc, fdir_desc, sizeof(*f_desc));
67 
68 	i++;
69 	i = (i < tx_ring->count) ? i : 0;
70 	tx_desc = ICE_TX_DESC(tx_ring, i);
71 	tx_buf = &tx_ring->tx_buf[i];
72 
73 	i++;
74 	tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
75 
76 	memset(tx_buf, 0, sizeof(*tx_buf));
77 	dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
78 	dma_unmap_addr_set(tx_buf, dma, dma);
79 
80 	tx_desc->buf_addr = cpu_to_le64(dma);
81 	td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
82 		 ICE_TX_DESC_CMD_RE;
83 
84 	tx_buf->tx_flags = ICE_TX_FLAGS_DUMMY_PKT;
85 	tx_buf->raw_buf = raw_packet;
86 
87 	tx_desc->cmd_type_offset_bsz =
88 		ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
89 
90 	/* Force memory write to complete before letting h/w know
91 	 * there are new descriptors to fetch.
92 	 */
93 	wmb();
94 
95 	/* mark the data descriptor to be watched */
96 	first->next_to_watch = tx_desc;
97 
98 	writel(tx_ring->next_to_use, tx_ring->tail);
99 
100 	return 0;
101 }
102 
103 /**
104  * ice_unmap_and_free_tx_buf - Release a Tx buffer
105  * @ring: the ring that owns the buffer
106  * @tx_buf: the buffer to free
107  */
108 static void
109 ice_unmap_and_free_tx_buf(struct ice_ring *ring, struct ice_tx_buf *tx_buf)
110 {
111 	if (tx_buf->skb) {
112 		if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
113 			devm_kfree(ring->dev, tx_buf->raw_buf);
114 		else if (ice_ring_is_xdp(ring))
115 			page_frag_free(tx_buf->raw_buf);
116 		else
117 			dev_kfree_skb_any(tx_buf->skb);
118 		if (dma_unmap_len(tx_buf, len))
119 			dma_unmap_single(ring->dev,
120 					 dma_unmap_addr(tx_buf, dma),
121 					 dma_unmap_len(tx_buf, len),
122 					 DMA_TO_DEVICE);
123 	} else if (dma_unmap_len(tx_buf, len)) {
124 		dma_unmap_page(ring->dev,
125 			       dma_unmap_addr(tx_buf, dma),
126 			       dma_unmap_len(tx_buf, len),
127 			       DMA_TO_DEVICE);
128 	}
129 
130 	tx_buf->next_to_watch = NULL;
131 	tx_buf->skb = NULL;
132 	dma_unmap_len_set(tx_buf, len, 0);
133 	/* tx_buf must be completely set up in the transmit path */
134 }
135 
136 static struct netdev_queue *txring_txq(const struct ice_ring *ring)
137 {
138 	return netdev_get_tx_queue(ring->netdev, ring->q_index);
139 }
140 
141 /**
142  * ice_clean_tx_ring - Free any empty Tx buffers
143  * @tx_ring: ring to be cleaned
144  */
145 void ice_clean_tx_ring(struct ice_ring *tx_ring)
146 {
147 	u16 i;
148 
149 	if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
150 		ice_xsk_clean_xdp_ring(tx_ring);
151 		goto tx_skip_free;
152 	}
153 
154 	/* ring already cleared, nothing to do */
155 	if (!tx_ring->tx_buf)
156 		return;
157 
158 	/* Free all the Tx ring sk_buffs */
159 	for (i = 0; i < tx_ring->count; i++)
160 		ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
161 
162 tx_skip_free:
163 	memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
164 
165 	/* Zero out the descriptor ring */
166 	memset(tx_ring->desc, 0, tx_ring->size);
167 
168 	tx_ring->next_to_use = 0;
169 	tx_ring->next_to_clean = 0;
170 
171 	if (!tx_ring->netdev)
172 		return;
173 
174 	/* cleanup Tx queue statistics */
175 	netdev_tx_reset_queue(txring_txq(tx_ring));
176 }
177 
178 /**
179  * ice_free_tx_ring - Free Tx resources per queue
180  * @tx_ring: Tx descriptor ring for a specific queue
181  *
182  * Free all transmit software resources
183  */
184 void ice_free_tx_ring(struct ice_ring *tx_ring)
185 {
186 	ice_clean_tx_ring(tx_ring);
187 	devm_kfree(tx_ring->dev, tx_ring->tx_buf);
188 	tx_ring->tx_buf = NULL;
189 
190 	if (tx_ring->desc) {
191 		dmam_free_coherent(tx_ring->dev, tx_ring->size,
192 				   tx_ring->desc, tx_ring->dma);
193 		tx_ring->desc = NULL;
194 	}
195 }
196 
197 /**
198  * ice_clean_tx_irq - Reclaim resources after transmit completes
199  * @tx_ring: Tx ring to clean
200  * @napi_budget: Used to determine if we are in netpoll
201  *
202  * Returns true if there's any budget left (e.g. the clean is finished)
203  */
204 static bool ice_clean_tx_irq(struct ice_ring *tx_ring, int napi_budget)
205 {
206 	unsigned int total_bytes = 0, total_pkts = 0;
207 	unsigned int budget = ICE_DFLT_IRQ_WORK;
208 	struct ice_vsi *vsi = tx_ring->vsi;
209 	s16 i = tx_ring->next_to_clean;
210 	struct ice_tx_desc *tx_desc;
211 	struct ice_tx_buf *tx_buf;
212 
213 	tx_buf = &tx_ring->tx_buf[i];
214 	tx_desc = ICE_TX_DESC(tx_ring, i);
215 	i -= tx_ring->count;
216 
217 	prefetch(&vsi->state);
218 
219 	do {
220 		struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
221 
222 		/* if next_to_watch is not set then there is no work pending */
223 		if (!eop_desc)
224 			break;
225 
226 		smp_rmb();	/* prevent any other reads prior to eop_desc */
227 
228 		ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
229 		/* if the descriptor isn't done, no work yet to do */
230 		if (!(eop_desc->cmd_type_offset_bsz &
231 		      cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
232 			break;
233 
234 		/* clear next_to_watch to prevent false hangs */
235 		tx_buf->next_to_watch = NULL;
236 
237 		/* update the statistics for this packet */
238 		total_bytes += tx_buf->bytecount;
239 		total_pkts += tx_buf->gso_segs;
240 
241 		if (ice_ring_is_xdp(tx_ring))
242 			page_frag_free(tx_buf->raw_buf);
243 		else
244 			/* free the skb */
245 			napi_consume_skb(tx_buf->skb, napi_budget);
246 
247 		/* unmap skb header data */
248 		dma_unmap_single(tx_ring->dev,
249 				 dma_unmap_addr(tx_buf, dma),
250 				 dma_unmap_len(tx_buf, len),
251 				 DMA_TO_DEVICE);
252 
253 		/* clear tx_buf data */
254 		tx_buf->skb = NULL;
255 		dma_unmap_len_set(tx_buf, len, 0);
256 
257 		/* unmap remaining buffers */
258 		while (tx_desc != eop_desc) {
259 			ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
260 			tx_buf++;
261 			tx_desc++;
262 			i++;
263 			if (unlikely(!i)) {
264 				i -= tx_ring->count;
265 				tx_buf = tx_ring->tx_buf;
266 				tx_desc = ICE_TX_DESC(tx_ring, 0);
267 			}
268 
269 			/* unmap any remaining paged data */
270 			if (dma_unmap_len(tx_buf, len)) {
271 				dma_unmap_page(tx_ring->dev,
272 					       dma_unmap_addr(tx_buf, dma),
273 					       dma_unmap_len(tx_buf, len),
274 					       DMA_TO_DEVICE);
275 				dma_unmap_len_set(tx_buf, len, 0);
276 			}
277 		}
278 		ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
279 
280 		/* move us one more past the eop_desc for start of next pkt */
281 		tx_buf++;
282 		tx_desc++;
283 		i++;
284 		if (unlikely(!i)) {
285 			i -= tx_ring->count;
286 			tx_buf = tx_ring->tx_buf;
287 			tx_desc = ICE_TX_DESC(tx_ring, 0);
288 		}
289 
290 		prefetch(tx_desc);
291 
292 		/* update budget accounting */
293 		budget--;
294 	} while (likely(budget));
295 
296 	i += tx_ring->count;
297 	tx_ring->next_to_clean = i;
298 
299 	ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
300 
301 	if (ice_ring_is_xdp(tx_ring))
302 		return !!budget;
303 
304 	netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts,
305 				  total_bytes);
306 
307 #define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
308 	if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
309 		     (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
310 		/* Make sure that anybody stopping the queue after this
311 		 * sees the new next_to_clean.
312 		 */
313 		smp_mb();
314 		if (__netif_subqueue_stopped(tx_ring->netdev,
315 					     tx_ring->q_index) &&
316 		    !test_bit(ICE_VSI_DOWN, vsi->state)) {
317 			netif_wake_subqueue(tx_ring->netdev,
318 					    tx_ring->q_index);
319 			++tx_ring->tx_stats.restart_q;
320 		}
321 	}
322 
323 	return !!budget;
324 }
325 
326 /**
327  * ice_setup_tx_ring - Allocate the Tx descriptors
328  * @tx_ring: the Tx ring to set up
329  *
330  * Return 0 on success, negative on error
331  */
332 int ice_setup_tx_ring(struct ice_ring *tx_ring)
333 {
334 	struct device *dev = tx_ring->dev;
335 
336 	if (!dev)
337 		return -ENOMEM;
338 
339 	/* warn if we are about to overwrite the pointer */
340 	WARN_ON(tx_ring->tx_buf);
341 	tx_ring->tx_buf =
342 		devm_kzalloc(dev, sizeof(*tx_ring->tx_buf) * tx_ring->count,
343 			     GFP_KERNEL);
344 	if (!tx_ring->tx_buf)
345 		return -ENOMEM;
346 
347 	/* round up to nearest page */
348 	tx_ring->size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
349 			      PAGE_SIZE);
350 	tx_ring->desc = dmam_alloc_coherent(dev, tx_ring->size, &tx_ring->dma,
351 					    GFP_KERNEL);
352 	if (!tx_ring->desc) {
353 		dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
354 			tx_ring->size);
355 		goto err;
356 	}
357 
358 	tx_ring->next_to_use = 0;
359 	tx_ring->next_to_clean = 0;
360 	tx_ring->tx_stats.prev_pkt = -1;
361 	return 0;
362 
363 err:
364 	devm_kfree(dev, tx_ring->tx_buf);
365 	tx_ring->tx_buf = NULL;
366 	return -ENOMEM;
367 }
368 
369 /**
370  * ice_clean_rx_ring - Free Rx buffers
371  * @rx_ring: ring to be cleaned
372  */
373 void ice_clean_rx_ring(struct ice_ring *rx_ring)
374 {
375 	struct device *dev = rx_ring->dev;
376 	u16 i;
377 
378 	/* ring already cleared, nothing to do */
379 	if (!rx_ring->rx_buf)
380 		return;
381 
382 	if (rx_ring->skb) {
383 		dev_kfree_skb(rx_ring->skb);
384 		rx_ring->skb = NULL;
385 	}
386 
387 	if (rx_ring->xsk_pool) {
388 		ice_xsk_clean_rx_ring(rx_ring);
389 		goto rx_skip_free;
390 	}
391 
392 	/* Free all the Rx ring sk_buffs */
393 	for (i = 0; i < rx_ring->count; i++) {
394 		struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
395 
396 		if (!rx_buf->page)
397 			continue;
398 
399 		/* Invalidate cache lines that may have been written to by
400 		 * device so that we avoid corrupting memory.
401 		 */
402 		dma_sync_single_range_for_cpu(dev, rx_buf->dma,
403 					      rx_buf->page_offset,
404 					      rx_ring->rx_buf_len,
405 					      DMA_FROM_DEVICE);
406 
407 		/* free resources associated with mapping */
408 		dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
409 				     DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
410 		__page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
411 
412 		rx_buf->page = NULL;
413 		rx_buf->page_offset = 0;
414 	}
415 
416 rx_skip_free:
417 	memset(rx_ring->rx_buf, 0, sizeof(*rx_ring->rx_buf) * rx_ring->count);
418 
419 	/* Zero out the descriptor ring */
420 	memset(rx_ring->desc, 0, rx_ring->size);
421 
422 	rx_ring->next_to_alloc = 0;
423 	rx_ring->next_to_clean = 0;
424 	rx_ring->next_to_use = 0;
425 }
426 
427 /**
428  * ice_free_rx_ring - Free Rx resources
429  * @rx_ring: ring to clean the resources from
430  *
431  * Free all receive software resources
432  */
433 void ice_free_rx_ring(struct ice_ring *rx_ring)
434 {
435 	ice_clean_rx_ring(rx_ring);
436 	if (rx_ring->vsi->type == ICE_VSI_PF)
437 		if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
438 			xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
439 	rx_ring->xdp_prog = NULL;
440 	devm_kfree(rx_ring->dev, rx_ring->rx_buf);
441 	rx_ring->rx_buf = NULL;
442 
443 	if (rx_ring->desc) {
444 		dmam_free_coherent(rx_ring->dev, rx_ring->size,
445 				   rx_ring->desc, rx_ring->dma);
446 		rx_ring->desc = NULL;
447 	}
448 }
449 
450 /**
451  * ice_setup_rx_ring - Allocate the Rx descriptors
452  * @rx_ring: the Rx ring to set up
453  *
454  * Return 0 on success, negative on error
455  */
456 int ice_setup_rx_ring(struct ice_ring *rx_ring)
457 {
458 	struct device *dev = rx_ring->dev;
459 
460 	if (!dev)
461 		return -ENOMEM;
462 
463 	/* warn if we are about to overwrite the pointer */
464 	WARN_ON(rx_ring->rx_buf);
465 	rx_ring->rx_buf =
466 		devm_kzalloc(dev, sizeof(*rx_ring->rx_buf) * rx_ring->count,
467 			     GFP_KERNEL);
468 	if (!rx_ring->rx_buf)
469 		return -ENOMEM;
470 
471 	/* round up to nearest page */
472 	rx_ring->size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
473 			      PAGE_SIZE);
474 	rx_ring->desc = dmam_alloc_coherent(dev, rx_ring->size, &rx_ring->dma,
475 					    GFP_KERNEL);
476 	if (!rx_ring->desc) {
477 		dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
478 			rx_ring->size);
479 		goto err;
480 	}
481 
482 	rx_ring->next_to_use = 0;
483 	rx_ring->next_to_clean = 0;
484 
485 	if (ice_is_xdp_ena_vsi(rx_ring->vsi))
486 		WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
487 
488 	if (rx_ring->vsi->type == ICE_VSI_PF &&
489 	    !xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
490 		if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
491 				     rx_ring->q_index, rx_ring->q_vector->napi.napi_id))
492 			goto err;
493 	return 0;
494 
495 err:
496 	devm_kfree(dev, rx_ring->rx_buf);
497 	rx_ring->rx_buf = NULL;
498 	return -ENOMEM;
499 }
500 
501 static unsigned int
502 ice_rx_frame_truesize(struct ice_ring *rx_ring, unsigned int __maybe_unused size)
503 {
504 	unsigned int truesize;
505 
506 #if (PAGE_SIZE < 8192)
507 	truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
508 #else
509 	truesize = rx_ring->rx_offset ?
510 		SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
511 		SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
512 		SKB_DATA_ALIGN(size);
513 #endif
514 	return truesize;
515 }
516 
517 /**
518  * ice_run_xdp - Executes an XDP program on initialized xdp_buff
519  * @rx_ring: Rx ring
520  * @xdp: xdp_buff used as input to the XDP program
521  * @xdp_prog: XDP program to run
522  *
523  * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
524  */
525 static int
526 ice_run_xdp(struct ice_ring *rx_ring, struct xdp_buff *xdp,
527 	    struct bpf_prog *xdp_prog)
528 {
529 	struct ice_ring *xdp_ring;
530 	int err, result;
531 	u32 act;
532 
533 	act = bpf_prog_run_xdp(xdp_prog, xdp);
534 	switch (act) {
535 	case XDP_PASS:
536 		return ICE_XDP_PASS;
537 	case XDP_TX:
538 		xdp_ring = rx_ring->vsi->xdp_rings[smp_processor_id()];
539 		result = ice_xmit_xdp_buff(xdp, xdp_ring);
540 		if (result == ICE_XDP_CONSUMED)
541 			goto out_failure;
542 		return result;
543 	case XDP_REDIRECT:
544 		err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
545 		if (err)
546 			goto out_failure;
547 		return ICE_XDP_REDIR;
548 	default:
549 		bpf_warn_invalid_xdp_action(act);
550 		fallthrough;
551 	case XDP_ABORTED:
552 out_failure:
553 		trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
554 		fallthrough;
555 	case XDP_DROP:
556 		return ICE_XDP_CONSUMED;
557 	}
558 }
559 
560 /**
561  * ice_xdp_xmit - submit packets to XDP ring for transmission
562  * @dev: netdev
563  * @n: number of XDP frames to be transmitted
564  * @frames: XDP frames to be transmitted
565  * @flags: transmit flags
566  *
567  * Returns number of frames successfully sent. Failed frames
568  * will be free'ed by XDP core.
569  * For error cases, a negative errno code is returned and no-frames
570  * are transmitted (caller must handle freeing frames).
571  */
572 int
573 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
574 	     u32 flags)
575 {
576 	struct ice_netdev_priv *np = netdev_priv(dev);
577 	unsigned int queue_index = smp_processor_id();
578 	struct ice_vsi *vsi = np->vsi;
579 	struct ice_ring *xdp_ring;
580 	int nxmit = 0, i;
581 
582 	if (test_bit(ICE_VSI_DOWN, vsi->state))
583 		return -ENETDOWN;
584 
585 	if (!ice_is_xdp_ena_vsi(vsi) || queue_index >= vsi->num_xdp_txq)
586 		return -ENXIO;
587 
588 	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
589 		return -EINVAL;
590 
591 	xdp_ring = vsi->xdp_rings[queue_index];
592 	for (i = 0; i < n; i++) {
593 		struct xdp_frame *xdpf = frames[i];
594 		int err;
595 
596 		err = ice_xmit_xdp_ring(xdpf->data, xdpf->len, xdp_ring);
597 		if (err != ICE_XDP_TX)
598 			break;
599 		nxmit++;
600 	}
601 
602 	if (unlikely(flags & XDP_XMIT_FLUSH))
603 		ice_xdp_ring_update_tail(xdp_ring);
604 
605 	return nxmit;
606 }
607 
608 /**
609  * ice_alloc_mapped_page - recycle or make a new page
610  * @rx_ring: ring to use
611  * @bi: rx_buf struct to modify
612  *
613  * Returns true if the page was successfully allocated or
614  * reused.
615  */
616 static bool
617 ice_alloc_mapped_page(struct ice_ring *rx_ring, struct ice_rx_buf *bi)
618 {
619 	struct page *page = bi->page;
620 	dma_addr_t dma;
621 
622 	/* since we are recycling buffers we should seldom need to alloc */
623 	if (likely(page))
624 		return true;
625 
626 	/* alloc new page for storage */
627 	page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
628 	if (unlikely(!page)) {
629 		rx_ring->rx_stats.alloc_page_failed++;
630 		return false;
631 	}
632 
633 	/* map page for use */
634 	dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
635 				 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
636 
637 	/* if mapping failed free memory back to system since
638 	 * there isn't much point in holding memory we can't use
639 	 */
640 	if (dma_mapping_error(rx_ring->dev, dma)) {
641 		__free_pages(page, ice_rx_pg_order(rx_ring));
642 		rx_ring->rx_stats.alloc_page_failed++;
643 		return false;
644 	}
645 
646 	bi->dma = dma;
647 	bi->page = page;
648 	bi->page_offset = rx_ring->rx_offset;
649 	page_ref_add(page, USHRT_MAX - 1);
650 	bi->pagecnt_bias = USHRT_MAX;
651 
652 	return true;
653 }
654 
655 /**
656  * ice_alloc_rx_bufs - Replace used receive buffers
657  * @rx_ring: ring to place buffers on
658  * @cleaned_count: number of buffers to replace
659  *
660  * Returns false if all allocations were successful, true if any fail. Returning
661  * true signals to the caller that we didn't replace cleaned_count buffers and
662  * there is more work to do.
663  *
664  * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
665  * buffers. Then bump tail at most one time. Grouping like this lets us avoid
666  * multiple tail writes per call.
667  */
668 bool ice_alloc_rx_bufs(struct ice_ring *rx_ring, u16 cleaned_count)
669 {
670 	union ice_32b_rx_flex_desc *rx_desc;
671 	u16 ntu = rx_ring->next_to_use;
672 	struct ice_rx_buf *bi;
673 
674 	/* do nothing if no valid netdev defined */
675 	if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
676 	    !cleaned_count)
677 		return false;
678 
679 	/* get the Rx descriptor and buffer based on next_to_use */
680 	rx_desc = ICE_RX_DESC(rx_ring, ntu);
681 	bi = &rx_ring->rx_buf[ntu];
682 
683 	do {
684 		/* if we fail here, we have work remaining */
685 		if (!ice_alloc_mapped_page(rx_ring, bi))
686 			break;
687 
688 		/* sync the buffer for use by the device */
689 		dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
690 						 bi->page_offset,
691 						 rx_ring->rx_buf_len,
692 						 DMA_FROM_DEVICE);
693 
694 		/* Refresh the desc even if buffer_addrs didn't change
695 		 * because each write-back erases this info.
696 		 */
697 		rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
698 
699 		rx_desc++;
700 		bi++;
701 		ntu++;
702 		if (unlikely(ntu == rx_ring->count)) {
703 			rx_desc = ICE_RX_DESC(rx_ring, 0);
704 			bi = rx_ring->rx_buf;
705 			ntu = 0;
706 		}
707 
708 		/* clear the status bits for the next_to_use descriptor */
709 		rx_desc->wb.status_error0 = 0;
710 
711 		cleaned_count--;
712 	} while (cleaned_count);
713 
714 	if (rx_ring->next_to_use != ntu)
715 		ice_release_rx_desc(rx_ring, ntu);
716 
717 	return !!cleaned_count;
718 }
719 
720 /**
721  * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
722  * @rx_buf: Rx buffer to adjust
723  * @size: Size of adjustment
724  *
725  * Update the offset within page so that Rx buf will be ready to be reused.
726  * For systems with PAGE_SIZE < 8192 this function will flip the page offset
727  * so the second half of page assigned to Rx buffer will be used, otherwise
728  * the offset is moved by "size" bytes
729  */
730 static void
731 ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
732 {
733 #if (PAGE_SIZE < 8192)
734 	/* flip page offset to other buffer */
735 	rx_buf->page_offset ^= size;
736 #else
737 	/* move offset up to the next cache line */
738 	rx_buf->page_offset += size;
739 #endif
740 }
741 
742 /**
743  * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
744  * @rx_buf: buffer containing the page
745  * @rx_buf_pgcnt: rx_buf page refcount pre xdp_do_redirect() call
746  *
747  * If page is reusable, we have a green light for calling ice_reuse_rx_page,
748  * which will assign the current buffer to the buffer that next_to_alloc is
749  * pointing to; otherwise, the DMA mapping needs to be destroyed and
750  * page freed
751  */
752 static bool
753 ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf, int rx_buf_pgcnt)
754 {
755 	unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
756 	struct page *page = rx_buf->page;
757 
758 	/* avoid re-using remote and pfmemalloc pages */
759 	if (!dev_page_is_reusable(page))
760 		return false;
761 
762 #if (PAGE_SIZE < 8192)
763 	/* if we are only owner of page we can reuse it */
764 	if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
765 		return false;
766 #else
767 #define ICE_LAST_OFFSET \
768 	(SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
769 	if (rx_buf->page_offset > ICE_LAST_OFFSET)
770 		return false;
771 #endif /* PAGE_SIZE < 8192) */
772 
773 	/* If we have drained the page fragment pool we need to update
774 	 * the pagecnt_bias and page count so that we fully restock the
775 	 * number of references the driver holds.
776 	 */
777 	if (unlikely(pagecnt_bias == 1)) {
778 		page_ref_add(page, USHRT_MAX - 1);
779 		rx_buf->pagecnt_bias = USHRT_MAX;
780 	}
781 
782 	return true;
783 }
784 
785 /**
786  * ice_add_rx_frag - Add contents of Rx buffer to sk_buff as a frag
787  * @rx_ring: Rx descriptor ring to transact packets on
788  * @rx_buf: buffer containing page to add
789  * @skb: sk_buff to place the data into
790  * @size: packet length from rx_desc
791  *
792  * This function will add the data contained in rx_buf->page to the skb.
793  * It will just attach the page as a frag to the skb.
794  * The function will then update the page offset.
795  */
796 static void
797 ice_add_rx_frag(struct ice_ring *rx_ring, struct ice_rx_buf *rx_buf,
798 		struct sk_buff *skb, unsigned int size)
799 {
800 #if (PAGE_SIZE >= 8192)
801 	unsigned int truesize = SKB_DATA_ALIGN(size + rx_ring->rx_offset);
802 #else
803 	unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
804 #endif
805 
806 	if (!size)
807 		return;
808 	skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buf->page,
809 			rx_buf->page_offset, size, truesize);
810 
811 	/* page is being used so we must update the page offset */
812 	ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
813 }
814 
815 /**
816  * ice_reuse_rx_page - page flip buffer and store it back on the ring
817  * @rx_ring: Rx descriptor ring to store buffers on
818  * @old_buf: donor buffer to have page reused
819  *
820  * Synchronizes page for reuse by the adapter
821  */
822 static void
823 ice_reuse_rx_page(struct ice_ring *rx_ring, struct ice_rx_buf *old_buf)
824 {
825 	u16 nta = rx_ring->next_to_alloc;
826 	struct ice_rx_buf *new_buf;
827 
828 	new_buf = &rx_ring->rx_buf[nta];
829 
830 	/* update, and store next to alloc */
831 	nta++;
832 	rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
833 
834 	/* Transfer page from old buffer to new buffer.
835 	 * Move each member individually to avoid possible store
836 	 * forwarding stalls and unnecessary copy of skb.
837 	 */
838 	new_buf->dma = old_buf->dma;
839 	new_buf->page = old_buf->page;
840 	new_buf->page_offset = old_buf->page_offset;
841 	new_buf->pagecnt_bias = old_buf->pagecnt_bias;
842 }
843 
844 /**
845  * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
846  * @rx_ring: Rx descriptor ring to transact packets on
847  * @size: size of buffer to add to skb
848  * @rx_buf_pgcnt: rx_buf page refcount
849  *
850  * This function will pull an Rx buffer from the ring and synchronize it
851  * for use by the CPU.
852  */
853 static struct ice_rx_buf *
854 ice_get_rx_buf(struct ice_ring *rx_ring, const unsigned int size,
855 	       int *rx_buf_pgcnt)
856 {
857 	struct ice_rx_buf *rx_buf;
858 
859 	rx_buf = &rx_ring->rx_buf[rx_ring->next_to_clean];
860 	*rx_buf_pgcnt =
861 #if (PAGE_SIZE < 8192)
862 		page_count(rx_buf->page);
863 #else
864 		0;
865 #endif
866 	prefetchw(rx_buf->page);
867 
868 	if (!size)
869 		return rx_buf;
870 	/* we are reusing so sync this buffer for CPU use */
871 	dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
872 				      rx_buf->page_offset, size,
873 				      DMA_FROM_DEVICE);
874 
875 	/* We have pulled a buffer for use, so decrement pagecnt_bias */
876 	rx_buf->pagecnt_bias--;
877 
878 	return rx_buf;
879 }
880 
881 /**
882  * ice_build_skb - Build skb around an existing buffer
883  * @rx_ring: Rx descriptor ring to transact packets on
884  * @rx_buf: Rx buffer to pull data from
885  * @xdp: xdp_buff pointing to the data
886  *
887  * This function builds an skb around an existing Rx buffer, taking care
888  * to set up the skb correctly and avoid any memcpy overhead.
889  */
890 static struct sk_buff *
891 ice_build_skb(struct ice_ring *rx_ring, struct ice_rx_buf *rx_buf,
892 	      struct xdp_buff *xdp)
893 {
894 	u8 metasize = xdp->data - xdp->data_meta;
895 #if (PAGE_SIZE < 8192)
896 	unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
897 #else
898 	unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
899 				SKB_DATA_ALIGN(xdp->data_end -
900 					       xdp->data_hard_start);
901 #endif
902 	struct sk_buff *skb;
903 
904 	/* Prefetch first cache line of first page. If xdp->data_meta
905 	 * is unused, this points exactly as xdp->data, otherwise we
906 	 * likely have a consumer accessing first few bytes of meta
907 	 * data, and then actual data.
908 	 */
909 	net_prefetch(xdp->data_meta);
910 	/* build an skb around the page buffer */
911 	skb = build_skb(xdp->data_hard_start, truesize);
912 	if (unlikely(!skb))
913 		return NULL;
914 
915 	/* must to record Rx queue, otherwise OS features such as
916 	 * symmetric queue won't work
917 	 */
918 	skb_record_rx_queue(skb, rx_ring->q_index);
919 
920 	/* update pointers within the skb to store the data */
921 	skb_reserve(skb, xdp->data - xdp->data_hard_start);
922 	__skb_put(skb, xdp->data_end - xdp->data);
923 	if (metasize)
924 		skb_metadata_set(skb, metasize);
925 
926 	/* buffer is used by skb, update page_offset */
927 	ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
928 
929 	return skb;
930 }
931 
932 /**
933  * ice_construct_skb - Allocate skb and populate it
934  * @rx_ring: Rx descriptor ring to transact packets on
935  * @rx_buf: Rx buffer to pull data from
936  * @xdp: xdp_buff pointing to the data
937  *
938  * This function allocates an skb. It then populates it with the page
939  * data from the current receive descriptor, taking care to set up the
940  * skb correctly.
941  */
942 static struct sk_buff *
943 ice_construct_skb(struct ice_ring *rx_ring, struct ice_rx_buf *rx_buf,
944 		  struct xdp_buff *xdp)
945 {
946 	unsigned int size = xdp->data_end - xdp->data;
947 	unsigned int headlen;
948 	struct sk_buff *skb;
949 
950 	/* prefetch first cache line of first page */
951 	net_prefetch(xdp->data);
952 
953 	/* allocate a skb to store the frags */
954 	skb = __napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE,
955 			       GFP_ATOMIC | __GFP_NOWARN);
956 	if (unlikely(!skb))
957 		return NULL;
958 
959 	skb_record_rx_queue(skb, rx_ring->q_index);
960 	/* Determine available headroom for copy */
961 	headlen = size;
962 	if (headlen > ICE_RX_HDR_SIZE)
963 		headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
964 
965 	/* align pull length to size of long to optimize memcpy performance */
966 	memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen,
967 							 sizeof(long)));
968 
969 	/* if we exhaust the linear part then add what is left as a frag */
970 	size -= headlen;
971 	if (size) {
972 #if (PAGE_SIZE >= 8192)
973 		unsigned int truesize = SKB_DATA_ALIGN(size);
974 #else
975 		unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
976 #endif
977 		skb_add_rx_frag(skb, 0, rx_buf->page,
978 				rx_buf->page_offset + headlen, size, truesize);
979 		/* buffer is used by skb, update page_offset */
980 		ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
981 	} else {
982 		/* buffer is unused, reset bias back to rx_buf; data was copied
983 		 * onto skb's linear part so there's no need for adjusting
984 		 * page offset and we can reuse this buffer as-is
985 		 */
986 		rx_buf->pagecnt_bias++;
987 	}
988 
989 	return skb;
990 }
991 
992 /**
993  * ice_put_rx_buf - Clean up used buffer and either recycle or free
994  * @rx_ring: Rx descriptor ring to transact packets on
995  * @rx_buf: Rx buffer to pull data from
996  * @rx_buf_pgcnt: Rx buffer page count pre xdp_do_redirect()
997  *
998  * This function will update next_to_clean and then clean up the contents
999  * of the rx_buf. It will either recycle the buffer or unmap it and free
1000  * the associated resources.
1001  */
1002 static void
1003 ice_put_rx_buf(struct ice_ring *rx_ring, struct ice_rx_buf *rx_buf,
1004 	       int rx_buf_pgcnt)
1005 {
1006 	u16 ntc = rx_ring->next_to_clean + 1;
1007 
1008 	/* fetch, update, and store next to clean */
1009 	ntc = (ntc < rx_ring->count) ? ntc : 0;
1010 	rx_ring->next_to_clean = ntc;
1011 
1012 	if (!rx_buf)
1013 		return;
1014 
1015 	if (ice_can_reuse_rx_page(rx_buf, rx_buf_pgcnt)) {
1016 		/* hand second half of page back to the ring */
1017 		ice_reuse_rx_page(rx_ring, rx_buf);
1018 	} else {
1019 		/* we are not reusing the buffer so unmap it */
1020 		dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1021 				     ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1022 				     ICE_RX_DMA_ATTR);
1023 		__page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1024 	}
1025 
1026 	/* clear contents of buffer_info */
1027 	rx_buf->page = NULL;
1028 }
1029 
1030 /**
1031  * ice_is_non_eop - process handling of non-EOP buffers
1032  * @rx_ring: Rx ring being processed
1033  * @rx_desc: Rx descriptor for current buffer
1034  *
1035  * If the buffer is an EOP buffer, this function exits returning false,
1036  * otherwise return true indicating that this is in fact a non-EOP buffer.
1037  */
1038 static bool
1039 ice_is_non_eop(struct ice_ring *rx_ring, union ice_32b_rx_flex_desc *rx_desc)
1040 {
1041 	/* if we are the last buffer then there is nothing else to do */
1042 #define ICE_RXD_EOF BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S)
1043 	if (likely(ice_test_staterr(rx_desc, ICE_RXD_EOF)))
1044 		return false;
1045 
1046 	rx_ring->rx_stats.non_eop_descs++;
1047 
1048 	return true;
1049 }
1050 
1051 /**
1052  * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1053  * @rx_ring: Rx descriptor ring to transact packets on
1054  * @budget: Total limit on number of packets to process
1055  *
1056  * This function provides a "bounce buffer" approach to Rx interrupt
1057  * processing. The advantage to this is that on systems that have
1058  * expensive overhead for IOMMU access this provides a means of avoiding
1059  * it by maintaining the mapping of the page to the system.
1060  *
1061  * Returns amount of work completed
1062  */
1063 int ice_clean_rx_irq(struct ice_ring *rx_ring, int budget)
1064 {
1065 	unsigned int total_rx_bytes = 0, total_rx_pkts = 0, frame_sz = 0;
1066 	u16 cleaned_count = ICE_DESC_UNUSED(rx_ring);
1067 	unsigned int offset = rx_ring->rx_offset;
1068 	unsigned int xdp_res, xdp_xmit = 0;
1069 	struct sk_buff *skb = rx_ring->skb;
1070 	struct bpf_prog *xdp_prog = NULL;
1071 	struct xdp_buff xdp;
1072 	bool failure;
1073 
1074 	/* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1075 #if (PAGE_SIZE < 8192)
1076 	frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1077 #endif
1078 	xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
1079 
1080 	/* start the loop to process Rx packets bounded by 'budget' */
1081 	while (likely(total_rx_pkts < (unsigned int)budget)) {
1082 		union ice_32b_rx_flex_desc *rx_desc;
1083 		struct ice_rx_buf *rx_buf;
1084 		unsigned char *hard_start;
1085 		unsigned int size;
1086 		u16 stat_err_bits;
1087 		int rx_buf_pgcnt;
1088 		u16 vlan_tag = 0;
1089 		u16 rx_ptype;
1090 
1091 		/* get the Rx desc from Rx ring based on 'next_to_clean' */
1092 		rx_desc = ICE_RX_DESC(rx_ring, rx_ring->next_to_clean);
1093 
1094 		/* status_error_len will always be zero for unused descriptors
1095 		 * because it's cleared in cleanup, and overlaps with hdr_addr
1096 		 * which is always zero because packet split isn't used, if the
1097 		 * hardware wrote DD then it will be non-zero
1098 		 */
1099 		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1100 		if (!ice_test_staterr(rx_desc, stat_err_bits))
1101 			break;
1102 
1103 		/* This memory barrier is needed to keep us from reading
1104 		 * any other fields out of the rx_desc until we know the
1105 		 * DD bit is set.
1106 		 */
1107 		dma_rmb();
1108 
1109 		ice_trace(clean_rx_irq, rx_ring, rx_desc);
1110 		if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1111 			struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1112 
1113 			if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1114 			    ctrl_vsi->vf_id != ICE_INVAL_VFID)
1115 				ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1116 			ice_put_rx_buf(rx_ring, NULL, 0);
1117 			cleaned_count++;
1118 			continue;
1119 		}
1120 
1121 		size = le16_to_cpu(rx_desc->wb.pkt_len) &
1122 			ICE_RX_FLX_DESC_PKT_LEN_M;
1123 
1124 		/* retrieve a buffer from the ring */
1125 		rx_buf = ice_get_rx_buf(rx_ring, size, &rx_buf_pgcnt);
1126 
1127 		if (!size) {
1128 			xdp.data = NULL;
1129 			xdp.data_end = NULL;
1130 			xdp.data_hard_start = NULL;
1131 			xdp.data_meta = NULL;
1132 			goto construct_skb;
1133 		}
1134 
1135 		hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1136 			     offset;
1137 		xdp_prepare_buff(&xdp, hard_start, offset, size, true);
1138 #if (PAGE_SIZE > 4096)
1139 		/* At larger PAGE_SIZE, frame_sz depend on len size */
1140 		xdp.frame_sz = ice_rx_frame_truesize(rx_ring, size);
1141 #endif
1142 
1143 		rcu_read_lock();
1144 		xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1145 		if (!xdp_prog) {
1146 			rcu_read_unlock();
1147 			goto construct_skb;
1148 		}
1149 
1150 		xdp_res = ice_run_xdp(rx_ring, &xdp, xdp_prog);
1151 		rcu_read_unlock();
1152 		if (!xdp_res)
1153 			goto construct_skb;
1154 		if (xdp_res & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1155 			xdp_xmit |= xdp_res;
1156 			ice_rx_buf_adjust_pg_offset(rx_buf, xdp.frame_sz);
1157 		} else {
1158 			rx_buf->pagecnt_bias++;
1159 		}
1160 		total_rx_bytes += size;
1161 		total_rx_pkts++;
1162 
1163 		cleaned_count++;
1164 		ice_put_rx_buf(rx_ring, rx_buf, rx_buf_pgcnt);
1165 		continue;
1166 construct_skb:
1167 		if (skb) {
1168 			ice_add_rx_frag(rx_ring, rx_buf, skb, size);
1169 		} else if (likely(xdp.data)) {
1170 			if (ice_ring_uses_build_skb(rx_ring))
1171 				skb = ice_build_skb(rx_ring, rx_buf, &xdp);
1172 			else
1173 				skb = ice_construct_skb(rx_ring, rx_buf, &xdp);
1174 		}
1175 		/* exit if we failed to retrieve a buffer */
1176 		if (!skb) {
1177 			rx_ring->rx_stats.alloc_buf_failed++;
1178 			if (rx_buf)
1179 				rx_buf->pagecnt_bias++;
1180 			break;
1181 		}
1182 
1183 		ice_put_rx_buf(rx_ring, rx_buf, rx_buf_pgcnt);
1184 		cleaned_count++;
1185 
1186 		/* skip if it is NOP desc */
1187 		if (ice_is_non_eop(rx_ring, rx_desc))
1188 			continue;
1189 
1190 		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1191 		if (unlikely(ice_test_staterr(rx_desc, stat_err_bits))) {
1192 			dev_kfree_skb_any(skb);
1193 			continue;
1194 		}
1195 
1196 		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_L2TAG1P_S);
1197 		if (ice_test_staterr(rx_desc, stat_err_bits))
1198 			vlan_tag = le16_to_cpu(rx_desc->wb.l2tag1);
1199 
1200 		/* pad the skb if needed, to make a valid ethernet frame */
1201 		if (eth_skb_pad(skb)) {
1202 			skb = NULL;
1203 			continue;
1204 		}
1205 
1206 		/* probably a little skewed due to removing CRC */
1207 		total_rx_bytes += skb->len;
1208 
1209 		/* populate checksum, VLAN, and protocol */
1210 		rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
1211 			ICE_RX_FLEX_DESC_PTYPE_M;
1212 
1213 		ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
1214 
1215 		ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1216 		/* send completed skb up the stack */
1217 		ice_receive_skb(rx_ring, skb, vlan_tag);
1218 		skb = NULL;
1219 
1220 		/* update budget accounting */
1221 		total_rx_pkts++;
1222 	}
1223 
1224 	/* return up to cleaned_count buffers to hardware */
1225 	failure = ice_alloc_rx_bufs(rx_ring, cleaned_count);
1226 
1227 	if (xdp_prog)
1228 		ice_finalize_xdp_rx(rx_ring, xdp_xmit);
1229 	rx_ring->skb = skb;
1230 
1231 	ice_update_rx_ring_stats(rx_ring, total_rx_pkts, total_rx_bytes);
1232 
1233 	/* guarantee a trip back through this routine if there was a failure */
1234 	return failure ? budget : (int)total_rx_pkts;
1235 }
1236 
1237 /**
1238  * ice_net_dim - Update net DIM algorithm
1239  * @q_vector: the vector associated with the interrupt
1240  *
1241  * Create a DIM sample and notify net_dim() so that it can possibly decide
1242  * a new ITR value based on incoming packets, bytes, and interrupts.
1243  *
1244  * This function is a no-op if the ring is not configured to dynamic ITR.
1245  */
1246 static void ice_net_dim(struct ice_q_vector *q_vector)
1247 {
1248 	struct ice_ring_container *tx = &q_vector->tx;
1249 	struct ice_ring_container *rx = &q_vector->rx;
1250 
1251 	if (ITR_IS_DYNAMIC(tx)) {
1252 		struct dim_sample dim_sample = {};
1253 		u64 packets = 0, bytes = 0;
1254 		struct ice_ring *ring;
1255 
1256 		ice_for_each_ring(ring, q_vector->tx) {
1257 			packets += ring->stats.pkts;
1258 			bytes += ring->stats.bytes;
1259 		}
1260 
1261 		dim_update_sample(q_vector->total_events, packets, bytes,
1262 				  &dim_sample);
1263 
1264 		net_dim(&tx->dim, dim_sample);
1265 	}
1266 
1267 	if (ITR_IS_DYNAMIC(rx)) {
1268 		struct dim_sample dim_sample = {};
1269 		u64 packets = 0, bytes = 0;
1270 		struct ice_ring *ring;
1271 
1272 		ice_for_each_ring(ring, q_vector->rx) {
1273 			packets += ring->stats.pkts;
1274 			bytes += ring->stats.bytes;
1275 		}
1276 
1277 		dim_update_sample(q_vector->total_events, packets, bytes,
1278 				  &dim_sample);
1279 
1280 		net_dim(&rx->dim, dim_sample);
1281 	}
1282 }
1283 
1284 /**
1285  * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1286  * @itr_idx: interrupt throttling index
1287  * @itr: interrupt throttling value in usecs
1288  */
1289 static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1290 {
1291 	/* The ITR value is reported in microseconds, and the register value is
1292 	 * recorded in 2 microsecond units. For this reason we only need to
1293 	 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1294 	 * granularity as a shift instead of division. The mask makes sure the
1295 	 * ITR value is never odd so we don't accidentally write into the field
1296 	 * prior to the ITR field.
1297 	 */
1298 	itr &= ICE_ITR_MASK;
1299 
1300 	return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1301 		(itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1302 		(itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1303 }
1304 
1305 /**
1306  * ice_update_ena_itr - Update ITR moderation and re-enable MSI-X interrupt
1307  * @q_vector: the vector associated with the interrupt to enable
1308  *
1309  * Update the net_dim() algorithm and re-enable the interrupt associated with
1310  * this vector.
1311  *
1312  * If the VSI is down, the interrupt will not be re-enabled.
1313  */
1314 static void ice_update_ena_itr(struct ice_q_vector *q_vector)
1315 {
1316 	struct ice_vsi *vsi = q_vector->vsi;
1317 	bool wb_en = q_vector->wb_on_itr;
1318 	u32 itr_val;
1319 
1320 	if (test_bit(ICE_DOWN, vsi->state))
1321 		return;
1322 
1323 	/* When exiting WB_ON_ITR, let ITR resume its normal
1324 	 * interrupts-enabled path.
1325 	 */
1326 	if (wb_en)
1327 		q_vector->wb_on_itr = false;
1328 
1329 	/* This will do nothing if dynamic updates are not enabled. */
1330 	ice_net_dim(q_vector);
1331 
1332 	/* net_dim() updates ITR out-of-band using a work item */
1333 	itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1334 	/* trigger an immediate software interrupt when exiting
1335 	 * busy poll, to make sure to catch any pending cleanups
1336 	 * that might have been missed due to interrupt state
1337 	 * transition.
1338 	 */
1339 	if (wb_en) {
1340 		itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1341 			   GLINT_DYN_CTL_SW_ITR_INDX_M |
1342 			   GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1343 	}
1344 	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1345 }
1346 
1347 /**
1348  * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1349  * @q_vector: q_vector to set WB_ON_ITR on
1350  *
1351  * We need to tell hardware to write-back completed descriptors even when
1352  * interrupts are disabled. Descriptors will be written back on cache line
1353  * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1354  * descriptors may not be written back if they don't fill a cache line until
1355  * the next interrupt.
1356  *
1357  * This sets the write-back frequency to whatever was set previously for the
1358  * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1359  * aren't meddling with the INTENA_M bit.
1360  */
1361 static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1362 {
1363 	struct ice_vsi *vsi = q_vector->vsi;
1364 
1365 	/* already in wb_on_itr mode no need to change it */
1366 	if (q_vector->wb_on_itr)
1367 		return;
1368 
1369 	/* use previously set ITR values for all of the ITR indices by
1370 	 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1371 	 * be static in non-adaptive mode (user configured)
1372 	 */
1373 	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1374 	     ((ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S) &
1375 	      GLINT_DYN_CTL_ITR_INDX_M) | GLINT_DYN_CTL_INTENA_MSK_M |
1376 	     GLINT_DYN_CTL_WB_ON_ITR_M);
1377 
1378 	q_vector->wb_on_itr = true;
1379 }
1380 
1381 /**
1382  * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1383  * @napi: napi struct with our devices info in it
1384  * @budget: amount of work driver is allowed to do this pass, in packets
1385  *
1386  * This function will clean all queues associated with a q_vector.
1387  *
1388  * Returns the amount of work done
1389  */
1390 int ice_napi_poll(struct napi_struct *napi, int budget)
1391 {
1392 	struct ice_q_vector *q_vector =
1393 				container_of(napi, struct ice_q_vector, napi);
1394 	bool clean_complete = true;
1395 	struct ice_ring *ring;
1396 	int budget_per_ring;
1397 	int work_done = 0;
1398 
1399 	/* Since the actual Tx work is minimal, we can give the Tx a larger
1400 	 * budget and be more aggressive about cleaning up the Tx descriptors.
1401 	 */
1402 	ice_for_each_ring(ring, q_vector->tx) {
1403 		bool wd = ring->xsk_pool ?
1404 			  ice_clean_tx_irq_zc(ring, budget) :
1405 			  ice_clean_tx_irq(ring, budget);
1406 
1407 		if (!wd)
1408 			clean_complete = false;
1409 	}
1410 
1411 	/* Handle case where we are called by netpoll with a budget of 0 */
1412 	if (unlikely(budget <= 0))
1413 		return budget;
1414 
1415 	/* normally we have 1 Rx ring per q_vector */
1416 	if (unlikely(q_vector->num_ring_rx > 1))
1417 		/* We attempt to distribute budget to each Rx queue fairly, but
1418 		 * don't allow the budget to go below 1 because that would exit
1419 		 * polling early.
1420 		 */
1421 		budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1422 	else
1423 		/* Max of 1 Rx ring in this q_vector so give it the budget */
1424 		budget_per_ring = budget;
1425 
1426 	ice_for_each_ring(ring, q_vector->rx) {
1427 		int cleaned;
1428 
1429 		/* A dedicated path for zero-copy allows making a single
1430 		 * comparison in the irq context instead of many inside the
1431 		 * ice_clean_rx_irq function and makes the codebase cleaner.
1432 		 */
1433 		cleaned = ring->xsk_pool ?
1434 			  ice_clean_rx_irq_zc(ring, budget_per_ring) :
1435 			  ice_clean_rx_irq(ring, budget_per_ring);
1436 		work_done += cleaned;
1437 		/* if we clean as many as budgeted, we must not be done */
1438 		if (cleaned >= budget_per_ring)
1439 			clean_complete = false;
1440 	}
1441 
1442 	/* If work not completed, return budget and polling will return */
1443 	if (!clean_complete) {
1444 		/* Set the writeback on ITR so partial completions of
1445 		 * cache-lines will still continue even if we're polling.
1446 		 */
1447 		ice_set_wb_on_itr(q_vector);
1448 		return budget;
1449 	}
1450 
1451 	/* Exit the polling mode, but don't re-enable interrupts if stack might
1452 	 * poll us due to busy-polling
1453 	 */
1454 	if (likely(napi_complete_done(napi, work_done)))
1455 		ice_update_ena_itr(q_vector);
1456 	else
1457 		ice_set_wb_on_itr(q_vector);
1458 
1459 	return min_t(int, work_done, budget - 1);
1460 }
1461 
1462 /**
1463  * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1464  * @tx_ring: the ring to be checked
1465  * @size: the size buffer we want to assure is available
1466  *
1467  * Returns -EBUSY if a stop is needed, else 0
1468  */
1469 static int __ice_maybe_stop_tx(struct ice_ring *tx_ring, unsigned int size)
1470 {
1471 	netif_stop_subqueue(tx_ring->netdev, tx_ring->q_index);
1472 	/* Memory barrier before checking head and tail */
1473 	smp_mb();
1474 
1475 	/* Check again in a case another CPU has just made room available. */
1476 	if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1477 		return -EBUSY;
1478 
1479 	/* A reprieve! - use start_subqueue because it doesn't call schedule */
1480 	netif_start_subqueue(tx_ring->netdev, tx_ring->q_index);
1481 	++tx_ring->tx_stats.restart_q;
1482 	return 0;
1483 }
1484 
1485 /**
1486  * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1487  * @tx_ring: the ring to be checked
1488  * @size:    the size buffer we want to assure is available
1489  *
1490  * Returns 0 if stop is not needed
1491  */
1492 static int ice_maybe_stop_tx(struct ice_ring *tx_ring, unsigned int size)
1493 {
1494 	if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1495 		return 0;
1496 
1497 	return __ice_maybe_stop_tx(tx_ring, size);
1498 }
1499 
1500 /**
1501  * ice_tx_map - Build the Tx descriptor
1502  * @tx_ring: ring to send buffer on
1503  * @first: first buffer info buffer to use
1504  * @off: pointer to struct that holds offload parameters
1505  *
1506  * This function loops over the skb data pointed to by *first
1507  * and gets a physical address for each memory location and programs
1508  * it and the length into the transmit descriptor.
1509  */
1510 static void
1511 ice_tx_map(struct ice_ring *tx_ring, struct ice_tx_buf *first,
1512 	   struct ice_tx_offload_params *off)
1513 {
1514 	u64 td_offset, td_tag, td_cmd;
1515 	u16 i = tx_ring->next_to_use;
1516 	unsigned int data_len, size;
1517 	struct ice_tx_desc *tx_desc;
1518 	struct ice_tx_buf *tx_buf;
1519 	struct sk_buff *skb;
1520 	skb_frag_t *frag;
1521 	dma_addr_t dma;
1522 
1523 	td_tag = off->td_l2tag1;
1524 	td_cmd = off->td_cmd;
1525 	td_offset = off->td_offset;
1526 	skb = first->skb;
1527 
1528 	data_len = skb->data_len;
1529 	size = skb_headlen(skb);
1530 
1531 	tx_desc = ICE_TX_DESC(tx_ring, i);
1532 
1533 	if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1534 		td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1535 		td_tag = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
1536 			  ICE_TX_FLAGS_VLAN_S;
1537 	}
1538 
1539 	dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1540 
1541 	tx_buf = first;
1542 
1543 	for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1544 		unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1545 
1546 		if (dma_mapping_error(tx_ring->dev, dma))
1547 			goto dma_error;
1548 
1549 		/* record length, and DMA address */
1550 		dma_unmap_len_set(tx_buf, len, size);
1551 		dma_unmap_addr_set(tx_buf, dma, dma);
1552 
1553 		/* align size to end of page */
1554 		max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1555 		tx_desc->buf_addr = cpu_to_le64(dma);
1556 
1557 		/* account for data chunks larger than the hardware
1558 		 * can handle
1559 		 */
1560 		while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1561 			tx_desc->cmd_type_offset_bsz =
1562 				ice_build_ctob(td_cmd, td_offset, max_data,
1563 					       td_tag);
1564 
1565 			tx_desc++;
1566 			i++;
1567 
1568 			if (i == tx_ring->count) {
1569 				tx_desc = ICE_TX_DESC(tx_ring, 0);
1570 				i = 0;
1571 			}
1572 
1573 			dma += max_data;
1574 			size -= max_data;
1575 
1576 			max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1577 			tx_desc->buf_addr = cpu_to_le64(dma);
1578 		}
1579 
1580 		if (likely(!data_len))
1581 			break;
1582 
1583 		tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1584 							      size, td_tag);
1585 
1586 		tx_desc++;
1587 		i++;
1588 
1589 		if (i == tx_ring->count) {
1590 			tx_desc = ICE_TX_DESC(tx_ring, 0);
1591 			i = 0;
1592 		}
1593 
1594 		size = skb_frag_size(frag);
1595 		data_len -= size;
1596 
1597 		dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1598 				       DMA_TO_DEVICE);
1599 
1600 		tx_buf = &tx_ring->tx_buf[i];
1601 	}
1602 
1603 	/* record bytecount for BQL */
1604 	netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
1605 
1606 	/* record SW timestamp if HW timestamp is not available */
1607 	skb_tx_timestamp(first->skb);
1608 
1609 	i++;
1610 	if (i == tx_ring->count)
1611 		i = 0;
1612 
1613 	/* write last descriptor with RS and EOP bits */
1614 	td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1615 	tx_desc->cmd_type_offset_bsz =
1616 			ice_build_ctob(td_cmd, td_offset, size, td_tag);
1617 
1618 	/* Force memory writes to complete before letting h/w know there
1619 	 * are new descriptors to fetch.
1620 	 *
1621 	 * We also use this memory barrier to make certain all of the
1622 	 * status bits have been updated before next_to_watch is written.
1623 	 */
1624 	wmb();
1625 
1626 	/* set next_to_watch value indicating a packet is present */
1627 	first->next_to_watch = tx_desc;
1628 
1629 	tx_ring->next_to_use = i;
1630 
1631 	ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1632 
1633 	/* notify HW of packet */
1634 	if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more())
1635 		writel(i, tx_ring->tail);
1636 
1637 	return;
1638 
1639 dma_error:
1640 	/* clear DMA mappings for failed tx_buf map */
1641 	for (;;) {
1642 		tx_buf = &tx_ring->tx_buf[i];
1643 		ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1644 		if (tx_buf == first)
1645 			break;
1646 		if (i == 0)
1647 			i = tx_ring->count;
1648 		i--;
1649 	}
1650 
1651 	tx_ring->next_to_use = i;
1652 }
1653 
1654 /**
1655  * ice_tx_csum - Enable Tx checksum offloads
1656  * @first: pointer to the first descriptor
1657  * @off: pointer to struct that holds offload parameters
1658  *
1659  * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1660  */
1661 static
1662 int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1663 {
1664 	u32 l4_len = 0, l3_len = 0, l2_len = 0;
1665 	struct sk_buff *skb = first->skb;
1666 	union {
1667 		struct iphdr *v4;
1668 		struct ipv6hdr *v6;
1669 		unsigned char *hdr;
1670 	} ip;
1671 	union {
1672 		struct tcphdr *tcp;
1673 		unsigned char *hdr;
1674 	} l4;
1675 	__be16 frag_off, protocol;
1676 	unsigned char *exthdr;
1677 	u32 offset, cmd = 0;
1678 	u8 l4_proto = 0;
1679 
1680 	if (skb->ip_summed != CHECKSUM_PARTIAL)
1681 		return 0;
1682 
1683 	ip.hdr = skb_network_header(skb);
1684 	l4.hdr = skb_transport_header(skb);
1685 
1686 	/* compute outer L2 header size */
1687 	l2_len = ip.hdr - skb->data;
1688 	offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1689 
1690 	protocol = vlan_get_protocol(skb);
1691 
1692 	if (protocol == htons(ETH_P_IP))
1693 		first->tx_flags |= ICE_TX_FLAGS_IPV4;
1694 	else if (protocol == htons(ETH_P_IPV6))
1695 		first->tx_flags |= ICE_TX_FLAGS_IPV6;
1696 
1697 	if (skb->encapsulation) {
1698 		bool gso_ena = false;
1699 		u32 tunnel = 0;
1700 
1701 		/* define outer network header type */
1702 		if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1703 			tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1704 				  ICE_TX_CTX_EIPT_IPV4 :
1705 				  ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1706 			l4_proto = ip.v4->protocol;
1707 		} else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1708 			int ret;
1709 
1710 			tunnel |= ICE_TX_CTX_EIPT_IPV6;
1711 			exthdr = ip.hdr + sizeof(*ip.v6);
1712 			l4_proto = ip.v6->nexthdr;
1713 			ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1714 					       &l4_proto, &frag_off);
1715 			if (ret < 0)
1716 				return -1;
1717 		}
1718 
1719 		/* define outer transport */
1720 		switch (l4_proto) {
1721 		case IPPROTO_UDP:
1722 			tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1723 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1724 			break;
1725 		case IPPROTO_GRE:
1726 			tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1727 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1728 			break;
1729 		case IPPROTO_IPIP:
1730 		case IPPROTO_IPV6:
1731 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1732 			l4.hdr = skb_inner_network_header(skb);
1733 			break;
1734 		default:
1735 			if (first->tx_flags & ICE_TX_FLAGS_TSO)
1736 				return -1;
1737 
1738 			skb_checksum_help(skb);
1739 			return 0;
1740 		}
1741 
1742 		/* compute outer L3 header size */
1743 		tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1744 			  ICE_TXD_CTX_QW0_EIPLEN_S;
1745 
1746 		/* switch IP header pointer from outer to inner header */
1747 		ip.hdr = skb_inner_network_header(skb);
1748 
1749 		/* compute tunnel header size */
1750 		tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1751 			   ICE_TXD_CTX_QW0_NATLEN_S;
1752 
1753 		gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1754 		/* indicate if we need to offload outer UDP header */
1755 		if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1756 		    (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1757 			tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1758 
1759 		/* record tunnel offload values */
1760 		off->cd_tunnel_params |= tunnel;
1761 
1762 		/* set DTYP=1 to indicate that it's an Tx context descriptor
1763 		 * in IPsec tunnel mode with Tx offloads in Quad word 1
1764 		 */
1765 		off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1766 
1767 		/* switch L4 header pointer from outer to inner */
1768 		l4.hdr = skb_inner_transport_header(skb);
1769 		l4_proto = 0;
1770 
1771 		/* reset type as we transition from outer to inner headers */
1772 		first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1773 		if (ip.v4->version == 4)
1774 			first->tx_flags |= ICE_TX_FLAGS_IPV4;
1775 		if (ip.v6->version == 6)
1776 			first->tx_flags |= ICE_TX_FLAGS_IPV6;
1777 	}
1778 
1779 	/* Enable IP checksum offloads */
1780 	if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1781 		l4_proto = ip.v4->protocol;
1782 		/* the stack computes the IP header already, the only time we
1783 		 * need the hardware to recompute it is in the case of TSO.
1784 		 */
1785 		if (first->tx_flags & ICE_TX_FLAGS_TSO)
1786 			cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1787 		else
1788 			cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1789 
1790 	} else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1791 		cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1792 		exthdr = ip.hdr + sizeof(*ip.v6);
1793 		l4_proto = ip.v6->nexthdr;
1794 		if (l4.hdr != exthdr)
1795 			ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1796 					 &frag_off);
1797 	} else {
1798 		return -1;
1799 	}
1800 
1801 	/* compute inner L3 header size */
1802 	l3_len = l4.hdr - ip.hdr;
1803 	offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1804 
1805 	/* Enable L4 checksum offloads */
1806 	switch (l4_proto) {
1807 	case IPPROTO_TCP:
1808 		/* enable checksum offloads */
1809 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1810 		l4_len = l4.tcp->doff;
1811 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1812 		break;
1813 	case IPPROTO_UDP:
1814 		/* enable UDP checksum offload */
1815 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1816 		l4_len = (sizeof(struct udphdr) >> 2);
1817 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1818 		break;
1819 	case IPPROTO_SCTP:
1820 		/* enable SCTP checksum offload */
1821 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1822 		l4_len = sizeof(struct sctphdr) >> 2;
1823 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1824 		break;
1825 
1826 	default:
1827 		if (first->tx_flags & ICE_TX_FLAGS_TSO)
1828 			return -1;
1829 		skb_checksum_help(skb);
1830 		return 0;
1831 	}
1832 
1833 	off->td_cmd |= cmd;
1834 	off->td_offset |= offset;
1835 	return 1;
1836 }
1837 
1838 /**
1839  * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1840  * @tx_ring: ring to send buffer on
1841  * @first: pointer to struct ice_tx_buf
1842  *
1843  * Checks the skb and set up correspondingly several generic transmit flags
1844  * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1845  */
1846 static void
1847 ice_tx_prepare_vlan_flags(struct ice_ring *tx_ring, struct ice_tx_buf *first)
1848 {
1849 	struct sk_buff *skb = first->skb;
1850 
1851 	/* nothing left to do, software offloaded VLAN */
1852 	if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1853 		return;
1854 
1855 	/* currently, we always assume 802.1Q for VLAN insertion as VLAN
1856 	 * insertion for 802.1AD is not supported
1857 	 */
1858 	if (skb_vlan_tag_present(skb)) {
1859 		first->tx_flags |= skb_vlan_tag_get(skb) << ICE_TX_FLAGS_VLAN_S;
1860 		first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
1861 	}
1862 
1863 	ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
1864 }
1865 
1866 /**
1867  * ice_tso - computes mss and TSO length to prepare for TSO
1868  * @first: pointer to struct ice_tx_buf
1869  * @off: pointer to struct that holds offload parameters
1870  *
1871  * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
1872  */
1873 static
1874 int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1875 {
1876 	struct sk_buff *skb = first->skb;
1877 	union {
1878 		struct iphdr *v4;
1879 		struct ipv6hdr *v6;
1880 		unsigned char *hdr;
1881 	} ip;
1882 	union {
1883 		struct tcphdr *tcp;
1884 		struct udphdr *udp;
1885 		unsigned char *hdr;
1886 	} l4;
1887 	u64 cd_mss, cd_tso_len;
1888 	u32 paylen;
1889 	u8 l4_start;
1890 	int err;
1891 
1892 	if (skb->ip_summed != CHECKSUM_PARTIAL)
1893 		return 0;
1894 
1895 	if (!skb_is_gso(skb))
1896 		return 0;
1897 
1898 	err = skb_cow_head(skb, 0);
1899 	if (err < 0)
1900 		return err;
1901 
1902 	/* cppcheck-suppress unreadVariable */
1903 	ip.hdr = skb_network_header(skb);
1904 	l4.hdr = skb_transport_header(skb);
1905 
1906 	/* initialize outer IP header fields */
1907 	if (ip.v4->version == 4) {
1908 		ip.v4->tot_len = 0;
1909 		ip.v4->check = 0;
1910 	} else {
1911 		ip.v6->payload_len = 0;
1912 	}
1913 
1914 	if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
1915 					 SKB_GSO_GRE_CSUM |
1916 					 SKB_GSO_IPXIP4 |
1917 					 SKB_GSO_IPXIP6 |
1918 					 SKB_GSO_UDP_TUNNEL |
1919 					 SKB_GSO_UDP_TUNNEL_CSUM)) {
1920 		if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
1921 		    (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
1922 			l4.udp->len = 0;
1923 
1924 			/* determine offset of outer transport header */
1925 			l4_start = (u8)(l4.hdr - skb->data);
1926 
1927 			/* remove payload length from outer checksum */
1928 			paylen = skb->len - l4_start;
1929 			csum_replace_by_diff(&l4.udp->check,
1930 					     (__force __wsum)htonl(paylen));
1931 		}
1932 
1933 		/* reset pointers to inner headers */
1934 
1935 		/* cppcheck-suppress unreadVariable */
1936 		ip.hdr = skb_inner_network_header(skb);
1937 		l4.hdr = skb_inner_transport_header(skb);
1938 
1939 		/* initialize inner IP header fields */
1940 		if (ip.v4->version == 4) {
1941 			ip.v4->tot_len = 0;
1942 			ip.v4->check = 0;
1943 		} else {
1944 			ip.v6->payload_len = 0;
1945 		}
1946 	}
1947 
1948 	/* determine offset of transport header */
1949 	l4_start = (u8)(l4.hdr - skb->data);
1950 
1951 	/* remove payload length from checksum */
1952 	paylen = skb->len - l4_start;
1953 
1954 	if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
1955 		csum_replace_by_diff(&l4.udp->check,
1956 				     (__force __wsum)htonl(paylen));
1957 		/* compute length of UDP segmentation header */
1958 		off->header_len = (u8)sizeof(l4.udp) + l4_start;
1959 	} else {
1960 		csum_replace_by_diff(&l4.tcp->check,
1961 				     (__force __wsum)htonl(paylen));
1962 		/* compute length of TCP segmentation header */
1963 		off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
1964 	}
1965 
1966 	/* update gso_segs and bytecount */
1967 	first->gso_segs = skb_shinfo(skb)->gso_segs;
1968 	first->bytecount += (first->gso_segs - 1) * off->header_len;
1969 
1970 	cd_tso_len = skb->len - off->header_len;
1971 	cd_mss = skb_shinfo(skb)->gso_size;
1972 
1973 	/* record cdesc_qw1 with TSO parameters */
1974 	off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
1975 			     (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
1976 			     (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
1977 			     (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
1978 	first->tx_flags |= ICE_TX_FLAGS_TSO;
1979 	return 1;
1980 }
1981 
1982 /**
1983  * ice_txd_use_count  - estimate the number of descriptors needed for Tx
1984  * @size: transmit request size in bytes
1985  *
1986  * Due to hardware alignment restrictions (4K alignment), we need to
1987  * assume that we can have no more than 12K of data per descriptor, even
1988  * though each descriptor can take up to 16K - 1 bytes of aligned memory.
1989  * Thus, we need to divide by 12K. But division is slow! Instead,
1990  * we decompose the operation into shifts and one relatively cheap
1991  * multiply operation.
1992  *
1993  * To divide by 12K, we first divide by 4K, then divide by 3:
1994  *     To divide by 4K, shift right by 12 bits
1995  *     To divide by 3, multiply by 85, then divide by 256
1996  *     (Divide by 256 is done by shifting right by 8 bits)
1997  * Finally, we add one to round up. Because 256 isn't an exact multiple of
1998  * 3, we'll underestimate near each multiple of 12K. This is actually more
1999  * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2000  * segment. For our purposes this is accurate out to 1M which is orders of
2001  * magnitude greater than our largest possible GSO size.
2002  *
2003  * This would then be implemented as:
2004  *     return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2005  *
2006  * Since multiplication and division are commutative, we can reorder
2007  * operations into:
2008  *     return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2009  */
2010 static unsigned int ice_txd_use_count(unsigned int size)
2011 {
2012 	return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2013 }
2014 
2015 /**
2016  * ice_xmit_desc_count - calculate number of Tx descriptors needed
2017  * @skb: send buffer
2018  *
2019  * Returns number of data descriptors needed for this skb.
2020  */
2021 static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2022 {
2023 	const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2024 	unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2025 	unsigned int count = 0, size = skb_headlen(skb);
2026 
2027 	for (;;) {
2028 		count += ice_txd_use_count(size);
2029 
2030 		if (!nr_frags--)
2031 			break;
2032 
2033 		size = skb_frag_size(frag++);
2034 	}
2035 
2036 	return count;
2037 }
2038 
2039 /**
2040  * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2041  * @skb: send buffer
2042  *
2043  * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2044  * and so we need to figure out the cases where we need to linearize the skb.
2045  *
2046  * For TSO we need to count the TSO header and segment payload separately.
2047  * As such we need to check cases where we have 7 fragments or more as we
2048  * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2049  * the segment payload in the first descriptor, and another 7 for the
2050  * fragments.
2051  */
2052 static bool __ice_chk_linearize(struct sk_buff *skb)
2053 {
2054 	const skb_frag_t *frag, *stale;
2055 	int nr_frags, sum;
2056 
2057 	/* no need to check if number of frags is less than 7 */
2058 	nr_frags = skb_shinfo(skb)->nr_frags;
2059 	if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2060 		return false;
2061 
2062 	/* We need to walk through the list and validate that each group
2063 	 * of 6 fragments totals at least gso_size.
2064 	 */
2065 	nr_frags -= ICE_MAX_BUF_TXD - 2;
2066 	frag = &skb_shinfo(skb)->frags[0];
2067 
2068 	/* Initialize size to the negative value of gso_size minus 1. We
2069 	 * use this as the worst case scenario in which the frag ahead
2070 	 * of us only provides one byte which is why we are limited to 6
2071 	 * descriptors for a single transmit as the header and previous
2072 	 * fragment are already consuming 2 descriptors.
2073 	 */
2074 	sum = 1 - skb_shinfo(skb)->gso_size;
2075 
2076 	/* Add size of frags 0 through 4 to create our initial sum */
2077 	sum += skb_frag_size(frag++);
2078 	sum += skb_frag_size(frag++);
2079 	sum += skb_frag_size(frag++);
2080 	sum += skb_frag_size(frag++);
2081 	sum += skb_frag_size(frag++);
2082 
2083 	/* Walk through fragments adding latest fragment, testing it, and
2084 	 * then removing stale fragments from the sum.
2085 	 */
2086 	for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2087 		int stale_size = skb_frag_size(stale);
2088 
2089 		sum += skb_frag_size(frag++);
2090 
2091 		/* The stale fragment may present us with a smaller
2092 		 * descriptor than the actual fragment size. To account
2093 		 * for that we need to remove all the data on the front and
2094 		 * figure out what the remainder would be in the last
2095 		 * descriptor associated with the fragment.
2096 		 */
2097 		if (stale_size > ICE_MAX_DATA_PER_TXD) {
2098 			int align_pad = -(skb_frag_off(stale)) &
2099 					(ICE_MAX_READ_REQ_SIZE - 1);
2100 
2101 			sum -= align_pad;
2102 			stale_size -= align_pad;
2103 
2104 			do {
2105 				sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2106 				stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2107 			} while (stale_size > ICE_MAX_DATA_PER_TXD);
2108 		}
2109 
2110 		/* if sum is negative we failed to make sufficient progress */
2111 		if (sum < 0)
2112 			return true;
2113 
2114 		if (!nr_frags--)
2115 			break;
2116 
2117 		sum -= stale_size;
2118 	}
2119 
2120 	return false;
2121 }
2122 
2123 /**
2124  * ice_chk_linearize - Check if there are more than 8 fragments per packet
2125  * @skb:      send buffer
2126  * @count:    number of buffers used
2127  *
2128  * Note: Our HW can't scatter-gather more than 8 fragments to build
2129  * a packet on the wire and so we need to figure out the cases where we
2130  * need to linearize the skb.
2131  */
2132 static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2133 {
2134 	/* Both TSO and single send will work if count is less than 8 */
2135 	if (likely(count < ICE_MAX_BUF_TXD))
2136 		return false;
2137 
2138 	if (skb_is_gso(skb))
2139 		return __ice_chk_linearize(skb);
2140 
2141 	/* we can support up to 8 data buffers for a single send */
2142 	return count != ICE_MAX_BUF_TXD;
2143 }
2144 
2145 /**
2146  * ice_tstamp - set up context descriptor for hardware timestamp
2147  * @tx_ring: pointer to the Tx ring to send buffer on
2148  * @skb: pointer to the SKB we're sending
2149  * @first: Tx buffer
2150  * @off: Tx offload parameters
2151  */
2152 static void
2153 ice_tstamp(struct ice_ring *tx_ring, struct sk_buff *skb,
2154 	   struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2155 {
2156 	s8 idx;
2157 
2158 	/* only timestamp the outbound packet if the user has requested it */
2159 	if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2160 		return;
2161 
2162 	if (!tx_ring->ptp_tx)
2163 		return;
2164 
2165 	/* Tx timestamps cannot be sampled when doing TSO */
2166 	if (first->tx_flags & ICE_TX_FLAGS_TSO)
2167 		return;
2168 
2169 	/* Grab an open timestamp slot */
2170 	idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2171 	if (idx < 0)
2172 		return;
2173 
2174 	off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2175 			     (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2176 			     ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2177 	first->tx_flags |= ICE_TX_FLAGS_TSYN;
2178 }
2179 
2180 /**
2181  * ice_xmit_frame_ring - Sends buffer on Tx ring
2182  * @skb: send buffer
2183  * @tx_ring: ring to send buffer on
2184  *
2185  * Returns NETDEV_TX_OK if sent, else an error code
2186  */
2187 static netdev_tx_t
2188 ice_xmit_frame_ring(struct sk_buff *skb, struct ice_ring *tx_ring)
2189 {
2190 	struct ice_tx_offload_params offload = { 0 };
2191 	struct ice_vsi *vsi = tx_ring->vsi;
2192 	struct ice_tx_buf *first;
2193 	struct ethhdr *eth;
2194 	unsigned int count;
2195 	int tso, csum;
2196 
2197 	ice_trace(xmit_frame_ring, tx_ring, skb);
2198 
2199 	count = ice_xmit_desc_count(skb);
2200 	if (ice_chk_linearize(skb, count)) {
2201 		if (__skb_linearize(skb))
2202 			goto out_drop;
2203 		count = ice_txd_use_count(skb->len);
2204 		tx_ring->tx_stats.tx_linearize++;
2205 	}
2206 
2207 	/* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2208 	 *       + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2209 	 *       + 4 desc gap to avoid the cache line where head is,
2210 	 *       + 1 desc for context descriptor,
2211 	 * otherwise try next time
2212 	 */
2213 	if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2214 			      ICE_DESCS_FOR_CTX_DESC)) {
2215 		tx_ring->tx_stats.tx_busy++;
2216 		return NETDEV_TX_BUSY;
2217 	}
2218 
2219 	offload.tx_ring = tx_ring;
2220 
2221 	/* record the location of the first descriptor for this packet */
2222 	first = &tx_ring->tx_buf[tx_ring->next_to_use];
2223 	first->skb = skb;
2224 	first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2225 	first->gso_segs = 1;
2226 	first->tx_flags = 0;
2227 
2228 	/* prepare the VLAN tagging flags for Tx */
2229 	ice_tx_prepare_vlan_flags(tx_ring, first);
2230 
2231 	/* set up TSO offload */
2232 	tso = ice_tso(first, &offload);
2233 	if (tso < 0)
2234 		goto out_drop;
2235 
2236 	/* always set up Tx checksum offload */
2237 	csum = ice_tx_csum(first, &offload);
2238 	if (csum < 0)
2239 		goto out_drop;
2240 
2241 	/* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2242 	eth = (struct ethhdr *)skb_mac_header(skb);
2243 	if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2244 		      eth->h_proto == htons(ETH_P_LLDP)) &&
2245 		     vsi->type == ICE_VSI_PF &&
2246 		     vsi->port_info->qos_cfg.is_sw_lldp))
2247 		offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2248 					ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2249 					ICE_TXD_CTX_QW1_CMD_S);
2250 
2251 	ice_tstamp(tx_ring, skb, first, &offload);
2252 
2253 	if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2254 		struct ice_tx_ctx_desc *cdesc;
2255 		u16 i = tx_ring->next_to_use;
2256 
2257 		/* grab the next descriptor */
2258 		cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2259 		i++;
2260 		tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2261 
2262 		/* setup context descriptor */
2263 		cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2264 		cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2265 		cdesc->rsvd = cpu_to_le16(0);
2266 		cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2267 	}
2268 
2269 	ice_tx_map(tx_ring, first, &offload);
2270 	return NETDEV_TX_OK;
2271 
2272 out_drop:
2273 	ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2274 	dev_kfree_skb_any(skb);
2275 	return NETDEV_TX_OK;
2276 }
2277 
2278 /**
2279  * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2280  * @skb: send buffer
2281  * @netdev: network interface device structure
2282  *
2283  * Returns NETDEV_TX_OK if sent, else an error code
2284  */
2285 netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2286 {
2287 	struct ice_netdev_priv *np = netdev_priv(netdev);
2288 	struct ice_vsi *vsi = np->vsi;
2289 	struct ice_ring *tx_ring;
2290 
2291 	tx_ring = vsi->tx_rings[skb->queue_mapping];
2292 
2293 	/* hardware can't handle really short frames, hardware padding works
2294 	 * beyond this point
2295 	 */
2296 	if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2297 		return NETDEV_TX_OK;
2298 
2299 	return ice_xmit_frame_ring(skb, tx_ring);
2300 }
2301 
2302 /**
2303  * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2304  * @tx_ring: tx_ring to clean
2305  */
2306 void ice_clean_ctrl_tx_irq(struct ice_ring *tx_ring)
2307 {
2308 	struct ice_vsi *vsi = tx_ring->vsi;
2309 	s16 i = tx_ring->next_to_clean;
2310 	int budget = ICE_DFLT_IRQ_WORK;
2311 	struct ice_tx_desc *tx_desc;
2312 	struct ice_tx_buf *tx_buf;
2313 
2314 	tx_buf = &tx_ring->tx_buf[i];
2315 	tx_desc = ICE_TX_DESC(tx_ring, i);
2316 	i -= tx_ring->count;
2317 
2318 	do {
2319 		struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2320 
2321 		/* if next_to_watch is not set then there is no pending work */
2322 		if (!eop_desc)
2323 			break;
2324 
2325 		/* prevent any other reads prior to eop_desc */
2326 		smp_rmb();
2327 
2328 		/* if the descriptor isn't done, no work to do */
2329 		if (!(eop_desc->cmd_type_offset_bsz &
2330 		      cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2331 			break;
2332 
2333 		/* clear next_to_watch to prevent false hangs */
2334 		tx_buf->next_to_watch = NULL;
2335 		tx_desc->buf_addr = 0;
2336 		tx_desc->cmd_type_offset_bsz = 0;
2337 
2338 		/* move past filter desc */
2339 		tx_buf++;
2340 		tx_desc++;
2341 		i++;
2342 		if (unlikely(!i)) {
2343 			i -= tx_ring->count;
2344 			tx_buf = tx_ring->tx_buf;
2345 			tx_desc = ICE_TX_DESC(tx_ring, 0);
2346 		}
2347 
2348 		/* unmap the data header */
2349 		if (dma_unmap_len(tx_buf, len))
2350 			dma_unmap_single(tx_ring->dev,
2351 					 dma_unmap_addr(tx_buf, dma),
2352 					 dma_unmap_len(tx_buf, len),
2353 					 DMA_TO_DEVICE);
2354 		if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
2355 			devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2356 
2357 		/* clear next_to_watch to prevent false hangs */
2358 		tx_buf->raw_buf = NULL;
2359 		tx_buf->tx_flags = 0;
2360 		tx_buf->next_to_watch = NULL;
2361 		dma_unmap_len_set(tx_buf, len, 0);
2362 		tx_desc->buf_addr = 0;
2363 		tx_desc->cmd_type_offset_bsz = 0;
2364 
2365 		/* move past eop_desc for start of next FD desc */
2366 		tx_buf++;
2367 		tx_desc++;
2368 		i++;
2369 		if (unlikely(!i)) {
2370 			i -= tx_ring->count;
2371 			tx_buf = tx_ring->tx_buf;
2372 			tx_desc = ICE_TX_DESC(tx_ring, 0);
2373 		}
2374 
2375 		budget--;
2376 	} while (likely(budget));
2377 
2378 	i += tx_ring->count;
2379 	tx_ring->next_to_clean = i;
2380 
2381 	/* re-enable interrupt if needed */
2382 	ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2383 }
2384