1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 /* The driver transmit and receive code */
5 
6 #include <linux/mm.h>
7 #include <linux/netdevice.h>
8 #include <linux/prefetch.h>
9 #include <linux/bpf_trace.h>
10 #include <net/dsfield.h>
11 #include <net/mpls.h>
12 #include <net/xdp.h>
13 #include "ice_txrx_lib.h"
14 #include "ice_lib.h"
15 #include "ice.h"
16 #include "ice_trace.h"
17 #include "ice_dcb_lib.h"
18 #include "ice_xsk.h"
19 #include "ice_eswitch.h"
20 
21 #define ICE_RX_HDR_SIZE		256
22 
23 #define FDIR_DESC_RXDID 0x40
24 #define ICE_FDIR_CLEAN_DELAY 10
25 
26 /**
27  * ice_prgm_fdir_fltr - Program a Flow Director filter
28  * @vsi: VSI to send dummy packet
29  * @fdir_desc: flow director descriptor
30  * @raw_packet: allocated buffer for flow director
31  */
32 int
33 ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
34 		   u8 *raw_packet)
35 {
36 	struct ice_tx_buf *tx_buf, *first;
37 	struct ice_fltr_desc *f_desc;
38 	struct ice_tx_desc *tx_desc;
39 	struct ice_tx_ring *tx_ring;
40 	struct device *dev;
41 	dma_addr_t dma;
42 	u32 td_cmd;
43 	u16 i;
44 
45 	/* VSI and Tx ring */
46 	if (!vsi)
47 		return -ENOENT;
48 	tx_ring = vsi->tx_rings[0];
49 	if (!tx_ring || !tx_ring->desc)
50 		return -ENOENT;
51 	dev = tx_ring->dev;
52 
53 	/* we are using two descriptors to add/del a filter and we can wait */
54 	for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
55 		if (!i)
56 			return -EAGAIN;
57 		msleep_interruptible(1);
58 	}
59 
60 	dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
61 			     DMA_TO_DEVICE);
62 
63 	if (dma_mapping_error(dev, dma))
64 		return -EINVAL;
65 
66 	/* grab the next descriptor */
67 	i = tx_ring->next_to_use;
68 	first = &tx_ring->tx_buf[i];
69 	f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70 	memcpy(f_desc, fdir_desc, sizeof(*f_desc));
71 
72 	i++;
73 	i = (i < tx_ring->count) ? i : 0;
74 	tx_desc = ICE_TX_DESC(tx_ring, i);
75 	tx_buf = &tx_ring->tx_buf[i];
76 
77 	i++;
78 	tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
79 
80 	memset(tx_buf, 0, sizeof(*tx_buf));
81 	dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82 	dma_unmap_addr_set(tx_buf, dma, dma);
83 
84 	tx_desc->buf_addr = cpu_to_le64(dma);
85 	td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
86 		 ICE_TX_DESC_CMD_RE;
87 
88 	tx_buf->type = ICE_TX_BUF_DUMMY;
89 	tx_buf->raw_buf = raw_packet;
90 
91 	tx_desc->cmd_type_offset_bsz =
92 		ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
93 
94 	/* Force memory write to complete before letting h/w know
95 	 * there are new descriptors to fetch.
96 	 */
97 	wmb();
98 
99 	/* mark the data descriptor to be watched */
100 	first->next_to_watch = tx_desc;
101 
102 	writel(tx_ring->next_to_use, tx_ring->tail);
103 
104 	return 0;
105 }
106 
107 /**
108  * ice_unmap_and_free_tx_buf - Release a Tx buffer
109  * @ring: the ring that owns the buffer
110  * @tx_buf: the buffer to free
111  */
112 static void
113 ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
114 {
115 	if (dma_unmap_len(tx_buf, len))
116 		dma_unmap_page(ring->dev,
117 			       dma_unmap_addr(tx_buf, dma),
118 			       dma_unmap_len(tx_buf, len),
119 			       DMA_TO_DEVICE);
120 
121 	switch (tx_buf->type) {
122 	case ICE_TX_BUF_DUMMY:
123 		devm_kfree(ring->dev, tx_buf->raw_buf);
124 		break;
125 	case ICE_TX_BUF_SKB:
126 		dev_kfree_skb_any(tx_buf->skb);
127 		break;
128 	case ICE_TX_BUF_XDP_TX:
129 		page_frag_free(tx_buf->raw_buf);
130 		break;
131 	case ICE_TX_BUF_XDP_XMIT:
132 		xdp_return_frame(tx_buf->xdpf);
133 		break;
134 	}
135 
136 	tx_buf->next_to_watch = NULL;
137 	tx_buf->type = ICE_TX_BUF_EMPTY;
138 	dma_unmap_len_set(tx_buf, len, 0);
139 	/* tx_buf must be completely set up in the transmit path */
140 }
141 
142 static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
143 {
144 	return netdev_get_tx_queue(ring->netdev, ring->q_index);
145 }
146 
147 /**
148  * ice_clean_tx_ring - Free any empty Tx buffers
149  * @tx_ring: ring to be cleaned
150  */
151 void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
152 {
153 	u32 size;
154 	u16 i;
155 
156 	if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
157 		ice_xsk_clean_xdp_ring(tx_ring);
158 		goto tx_skip_free;
159 	}
160 
161 	/* ring already cleared, nothing to do */
162 	if (!tx_ring->tx_buf)
163 		return;
164 
165 	/* Free all the Tx ring sk_buffs */
166 	for (i = 0; i < tx_ring->count; i++)
167 		ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
168 
169 tx_skip_free:
170 	memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
171 
172 	size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
173 		     PAGE_SIZE);
174 	/* Zero out the descriptor ring */
175 	memset(tx_ring->desc, 0, size);
176 
177 	tx_ring->next_to_use = 0;
178 	tx_ring->next_to_clean = 0;
179 
180 	if (!tx_ring->netdev)
181 		return;
182 
183 	/* cleanup Tx queue statistics */
184 	netdev_tx_reset_queue(txring_txq(tx_ring));
185 }
186 
187 /**
188  * ice_free_tx_ring - Free Tx resources per queue
189  * @tx_ring: Tx descriptor ring for a specific queue
190  *
191  * Free all transmit software resources
192  */
193 void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
194 {
195 	u32 size;
196 
197 	ice_clean_tx_ring(tx_ring);
198 	devm_kfree(tx_ring->dev, tx_ring->tx_buf);
199 	tx_ring->tx_buf = NULL;
200 
201 	if (tx_ring->desc) {
202 		size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
203 			     PAGE_SIZE);
204 		dmam_free_coherent(tx_ring->dev, size,
205 				   tx_ring->desc, tx_ring->dma);
206 		tx_ring->desc = NULL;
207 	}
208 }
209 
210 /**
211  * ice_clean_tx_irq - Reclaim resources after transmit completes
212  * @tx_ring: Tx ring to clean
213  * @napi_budget: Used to determine if we are in netpoll
214  *
215  * Returns true if there's any budget left (e.g. the clean is finished)
216  */
217 static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
218 {
219 	unsigned int total_bytes = 0, total_pkts = 0;
220 	unsigned int budget = ICE_DFLT_IRQ_WORK;
221 	struct ice_vsi *vsi = tx_ring->vsi;
222 	s16 i = tx_ring->next_to_clean;
223 	struct ice_tx_desc *tx_desc;
224 	struct ice_tx_buf *tx_buf;
225 
226 	/* get the bql data ready */
227 	netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
228 
229 	tx_buf = &tx_ring->tx_buf[i];
230 	tx_desc = ICE_TX_DESC(tx_ring, i);
231 	i -= tx_ring->count;
232 
233 	prefetch(&vsi->state);
234 
235 	do {
236 		struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
237 
238 		/* if next_to_watch is not set then there is no work pending */
239 		if (!eop_desc)
240 			break;
241 
242 		/* follow the guidelines of other drivers */
243 		prefetchw(&tx_buf->skb->users);
244 
245 		smp_rmb();	/* prevent any other reads prior to eop_desc */
246 
247 		ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
248 		/* if the descriptor isn't done, no work yet to do */
249 		if (!(eop_desc->cmd_type_offset_bsz &
250 		      cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
251 			break;
252 
253 		/* clear next_to_watch to prevent false hangs */
254 		tx_buf->next_to_watch = NULL;
255 
256 		/* update the statistics for this packet */
257 		total_bytes += tx_buf->bytecount;
258 		total_pkts += tx_buf->gso_segs;
259 
260 		/* free the skb */
261 		napi_consume_skb(tx_buf->skb, napi_budget);
262 
263 		/* unmap skb header data */
264 		dma_unmap_single(tx_ring->dev,
265 				 dma_unmap_addr(tx_buf, dma),
266 				 dma_unmap_len(tx_buf, len),
267 				 DMA_TO_DEVICE);
268 
269 		/* clear tx_buf data */
270 		tx_buf->type = ICE_TX_BUF_EMPTY;
271 		dma_unmap_len_set(tx_buf, len, 0);
272 
273 		/* unmap remaining buffers */
274 		while (tx_desc != eop_desc) {
275 			ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
276 			tx_buf++;
277 			tx_desc++;
278 			i++;
279 			if (unlikely(!i)) {
280 				i -= tx_ring->count;
281 				tx_buf = tx_ring->tx_buf;
282 				tx_desc = ICE_TX_DESC(tx_ring, 0);
283 			}
284 
285 			/* unmap any remaining paged data */
286 			if (dma_unmap_len(tx_buf, len)) {
287 				dma_unmap_page(tx_ring->dev,
288 					       dma_unmap_addr(tx_buf, dma),
289 					       dma_unmap_len(tx_buf, len),
290 					       DMA_TO_DEVICE);
291 				dma_unmap_len_set(tx_buf, len, 0);
292 			}
293 		}
294 		ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
295 
296 		/* move us one more past the eop_desc for start of next pkt */
297 		tx_buf++;
298 		tx_desc++;
299 		i++;
300 		if (unlikely(!i)) {
301 			i -= tx_ring->count;
302 			tx_buf = tx_ring->tx_buf;
303 			tx_desc = ICE_TX_DESC(tx_ring, 0);
304 		}
305 
306 		prefetch(tx_desc);
307 
308 		/* update budget accounting */
309 		budget--;
310 	} while (likely(budget));
311 
312 	i += tx_ring->count;
313 	tx_ring->next_to_clean = i;
314 
315 	ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
316 	netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
317 
318 #define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
319 	if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
320 		     (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
321 		/* Make sure that anybody stopping the queue after this
322 		 * sees the new next_to_clean.
323 		 */
324 		smp_mb();
325 		if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
326 		    !test_bit(ICE_VSI_DOWN, vsi->state)) {
327 			netif_tx_wake_queue(txring_txq(tx_ring));
328 			++tx_ring->ring_stats->tx_stats.restart_q;
329 		}
330 	}
331 
332 	return !!budget;
333 }
334 
335 /**
336  * ice_setup_tx_ring - Allocate the Tx descriptors
337  * @tx_ring: the Tx ring to set up
338  *
339  * Return 0 on success, negative on error
340  */
341 int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
342 {
343 	struct device *dev = tx_ring->dev;
344 	u32 size;
345 
346 	if (!dev)
347 		return -ENOMEM;
348 
349 	/* warn if we are about to overwrite the pointer */
350 	WARN_ON(tx_ring->tx_buf);
351 	tx_ring->tx_buf =
352 		devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
353 			     GFP_KERNEL);
354 	if (!tx_ring->tx_buf)
355 		return -ENOMEM;
356 
357 	/* round up to nearest page */
358 	size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
359 		     PAGE_SIZE);
360 	tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
361 					    GFP_KERNEL);
362 	if (!tx_ring->desc) {
363 		dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
364 			size);
365 		goto err;
366 	}
367 
368 	tx_ring->next_to_use = 0;
369 	tx_ring->next_to_clean = 0;
370 	tx_ring->ring_stats->tx_stats.prev_pkt = -1;
371 	return 0;
372 
373 err:
374 	devm_kfree(dev, tx_ring->tx_buf);
375 	tx_ring->tx_buf = NULL;
376 	return -ENOMEM;
377 }
378 
379 /**
380  * ice_clean_rx_ring - Free Rx buffers
381  * @rx_ring: ring to be cleaned
382  */
383 void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
384 {
385 	struct xdp_buff *xdp = &rx_ring->xdp;
386 	struct device *dev = rx_ring->dev;
387 	u32 size;
388 	u16 i;
389 
390 	/* ring already cleared, nothing to do */
391 	if (!rx_ring->rx_buf)
392 		return;
393 
394 	if (rx_ring->xsk_pool) {
395 		ice_xsk_clean_rx_ring(rx_ring);
396 		goto rx_skip_free;
397 	}
398 
399 	if (xdp->data) {
400 		xdp_return_buff(xdp);
401 		xdp->data = NULL;
402 	}
403 
404 	/* Free all the Rx ring sk_buffs */
405 	for (i = 0; i < rx_ring->count; i++) {
406 		struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
407 
408 		if (!rx_buf->page)
409 			continue;
410 
411 		/* Invalidate cache lines that may have been written to by
412 		 * device so that we avoid corrupting memory.
413 		 */
414 		dma_sync_single_range_for_cpu(dev, rx_buf->dma,
415 					      rx_buf->page_offset,
416 					      rx_ring->rx_buf_len,
417 					      DMA_FROM_DEVICE);
418 
419 		/* free resources associated with mapping */
420 		dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
421 				     DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
422 		__page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
423 
424 		rx_buf->page = NULL;
425 		rx_buf->page_offset = 0;
426 	}
427 
428 rx_skip_free:
429 	if (rx_ring->xsk_pool)
430 		memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
431 	else
432 		memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
433 
434 	/* Zero out the descriptor ring */
435 	size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
436 		     PAGE_SIZE);
437 	memset(rx_ring->desc, 0, size);
438 
439 	rx_ring->next_to_alloc = 0;
440 	rx_ring->next_to_clean = 0;
441 	rx_ring->first_desc = 0;
442 	rx_ring->next_to_use = 0;
443 }
444 
445 /**
446  * ice_free_rx_ring - Free Rx resources
447  * @rx_ring: ring to clean the resources from
448  *
449  * Free all receive software resources
450  */
451 void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
452 {
453 	u32 size;
454 
455 	ice_clean_rx_ring(rx_ring);
456 	if (rx_ring->vsi->type == ICE_VSI_PF)
457 		if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
458 			xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
459 	rx_ring->xdp_prog = NULL;
460 	if (rx_ring->xsk_pool) {
461 		kfree(rx_ring->xdp_buf);
462 		rx_ring->xdp_buf = NULL;
463 	} else {
464 		kfree(rx_ring->rx_buf);
465 		rx_ring->rx_buf = NULL;
466 	}
467 
468 	if (rx_ring->desc) {
469 		size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
470 			     PAGE_SIZE);
471 		dmam_free_coherent(rx_ring->dev, size,
472 				   rx_ring->desc, rx_ring->dma);
473 		rx_ring->desc = NULL;
474 	}
475 }
476 
477 /**
478  * ice_setup_rx_ring - Allocate the Rx descriptors
479  * @rx_ring: the Rx ring to set up
480  *
481  * Return 0 on success, negative on error
482  */
483 int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
484 {
485 	struct device *dev = rx_ring->dev;
486 	u32 size;
487 
488 	if (!dev)
489 		return -ENOMEM;
490 
491 	/* warn if we are about to overwrite the pointer */
492 	WARN_ON(rx_ring->rx_buf);
493 	rx_ring->rx_buf =
494 		kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
495 	if (!rx_ring->rx_buf)
496 		return -ENOMEM;
497 
498 	/* round up to nearest page */
499 	size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
500 		     PAGE_SIZE);
501 	rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
502 					    GFP_KERNEL);
503 	if (!rx_ring->desc) {
504 		dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
505 			size);
506 		goto err;
507 	}
508 
509 	rx_ring->next_to_use = 0;
510 	rx_ring->next_to_clean = 0;
511 	rx_ring->first_desc = 0;
512 
513 	if (ice_is_xdp_ena_vsi(rx_ring->vsi))
514 		WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
515 
516 	return 0;
517 
518 err:
519 	kfree(rx_ring->rx_buf);
520 	rx_ring->rx_buf = NULL;
521 	return -ENOMEM;
522 }
523 
524 /**
525  * ice_rx_frame_truesize
526  * @rx_ring: ptr to Rx ring
527  * @size: size
528  *
529  * calculate the truesize with taking into the account PAGE_SIZE of
530  * underlying arch
531  */
532 static unsigned int
533 ice_rx_frame_truesize(struct ice_rx_ring *rx_ring, const unsigned int size)
534 {
535 	unsigned int truesize;
536 
537 #if (PAGE_SIZE < 8192)
538 	truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
539 #else
540 	truesize = rx_ring->rx_offset ?
541 		SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
542 		SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
543 		SKB_DATA_ALIGN(size);
544 #endif
545 	return truesize;
546 }
547 
548 /**
549  * ice_run_xdp - Executes an XDP program on initialized xdp_buff
550  * @rx_ring: Rx ring
551  * @xdp: xdp_buff used as input to the XDP program
552  * @xdp_prog: XDP program to run
553  * @xdp_ring: ring to be used for XDP_TX action
554  * @rx_buf: Rx buffer to store the XDP action
555  *
556  * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
557  */
558 static void
559 ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
560 	    struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring,
561 	    struct ice_rx_buf *rx_buf)
562 {
563 	unsigned int ret = ICE_XDP_PASS;
564 	u32 act;
565 
566 	if (!xdp_prog)
567 		goto exit;
568 
569 	act = bpf_prog_run_xdp(xdp_prog, xdp);
570 	switch (act) {
571 	case XDP_PASS:
572 		break;
573 	case XDP_TX:
574 		if (static_branch_unlikely(&ice_xdp_locking_key))
575 			spin_lock(&xdp_ring->tx_lock);
576 		ret = __ice_xmit_xdp_ring(xdp, xdp_ring, false);
577 		if (static_branch_unlikely(&ice_xdp_locking_key))
578 			spin_unlock(&xdp_ring->tx_lock);
579 		if (ret == ICE_XDP_CONSUMED)
580 			goto out_failure;
581 		break;
582 	case XDP_REDIRECT:
583 		if (xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))
584 			goto out_failure;
585 		ret = ICE_XDP_REDIR;
586 		break;
587 	default:
588 		bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
589 		fallthrough;
590 	case XDP_ABORTED:
591 out_failure:
592 		trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
593 		fallthrough;
594 	case XDP_DROP:
595 		ret = ICE_XDP_CONSUMED;
596 	}
597 exit:
598 	ice_set_rx_bufs_act(xdp, rx_ring, ret);
599 }
600 
601 /**
602  * ice_xmit_xdp_ring - submit frame to XDP ring for transmission
603  * @xdpf: XDP frame that will be converted to XDP buff
604  * @xdp_ring: XDP ring for transmission
605  */
606 static int ice_xmit_xdp_ring(const struct xdp_frame *xdpf,
607 			     struct ice_tx_ring *xdp_ring)
608 {
609 	struct xdp_buff xdp;
610 
611 	xdp.data_hard_start = (void *)xdpf;
612 	xdp.data = xdpf->data;
613 	xdp.data_end = xdp.data + xdpf->len;
614 	xdp.frame_sz = xdpf->frame_sz;
615 	xdp.flags = xdpf->flags;
616 
617 	return __ice_xmit_xdp_ring(&xdp, xdp_ring, true);
618 }
619 
620 /**
621  * ice_xdp_xmit - submit packets to XDP ring for transmission
622  * @dev: netdev
623  * @n: number of XDP frames to be transmitted
624  * @frames: XDP frames to be transmitted
625  * @flags: transmit flags
626  *
627  * Returns number of frames successfully sent. Failed frames
628  * will be free'ed by XDP core.
629  * For error cases, a negative errno code is returned and no-frames
630  * are transmitted (caller must handle freeing frames).
631  */
632 int
633 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
634 	     u32 flags)
635 {
636 	struct ice_netdev_priv *np = netdev_priv(dev);
637 	unsigned int queue_index = smp_processor_id();
638 	struct ice_vsi *vsi = np->vsi;
639 	struct ice_tx_ring *xdp_ring;
640 	struct ice_tx_buf *tx_buf;
641 	int nxmit = 0, i;
642 
643 	if (test_bit(ICE_VSI_DOWN, vsi->state))
644 		return -ENETDOWN;
645 
646 	if (!ice_is_xdp_ena_vsi(vsi))
647 		return -ENXIO;
648 
649 	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
650 		return -EINVAL;
651 
652 	if (static_branch_unlikely(&ice_xdp_locking_key)) {
653 		queue_index %= vsi->num_xdp_txq;
654 		xdp_ring = vsi->xdp_rings[queue_index];
655 		spin_lock(&xdp_ring->tx_lock);
656 	} else {
657 		/* Generally, should not happen */
658 		if (unlikely(queue_index >= vsi->num_xdp_txq))
659 			return -ENXIO;
660 		xdp_ring = vsi->xdp_rings[queue_index];
661 	}
662 
663 	tx_buf = &xdp_ring->tx_buf[xdp_ring->next_to_use];
664 	for (i = 0; i < n; i++) {
665 		const struct xdp_frame *xdpf = frames[i];
666 		int err;
667 
668 		err = ice_xmit_xdp_ring(xdpf, xdp_ring);
669 		if (err != ICE_XDP_TX)
670 			break;
671 		nxmit++;
672 	}
673 
674 	tx_buf->rs_idx = ice_set_rs_bit(xdp_ring);
675 	if (unlikely(flags & XDP_XMIT_FLUSH))
676 		ice_xdp_ring_update_tail(xdp_ring);
677 
678 	if (static_branch_unlikely(&ice_xdp_locking_key))
679 		spin_unlock(&xdp_ring->tx_lock);
680 
681 	return nxmit;
682 }
683 
684 /**
685  * ice_alloc_mapped_page - recycle or make a new page
686  * @rx_ring: ring to use
687  * @bi: rx_buf struct to modify
688  *
689  * Returns true if the page was successfully allocated or
690  * reused.
691  */
692 static bool
693 ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
694 {
695 	struct page *page = bi->page;
696 	dma_addr_t dma;
697 
698 	/* since we are recycling buffers we should seldom need to alloc */
699 	if (likely(page))
700 		return true;
701 
702 	/* alloc new page for storage */
703 	page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
704 	if (unlikely(!page)) {
705 		rx_ring->ring_stats->rx_stats.alloc_page_failed++;
706 		return false;
707 	}
708 
709 	/* map page for use */
710 	dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
711 				 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
712 
713 	/* if mapping failed free memory back to system since
714 	 * there isn't much point in holding memory we can't use
715 	 */
716 	if (dma_mapping_error(rx_ring->dev, dma)) {
717 		__free_pages(page, ice_rx_pg_order(rx_ring));
718 		rx_ring->ring_stats->rx_stats.alloc_page_failed++;
719 		return false;
720 	}
721 
722 	bi->dma = dma;
723 	bi->page = page;
724 	bi->page_offset = rx_ring->rx_offset;
725 	page_ref_add(page, USHRT_MAX - 1);
726 	bi->pagecnt_bias = USHRT_MAX;
727 
728 	return true;
729 }
730 
731 /**
732  * ice_alloc_rx_bufs - Replace used receive buffers
733  * @rx_ring: ring to place buffers on
734  * @cleaned_count: number of buffers to replace
735  *
736  * Returns false if all allocations were successful, true if any fail. Returning
737  * true signals to the caller that we didn't replace cleaned_count buffers and
738  * there is more work to do.
739  *
740  * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
741  * buffers. Then bump tail at most one time. Grouping like this lets us avoid
742  * multiple tail writes per call.
743  */
744 bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, unsigned int cleaned_count)
745 {
746 	union ice_32b_rx_flex_desc *rx_desc;
747 	u16 ntu = rx_ring->next_to_use;
748 	struct ice_rx_buf *bi;
749 
750 	/* do nothing if no valid netdev defined */
751 	if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
752 	    !cleaned_count)
753 		return false;
754 
755 	/* get the Rx descriptor and buffer based on next_to_use */
756 	rx_desc = ICE_RX_DESC(rx_ring, ntu);
757 	bi = &rx_ring->rx_buf[ntu];
758 
759 	do {
760 		/* if we fail here, we have work remaining */
761 		if (!ice_alloc_mapped_page(rx_ring, bi))
762 			break;
763 
764 		/* sync the buffer for use by the device */
765 		dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
766 						 bi->page_offset,
767 						 rx_ring->rx_buf_len,
768 						 DMA_FROM_DEVICE);
769 
770 		/* Refresh the desc even if buffer_addrs didn't change
771 		 * because each write-back erases this info.
772 		 */
773 		rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
774 
775 		rx_desc++;
776 		bi++;
777 		ntu++;
778 		if (unlikely(ntu == rx_ring->count)) {
779 			rx_desc = ICE_RX_DESC(rx_ring, 0);
780 			bi = rx_ring->rx_buf;
781 			ntu = 0;
782 		}
783 
784 		/* clear the status bits for the next_to_use descriptor */
785 		rx_desc->wb.status_error0 = 0;
786 
787 		cleaned_count--;
788 	} while (cleaned_count);
789 
790 	if (rx_ring->next_to_use != ntu)
791 		ice_release_rx_desc(rx_ring, ntu);
792 
793 	return !!cleaned_count;
794 }
795 
796 /**
797  * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
798  * @rx_buf: Rx buffer to adjust
799  * @size: Size of adjustment
800  *
801  * Update the offset within page so that Rx buf will be ready to be reused.
802  * For systems with PAGE_SIZE < 8192 this function will flip the page offset
803  * so the second half of page assigned to Rx buffer will be used, otherwise
804  * the offset is moved by "size" bytes
805  */
806 static void
807 ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
808 {
809 #if (PAGE_SIZE < 8192)
810 	/* flip page offset to other buffer */
811 	rx_buf->page_offset ^= size;
812 #else
813 	/* move offset up to the next cache line */
814 	rx_buf->page_offset += size;
815 #endif
816 }
817 
818 /**
819  * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
820  * @rx_buf: buffer containing the page
821  *
822  * If page is reusable, we have a green light for calling ice_reuse_rx_page,
823  * which will assign the current buffer to the buffer that next_to_alloc is
824  * pointing to; otherwise, the DMA mapping needs to be destroyed and
825  * page freed
826  */
827 static bool
828 ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf)
829 {
830 	unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
831 	struct page *page = rx_buf->page;
832 
833 	/* avoid re-using remote and pfmemalloc pages */
834 	if (!dev_page_is_reusable(page))
835 		return false;
836 
837 #if (PAGE_SIZE < 8192)
838 	/* if we are only owner of page we can reuse it */
839 	if (unlikely(rx_buf->pgcnt - pagecnt_bias > 1))
840 		return false;
841 #else
842 #define ICE_LAST_OFFSET \
843 	(SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
844 	if (rx_buf->page_offset > ICE_LAST_OFFSET)
845 		return false;
846 #endif /* PAGE_SIZE < 8192) */
847 
848 	/* If we have drained the page fragment pool we need to update
849 	 * the pagecnt_bias and page count so that we fully restock the
850 	 * number of references the driver holds.
851 	 */
852 	if (unlikely(pagecnt_bias == 1)) {
853 		page_ref_add(page, USHRT_MAX - 1);
854 		rx_buf->pagecnt_bias = USHRT_MAX;
855 	}
856 
857 	return true;
858 }
859 
860 /**
861  * ice_add_xdp_frag - Add contents of Rx buffer to xdp buf as a frag
862  * @rx_ring: Rx descriptor ring to transact packets on
863  * @xdp: xdp buff to place the data into
864  * @rx_buf: buffer containing page to add
865  * @size: packet length from rx_desc
866  *
867  * This function will add the data contained in rx_buf->page to the xdp buf.
868  * It will just attach the page as a frag.
869  */
870 static int
871 ice_add_xdp_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
872 		 struct ice_rx_buf *rx_buf, const unsigned int size)
873 {
874 	struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
875 
876 	if (!size)
877 		return 0;
878 
879 	if (!xdp_buff_has_frags(xdp)) {
880 		sinfo->nr_frags = 0;
881 		sinfo->xdp_frags_size = 0;
882 		xdp_buff_set_frags_flag(xdp);
883 	}
884 
885 	if (unlikely(sinfo->nr_frags == MAX_SKB_FRAGS)) {
886 		ice_set_rx_bufs_act(xdp, rx_ring, ICE_XDP_CONSUMED);
887 		return -ENOMEM;
888 	}
889 
890 	__skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++, rx_buf->page,
891 				   rx_buf->page_offset, size);
892 	sinfo->xdp_frags_size += size;
893 	/* remember frag count before XDP prog execution; bpf_xdp_adjust_tail()
894 	 * can pop off frags but driver has to handle it on its own
895 	 */
896 	rx_ring->nr_frags = sinfo->nr_frags;
897 
898 	if (page_is_pfmemalloc(rx_buf->page))
899 		xdp_buff_set_frag_pfmemalloc(xdp);
900 
901 	return 0;
902 }
903 
904 /**
905  * ice_reuse_rx_page - page flip buffer and store it back on the ring
906  * @rx_ring: Rx descriptor ring to store buffers on
907  * @old_buf: donor buffer to have page reused
908  *
909  * Synchronizes page for reuse by the adapter
910  */
911 static void
912 ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
913 {
914 	u16 nta = rx_ring->next_to_alloc;
915 	struct ice_rx_buf *new_buf;
916 
917 	new_buf = &rx_ring->rx_buf[nta];
918 
919 	/* update, and store next to alloc */
920 	nta++;
921 	rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
922 
923 	/* Transfer page from old buffer to new buffer.
924 	 * Move each member individually to avoid possible store
925 	 * forwarding stalls and unnecessary copy of skb.
926 	 */
927 	new_buf->dma = old_buf->dma;
928 	new_buf->page = old_buf->page;
929 	new_buf->page_offset = old_buf->page_offset;
930 	new_buf->pagecnt_bias = old_buf->pagecnt_bias;
931 }
932 
933 /**
934  * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
935  * @rx_ring: Rx descriptor ring to transact packets on
936  * @size: size of buffer to add to skb
937  * @ntc: index of next to clean element
938  *
939  * This function will pull an Rx buffer from the ring and synchronize it
940  * for use by the CPU.
941  */
942 static struct ice_rx_buf *
943 ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
944 	       const unsigned int ntc)
945 {
946 	struct ice_rx_buf *rx_buf;
947 
948 	rx_buf = &rx_ring->rx_buf[ntc];
949 	rx_buf->pgcnt =
950 #if (PAGE_SIZE < 8192)
951 		page_count(rx_buf->page);
952 #else
953 		0;
954 #endif
955 	prefetchw(rx_buf->page);
956 
957 	if (!size)
958 		return rx_buf;
959 	/* we are reusing so sync this buffer for CPU use */
960 	dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
961 				      rx_buf->page_offset, size,
962 				      DMA_FROM_DEVICE);
963 
964 	/* We have pulled a buffer for use, so decrement pagecnt_bias */
965 	rx_buf->pagecnt_bias--;
966 
967 	return rx_buf;
968 }
969 
970 /**
971  * ice_build_skb - Build skb around an existing buffer
972  * @rx_ring: Rx descriptor ring to transact packets on
973  * @xdp: xdp_buff pointing to the data
974  *
975  * This function builds an skb around an existing XDP buffer, taking care
976  * to set up the skb correctly and avoid any memcpy overhead. Driver has
977  * already combined frags (if any) to skb_shared_info.
978  */
979 static struct sk_buff *
980 ice_build_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
981 {
982 	u8 metasize = xdp->data - xdp->data_meta;
983 	struct skb_shared_info *sinfo = NULL;
984 	unsigned int nr_frags;
985 	struct sk_buff *skb;
986 
987 	if (unlikely(xdp_buff_has_frags(xdp))) {
988 		sinfo = xdp_get_shared_info_from_buff(xdp);
989 		nr_frags = sinfo->nr_frags;
990 	}
991 
992 	/* Prefetch first cache line of first page. If xdp->data_meta
993 	 * is unused, this points exactly as xdp->data, otherwise we
994 	 * likely have a consumer accessing first few bytes of meta
995 	 * data, and then actual data.
996 	 */
997 	net_prefetch(xdp->data_meta);
998 	/* build an skb around the page buffer */
999 	skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
1000 	if (unlikely(!skb))
1001 		return NULL;
1002 
1003 	/* must to record Rx queue, otherwise OS features such as
1004 	 * symmetric queue won't work
1005 	 */
1006 	skb_record_rx_queue(skb, rx_ring->q_index);
1007 
1008 	/* update pointers within the skb to store the data */
1009 	skb_reserve(skb, xdp->data - xdp->data_hard_start);
1010 	__skb_put(skb, xdp->data_end - xdp->data);
1011 	if (metasize)
1012 		skb_metadata_set(skb, metasize);
1013 
1014 	if (unlikely(xdp_buff_has_frags(xdp)))
1015 		xdp_update_skb_shared_info(skb, nr_frags,
1016 					   sinfo->xdp_frags_size,
1017 					   nr_frags * xdp->frame_sz,
1018 					   xdp_buff_is_frag_pfmemalloc(xdp));
1019 
1020 	return skb;
1021 }
1022 
1023 /**
1024  * ice_construct_skb - Allocate skb and populate it
1025  * @rx_ring: Rx descriptor ring to transact packets on
1026  * @xdp: xdp_buff pointing to the data
1027  *
1028  * This function allocates an skb. It then populates it with the page
1029  * data from the current receive descriptor, taking care to set up the
1030  * skb correctly.
1031  */
1032 static struct sk_buff *
1033 ice_construct_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
1034 {
1035 	unsigned int size = xdp->data_end - xdp->data;
1036 	struct skb_shared_info *sinfo = NULL;
1037 	struct ice_rx_buf *rx_buf;
1038 	unsigned int nr_frags = 0;
1039 	unsigned int headlen;
1040 	struct sk_buff *skb;
1041 
1042 	/* prefetch first cache line of first page */
1043 	net_prefetch(xdp->data);
1044 
1045 	if (unlikely(xdp_buff_has_frags(xdp))) {
1046 		sinfo = xdp_get_shared_info_from_buff(xdp);
1047 		nr_frags = sinfo->nr_frags;
1048 	}
1049 
1050 	/* allocate a skb to store the frags */
1051 	skb = __napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE,
1052 			       GFP_ATOMIC | __GFP_NOWARN);
1053 	if (unlikely(!skb))
1054 		return NULL;
1055 
1056 	rx_buf = &rx_ring->rx_buf[rx_ring->first_desc];
1057 	skb_record_rx_queue(skb, rx_ring->q_index);
1058 	/* Determine available headroom for copy */
1059 	headlen = size;
1060 	if (headlen > ICE_RX_HDR_SIZE)
1061 		headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1062 
1063 	/* align pull length to size of long to optimize memcpy performance */
1064 	memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen,
1065 							 sizeof(long)));
1066 
1067 	/* if we exhaust the linear part then add what is left as a frag */
1068 	size -= headlen;
1069 	if (size) {
1070 		/* besides adding here a partial frag, we are going to add
1071 		 * frags from xdp_buff, make sure there is enough space for
1072 		 * them
1073 		 */
1074 		if (unlikely(nr_frags >= MAX_SKB_FRAGS - 1)) {
1075 			dev_kfree_skb(skb);
1076 			return NULL;
1077 		}
1078 		skb_add_rx_frag(skb, 0, rx_buf->page,
1079 				rx_buf->page_offset + headlen, size,
1080 				xdp->frame_sz);
1081 	} else {
1082 		/* buffer is unused, change the act that should be taken later
1083 		 * on; data was copied onto skb's linear part so there's no
1084 		 * need for adjusting page offset and we can reuse this buffer
1085 		 * as-is
1086 		 */
1087 		rx_buf->act = ICE_SKB_CONSUMED;
1088 	}
1089 
1090 	if (unlikely(xdp_buff_has_frags(xdp))) {
1091 		struct skb_shared_info *skinfo = skb_shinfo(skb);
1092 
1093 		memcpy(&skinfo->frags[skinfo->nr_frags], &sinfo->frags[0],
1094 		       sizeof(skb_frag_t) * nr_frags);
1095 
1096 		xdp_update_skb_shared_info(skb, skinfo->nr_frags + nr_frags,
1097 					   sinfo->xdp_frags_size,
1098 					   nr_frags * xdp->frame_sz,
1099 					   xdp_buff_is_frag_pfmemalloc(xdp));
1100 	}
1101 
1102 	return skb;
1103 }
1104 
1105 /**
1106  * ice_put_rx_buf - Clean up used buffer and either recycle or free
1107  * @rx_ring: Rx descriptor ring to transact packets on
1108  * @rx_buf: Rx buffer to pull data from
1109  *
1110  * This function will clean up the contents of the rx_buf. It will either
1111  * recycle the buffer or unmap it and free the associated resources.
1112  */
1113 static void
1114 ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf)
1115 {
1116 	if (!rx_buf)
1117 		return;
1118 
1119 	if (ice_can_reuse_rx_page(rx_buf)) {
1120 		/* hand second half of page back to the ring */
1121 		ice_reuse_rx_page(rx_ring, rx_buf);
1122 	} else {
1123 		/* we are not reusing the buffer so unmap it */
1124 		dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1125 				     ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1126 				     ICE_RX_DMA_ATTR);
1127 		__page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1128 	}
1129 
1130 	/* clear contents of buffer_info */
1131 	rx_buf->page = NULL;
1132 }
1133 
1134 /**
1135  * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1136  * @rx_ring: Rx descriptor ring to transact packets on
1137  * @budget: Total limit on number of packets to process
1138  *
1139  * This function provides a "bounce buffer" approach to Rx interrupt
1140  * processing. The advantage to this is that on systems that have
1141  * expensive overhead for IOMMU access this provides a means of avoiding
1142  * it by maintaining the mapping of the page to the system.
1143  *
1144  * Returns amount of work completed
1145  */
1146 int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1147 {
1148 	unsigned int total_rx_bytes = 0, total_rx_pkts = 0;
1149 	unsigned int offset = rx_ring->rx_offset;
1150 	struct xdp_buff *xdp = &rx_ring->xdp;
1151 	u32 cached_ntc = rx_ring->first_desc;
1152 	struct ice_tx_ring *xdp_ring = NULL;
1153 	struct bpf_prog *xdp_prog = NULL;
1154 	u32 ntc = rx_ring->next_to_clean;
1155 	u32 cnt = rx_ring->count;
1156 	u32 xdp_xmit = 0;
1157 	u32 cached_ntu;
1158 	bool failure;
1159 	u32 first;
1160 
1161 	/* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1162 #if (PAGE_SIZE < 8192)
1163 	xdp->frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1164 #endif
1165 
1166 	xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1167 	if (xdp_prog) {
1168 		xdp_ring = rx_ring->xdp_ring;
1169 		cached_ntu = xdp_ring->next_to_use;
1170 	}
1171 
1172 	/* start the loop to process Rx packets bounded by 'budget' */
1173 	while (likely(total_rx_pkts < (unsigned int)budget)) {
1174 		union ice_32b_rx_flex_desc *rx_desc;
1175 		struct ice_rx_buf *rx_buf;
1176 		struct sk_buff *skb;
1177 		unsigned int size;
1178 		u16 stat_err_bits;
1179 		u16 vlan_tag = 0;
1180 		u16 rx_ptype;
1181 
1182 		/* get the Rx desc from Rx ring based on 'next_to_clean' */
1183 		rx_desc = ICE_RX_DESC(rx_ring, ntc);
1184 
1185 		/* status_error_len will always be zero for unused descriptors
1186 		 * because it's cleared in cleanup, and overlaps with hdr_addr
1187 		 * which is always zero because packet split isn't used, if the
1188 		 * hardware wrote DD then it will be non-zero
1189 		 */
1190 		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1191 		if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1192 			break;
1193 
1194 		/* This memory barrier is needed to keep us from reading
1195 		 * any other fields out of the rx_desc until we know the
1196 		 * DD bit is set.
1197 		 */
1198 		dma_rmb();
1199 
1200 		ice_trace(clean_rx_irq, rx_ring, rx_desc);
1201 		if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1202 			struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1203 
1204 			if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1205 			    ctrl_vsi->vf)
1206 				ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1207 			if (++ntc == cnt)
1208 				ntc = 0;
1209 			rx_ring->first_desc = ntc;
1210 			continue;
1211 		}
1212 
1213 		size = le16_to_cpu(rx_desc->wb.pkt_len) &
1214 			ICE_RX_FLX_DESC_PKT_LEN_M;
1215 
1216 		/* retrieve a buffer from the ring */
1217 		rx_buf = ice_get_rx_buf(rx_ring, size, ntc);
1218 
1219 		if (!xdp->data) {
1220 			void *hard_start;
1221 
1222 			hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1223 				     offset;
1224 			xdp_prepare_buff(xdp, hard_start, offset, size, !!offset);
1225 #if (PAGE_SIZE > 4096)
1226 			/* At larger PAGE_SIZE, frame_sz depend on len size */
1227 			xdp->frame_sz = ice_rx_frame_truesize(rx_ring, size);
1228 #endif
1229 			xdp_buff_clear_frags_flag(xdp);
1230 		} else if (ice_add_xdp_frag(rx_ring, xdp, rx_buf, size)) {
1231 			break;
1232 		}
1233 		if (++ntc == cnt)
1234 			ntc = 0;
1235 
1236 		/* skip if it is NOP desc */
1237 		if (ice_is_non_eop(rx_ring, rx_desc))
1238 			continue;
1239 
1240 		ice_run_xdp(rx_ring, xdp, xdp_prog, xdp_ring, rx_buf);
1241 		if (rx_buf->act == ICE_XDP_PASS)
1242 			goto construct_skb;
1243 		total_rx_bytes += xdp_get_buff_len(xdp);
1244 		total_rx_pkts++;
1245 
1246 		xdp->data = NULL;
1247 		rx_ring->first_desc = ntc;
1248 		rx_ring->nr_frags = 0;
1249 		continue;
1250 construct_skb:
1251 		if (likely(ice_ring_uses_build_skb(rx_ring)))
1252 			skb = ice_build_skb(rx_ring, xdp);
1253 		else
1254 			skb = ice_construct_skb(rx_ring, xdp);
1255 		/* exit if we failed to retrieve a buffer */
1256 		if (!skb) {
1257 			rx_ring->ring_stats->rx_stats.alloc_page_failed++;
1258 			rx_buf->act = ICE_XDP_CONSUMED;
1259 			if (unlikely(xdp_buff_has_frags(xdp)))
1260 				ice_set_rx_bufs_act(xdp, rx_ring,
1261 						    ICE_XDP_CONSUMED);
1262 			xdp->data = NULL;
1263 			rx_ring->first_desc = ntc;
1264 			rx_ring->nr_frags = 0;
1265 			break;
1266 		}
1267 		xdp->data = NULL;
1268 		rx_ring->first_desc = ntc;
1269 		rx_ring->nr_frags = 0;
1270 
1271 		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1272 		if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1273 					      stat_err_bits))) {
1274 			dev_kfree_skb_any(skb);
1275 			continue;
1276 		}
1277 
1278 		vlan_tag = ice_get_vlan_tag_from_rx_desc(rx_desc);
1279 
1280 		/* pad the skb if needed, to make a valid ethernet frame */
1281 		if (eth_skb_pad(skb))
1282 			continue;
1283 
1284 		/* probably a little skewed due to removing CRC */
1285 		total_rx_bytes += skb->len;
1286 
1287 		/* populate checksum, VLAN, and protocol */
1288 		rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
1289 			ICE_RX_FLEX_DESC_PTYPE_M;
1290 
1291 		ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
1292 
1293 		ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1294 		/* send completed skb up the stack */
1295 		ice_receive_skb(rx_ring, skb, vlan_tag);
1296 
1297 		/* update budget accounting */
1298 		total_rx_pkts++;
1299 	}
1300 
1301 	first = rx_ring->first_desc;
1302 	while (cached_ntc != first) {
1303 		struct ice_rx_buf *buf = &rx_ring->rx_buf[cached_ntc];
1304 
1305 		if (buf->act & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1306 			ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1307 			xdp_xmit |= buf->act;
1308 		} else if (buf->act & ICE_XDP_CONSUMED) {
1309 			buf->pagecnt_bias++;
1310 		} else if (buf->act == ICE_XDP_PASS) {
1311 			ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1312 		}
1313 
1314 		ice_put_rx_buf(rx_ring, buf);
1315 		if (++cached_ntc >= cnt)
1316 			cached_ntc = 0;
1317 	}
1318 	rx_ring->next_to_clean = ntc;
1319 	/* return up to cleaned_count buffers to hardware */
1320 	failure = ice_alloc_rx_bufs(rx_ring, ICE_RX_DESC_UNUSED(rx_ring));
1321 
1322 	if (xdp_xmit)
1323 		ice_finalize_xdp_rx(xdp_ring, xdp_xmit, cached_ntu);
1324 
1325 	if (rx_ring->ring_stats)
1326 		ice_update_rx_ring_stats(rx_ring, total_rx_pkts,
1327 					 total_rx_bytes);
1328 
1329 	/* guarantee a trip back through this routine if there was a failure */
1330 	return failure ? budget : (int)total_rx_pkts;
1331 }
1332 
1333 static void __ice_update_sample(struct ice_q_vector *q_vector,
1334 				struct ice_ring_container *rc,
1335 				struct dim_sample *sample,
1336 				bool is_tx)
1337 {
1338 	u64 packets = 0, bytes = 0;
1339 
1340 	if (is_tx) {
1341 		struct ice_tx_ring *tx_ring;
1342 
1343 		ice_for_each_tx_ring(tx_ring, *rc) {
1344 			struct ice_ring_stats *ring_stats;
1345 
1346 			ring_stats = tx_ring->ring_stats;
1347 			if (!ring_stats)
1348 				continue;
1349 			packets += ring_stats->stats.pkts;
1350 			bytes += ring_stats->stats.bytes;
1351 		}
1352 	} else {
1353 		struct ice_rx_ring *rx_ring;
1354 
1355 		ice_for_each_rx_ring(rx_ring, *rc) {
1356 			struct ice_ring_stats *ring_stats;
1357 
1358 			ring_stats = rx_ring->ring_stats;
1359 			if (!ring_stats)
1360 				continue;
1361 			packets += ring_stats->stats.pkts;
1362 			bytes += ring_stats->stats.bytes;
1363 		}
1364 	}
1365 
1366 	dim_update_sample(q_vector->total_events, packets, bytes, sample);
1367 	sample->comp_ctr = 0;
1368 
1369 	/* if dim settings get stale, like when not updated for 1
1370 	 * second or longer, force it to start again. This addresses the
1371 	 * frequent case of an idle queue being switched to by the
1372 	 * scheduler. The 1,000 here means 1,000 milliseconds.
1373 	 */
1374 	if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1375 		rc->dim.state = DIM_START_MEASURE;
1376 }
1377 
1378 /**
1379  * ice_net_dim - Update net DIM algorithm
1380  * @q_vector: the vector associated with the interrupt
1381  *
1382  * Create a DIM sample and notify net_dim() so that it can possibly decide
1383  * a new ITR value based on incoming packets, bytes, and interrupts.
1384  *
1385  * This function is a no-op if the ring is not configured to dynamic ITR.
1386  */
1387 static void ice_net_dim(struct ice_q_vector *q_vector)
1388 {
1389 	struct ice_ring_container *tx = &q_vector->tx;
1390 	struct ice_ring_container *rx = &q_vector->rx;
1391 
1392 	if (ITR_IS_DYNAMIC(tx)) {
1393 		struct dim_sample dim_sample;
1394 
1395 		__ice_update_sample(q_vector, tx, &dim_sample, true);
1396 		net_dim(&tx->dim, dim_sample);
1397 	}
1398 
1399 	if (ITR_IS_DYNAMIC(rx)) {
1400 		struct dim_sample dim_sample;
1401 
1402 		__ice_update_sample(q_vector, rx, &dim_sample, false);
1403 		net_dim(&rx->dim, dim_sample);
1404 	}
1405 }
1406 
1407 /**
1408  * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1409  * @itr_idx: interrupt throttling index
1410  * @itr: interrupt throttling value in usecs
1411  */
1412 static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1413 {
1414 	/* The ITR value is reported in microseconds, and the register value is
1415 	 * recorded in 2 microsecond units. For this reason we only need to
1416 	 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1417 	 * granularity as a shift instead of division. The mask makes sure the
1418 	 * ITR value is never odd so we don't accidentally write into the field
1419 	 * prior to the ITR field.
1420 	 */
1421 	itr &= ICE_ITR_MASK;
1422 
1423 	return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1424 		(itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1425 		(itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1426 }
1427 
1428 /**
1429  * ice_enable_interrupt - re-enable MSI-X interrupt
1430  * @q_vector: the vector associated with the interrupt to enable
1431  *
1432  * If the VSI is down, the interrupt will not be re-enabled. Also,
1433  * when enabling the interrupt always reset the wb_on_itr to false
1434  * and trigger a software interrupt to clean out internal state.
1435  */
1436 static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1437 {
1438 	struct ice_vsi *vsi = q_vector->vsi;
1439 	bool wb_en = q_vector->wb_on_itr;
1440 	u32 itr_val;
1441 
1442 	if (test_bit(ICE_DOWN, vsi->state))
1443 		return;
1444 
1445 	/* trigger an ITR delayed software interrupt when exiting busy poll, to
1446 	 * make sure to catch any pending cleanups that might have been missed
1447 	 * due to interrupt state transition. If busy poll or poll isn't
1448 	 * enabled, then don't update ITR, and just enable the interrupt.
1449 	 */
1450 	if (!wb_en) {
1451 		itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1452 	} else {
1453 		q_vector->wb_on_itr = false;
1454 
1455 		/* do two things here with a single write. Set up the third ITR
1456 		 * index to be used for software interrupt moderation, and then
1457 		 * trigger a software interrupt with a rate limit of 20K on
1458 		 * software interrupts, this will help avoid high interrupt
1459 		 * loads due to frequently polling and exiting polling.
1460 		 */
1461 		itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1462 		itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1463 			   ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1464 			   GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1465 	}
1466 	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1467 }
1468 
1469 /**
1470  * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1471  * @q_vector: q_vector to set WB_ON_ITR on
1472  *
1473  * We need to tell hardware to write-back completed descriptors even when
1474  * interrupts are disabled. Descriptors will be written back on cache line
1475  * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1476  * descriptors may not be written back if they don't fill a cache line until
1477  * the next interrupt.
1478  *
1479  * This sets the write-back frequency to whatever was set previously for the
1480  * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1481  * aren't meddling with the INTENA_M bit.
1482  */
1483 static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1484 {
1485 	struct ice_vsi *vsi = q_vector->vsi;
1486 
1487 	/* already in wb_on_itr mode no need to change it */
1488 	if (q_vector->wb_on_itr)
1489 		return;
1490 
1491 	/* use previously set ITR values for all of the ITR indices by
1492 	 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1493 	 * be static in non-adaptive mode (user configured)
1494 	 */
1495 	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1496 	     ((ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S) &
1497 	      GLINT_DYN_CTL_ITR_INDX_M) | GLINT_DYN_CTL_INTENA_MSK_M |
1498 	     GLINT_DYN_CTL_WB_ON_ITR_M);
1499 
1500 	q_vector->wb_on_itr = true;
1501 }
1502 
1503 /**
1504  * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1505  * @napi: napi struct with our devices info in it
1506  * @budget: amount of work driver is allowed to do this pass, in packets
1507  *
1508  * This function will clean all queues associated with a q_vector.
1509  *
1510  * Returns the amount of work done
1511  */
1512 int ice_napi_poll(struct napi_struct *napi, int budget)
1513 {
1514 	struct ice_q_vector *q_vector =
1515 				container_of(napi, struct ice_q_vector, napi);
1516 	struct ice_tx_ring *tx_ring;
1517 	struct ice_rx_ring *rx_ring;
1518 	bool clean_complete = true;
1519 	int budget_per_ring;
1520 	int work_done = 0;
1521 
1522 	/* Since the actual Tx work is minimal, we can give the Tx a larger
1523 	 * budget and be more aggressive about cleaning up the Tx descriptors.
1524 	 */
1525 	ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1526 		bool wd;
1527 
1528 		if (tx_ring->xsk_pool)
1529 			wd = ice_xmit_zc(tx_ring);
1530 		else if (ice_ring_is_xdp(tx_ring))
1531 			wd = true;
1532 		else
1533 			wd = ice_clean_tx_irq(tx_ring, budget);
1534 
1535 		if (!wd)
1536 			clean_complete = false;
1537 	}
1538 
1539 	/* Handle case where we are called by netpoll with a budget of 0 */
1540 	if (unlikely(budget <= 0))
1541 		return budget;
1542 
1543 	/* normally we have 1 Rx ring per q_vector */
1544 	if (unlikely(q_vector->num_ring_rx > 1))
1545 		/* We attempt to distribute budget to each Rx queue fairly, but
1546 		 * don't allow the budget to go below 1 because that would exit
1547 		 * polling early.
1548 		 */
1549 		budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1550 	else
1551 		/* Max of 1 Rx ring in this q_vector so give it the budget */
1552 		budget_per_ring = budget;
1553 
1554 	ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1555 		int cleaned;
1556 
1557 		/* A dedicated path for zero-copy allows making a single
1558 		 * comparison in the irq context instead of many inside the
1559 		 * ice_clean_rx_irq function and makes the codebase cleaner.
1560 		 */
1561 		cleaned = rx_ring->xsk_pool ?
1562 			  ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1563 			  ice_clean_rx_irq(rx_ring, budget_per_ring);
1564 		work_done += cleaned;
1565 		/* if we clean as many as budgeted, we must not be done */
1566 		if (cleaned >= budget_per_ring)
1567 			clean_complete = false;
1568 	}
1569 
1570 	/* If work not completed, return budget and polling will return */
1571 	if (!clean_complete) {
1572 		/* Set the writeback on ITR so partial completions of
1573 		 * cache-lines will still continue even if we're polling.
1574 		 */
1575 		ice_set_wb_on_itr(q_vector);
1576 		return budget;
1577 	}
1578 
1579 	/* Exit the polling mode, but don't re-enable interrupts if stack might
1580 	 * poll us due to busy-polling
1581 	 */
1582 	if (napi_complete_done(napi, work_done)) {
1583 		ice_net_dim(q_vector);
1584 		ice_enable_interrupt(q_vector);
1585 	} else {
1586 		ice_set_wb_on_itr(q_vector);
1587 	}
1588 
1589 	return min_t(int, work_done, budget - 1);
1590 }
1591 
1592 /**
1593  * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1594  * @tx_ring: the ring to be checked
1595  * @size: the size buffer we want to assure is available
1596  *
1597  * Returns -EBUSY if a stop is needed, else 0
1598  */
1599 static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1600 {
1601 	netif_tx_stop_queue(txring_txq(tx_ring));
1602 	/* Memory barrier before checking head and tail */
1603 	smp_mb();
1604 
1605 	/* Check again in a case another CPU has just made room available. */
1606 	if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1607 		return -EBUSY;
1608 
1609 	/* A reprieve! - use start_queue because it doesn't call schedule */
1610 	netif_tx_start_queue(txring_txq(tx_ring));
1611 	++tx_ring->ring_stats->tx_stats.restart_q;
1612 	return 0;
1613 }
1614 
1615 /**
1616  * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1617  * @tx_ring: the ring to be checked
1618  * @size:    the size buffer we want to assure is available
1619  *
1620  * Returns 0 if stop is not needed
1621  */
1622 static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1623 {
1624 	if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1625 		return 0;
1626 
1627 	return __ice_maybe_stop_tx(tx_ring, size);
1628 }
1629 
1630 /**
1631  * ice_tx_map - Build the Tx descriptor
1632  * @tx_ring: ring to send buffer on
1633  * @first: first buffer info buffer to use
1634  * @off: pointer to struct that holds offload parameters
1635  *
1636  * This function loops over the skb data pointed to by *first
1637  * and gets a physical address for each memory location and programs
1638  * it and the length into the transmit descriptor.
1639  */
1640 static void
1641 ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1642 	   struct ice_tx_offload_params *off)
1643 {
1644 	u64 td_offset, td_tag, td_cmd;
1645 	u16 i = tx_ring->next_to_use;
1646 	unsigned int data_len, size;
1647 	struct ice_tx_desc *tx_desc;
1648 	struct ice_tx_buf *tx_buf;
1649 	struct sk_buff *skb;
1650 	skb_frag_t *frag;
1651 	dma_addr_t dma;
1652 	bool kick;
1653 
1654 	td_tag = off->td_l2tag1;
1655 	td_cmd = off->td_cmd;
1656 	td_offset = off->td_offset;
1657 	skb = first->skb;
1658 
1659 	data_len = skb->data_len;
1660 	size = skb_headlen(skb);
1661 
1662 	tx_desc = ICE_TX_DESC(tx_ring, i);
1663 
1664 	if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1665 		td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1666 		td_tag = first->vid;
1667 	}
1668 
1669 	dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1670 
1671 	tx_buf = first;
1672 
1673 	for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1674 		unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1675 
1676 		if (dma_mapping_error(tx_ring->dev, dma))
1677 			goto dma_error;
1678 
1679 		/* record length, and DMA address */
1680 		dma_unmap_len_set(tx_buf, len, size);
1681 		dma_unmap_addr_set(tx_buf, dma, dma);
1682 
1683 		/* align size to end of page */
1684 		max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1685 		tx_desc->buf_addr = cpu_to_le64(dma);
1686 
1687 		/* account for data chunks larger than the hardware
1688 		 * can handle
1689 		 */
1690 		while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1691 			tx_desc->cmd_type_offset_bsz =
1692 				ice_build_ctob(td_cmd, td_offset, max_data,
1693 					       td_tag);
1694 
1695 			tx_desc++;
1696 			i++;
1697 
1698 			if (i == tx_ring->count) {
1699 				tx_desc = ICE_TX_DESC(tx_ring, 0);
1700 				i = 0;
1701 			}
1702 
1703 			dma += max_data;
1704 			size -= max_data;
1705 
1706 			max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1707 			tx_desc->buf_addr = cpu_to_le64(dma);
1708 		}
1709 
1710 		if (likely(!data_len))
1711 			break;
1712 
1713 		tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1714 							      size, td_tag);
1715 
1716 		tx_desc++;
1717 		i++;
1718 
1719 		if (i == tx_ring->count) {
1720 			tx_desc = ICE_TX_DESC(tx_ring, 0);
1721 			i = 0;
1722 		}
1723 
1724 		size = skb_frag_size(frag);
1725 		data_len -= size;
1726 
1727 		dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1728 				       DMA_TO_DEVICE);
1729 
1730 		tx_buf = &tx_ring->tx_buf[i];
1731 		tx_buf->type = ICE_TX_BUF_FRAG;
1732 	}
1733 
1734 	/* record SW timestamp if HW timestamp is not available */
1735 	skb_tx_timestamp(first->skb);
1736 
1737 	i++;
1738 	if (i == tx_ring->count)
1739 		i = 0;
1740 
1741 	/* write last descriptor with RS and EOP bits */
1742 	td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1743 	tx_desc->cmd_type_offset_bsz =
1744 			ice_build_ctob(td_cmd, td_offset, size, td_tag);
1745 
1746 	/* Force memory writes to complete before letting h/w know there
1747 	 * are new descriptors to fetch.
1748 	 *
1749 	 * We also use this memory barrier to make certain all of the
1750 	 * status bits have been updated before next_to_watch is written.
1751 	 */
1752 	wmb();
1753 
1754 	/* set next_to_watch value indicating a packet is present */
1755 	first->next_to_watch = tx_desc;
1756 
1757 	tx_ring->next_to_use = i;
1758 
1759 	ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1760 
1761 	/* notify HW of packet */
1762 	kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1763 				      netdev_xmit_more());
1764 	if (kick)
1765 		/* notify HW of packet */
1766 		writel(i, tx_ring->tail);
1767 
1768 	return;
1769 
1770 dma_error:
1771 	/* clear DMA mappings for failed tx_buf map */
1772 	for (;;) {
1773 		tx_buf = &tx_ring->tx_buf[i];
1774 		ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1775 		if (tx_buf == first)
1776 			break;
1777 		if (i == 0)
1778 			i = tx_ring->count;
1779 		i--;
1780 	}
1781 
1782 	tx_ring->next_to_use = i;
1783 }
1784 
1785 /**
1786  * ice_tx_csum - Enable Tx checksum offloads
1787  * @first: pointer to the first descriptor
1788  * @off: pointer to struct that holds offload parameters
1789  *
1790  * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1791  */
1792 static
1793 int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1794 {
1795 	u32 l4_len = 0, l3_len = 0, l2_len = 0;
1796 	struct sk_buff *skb = first->skb;
1797 	union {
1798 		struct iphdr *v4;
1799 		struct ipv6hdr *v6;
1800 		unsigned char *hdr;
1801 	} ip;
1802 	union {
1803 		struct tcphdr *tcp;
1804 		unsigned char *hdr;
1805 	} l4;
1806 	__be16 frag_off, protocol;
1807 	unsigned char *exthdr;
1808 	u32 offset, cmd = 0;
1809 	u8 l4_proto = 0;
1810 
1811 	if (skb->ip_summed != CHECKSUM_PARTIAL)
1812 		return 0;
1813 
1814 	protocol = vlan_get_protocol(skb);
1815 
1816 	if (eth_p_mpls(protocol)) {
1817 		ip.hdr = skb_inner_network_header(skb);
1818 		l4.hdr = skb_checksum_start(skb);
1819 	} else {
1820 		ip.hdr = skb_network_header(skb);
1821 		l4.hdr = skb_transport_header(skb);
1822 	}
1823 
1824 	/* compute outer L2 header size */
1825 	l2_len = ip.hdr - skb->data;
1826 	offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1827 
1828 	/* set the tx_flags to indicate the IP protocol type. this is
1829 	 * required so that checksum header computation below is accurate.
1830 	 */
1831 	if (ip.v4->version == 4)
1832 		first->tx_flags |= ICE_TX_FLAGS_IPV4;
1833 	else if (ip.v6->version == 6)
1834 		first->tx_flags |= ICE_TX_FLAGS_IPV6;
1835 
1836 	if (skb->encapsulation) {
1837 		bool gso_ena = false;
1838 		u32 tunnel = 0;
1839 
1840 		/* define outer network header type */
1841 		if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1842 			tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1843 				  ICE_TX_CTX_EIPT_IPV4 :
1844 				  ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1845 			l4_proto = ip.v4->protocol;
1846 		} else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1847 			int ret;
1848 
1849 			tunnel |= ICE_TX_CTX_EIPT_IPV6;
1850 			exthdr = ip.hdr + sizeof(*ip.v6);
1851 			l4_proto = ip.v6->nexthdr;
1852 			ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1853 					       &l4_proto, &frag_off);
1854 			if (ret < 0)
1855 				return -1;
1856 		}
1857 
1858 		/* define outer transport */
1859 		switch (l4_proto) {
1860 		case IPPROTO_UDP:
1861 			tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1862 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1863 			break;
1864 		case IPPROTO_GRE:
1865 			tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1866 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1867 			break;
1868 		case IPPROTO_IPIP:
1869 		case IPPROTO_IPV6:
1870 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1871 			l4.hdr = skb_inner_network_header(skb);
1872 			break;
1873 		default:
1874 			if (first->tx_flags & ICE_TX_FLAGS_TSO)
1875 				return -1;
1876 
1877 			skb_checksum_help(skb);
1878 			return 0;
1879 		}
1880 
1881 		/* compute outer L3 header size */
1882 		tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1883 			  ICE_TXD_CTX_QW0_EIPLEN_S;
1884 
1885 		/* switch IP header pointer from outer to inner header */
1886 		ip.hdr = skb_inner_network_header(skb);
1887 
1888 		/* compute tunnel header size */
1889 		tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1890 			   ICE_TXD_CTX_QW0_NATLEN_S;
1891 
1892 		gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1893 		/* indicate if we need to offload outer UDP header */
1894 		if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1895 		    (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1896 			tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1897 
1898 		/* record tunnel offload values */
1899 		off->cd_tunnel_params |= tunnel;
1900 
1901 		/* set DTYP=1 to indicate that it's an Tx context descriptor
1902 		 * in IPsec tunnel mode with Tx offloads in Quad word 1
1903 		 */
1904 		off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1905 
1906 		/* switch L4 header pointer from outer to inner */
1907 		l4.hdr = skb_inner_transport_header(skb);
1908 		l4_proto = 0;
1909 
1910 		/* reset type as we transition from outer to inner headers */
1911 		first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1912 		if (ip.v4->version == 4)
1913 			first->tx_flags |= ICE_TX_FLAGS_IPV4;
1914 		if (ip.v6->version == 6)
1915 			first->tx_flags |= ICE_TX_FLAGS_IPV6;
1916 	}
1917 
1918 	/* Enable IP checksum offloads */
1919 	if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1920 		l4_proto = ip.v4->protocol;
1921 		/* the stack computes the IP header already, the only time we
1922 		 * need the hardware to recompute it is in the case of TSO.
1923 		 */
1924 		if (first->tx_flags & ICE_TX_FLAGS_TSO)
1925 			cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1926 		else
1927 			cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1928 
1929 	} else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1930 		cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1931 		exthdr = ip.hdr + sizeof(*ip.v6);
1932 		l4_proto = ip.v6->nexthdr;
1933 		if (l4.hdr != exthdr)
1934 			ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1935 					 &frag_off);
1936 	} else {
1937 		return -1;
1938 	}
1939 
1940 	/* compute inner L3 header size */
1941 	l3_len = l4.hdr - ip.hdr;
1942 	offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1943 
1944 	/* Enable L4 checksum offloads */
1945 	switch (l4_proto) {
1946 	case IPPROTO_TCP:
1947 		/* enable checksum offloads */
1948 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1949 		l4_len = l4.tcp->doff;
1950 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1951 		break;
1952 	case IPPROTO_UDP:
1953 		/* enable UDP checksum offload */
1954 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1955 		l4_len = (sizeof(struct udphdr) >> 2);
1956 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1957 		break;
1958 	case IPPROTO_SCTP:
1959 		/* enable SCTP checksum offload */
1960 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1961 		l4_len = sizeof(struct sctphdr) >> 2;
1962 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1963 		break;
1964 
1965 	default:
1966 		if (first->tx_flags & ICE_TX_FLAGS_TSO)
1967 			return -1;
1968 		skb_checksum_help(skb);
1969 		return 0;
1970 	}
1971 
1972 	off->td_cmd |= cmd;
1973 	off->td_offset |= offset;
1974 	return 1;
1975 }
1976 
1977 /**
1978  * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1979  * @tx_ring: ring to send buffer on
1980  * @first: pointer to struct ice_tx_buf
1981  *
1982  * Checks the skb and set up correspondingly several generic transmit flags
1983  * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1984  */
1985 static void
1986 ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
1987 {
1988 	struct sk_buff *skb = first->skb;
1989 
1990 	/* nothing left to do, software offloaded VLAN */
1991 	if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1992 		return;
1993 
1994 	/* the VLAN ethertype/tpid is determined by VSI configuration and netdev
1995 	 * feature flags, which the driver only allows either 802.1Q or 802.1ad
1996 	 * VLAN offloads exclusively so we only care about the VLAN ID here
1997 	 */
1998 	if (skb_vlan_tag_present(skb)) {
1999 		first->vid = skb_vlan_tag_get(skb);
2000 		if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
2001 			first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
2002 		else
2003 			first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
2004 	}
2005 
2006 	ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
2007 }
2008 
2009 /**
2010  * ice_tso - computes mss and TSO length to prepare for TSO
2011  * @first: pointer to struct ice_tx_buf
2012  * @off: pointer to struct that holds offload parameters
2013  *
2014  * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
2015  */
2016 static
2017 int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2018 {
2019 	struct sk_buff *skb = first->skb;
2020 	union {
2021 		struct iphdr *v4;
2022 		struct ipv6hdr *v6;
2023 		unsigned char *hdr;
2024 	} ip;
2025 	union {
2026 		struct tcphdr *tcp;
2027 		struct udphdr *udp;
2028 		unsigned char *hdr;
2029 	} l4;
2030 	u64 cd_mss, cd_tso_len;
2031 	__be16 protocol;
2032 	u32 paylen;
2033 	u8 l4_start;
2034 	int err;
2035 
2036 	if (skb->ip_summed != CHECKSUM_PARTIAL)
2037 		return 0;
2038 
2039 	if (!skb_is_gso(skb))
2040 		return 0;
2041 
2042 	err = skb_cow_head(skb, 0);
2043 	if (err < 0)
2044 		return err;
2045 
2046 	protocol = vlan_get_protocol(skb);
2047 
2048 	if (eth_p_mpls(protocol))
2049 		ip.hdr = skb_inner_network_header(skb);
2050 	else
2051 		ip.hdr = skb_network_header(skb);
2052 	l4.hdr = skb_checksum_start(skb);
2053 
2054 	/* initialize outer IP header fields */
2055 	if (ip.v4->version == 4) {
2056 		ip.v4->tot_len = 0;
2057 		ip.v4->check = 0;
2058 	} else {
2059 		ip.v6->payload_len = 0;
2060 	}
2061 
2062 	if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2063 					 SKB_GSO_GRE_CSUM |
2064 					 SKB_GSO_IPXIP4 |
2065 					 SKB_GSO_IPXIP6 |
2066 					 SKB_GSO_UDP_TUNNEL |
2067 					 SKB_GSO_UDP_TUNNEL_CSUM)) {
2068 		if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2069 		    (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2070 			l4.udp->len = 0;
2071 
2072 			/* determine offset of outer transport header */
2073 			l4_start = (u8)(l4.hdr - skb->data);
2074 
2075 			/* remove payload length from outer checksum */
2076 			paylen = skb->len - l4_start;
2077 			csum_replace_by_diff(&l4.udp->check,
2078 					     (__force __wsum)htonl(paylen));
2079 		}
2080 
2081 		/* reset pointers to inner headers */
2082 		ip.hdr = skb_inner_network_header(skb);
2083 		l4.hdr = skb_inner_transport_header(skb);
2084 
2085 		/* initialize inner IP header fields */
2086 		if (ip.v4->version == 4) {
2087 			ip.v4->tot_len = 0;
2088 			ip.v4->check = 0;
2089 		} else {
2090 			ip.v6->payload_len = 0;
2091 		}
2092 	}
2093 
2094 	/* determine offset of transport header */
2095 	l4_start = (u8)(l4.hdr - skb->data);
2096 
2097 	/* remove payload length from checksum */
2098 	paylen = skb->len - l4_start;
2099 
2100 	if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2101 		csum_replace_by_diff(&l4.udp->check,
2102 				     (__force __wsum)htonl(paylen));
2103 		/* compute length of UDP segmentation header */
2104 		off->header_len = (u8)sizeof(l4.udp) + l4_start;
2105 	} else {
2106 		csum_replace_by_diff(&l4.tcp->check,
2107 				     (__force __wsum)htonl(paylen));
2108 		/* compute length of TCP segmentation header */
2109 		off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2110 	}
2111 
2112 	/* update gso_segs and bytecount */
2113 	first->gso_segs = skb_shinfo(skb)->gso_segs;
2114 	first->bytecount += (first->gso_segs - 1) * off->header_len;
2115 
2116 	cd_tso_len = skb->len - off->header_len;
2117 	cd_mss = skb_shinfo(skb)->gso_size;
2118 
2119 	/* record cdesc_qw1 with TSO parameters */
2120 	off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2121 			     (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2122 			     (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2123 			     (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2124 	first->tx_flags |= ICE_TX_FLAGS_TSO;
2125 	return 1;
2126 }
2127 
2128 /**
2129  * ice_txd_use_count  - estimate the number of descriptors needed for Tx
2130  * @size: transmit request size in bytes
2131  *
2132  * Due to hardware alignment restrictions (4K alignment), we need to
2133  * assume that we can have no more than 12K of data per descriptor, even
2134  * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2135  * Thus, we need to divide by 12K. But division is slow! Instead,
2136  * we decompose the operation into shifts and one relatively cheap
2137  * multiply operation.
2138  *
2139  * To divide by 12K, we first divide by 4K, then divide by 3:
2140  *     To divide by 4K, shift right by 12 bits
2141  *     To divide by 3, multiply by 85, then divide by 256
2142  *     (Divide by 256 is done by shifting right by 8 bits)
2143  * Finally, we add one to round up. Because 256 isn't an exact multiple of
2144  * 3, we'll underestimate near each multiple of 12K. This is actually more
2145  * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2146  * segment. For our purposes this is accurate out to 1M which is orders of
2147  * magnitude greater than our largest possible GSO size.
2148  *
2149  * This would then be implemented as:
2150  *     return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2151  *
2152  * Since multiplication and division are commutative, we can reorder
2153  * operations into:
2154  *     return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2155  */
2156 static unsigned int ice_txd_use_count(unsigned int size)
2157 {
2158 	return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2159 }
2160 
2161 /**
2162  * ice_xmit_desc_count - calculate number of Tx descriptors needed
2163  * @skb: send buffer
2164  *
2165  * Returns number of data descriptors needed for this skb.
2166  */
2167 static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2168 {
2169 	const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2170 	unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2171 	unsigned int count = 0, size = skb_headlen(skb);
2172 
2173 	for (;;) {
2174 		count += ice_txd_use_count(size);
2175 
2176 		if (!nr_frags--)
2177 			break;
2178 
2179 		size = skb_frag_size(frag++);
2180 	}
2181 
2182 	return count;
2183 }
2184 
2185 /**
2186  * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2187  * @skb: send buffer
2188  *
2189  * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2190  * and so we need to figure out the cases where we need to linearize the skb.
2191  *
2192  * For TSO we need to count the TSO header and segment payload separately.
2193  * As such we need to check cases where we have 7 fragments or more as we
2194  * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2195  * the segment payload in the first descriptor, and another 7 for the
2196  * fragments.
2197  */
2198 static bool __ice_chk_linearize(struct sk_buff *skb)
2199 {
2200 	const skb_frag_t *frag, *stale;
2201 	int nr_frags, sum;
2202 
2203 	/* no need to check if number of frags is less than 7 */
2204 	nr_frags = skb_shinfo(skb)->nr_frags;
2205 	if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2206 		return false;
2207 
2208 	/* We need to walk through the list and validate that each group
2209 	 * of 6 fragments totals at least gso_size.
2210 	 */
2211 	nr_frags -= ICE_MAX_BUF_TXD - 2;
2212 	frag = &skb_shinfo(skb)->frags[0];
2213 
2214 	/* Initialize size to the negative value of gso_size minus 1. We
2215 	 * use this as the worst case scenario in which the frag ahead
2216 	 * of us only provides one byte which is why we are limited to 6
2217 	 * descriptors for a single transmit as the header and previous
2218 	 * fragment are already consuming 2 descriptors.
2219 	 */
2220 	sum = 1 - skb_shinfo(skb)->gso_size;
2221 
2222 	/* Add size of frags 0 through 4 to create our initial sum */
2223 	sum += skb_frag_size(frag++);
2224 	sum += skb_frag_size(frag++);
2225 	sum += skb_frag_size(frag++);
2226 	sum += skb_frag_size(frag++);
2227 	sum += skb_frag_size(frag++);
2228 
2229 	/* Walk through fragments adding latest fragment, testing it, and
2230 	 * then removing stale fragments from the sum.
2231 	 */
2232 	for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2233 		int stale_size = skb_frag_size(stale);
2234 
2235 		sum += skb_frag_size(frag++);
2236 
2237 		/* The stale fragment may present us with a smaller
2238 		 * descriptor than the actual fragment size. To account
2239 		 * for that we need to remove all the data on the front and
2240 		 * figure out what the remainder would be in the last
2241 		 * descriptor associated with the fragment.
2242 		 */
2243 		if (stale_size > ICE_MAX_DATA_PER_TXD) {
2244 			int align_pad = -(skb_frag_off(stale)) &
2245 					(ICE_MAX_READ_REQ_SIZE - 1);
2246 
2247 			sum -= align_pad;
2248 			stale_size -= align_pad;
2249 
2250 			do {
2251 				sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2252 				stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2253 			} while (stale_size > ICE_MAX_DATA_PER_TXD);
2254 		}
2255 
2256 		/* if sum is negative we failed to make sufficient progress */
2257 		if (sum < 0)
2258 			return true;
2259 
2260 		if (!nr_frags--)
2261 			break;
2262 
2263 		sum -= stale_size;
2264 	}
2265 
2266 	return false;
2267 }
2268 
2269 /**
2270  * ice_chk_linearize - Check if there are more than 8 fragments per packet
2271  * @skb:      send buffer
2272  * @count:    number of buffers used
2273  *
2274  * Note: Our HW can't scatter-gather more than 8 fragments to build
2275  * a packet on the wire and so we need to figure out the cases where we
2276  * need to linearize the skb.
2277  */
2278 static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2279 {
2280 	/* Both TSO and single send will work if count is less than 8 */
2281 	if (likely(count < ICE_MAX_BUF_TXD))
2282 		return false;
2283 
2284 	if (skb_is_gso(skb))
2285 		return __ice_chk_linearize(skb);
2286 
2287 	/* we can support up to 8 data buffers for a single send */
2288 	return count != ICE_MAX_BUF_TXD;
2289 }
2290 
2291 /**
2292  * ice_tstamp - set up context descriptor for hardware timestamp
2293  * @tx_ring: pointer to the Tx ring to send buffer on
2294  * @skb: pointer to the SKB we're sending
2295  * @first: Tx buffer
2296  * @off: Tx offload parameters
2297  */
2298 static void
2299 ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2300 	   struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2301 {
2302 	s8 idx;
2303 
2304 	/* only timestamp the outbound packet if the user has requested it */
2305 	if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2306 		return;
2307 
2308 	if (!tx_ring->ptp_tx)
2309 		return;
2310 
2311 	/* Tx timestamps cannot be sampled when doing TSO */
2312 	if (first->tx_flags & ICE_TX_FLAGS_TSO)
2313 		return;
2314 
2315 	/* Grab an open timestamp slot */
2316 	idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2317 	if (idx < 0) {
2318 		tx_ring->vsi->back->ptp.tx_hwtstamp_skipped++;
2319 		return;
2320 	}
2321 
2322 	off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2323 			     (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2324 			     ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2325 	first->tx_flags |= ICE_TX_FLAGS_TSYN;
2326 }
2327 
2328 /**
2329  * ice_xmit_frame_ring - Sends buffer on Tx ring
2330  * @skb: send buffer
2331  * @tx_ring: ring to send buffer on
2332  *
2333  * Returns NETDEV_TX_OK if sent, else an error code
2334  */
2335 static netdev_tx_t
2336 ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2337 {
2338 	struct ice_tx_offload_params offload = { 0 };
2339 	struct ice_vsi *vsi = tx_ring->vsi;
2340 	struct ice_tx_buf *first;
2341 	struct ethhdr *eth;
2342 	unsigned int count;
2343 	int tso, csum;
2344 
2345 	ice_trace(xmit_frame_ring, tx_ring, skb);
2346 
2347 	if (unlikely(ipv6_hopopt_jumbo_remove(skb)))
2348 		goto out_drop;
2349 
2350 	count = ice_xmit_desc_count(skb);
2351 	if (ice_chk_linearize(skb, count)) {
2352 		if (__skb_linearize(skb))
2353 			goto out_drop;
2354 		count = ice_txd_use_count(skb->len);
2355 		tx_ring->ring_stats->tx_stats.tx_linearize++;
2356 	}
2357 
2358 	/* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2359 	 *       + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2360 	 *       + 4 desc gap to avoid the cache line where head is,
2361 	 *       + 1 desc for context descriptor,
2362 	 * otherwise try next time
2363 	 */
2364 	if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2365 			      ICE_DESCS_FOR_CTX_DESC)) {
2366 		tx_ring->ring_stats->tx_stats.tx_busy++;
2367 		return NETDEV_TX_BUSY;
2368 	}
2369 
2370 	/* prefetch for bql data which is infrequently used */
2371 	netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2372 
2373 	offload.tx_ring = tx_ring;
2374 
2375 	/* record the location of the first descriptor for this packet */
2376 	first = &tx_ring->tx_buf[tx_ring->next_to_use];
2377 	first->skb = skb;
2378 	first->type = ICE_TX_BUF_SKB;
2379 	first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2380 	first->gso_segs = 1;
2381 	first->tx_flags = 0;
2382 
2383 	/* prepare the VLAN tagging flags for Tx */
2384 	ice_tx_prepare_vlan_flags(tx_ring, first);
2385 	if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2386 		offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2387 					(ICE_TX_CTX_DESC_IL2TAG2 <<
2388 					ICE_TXD_CTX_QW1_CMD_S));
2389 		offload.cd_l2tag2 = first->vid;
2390 	}
2391 
2392 	/* set up TSO offload */
2393 	tso = ice_tso(first, &offload);
2394 	if (tso < 0)
2395 		goto out_drop;
2396 
2397 	/* always set up Tx checksum offload */
2398 	csum = ice_tx_csum(first, &offload);
2399 	if (csum < 0)
2400 		goto out_drop;
2401 
2402 	/* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2403 	eth = (struct ethhdr *)skb_mac_header(skb);
2404 	if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2405 		      eth->h_proto == htons(ETH_P_LLDP)) &&
2406 		     vsi->type == ICE_VSI_PF &&
2407 		     vsi->port_info->qos_cfg.is_sw_lldp))
2408 		offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2409 					ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2410 					ICE_TXD_CTX_QW1_CMD_S);
2411 
2412 	ice_tstamp(tx_ring, skb, first, &offload);
2413 	if (ice_is_switchdev_running(vsi->back))
2414 		ice_eswitch_set_target_vsi(skb, &offload);
2415 
2416 	if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2417 		struct ice_tx_ctx_desc *cdesc;
2418 		u16 i = tx_ring->next_to_use;
2419 
2420 		/* grab the next descriptor */
2421 		cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2422 		i++;
2423 		tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2424 
2425 		/* setup context descriptor */
2426 		cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2427 		cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2428 		cdesc->rsvd = cpu_to_le16(0);
2429 		cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2430 	}
2431 
2432 	ice_tx_map(tx_ring, first, &offload);
2433 	return NETDEV_TX_OK;
2434 
2435 out_drop:
2436 	ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2437 	dev_kfree_skb_any(skb);
2438 	return NETDEV_TX_OK;
2439 }
2440 
2441 /**
2442  * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2443  * @skb: send buffer
2444  * @netdev: network interface device structure
2445  *
2446  * Returns NETDEV_TX_OK if sent, else an error code
2447  */
2448 netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2449 {
2450 	struct ice_netdev_priv *np = netdev_priv(netdev);
2451 	struct ice_vsi *vsi = np->vsi;
2452 	struct ice_tx_ring *tx_ring;
2453 
2454 	tx_ring = vsi->tx_rings[skb->queue_mapping];
2455 
2456 	/* hardware can't handle really short frames, hardware padding works
2457 	 * beyond this point
2458 	 */
2459 	if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2460 		return NETDEV_TX_OK;
2461 
2462 	return ice_xmit_frame_ring(skb, tx_ring);
2463 }
2464 
2465 /**
2466  * ice_get_dscp_up - return the UP/TC value for a SKB
2467  * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2468  * @skb: SKB to query for info to determine UP/TC
2469  *
2470  * This function is to only be called when the PF is in L3 DSCP PFC mode
2471  */
2472 static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2473 {
2474 	u8 dscp = 0;
2475 
2476 	if (skb->protocol == htons(ETH_P_IP))
2477 		dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2478 	else if (skb->protocol == htons(ETH_P_IPV6))
2479 		dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2480 
2481 	return dcbcfg->dscp_map[dscp];
2482 }
2483 
2484 u16
2485 ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2486 		 struct net_device *sb_dev)
2487 {
2488 	struct ice_pf *pf = ice_netdev_to_pf(netdev);
2489 	struct ice_dcbx_cfg *dcbcfg;
2490 
2491 	dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2492 	if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2493 		skb->priority = ice_get_dscp_up(dcbcfg, skb);
2494 
2495 	return netdev_pick_tx(netdev, skb, sb_dev);
2496 }
2497 
2498 /**
2499  * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2500  * @tx_ring: tx_ring to clean
2501  */
2502 void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2503 {
2504 	struct ice_vsi *vsi = tx_ring->vsi;
2505 	s16 i = tx_ring->next_to_clean;
2506 	int budget = ICE_DFLT_IRQ_WORK;
2507 	struct ice_tx_desc *tx_desc;
2508 	struct ice_tx_buf *tx_buf;
2509 
2510 	tx_buf = &tx_ring->tx_buf[i];
2511 	tx_desc = ICE_TX_DESC(tx_ring, i);
2512 	i -= tx_ring->count;
2513 
2514 	do {
2515 		struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2516 
2517 		/* if next_to_watch is not set then there is no pending work */
2518 		if (!eop_desc)
2519 			break;
2520 
2521 		/* prevent any other reads prior to eop_desc */
2522 		smp_rmb();
2523 
2524 		/* if the descriptor isn't done, no work to do */
2525 		if (!(eop_desc->cmd_type_offset_bsz &
2526 		      cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2527 			break;
2528 
2529 		/* clear next_to_watch to prevent false hangs */
2530 		tx_buf->next_to_watch = NULL;
2531 		tx_desc->buf_addr = 0;
2532 		tx_desc->cmd_type_offset_bsz = 0;
2533 
2534 		/* move past filter desc */
2535 		tx_buf++;
2536 		tx_desc++;
2537 		i++;
2538 		if (unlikely(!i)) {
2539 			i -= tx_ring->count;
2540 			tx_buf = tx_ring->tx_buf;
2541 			tx_desc = ICE_TX_DESC(tx_ring, 0);
2542 		}
2543 
2544 		/* unmap the data header */
2545 		if (dma_unmap_len(tx_buf, len))
2546 			dma_unmap_single(tx_ring->dev,
2547 					 dma_unmap_addr(tx_buf, dma),
2548 					 dma_unmap_len(tx_buf, len),
2549 					 DMA_TO_DEVICE);
2550 		if (tx_buf->type == ICE_TX_BUF_DUMMY)
2551 			devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2552 
2553 		/* clear next_to_watch to prevent false hangs */
2554 		tx_buf->type = ICE_TX_BUF_EMPTY;
2555 		tx_buf->tx_flags = 0;
2556 		tx_buf->next_to_watch = NULL;
2557 		dma_unmap_len_set(tx_buf, len, 0);
2558 		tx_desc->buf_addr = 0;
2559 		tx_desc->cmd_type_offset_bsz = 0;
2560 
2561 		/* move past eop_desc for start of next FD desc */
2562 		tx_buf++;
2563 		tx_desc++;
2564 		i++;
2565 		if (unlikely(!i)) {
2566 			i -= tx_ring->count;
2567 			tx_buf = tx_ring->tx_buf;
2568 			tx_desc = ICE_TX_DESC(tx_ring, 0);
2569 		}
2570 
2571 		budget--;
2572 	} while (likely(budget));
2573 
2574 	i += tx_ring->count;
2575 	tx_ring->next_to_clean = i;
2576 
2577 	/* re-enable interrupt if needed */
2578 	ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2579 }
2580