10d08a441SKiran Patil /* SPDX-License-Identifier: GPL-2.0 */
20d08a441SKiran Patil /* Copyright (C) 2019-2021, Intel Corporation. */
30d08a441SKiran Patil 
40d08a441SKiran Patil #ifndef _ICE_TC_LIB_H_
50d08a441SKiran Patil #define _ICE_TC_LIB_H_
60d08a441SKiran Patil 
70d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_DST_MAC		BIT(0)
80d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_SRC_MAC		BIT(1)
90d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_VLAN			BIT(2)
100d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_DEST_IPV4		BIT(3)
110d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_SRC_IPV4		BIT(4)
120d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_DEST_IPV6		BIT(5)
130d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_SRC_IPV6		BIT(6)
140d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_DEST_L4_PORT		BIT(7)
150d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_SRC_L4_PORT		BIT(8)
160d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_TENANT_ID		BIT(9)
170d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_ENC_DEST_IPV4		BIT(10)
180d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_ENC_SRC_IPV4		BIT(11)
190d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_ENC_DEST_IPV6		BIT(12)
200d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_ENC_SRC_IPV6		BIT(13)
210d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_ENC_DEST_L4_PORT	BIT(14)
220d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_ENC_SRC_L4_PORT	BIT(15)
230d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_ENC_DST_MAC		BIT(16)
240d08a441SKiran Patil #define ICE_TC_FLWR_FIELD_ETH_TYPE_ID		BIT(17)
259a225f81SMarcin Szycik #define ICE_TC_FLWR_FIELD_ENC_OPTS		BIT(18)
2606bca7c2SMartyna Szapar-Mudlaw #define ICE_TC_FLWR_FIELD_CVLAN			BIT(19)
27cd8efeeeSMarcin Szycik #define ICE_TC_FLWR_FIELD_PPPOE_SESSID		BIT(20)
28cd8efeeeSMarcin Szycik #define ICE_TC_FLWR_FIELD_PPP_PROTO		BIT(21)
294c99bc96SMarcin Szycik #define ICE_TC_FLWR_FIELD_IP_TOS		BIT(22)
304c99bc96SMarcin Szycik #define ICE_TC_FLWR_FIELD_IP_TTL		BIT(23)
314c99bc96SMarcin Szycik #define ICE_TC_FLWR_FIELD_ENC_IP_TOS		BIT(24)
324c99bc96SMarcin Szycik #define ICE_TC_FLWR_FIELD_ENC_IP_TTL		BIT(25)
33cd634549SMarcin Szycik #define ICE_TC_FLWR_FIELD_L2TPV3_SESSID		BIT(26)
34*34800178SMartyna Szapar-Mudlaw #define ICE_TC_FLWR_FIELD_VLAN_PRIO		BIT(27)
35*34800178SMartyna Szapar-Mudlaw #define ICE_TC_FLWR_FIELD_CVLAN_PRIO		BIT(28)
360d08a441SKiran Patil 
379e300987SMichal Swiatkowski #define ICE_TC_FLOWER_MASK_32   0xFFFFFFFF
389e300987SMichal Swiatkowski 
394c99bc96SMarcin Szycik #define ICE_IPV6_HDR_TC_MASK 0xFF00000
404c99bc96SMarcin Szycik 
41195bb48fSMichal Swiatkowski struct ice_indr_block_priv {
42195bb48fSMichal Swiatkowski 	struct net_device *netdev;
43195bb48fSMichal Swiatkowski 	struct ice_netdev_priv *np;
44195bb48fSMichal Swiatkowski 	struct list_head list;
45195bb48fSMichal Swiatkowski };
46195bb48fSMichal Swiatkowski 
470d08a441SKiran Patil struct ice_tc_flower_action {
480d08a441SKiran Patil 	u32 tc_class;
490d08a441SKiran Patil 	enum ice_sw_fwd_act_type fltr_act;
500d08a441SKiran Patil };
510d08a441SKiran Patil 
520d08a441SKiran Patil struct ice_tc_vlan_hdr {
530d08a441SKiran Patil 	__be16 vlan_id; /* Only last 12 bits valid */
54*34800178SMartyna Szapar-Mudlaw 	__be16 vlan_prio; /* Only last 3 bits valid (valid values: 0..7) */
55ea71b967SMartyna Szapar-Mudlaw 	__be16 vlan_tpid;
560d08a441SKiran Patil };
570d08a441SKiran Patil 
58cd8efeeeSMarcin Szycik struct ice_tc_pppoe_hdr {
59cd8efeeeSMarcin Szycik 	__be16 session_id;
60cd8efeeeSMarcin Szycik 	__be16 ppp_proto;
61cd8efeeeSMarcin Szycik };
62cd8efeeeSMarcin Szycik 
630d08a441SKiran Patil struct ice_tc_l2_hdr {
640d08a441SKiran Patil 	u8 dst_mac[ETH_ALEN];
650d08a441SKiran Patil 	u8 src_mac[ETH_ALEN];
660d08a441SKiran Patil 	__be16 n_proto;    /* Ethernet Protocol */
670d08a441SKiran Patil };
680d08a441SKiran Patil 
690d08a441SKiran Patil struct ice_tc_l3_hdr {
700d08a441SKiran Patil 	u8 ip_proto;    /* IPPROTO value */
710d08a441SKiran Patil 	union {
720d08a441SKiran Patil 		struct {
730d08a441SKiran Patil 			struct in_addr dst_ip;
740d08a441SKiran Patil 			struct in_addr src_ip;
750d08a441SKiran Patil 		} v4;
760d08a441SKiran Patil 		struct {
770d08a441SKiran Patil 			struct in6_addr dst_ip6;
780d08a441SKiran Patil 			struct in6_addr src_ip6;
790d08a441SKiran Patil 		} v6;
800d08a441SKiran Patil 	} ip;
810d08a441SKiran Patil #define dst_ipv6	ip.v6.dst_ip6.s6_addr32
820d08a441SKiran Patil #define dst_ipv6_addr	ip.v6.dst_ip6.s6_addr
830d08a441SKiran Patil #define src_ipv6	ip.v6.src_ip6.s6_addr32
840d08a441SKiran Patil #define src_ipv6_addr	ip.v6.src_ip6.s6_addr
850d08a441SKiran Patil #define dst_ipv4	ip.v4.dst_ip.s_addr
860d08a441SKiran Patil #define src_ipv4	ip.v4.src_ip.s_addr
870d08a441SKiran Patil 
880d08a441SKiran Patil 	u8 tos;
890d08a441SKiran Patil 	u8 ttl;
900d08a441SKiran Patil };
910d08a441SKiran Patil 
92cd634549SMarcin Szycik struct ice_tc_l2tpv3_hdr {
93cd634549SMarcin Szycik 	__be32 session_id;
94cd634549SMarcin Szycik };
95cd634549SMarcin Szycik 
960d08a441SKiran Patil struct ice_tc_l4_hdr {
970d08a441SKiran Patil 	__be16 dst_port;
980d08a441SKiran Patil 	__be16 src_port;
990d08a441SKiran Patil };
1000d08a441SKiran Patil 
1010d08a441SKiran Patil struct ice_tc_flower_lyr_2_4_hdrs {
1020d08a441SKiran Patil 	/* L2 layer fields with their mask */
1030d08a441SKiran Patil 	struct ice_tc_l2_hdr l2_key;
1040d08a441SKiran Patil 	struct ice_tc_l2_hdr l2_mask;
1050d08a441SKiran Patil 	struct ice_tc_vlan_hdr vlan_hdr;
10606bca7c2SMartyna Szapar-Mudlaw 	struct ice_tc_vlan_hdr cvlan_hdr;
107cd8efeeeSMarcin Szycik 	struct ice_tc_pppoe_hdr pppoe_hdr;
108cd634549SMarcin Szycik 	struct ice_tc_l2tpv3_hdr l2tpv3_hdr;
1090d08a441SKiran Patil 	/* L3 (IPv4[6]) layer fields with their mask */
1100d08a441SKiran Patil 	struct ice_tc_l3_hdr l3_key;
1110d08a441SKiran Patil 	struct ice_tc_l3_hdr l3_mask;
1120d08a441SKiran Patil 
1130d08a441SKiran Patil 	/* L4 layer fields with their mask */
1140d08a441SKiran Patil 	struct ice_tc_l4_hdr l4_key;
1150d08a441SKiran Patil 	struct ice_tc_l4_hdr l4_mask;
1160d08a441SKiran Patil };
1170d08a441SKiran Patil 
1180d08a441SKiran Patil enum ice_eswitch_fltr_direction {
1190d08a441SKiran Patil 	ICE_ESWITCH_FLTR_INGRESS,
1200d08a441SKiran Patil 	ICE_ESWITCH_FLTR_EGRESS,
1210d08a441SKiran Patil };
1220d08a441SKiran Patil 
1230d08a441SKiran Patil struct ice_tc_flower_fltr {
1240d08a441SKiran Patil 	struct hlist_node tc_flower_node;
1250d08a441SKiran Patil 
1260d08a441SKiran Patil 	/* cookie becomes filter_rule_id if rule is added successfully */
1270d08a441SKiran Patil 	unsigned long cookie;
1280d08a441SKiran Patil 
1290d08a441SKiran Patil 	/* add_adv_rule returns information like recipe ID, rule_id. Store
1300d08a441SKiran Patil 	 * those values since they are needed to remove advanced rule
1310d08a441SKiran Patil 	 */
1320d08a441SKiran Patil 	u16 rid;
1330d08a441SKiran Patil 	u16 rule_id;
1340d08a441SKiran Patil 	/* this could be queue/vsi_idx (sw handle)/queue_group, depending upon
1350d08a441SKiran Patil 	 * destination type
1360d08a441SKiran Patil 	 */
1370d08a441SKiran Patil 	u16 dest_id;
1380d08a441SKiran Patil 	/* if dest_id is vsi_idx, then need to store destination VSI ptr */
1390d08a441SKiran Patil 	struct ice_vsi *dest_vsi;
1400d08a441SKiran Patil 	/* direction of fltr for eswitch use case */
1410d08a441SKiran Patil 	enum ice_eswitch_fltr_direction direction;
1420d08a441SKiran Patil 
1430d08a441SKiran Patil 	/* Parsed TC flower configuration params */
1440d08a441SKiran Patil 	struct ice_tc_flower_lyr_2_4_hdrs outer_headers;
1450d08a441SKiran Patil 	struct ice_tc_flower_lyr_2_4_hdrs inner_headers;
1460d08a441SKiran Patil 	struct ice_vsi *src_vsi;
1470d08a441SKiran Patil 	__be32 tenant_id;
1489a225f81SMarcin Szycik 	struct gtp_pdu_session_info gtp_pdu_info_keys;
1499a225f81SMarcin Szycik 	struct gtp_pdu_session_info gtp_pdu_info_masks;
1500d08a441SKiran Patil 	u32 flags;
1519e300987SMichal Swiatkowski 	u8 tunnel_type;
1520d08a441SKiran Patil 	struct ice_tc_flower_action	action;
1530d08a441SKiran Patil 
1540d08a441SKiran Patil 	/* cache ptr which is used wherever needed to communicate netlink
1550d08a441SKiran Patil 	 * messages
1560d08a441SKiran Patil 	 */
1570d08a441SKiran Patil 	struct netlink_ext_ack *extack;
1580d08a441SKiran Patil };
1590d08a441SKiran Patil 
1609fea7498SKiran Patil /**
1619fea7498SKiran Patil  * ice_is_chnl_fltr - is this a valid channel filter
1629fea7498SKiran Patil  * @f: Pointer to tc-flower filter
1639fea7498SKiran Patil  *
1649fea7498SKiran Patil  * Criteria to determine of given filter is valid channel filter
1659fea7498SKiran Patil  * or not is based on its "destination". If destination is hw_tc (aka tc_class)
1669fea7498SKiran Patil  * and it is non-zero, then it is valid channel (aka ADQ) filter
1679fea7498SKiran Patil  */
1689fea7498SKiran Patil static inline bool ice_is_chnl_fltr(struct ice_tc_flower_fltr *f)
1699fea7498SKiran Patil {
1709fea7498SKiran Patil 	return !!f->action.tc_class;
1719fea7498SKiran Patil }
1729fea7498SKiran Patil 
1739fea7498SKiran Patil /**
1749fea7498SKiran Patil  * ice_chnl_dmac_fltr_cnt - DMAC based CHNL filter count
1759fea7498SKiran Patil  * @pf: Pointer to PF
1769fea7498SKiran Patil  */
1779fea7498SKiran Patil static inline int ice_chnl_dmac_fltr_cnt(struct ice_pf *pf)
1789fea7498SKiran Patil {
1799fea7498SKiran Patil 	return pf->num_dmac_chnl_fltrs;
1809fea7498SKiran Patil }
1819fea7498SKiran Patil 
1820d08a441SKiran Patil int
1830d08a441SKiran Patil ice_add_cls_flower(struct net_device *netdev, struct ice_vsi *vsi,
1840d08a441SKiran Patil 		   struct flow_cls_offload *cls_flower);
1850d08a441SKiran Patil int
1860d08a441SKiran Patil ice_del_cls_flower(struct ice_vsi *vsi, struct flow_cls_offload *cls_flower);
1877fde6d8bSMichal Swiatkowski void ice_replay_tc_fltrs(struct ice_pf *pf);
1889e300987SMichal Swiatkowski bool ice_is_tunnel_supported(struct net_device *dev);
1890d08a441SKiran Patil 
1900d08a441SKiran Patil #endif /* _ICE_TC_LIB_H_ */
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